amorie [mailto:j...@xiphos.ca]
> Sent: Tuesday, December 30, 2008 12:14 PM
> To: John Linn
> Cc: linuxppc-embedded@ozlabs.org
> Subject: RE: virtex uImage and serial ports
>
> Gidday John,
>
> Thanks for the pointer. I think I have already gone through every
possible page on the w
Hi Joshua,
Have you looked at our wiki site at http://xilinx.wikidot.com as we
quite a bit of information there.
The ML405 board is a V2Pro chip so it should be pretty close to what you
want using the default kernel config for virtex4.
I haven't tested the console at 115,200 as I use it at 9600.
You should visit http://xilinx.wikidot.com as there's more information there.
In general, this board is not directly supported, but is very similar to ML405,
a board with a Virtex 4 and a 405 processor.
Thanks,
John
> -Original Message-
> From: [EMAIL PROTECTED] [mailto:linuxppc-embedde
Hi Stuart,
Most of my work is in the kernel rather than user space, but I've used
old GDB versions a small amount. I'm copying Brian as he has used it
more than myself.
Did you get older versions of GDB to work but not the 6.8?
Did you build GDB yourself or using prebuilt?
With regards to usin
We don't directly support the V2Pro, but we do support the Virtex 4
which also uses the ppc405 in the Xilinx GIT Tree.
git://git.xilinx.com
http://git.xilinx.com
You should make sure that you use arch/powerpc rather than arch/ppc
which many older web sites have tutorials about. Arch/ppc is not lo
1:46 AM
> To: Bruno Monteiro
> Cc: John Linn; linuxppc-embedded@ozlabs.org
> Subject: Re: Compile program using XGpio
>
> On Thu, Oct 23, 2008 at 10:58 AM, Bruno Monteiro
<[EMAIL PROTECTED]> wrote:
> > Hi,
> >
> > I'm a new driver writer and i'm t
See the inline comments.
> -Original Message-
> From: [EMAIL PROTECTED] [mailto:linuxppc-embedded-
> [EMAIL PROTECTED] On Behalf Of Mirsad Vejseli
> Sent: Wednesday, October 22, 2008 6:10 AM
> To: linuxppc-embedded@ozlabs.org
> Subject: virtex 4 linux driver bus error
>
> hello at all,
>
Hi Bruno,
I don't think you can do what you're trying to do, unless I'm
misunderstanding or just not smart enough.
The EDK from Xilinx ships with drivers that are not Linux drivers.
Those functions in main below are intended for a standalone (no RTOS)
system such they can't just be called f
Hi Peter,
Sorry for the delay. Are you using arch/powerpc and the xilinx_gpio
driver from the Xilinx Git tree has not been converted to use device
tree yet?
We have a new gpio driver that we have not released out yet that is
flattened and designed to work with arch/powerpc. I have recentl
Hi Ming,
Arch/ppc has gone away. We don’t support it any longer as it went away in the
mainline kernel also. You should migrate to arch/powerpc.
There is a git tag, last-arch-ppc, that is visible from
http://git.xilinx.com/linux-2.6-xlnx.git. You can use that tag in git to reset
back
Hi Ming,
I’m copying our local expert on this core to see his thoughts as I don’t
actively use this core myself.
Thanks,
John
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of MingLiu
Sent: Wednesday, October 08, 2008 7:48 AM
To: linuxppc
09, 2008 12:19 PM
> To: John Linn
> Cc: linuxppc-embedded@ozlabs.org
> Subject: Re: Device Tree
>
> Hi John,
>
> yes, i found the wiki link in another post of you. nice , thank you.
> can you tell me how to generate the dts file in the EDK 10.2 ? i have
> read that the
Hi Georg,
Our git tree, git://git.xilinx.com, has support for the ML405 board
which is a V4 board. The following wiki page, http://xilinx.wikidot.com,
shows how to generate a device tree for the kernel and other details
you'll need.
The kernel from our git tree is configured for the device tree u
Hi Stu,
I have attached the MHS file for the v2 bitstream.
I just pushed out changes yesterday to our git tree that move us to a
new bit stream that is based on the V5FXT development kit that Xilinx
released on xilinx.com. If interested, you can find more info on
http://xilinx.wikidot.com.
Than
Hi Georg,
There is no way to configure the PHY using the EMAC lite as that's part
of what makes it "lite".
So the PHY on the board has to be configured correctly by strapping it
on the board.
Maybe you can include other PHY drivers to do this as I'm not sure about
that.
Thanks,
John
> -
Hi Georg,
I don't really know much about the state of the emac lite driver in the
Git tree. I inherited the Git tree with some stuff already in it.
I test the LL TEMAC driver, but haven't had the bandwidth and priority
to do any emac lite testing.
Thanks,
John
> -Original Message-
> Fro
Hi Vineeth,
I don't directly support that board, but it's similar to the ML405 in
that it uses a 405 processor. Since I don't test on that board or any
V2Pro board, I'm going to tell you my experience on the ML405, a V4
board.
See below.
> -Original Message-
> From: [EMAIL PROTECTED]
[m
I'm not claiming to be a Linux driver expert as I'm still learning.
Some of the comments are nits.
Thanks for the effort you're putting in on this.
> Linux Device Driver for Xilinx LL TEMAC 10/100/1000 Ethernet NIC
>
> Original Author Yoshio Kashiwagi
> Updated and Maintained by David Lynch
>
>
I screwed up and forgot to copy all on this previously.
> -Original Message-
> From: David H. Lynch Jr. [mailto:[EMAIL PROTECTED]
> Sent: Tuesday, August 19, 2008 3:19 PM
> To: John Linn
> Subject: Re: [PATCH] Linux Device Driver for Xilinx LL TEMAC
10/100/1000 EthernetNIC
not been high priority for us.
Thanks,
John
> -Original Message-
> From: Alan Casey [mailto:[EMAIL PROTECTED]
> Sent: Friday, August 15, 2008 8:36 AM
> To: John Linn; wangyanlong; linuxppc-embedded@ozlabs.org
> Subject: RE: Linux issues on Xilinx XUPV2P board
>
> Hi John,
Hi Alan,
I'm assuming you must not have Git installed from the question,
otherwise you would be using git clone as the site shows.
On the http://git.xilinx.com, it says the following,
Users without Git installed may create a tar file by using the snapshot
feature. Select the tree view of the re
___
From: Stu Bershtein [mailto:[EMAIL PROTECTED]
Sent: Wednesday, August 13, 2008 9:34 AM
To: John Linn; linuxppc-embedded@ozlabs.org
Subject: RE: ml507 initrd problem
Morning John,
Thanks for the tip. Running said ramdisk things certainly look lively,
I'll add a lis
Hi Stu,
I realize you are trying to get your own ram disk to work, but if you
want to get a baseline you can use one we have on our wiki site, at
http://xilinx.wikidot.com/open-source-linux, under Files To Download.
This is the same ram disk that is included in the ELDK.
This is the ram dis
Hi Grant,
John Bonesio is working with Montavista to get these problems solved.
Thanks,
John
> -Original Message-
> From: [EMAIL PROTECTED]
[mailto:linuxppc-embedded-
> [EMAIL PROTECTED] On Behalf Of Grant Likely
> Sent: Thursday, July 31, 2008 8:34 PM
> To: Naresh Bhat
> Cc: linuxppc-em
{resend as I forgot to send to the mailing list)
Hi Mirek,
Since this is a u-boot issue, we can move this conversation off this
list.
The u-boot that is in the git repository has not been tested on the
Virtex4 platform.
I have only tested on the ML507, Virtex 5 platform.
There's not a ML403/ML
Hi Mirek,
We are not currently testing the LL TEMAC driver with the LL FIFO. We
only test with the DMA configuration. I also realize this may not be
documented that well and we may need to work on that.
Our reasoning is that in the Virtex5 FXT devices the DMA is hard so that
it does not cost any
nt: Thursday, July 10, 2008 1:25 AM
To: [EMAIL PROTECTED]; John Linn; [EMAIL PROTECTED]
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Booting ML405 (Kernel panic - not syncing: No init found)
Hi,
Yes I am using ARCH=ppc (actual line is $make ARCH=ppc
CROSS_COMPILE=powerpc-405-linux-gnu- zImage.init
The only difference I see is the tools, we are using ELDK 4.1 for now.
I have tested this on the ML405 in the past, not for a bit as our
automated testing uses an NFS root.
Since this is arch/ppc (it appears, no boot line), we have stopped work
on this architecture and are now encouraging (maybe
Hi Lorenzo,
I'm assuming you're trying to use the reference design bit stream for
the ML405 that we have had out on the http://git.xilinx.com site?
Since the bootstrap loader is working, the UART appears to be OK.
Assuming you have the kernel configuration right with the 8250 driver
and the conso
about the console, "enabled", look
the same as the 550 as I have seen that give hints to problems
sometimes.
Thanks,
John
-Original Message-
From: Peter Mendham [mailto:[EMAIL PROTECTED]
Sent: Friday, June 27, 2008 6:31 AM
To: John Linn
Cc: linuxppc-embedded@ozlabs.org
Subject:
much. Sorry it's not one of my primary test cases at this point
in time.
Thanks,
John
-Original Message-
From: Peter Mendham [mailto:[EMAIL PROTECTED]
Sent: Thursday, June 26, 2008 7:24 AM
To: John Linn
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Linux on Virtex board with ARCH=p
Thanks and sorry for the inconvenience,
John
-Original Message-
From: Peter Mendham [mailto:[EMAIL PROTECTED]
Sent: Wednesday, June 25, 2008 10:18 AM
To: John Linn
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Linux on Virtex board with ARCH=powerpc
OK, this is all new to me, so please be
compatible = "xlnx,xps-bram-if-cntlr-1.00.a";
reg = < ffffe000 2000 >;
xlnx,family = "virtex4";
} ;
xps_intc_0: [EMAIL PROTECTED] {
#interrupt-cells = <2>;
Hi Peter,
I'm not up on what can be done with the simple image you refer to in 1.
I'm sure I should be, but there's a lot to learn.
With regards to 2, the elf image, zImage (without the elf extension), is
located in arch/powerpc/boot.
You can make a SystemACE file from that elf image just as you
ault kernel configuration.
Maybe this is not what you're looking for, but thought I'd offer. Others
have used this to get their own boards running with Linux.
Look at Documentation/powerpc/booting-without-of.txt for some device
tree information.
Thanks,
John Linn
Linux Development & St
Hi Peter,
Yes you need to enable UARTLITE as the console in the kernel
configuration.
You have the command line syntax, ttyUL0, correct.
They have now changed the UART 16550 to be a free core in the EDK, not
sure which version of the EDK that happened.
Thanks,
John
-Original Message-
F
pc/boot/dts directory, is setup to use the
ramdisk.
> make ARCH=powerpc zImage.initrd
Hope that helps,
John Linn
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On
Behalf Of somshekar c kadam
Sent: Monday, June 02, 2008 4:19 PM
To: linuxppc-embedded@ozlabs.o
I don't know, I'm not familiar with what you are doing and it's not clear from
the message.
-- John
From: rodolfo [mailto:[EMAIL PROTECTED]
Sent: Wed 5/28/2008 12:05 PM
To: John Linn
Cc: Mirek23; linuxppc-embedded@ozlabs.org
Subject: RE: Cros
Hi Miroslaw,
I'm not sure on what version of gcc and glibc it's using, but I have been using
ELDK 4.1 from denx.com. There are newer versions.
Thanks,
John
-Original Message-
From: [EMAIL PROTECTED] on behalf of Mirek23
Sent: Wed 5/28/2008 9:54 AM
To: linuxppc-embedded@ozlabs.org
Sub
Hi Swamy,
Sorry for the long delay. Sounds like the console is not setup
correctly.
I notice in your command line it appears that you have 2 console
statements. I have not tested this ever and I would change it to only
have the console=ttyS0,9600. I have seen other mailings, no Xilinx
specific,
Hi Mike,
Thanks for the input, sounds right to me, we'll put it on the list of
things to do.
In general we will be testing our work on the current version of the
Xilinx tools and not maintaining them for all versions of the Xilinx
tools, but we need a way to spell that out cleanly.
Thanks,
John
in those locations.
I am debugging but do not have much clue.
Swamy
John Linn wrote:
>
> Hi Swamy,
>
> I have seen this sometime before I think, but don't remember why.
>
> I see that udelay depends on loops_per_jiffy, have you looked to see
> what value it is?
Hi Swamy,
I have seen this sometime before I think, but don't remember why.
I see that udelay depends on loops_per_jiffy, have you looked to see
what value it is? Maybe it's garbage and some large value?
Have you tried dumping the __log_buf to understand how far it got thru
booting the kernel be
Hi Mojtaba,
Did you build the FPGA bit stream yourself or get it from somewhere?
Specifying ttyS0 means you should have a 16550 UART in the hardware
build, do you?
-- John
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On
Behalf Of mojtaba
Sent: Tuesday, May 13, 20
I am sending V2 series of patches that fix the OF serial driver and add
support to it and the boot for the Xilinx UART 16550.
The ePAPR, although not a formal spec yet, proposes allowing reg-shift
for ns16550. We believe this is a reasonable approach and have
implemented it in this patch series
ssage-
From: Peter Korsgaard [mailto:[EMAIL PROTECTED] On Behalf Of Peter
Korsgaard
Sent: Wednesday, April 02, 2008 3:51 AM
To: John Linn
Cc: linuxppc-embedded@ozlabs.org; git
Subject: Re: Virtex V5FX PPC 440 Support In Xilinx Git Tree
>>>>> "John" == John Linn <[EM
Hi Rob,
I am using GigE and no checksum offload.
I don't have a quick way to test packet loss.
EDK 10.1 may help your problem.
-- John
-Original Message-
From: Robert Woodworth [mailto:[EMAIL PROTECTED]
Sent: Tuesday, April 01, 2008 5:44 PM
To: John Linn
Cc: MingLiu; lin
I pushed PowerPC 440 support to the Xilinx Git server with support for
ppc arch and with powerpc arch support coming in the near future.
A default kernel configuration file, ml507_defconfig, is provided in the
kernel tree to support the Xilinx ML507 board with the PowerPC 440.
Thanks,
Joh
AM
To: MingLiu
Cc: John Linn; linuxppc-embedded@ozlabs.org
Subject: RE: xilinx Ml405 NFS mount problem
I think you may be suffering from the latest LL_TEMAC packet loss
problem. (NFS/UDP really does not like packet loss)
Let me guess.
You are using a base system from "Base System Builder Wi
Hi Ming,
It’s not obvious to me what the problem is as I don’t see any driver failures.
Have you tried using a ramdisk and then seeing if the network is working before
using NFS root?
And I’m assuming you have used the NFS root before so you know that it’s good
for sure.
I test on
Hi Mirek,
Our Git server from Xilinx, git.xilinx.com, has a kernel that is 2.6.24
based if this helps.
All of my testing for Virtex 4 is on the ML405 board which is an FX20
device rather than an FX12, but the kernel configuration is pretty much
compatible.
Thanks,
John
-Original Message---
Hi Magnus,
Sorry to hear you're having problems with it.
I am doing testing on an ML405 which is the same board but with a bigger FPGA,
but with ppc arch and I don't see this issue. I have done limited testing with
powerpc arch and the LL TEMAC, but I didn't see this issue there either.
Power
[mailto:[EMAIL PROTECTED] On Behalf Of
Grant Likely
Sent: Friday, March 28, 2008 5:25 PM
To: [EMAIL PROTECTED]; Stephen Neuendorffer; John Linn
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Network Bad Kernel Access
On Sun, Aug 26, 2007 at 7:00 PM, <[EMAIL PROTECTED]>
wrote:
> I am h
Hi Jose,
I didn't see that you configured the kernel to put the Xilinx system ace driver
in?
It's under device drivers, block devices.
Thanks,
John
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of José Luis
Añamuro Machicao
Sent: We
Hi Kevin,
I didn't write the code but I know the driver somewhat.
I think the intention of stopping the timer is to prevent the reentrancy
as the comment says because there is a function, gmii_poll, that is
setup on the timer to go read the phy registers to see if anything
changed in the phy.
S
n pull from
our server if you want as I know the state of it
(git://git.xilinx.com/linux-2.6-xlnx.git).
Thanks
John Linn
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On
Behalf Of Rob Schalken
Sent: Wednesday, March 19, 2008 8:02 AM
To: linuxppc-embe
Hi Robert,
Here's a link to an app note on it. I'm using it on the 405 right now as
we speak. I used the app note to get it working.
If you have problems, let me know.
http://www.xilinx.com/support/documentation/application_notes/xapp981.pd
f
Thanks,
John Linn
Xilinx O
Hi Ramkumar,
XMD can definitely be used to help debug a kernel. I use it to dump
registers and to dump memory. I'm not sure on the TLB entries yet but
will check into it. I'm sure that XMD does not handle any virtual
address to physical conversions.
I use it to dump the log buff sometime
Hi Kevin,
I couldn't find any example laying around, so I took a shot at it based
on other non-network examples we had. I've not personally done it so
bear that in mind.
I have not tried to compile any of this, just stole parts for places and
pasted in.
Hope it helps,
John
#include
/*
I am loading the mac address into the data of the platform device.
-- John
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of
Grant Likely
Sent: Thursday, March 06, 2008 12:39 PM
To: John Linn
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Problems in
I've added some code to virtex_device_fixup and am seeing some strange
side affects. I've added code to read from an iic device and populate
the mac address including ioremap. The code works fine, but the side
affects are not fine.
Anyone have any experience here?
I see the loops_per_jiff
Hi Magnus,
I just applied the change to the git tree for getting the mac address from the
board data and it looks like I should have taken into account the powerpc arch
also as I was building and testing ppc arch.
It looks like #ifndef needs to be added around the use of the __res for copying
I'm using 2.6.24-rc8 on a PPC 440 and getting this error. I've also seen
another form of it when doing Telnet.
In this case, I'm doing a copy of a file on an NFS mount.
Any help would be appreciated.
Thanks,
John Linn
# cp ftptest2 ftptest2_copied
BUG: s
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