sagar updated this revision to Diff 41232.
sagar added a comment.
Addressed review comments
Repository:
rL LLVM
http://reviews.llvm.org/D14633
Files:
source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
Index:
tberghammer accepted this revision.
tberghammer added a comment.
If you want to get this in with using SetBytes I am fine with it but we should
keep an eye on it as I won't be surprised if it will break when somebody try to
read out the data from the RegisterValue object with GetUInt()
sagar added a comment.
Hi,
Could we use SetBytes for now for clearing the bug 25194? I have tried using
SetBytes(), it does not cause any issue on MIPS for both endian. Once we have a
new function to llvm::APInt to access actual data I will revert back to using
SetUInt. Kindly let me know if
sagar added a comment.
Hi,
@tberghammer : For both mips32 and mips64 big endian 'T' packet response
contains the register values in target byte order only. But for mips32 big
endian when we set the value of the register in RegisterValue using
RegisterValue::SetUInt() the upper half of the
tberghammer added a comment.
As far as I know the gdb remote protocol says that the registers in the 'p'
packet should be displayed in target byte order, but the protocol isn't too
well specified (and in my opinion target byte order is a silly decision).
If we accept that the 'p' packet is in
clayborg added a comment.
GDB remote protocol specifies that register values are sent in target byte
order. We shouldn't change this. A big endian system should not send things as
little endian. That being said, the current register context assumes you have a
buffer that can contain all
sagar added a comment.
Hi @tberghammer,
I tried using RegisterValue::SetUInt() instead of RegisterValue::SetBytes().
When using RegisterValue::SetUInt() all register values we get are zero in case
of mips32 big endian machine. The
clayborg requested changes to this revision.
This revision now requires changes to proceed.
Comment at:
source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp:1378
@@ -1377,2 +1377,3 @@
GPR_linux_mips regs;
+lldb_private::ArchSpec arch;
::memset(, 0,
sagar updated this revision to Diff 40256.
sagar added a comment.
Addressed review comments.
Repository:
rL LLVM
http://reviews.llvm.org/D14633
Files:
source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
Index:
sagar added a comment.
> Admittedly it's a bit unintuitive for an unsigned 32-bit value from a MIPS32
> binary to be represented in a 64-bit register as, for example,
> 0x8000 but the debugger shouldn't normally admit to the existence
> of the extra bits when debugging 32-bit code
tberghammer added a comment.
Looks much better, but I think the root cause of your problem is that you are
using RegisterValue::SetBytes instead of RegisterValue::SetUInt. I would
suggest to use a code like this (I don't have a mips environment at the moment
to try it out):
Error
dsanders added a comment.
> The route cause of your problem is that ReadRegisterUnsigned returns a value
> where the 32 MSB is garbage while the
> expected behavior is to zero out those bits (it works on i386 and arm
> AFAIK). You should find out why that is happening
> and fix the root
clayborg requested changes to this revision.
clayborg added a comment.
I agree with tberghammer.
Repository:
rL LLVM
http://reviews.llvm.org/D14633
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