https://github.com/mingmingl-llvm created
https://github.com/llvm/llvm-project/pull/122215
None
>From a2a6f9f5a6f7647f85a230241bf3aa39c4bd65d9 Mon Sep 17 00:00:00 2001
From: mingmingl
Date: Wed, 8 Jan 2025 16:53:45 -0800
Subject: [PATCH] [AsmPrinter][TargetLowering]Place a hot jump table into
https://github.com/Meinersbur ready_for_review
https://github.com/llvm/llvm-project/pull/110217
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https://github.com/Meinersbur edited
https://github.com/llvm/llvm-project/pull/110298
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@@ -650,48 +650,127 @@ literal types are uniqued in recent versions of LLVM.
.. _nointptrtype:
-Non-Integral Pointer Type
--
+Non-Integral and Unstable Pointer Types
+---
-Note: non-integral pointer types are a wor
https://github.com/Meinersbur edited
https://github.com/llvm/llvm-project/pull/110217
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@@ -0,0 +1,232 @@
+#===-- CMakeLists.txt
--===#
+#
+# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+# See https://llvm.org/LICENSE.txt for license information.
+# SPDX-License-Identifier: Apache-
Meinersbur wrote:
> The library is present under
>
> ```
> $PREFIX/flang-rt/lib/x86_64-unknown-linux-gnu/libflang_rt.a
> ```
>
> (where it got installed through the changes in this PR, without any specific
> overrides).
If `$PREFIX` is `CMAKE_INSTALL_DIR`, it is the wrong location. it should
https://github.com/Meinersbur updated
https://github.com/llvm/llvm-project/pull/121782
>From a3037ab5557dcc4a4deb5bb40f801ca9770e3854 Mon Sep 17 00:00:00 2001
From: Michael Kruse
Date: Mon, 6 Jan 2025 16:44:08 +0100
Subject: [PATCH 1/2] Add FLANG_RT_ENABLE_STATIC and FLANG_RT_ENABLE_SHARED
---
@@ -1166,9 +1166,10 @@ def TargetOp : OpenMP_Op<"target", traits = [
], clauses = [
// TODO: Complete clause list (defaultmap, uses_allocators).
OpenMP_AllocateClause, OpenMP_DependClause, OpenMP_DeviceClause,
-OpenMP_HasDeviceAddrClause, OpenMP_IfClause, OpenMP_I
Meinersbur wrote:
> > It is an old problem, see [#87866
> > (comment)](https://github.com/llvm/llvm-project/pull/87866#issuecomment-2214034671)
>
> Can we raise an issue for this?
Created #122152
I don't expect anything come out of it, I think moving to
`LLVM_ENABLE_PER_TARGET_RUNTIME_DIR` b
Meinersbur wrote:
> I think with >1600 commits and >300kLoC changes, something went wrong here
> with the merging. As mentioned by myself and others, it would be good to
> rebase this and condense the commits that belong into #110298 resp. this one.
This happens when I push the branch, that ha
@@ -0,0 +1,232 @@
+#===-- CMakeLists.txt
--===#
+#
+# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+# See https://llvm.org/LICENSE.txt for license information.
+# SPDX-License-Identifier: Apache-
https://github.com/lenary approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/114998
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@@ -122,6 +122,76 @@ subclass and a suitable base multilib variant is present
then the
It is the responsibility of layered multilib authors to ensure that headers and
libraries in each layer are complete enough to mask any incompatibilities.
+Multilib custom flags
+==
https://github.com/vhscampos updated
https://github.com/llvm/llvm-project/pull/114998
>From 9fcdd1760ea664a618a2c05a18e777940a9d49b6 Mon Sep 17 00:00:00 2001
From: Victor Campos
Date: Tue, 5 Nov 2024 14:22:06 +
Subject: [PATCH 1/4] Add documentation for Multilib custom flags
---
clang/doc
https://github.com/kparzysz updated
https://github.com/llvm/llvm-project/pull/121817
>From 5f534c559ca1bb7911b484264582d1a5078bdcb8 Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Thu, 12 Dec 2024 15:26:26 -0600
Subject: [PATCH 1/7] [flang][OpenMP] Parse WHEN, OTHERWISE, MATCH clauses
https://github.com/kparzysz updated
https://github.com/llvm/llvm-project/pull/121815
>From 215c7e6133bf07d005ac7483b8faf797e319a1fa Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Thu, 12 Dec 2024 15:26:26 -0600
Subject: [PATCH] [flang][OpenMP] Parsing context selectors for METADIRECTI
@@ -6182,9 +6182,12 @@ TEST_F(OpenMPIRBuilderTest, TargetRegion) {
TargetRegionEntryInfo EntryInfo("func", 42, 4711, 17);
OpenMPIRBuilder::LocationDescription OmpLoc({Builder.saveIP(), DL});
- OpenMPIRBuilder::InsertPointOrErrorTy AfterIP = OMPBuilder.createTarget(
-
@@ -2726,15 +2740,11 @@ class OpenMPIRBuilder {
///
/// \param Loc The insert and source location description.
/// \param IsSPMD Flag to indicate if the kernel is an SPMD kernel or not.
- /// \param MinThreads Minimal number of threads, or 0.
- /// \param MaxThreads Max
https://github.com/skatrak updated
https://github.com/llvm/llvm-project/pull/116050
>From f73a439832c4e8454274b7677570d190231dcf46 Mon Sep 17 00:00:00 2001
From: Sergio Afonso
Date: Fri, 8 Nov 2024 15:46:48 +
Subject: [PATCH 1/2] [OMPIRBuilder] Introduce struct to hold default kernel
teams
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
Start considering !amdgpu.no.remote.memory.access and
!amdgpu.no.fine.grained.host.memory metadata when deciding to expand
integer atomic operations. This does not yet attempt to accurately
handle fa
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/122138
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arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/122138?utm_source=stack-comment-downstack-mergeability-warning";
@@ -1391,6 +1394,38 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N,
unsigned ResNo) {
SetSplitVector(SDValue(N, ResNo), Lo, Hi);
}
+void DAGTypeLegalizer::SplitVecRes_ATOMIC_LOAD(AtomicSDNode *LD, SDValue &Lo,
+ SDValue
https://github.com/arsenm requested changes to this pull request.
https://github.com/llvm/llvm-project/pull/120640
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@@ -1146,6 +1146,9 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N,
unsigned ResNo) {
SplitVecRes_STEP_VECTOR(N, Lo, Hi);
break;
case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
+ case ISD::ATOMIC_LOAD:
+SplitVecRes_ATOMIC_LOAD(cast(N),
@@ -1391,6 +1394,38 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N,
unsigned ResNo) {
SetSplitVector(SDValue(N, ResNo), Lo, Hi);
}
+void DAGTypeLegalizer::SplitVecRes_ATOMIC_LOAD(AtomicSDNode *LD, SDValue &Lo,
+ SDValue
arsenm wrote:
### Merge activity
* **Jan 8, 10:24 AM EST**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/122049).
https://github.com/llvm/llvm-project/pull/122049
_
https://github.com/skatrak updated
https://github.com/llvm/llvm-project/pull/116049
>From bd7fa379968210047a25e031a8385ff0c43a3fb7 Mon Sep 17 00:00:00 2001
From: Sergio Afonso
Date: Fri, 8 Nov 2024 12:00:45 +
Subject: [PATCH] [MLIR][OpenMP] Add host_eval clause to omp.target
This patch add
https://github.com/ergawy deleted
https://github.com/llvm/llvm-project/pull/116050
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@@ -6182,9 +6182,12 @@ TEST_F(OpenMPIRBuilderTest, TargetRegion) {
TargetRegionEntryInfo EntryInfo("func", 42, 4711, 17);
OpenMPIRBuilder::LocationDescription OmpLoc({Builder.saveIP(), DL});
- OpenMPIRBuilder::InsertPointOrErrorTy AfterIP = OMPBuilder.createTarget(
-
@@ -6182,9 +6182,12 @@ TEST_F(OpenMPIRBuilderTest, TargetRegion) {
TargetRegionEntryInfo EntryInfo("func", 42, 4711, 17);
OpenMPIRBuilder::LocationDescription OmpLoc({Builder.saveIP(), DL});
- OpenMPIRBuilder::InsertPointOrErrorTy AfterIP = OMPBuilder.createTarget(
-
arsenm wrote:
> Why doesn't this fall out naturally from splitting the 64-bit add into 32-bit
> parts and then simplifying each part? Do we leave it as a 64-bit add all the
> way until final instruction selection?
Yes. It gets selected to pseudos which are split in the post-isel hook (I don't
jayfoad wrote:
Why doesn't this fall out naturally from splitting the 64-bit add into 32-bit
parts and then simplifying each part? Do we leave it as a 64-bit add all the
way until final instruction selection?
https://github.com/llvm/llvm-project/pull/122049
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff a08aa48fb4955f9d16c6172580505c100076b5d4
2023940bffc9c717e44266134b4f63f04f65f762 --e
https://github.com/zhaoqi5 edited
https://github.com/llvm/llvm-project/pull/121330
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@@ -443,6 +443,89 @@ bool LoongArchInstrInfo::isSchedulingBoundary(const
MachineInstr &MI,
break;
}
+ const auto &STI = MF.getSubtarget();
+ if (STI.hasFeature(LoongArch::FeatureRelax)) {
+// When linker relaxation enabled, the following instruction patterns are
+
@@ -187,18 +187,23 @@ bool LoongArchPreRAExpandPseudo::expandPcalau12iInstPair(
MachineInstr &MI = *MBBI;
DebugLoc DL = MI.getDebugLoc();
+ const auto &STI = MF->getSubtarget();
+ bool EnableRelax = STI.hasFeature(LoongArch::FeatureRelax);
+
Register DestReg = MI.getO
https://github.com/cdevadas approved this pull request.
https://github.com/llvm/llvm-project/pull/122049
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https://github.com/zhaoqi5 updated
https://github.com/llvm/llvm-project/pull/121330
>From 85be5541a23a859ad8e50bd75fb7ff35985c5988 Mon Sep 17 00:00:00 2001
From: Qi Zhao
Date: Tue, 24 Dec 2024 11:03:23 +0800
Subject: [PATCH 1/2] [LoongArch] Avoid scheduling relaxable code sequence and
attach r
@@ -443,6 +443,89 @@ bool LoongArchInstrInfo::isSchedulingBoundary(const
MachineInstr &MI,
break;
}
+ const auto &STI = MF.getSubtarget();
+ if (STI.hasFeature(LoongArch::FeatureRelax)) {
+// When linker relaxation enabled, the following instruction patterns are
+
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