[llvm-branch-commits] [mlir] Users/hsiangkai/winograd ops transform (PR #96177)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai created https://github.com/llvm/llvm-project/pull/96177 None >From 276ed8981c5243696da3bf233a777e1b84f11131 Mon Sep 17 00:00:00 2001 From: Hsiangkai Wang Date: Mon, 17 Jun 2024 11:24:07 +0100 Subject: [PATCH 1/2] [mlir][linalg] Implement Conv2D using Winograd Conv2

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96177)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai edited https://github.com/llvm/llvm-project/pull/96177 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96177)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai edited https://github.com/llvm/llvm-project/pull/96177 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96177)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai updated https://github.com/llvm/llvm-project/pull/96177 >From 276ed8981c5243696da3bf233a777e1b84f11131 Mon Sep 17 00:00:00 2001 From: Hsiangkai Wang Date: Mon, 17 Jun 2024 11:24:07 +0100 Subject: [PATCH 1/2] [mlir][linalg] Implement Conv2D using Winograd Conv2D alg

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96177)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai updated https://github.com/llvm/llvm-project/pull/96177 >From 276ed8981c5243696da3bf233a777e1b84f11131 Mon Sep 17 00:00:00 2001 From: Hsiangkai Wang Date: Mon, 17 Jun 2024 11:24:07 +0100 Subject: [PATCH 1/2] [mlir][linalg] Implement Conv2D using Winograd Conv2D alg

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96177)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai updated https://github.com/llvm/llvm-project/pull/96177 >From 0c542404842679a5b9653a9a1049fb765245692e Mon Sep 17 00:00:00 2001 From: Hsiangkai Wang Date: Mon, 17 Jun 2024 11:24:07 +0100 Subject: [PATCH 1/2] [mlir][linalg] Implement Conv2D using Winograd Conv2D alg

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96177)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai updated https://github.com/llvm/llvm-project/pull/96177 >From 0c542404842679a5b9653a9a1049fb765245692e Mon Sep 17 00:00:00 2001 From: Hsiangkai Wang Date: Mon, 17 Jun 2024 11:24:07 +0100 Subject: [PATCH 1/2] [mlir][linalg] Implement Conv2D using Winograd Conv2D alg

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96182)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai created https://github.com/llvm/llvm-project/pull/96182 Add a transform operator structured.winograd_conv2d to convert linalg.conv_2d_nhwc_fhwc to Linalg winograd operators. >From a3d188ed7d25df05ccd6bc227ddc361b0c66a2f4 Mon Sep 17 00:00:00 2001 From: Hsiangkai Wan

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96177)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
Hsiangkai wrote: Sorry, I am still figuring out how to create stack PRs. https://github.com/llvm/llvm-project/pull/96177 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96178)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
Hsiangkai wrote: Sorry, I am still figuring out how to create stack PRs. https://github.com/llvm/llvm-project/pull/96178 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96178)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai closed https://github.com/llvm/llvm-project/pull/96178 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96177)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai closed https://github.com/llvm/llvm-project/pull/96177 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96179)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai closed https://github.com/llvm/llvm-project/pull/96179 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96179)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
Hsiangkai wrote: Sorry, I am still figuring out how to create stack PRs. https://github.com/llvm/llvm-project/pull/96179 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai created https://github.com/llvm/llvm-project/pull/96184 In order to support arbitrary size input data of conv2d, implement TilingInterface for winograd operators. Before converting winograd operators into nested loops with matrix multiply, tile the input of conv2d

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96182)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai updated https://github.com/llvm/llvm-project/pull/96182 >From 374b0d5b83ce080bea690199380e270a36ad1c52 Mon Sep 17 00:00:00 2001 From: Hsiangkai Wang Date: Mon, 17 Jun 2024 11:49:08 +0100 Subject: [PATCH] [mlir][linalg] Add transform operator for Winograd Conv2D alg

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai updated https://github.com/llvm/llvm-project/pull/96183 >From 24c4f957ae673c2955fc0674f91e488813d59350 Mon Sep 17 00:00:00 2001 From: Hsiangkai Wang Date: Mon, 17 Jun 2024 17:39:49 +0100 Subject: [PATCH] [mlir][linalg] Decompose winograd operators Convert Linalg wi

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai updated https://github.com/llvm/llvm-project/pull/96184 >From 73b524b7746839614655fd8082dbda297e93ba72 Mon Sep 17 00:00:00 2001 From: Hsiangkai Wang Date: Mon, 17 Jun 2024 11:44:27 +0100 Subject: [PATCH] [mlir][linalg] Implement TilingInterface for winograd operato

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)

2024-06-20 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai updated https://github.com/llvm/llvm-project/pull/96184 >From 73b524b7746839614655fd8082dbda297e93ba72 Mon Sep 17 00:00:00 2001 From: Hsiangkai Wang Date: Mon, 17 Jun 2024 11:44:27 +0100 Subject: [PATCH 1/2] [mlir][linalg] Implement TilingInterface for winograd ope

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96182)

2024-06-26 Thread Hsiangkai Wang via llvm-branch-commits
@@ -0,0 +1,88 @@ +// RUN: mlir-opt %s -transform-interpreter -canonicalize --split-input-file | FileCheck %s + +func.func @conv2d(%arg0: tensor<2x10x10x5xf32>, %arg1: tensor<2x3x3x5xf32>, %arg2: tensor<1xf32>) -> tensor<2x8x8x2xf32> { + %0 = tensor.empty() : tensor<2x8x8x2xf32>

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96182)

2024-06-26 Thread Hsiangkai Wang via llvm-branch-commits
@@ -0,0 +1,88 @@ +// RUN: mlir-opt %s -transform-interpreter -canonicalize --split-input-file | FileCheck %s + +func.func @conv2d(%arg0: tensor<2x10x10x5xf32>, %arg1: tensor<2x3x3x5xf32>, %arg2: tensor<1xf32>) -> tensor<2x8x8x2xf32> { + %0 = tensor.empty() : tensor<2x8x8x2xf32>

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96182)

2024-06-26 Thread Hsiangkai Wang via llvm-branch-commits
@@ -3480,6 +3480,31 @@ DiagnosedSilenceableFailure transform::MapCopyToThreadsOp::applyToOne( return DiagnosedSilenceableFailure::success(); } +//===--===// +// WinogradConv2DOp +//===--

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96182)

2024-06-26 Thread Hsiangkai Wang via llvm-branch-commits
@@ -2587,4 +2587,55 @@ def MapCopyToThreadsOp : }]; } +//===--===// +// Winograd Conv2D +//===--===// + +def WinogradConv2DOp : Op { + let

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96182)

2024-06-26 Thread Hsiangkai Wang via llvm-branch-commits
@@ -2587,4 +2587,55 @@ def MapCopyToThreadsOp : }]; } +//===--===// +// Winograd Conv2D +//===--===// + +def WinogradConv2DOp : Op { + let

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96182)

2024-06-26 Thread Hsiangkai Wang via llvm-branch-commits
https://github.com/Hsiangkai edited https://github.com/llvm/llvm-project/pull/96182 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-26 Thread Hsiangkai Wang via llvm-branch-commits
@@ -48,6 +287,261 @@ Value collapse2DData(RewriterBase &rewriter, Location loc, Value data) { reassociation); } +// This function transforms the filter. The data layout of the filter is FHWC. +// The transformation matrix is 2

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-27 Thread Hsiangkai Wang via llvm-branch-commits
@@ -23,6 +26,156 @@ namespace linalg { namespace { +// clang-format off +// Winograd Conv2D uses a minimal 2D filtering algorithm to calculate its +// result. The formula of minimal 2D filtering algorithm F(m x m, r x r), +// m is the output dimension and r is the filter dime

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-27 Thread Hsiangkai Wang via llvm-branch-commits
@@ -36,6 +189,92 @@ constexpr TransformMapKeyTy F_2_3{2, 3}; constexpr TransformMapKeyTy F_4_3{4, 3}; constexpr TransformMapKeyTy F_2_5{2, 5}; +struct TransformMatrix { Hsiangkai wrote: Done. https://github.com/llvm/llvm-project/pull/96183 __

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-27 Thread Hsiangkai Wang via llvm-branch-commits
@@ -36,6 +189,92 @@ constexpr TransformMapKeyTy F_2_3{2, 3}; constexpr TransformMapKeyTy F_4_3{4, 3}; constexpr TransformMapKeyTy F_2_5{2, 5}; +struct TransformMatrix { + TransformMatrix(const float *table, int64_t rows, int64_t cols, + int64_t scalarFactor =

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-27 Thread Hsiangkai Wang via llvm-branch-commits
@@ -48,6 +287,261 @@ Value collapse2DData(RewriterBase &rewriter, Location loc, Value data) { reassociation); } +// This function transforms the filter. The data layout of the filter is FHWC. +// The transformation matrix is 2

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-27 Thread Hsiangkai Wang via llvm-branch-commits
@@ -48,6 +287,261 @@ Value collapse2DData(RewriterBase &rewriter, Location loc, Value data) { reassociation); } +// This function transforms the filter. The data layout of the filter is FHWC. +// The transformation matrix is 2

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-27 Thread Hsiangkai Wang via llvm-branch-commits
@@ -100,6 +594,161 @@ Value matrixMultiply(RewriterBase &rewriter, Location loc, return expandOutput; } +// This function transforms the output. The data layout of the output is HWNF. +// The transformation matrix is 2-dimension. We need to extract H x W from +// HWNF first.

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-27 Thread Hsiangkai Wang via llvm-branch-commits
@@ -289,6 +938,123 @@ FailureOr winogradConv2DHelper(RewriterBase &rewriter, return transformedOutput.getDefiningOp(); } +FailureOr +decomposeWinogradFilterTransformHelper(RewriterBase &rewriter, + linalg::WinogradFilterTransformOp op)

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-27 Thread Hsiangkai Wang via llvm-branch-commits
@@ -323,5 +1089,12 @@ void populateWinogradConv2DPatterns(RewritePatternSet &patterns, int64_t m, patterns.insert(context, m, r); } +void populateDecomposeWinogradOpsPatterns(RewritePatternSet &patterns) { + MLIRContext *context = patterns.getContext(); + patterns.insert(

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)

2024-07-01 Thread Hsiangkai Wang via llvm-branch-commits
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() { return success(); } +SmallVector +WinogradFilterTransformOp::getIterationDomain(OpBuilder &builder) { + Location loc = getLoc(); + Value zero = builder.create(loc, 0); + Value one = builder.create(

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)

2024-07-01 Thread Hsiangkai Wang via llvm-branch-commits
@@ -2638,4 +2638,41 @@ def WinogradConv2DOp : Op { + let description = [{ +Decompose winograd operators. It will convert filter, input and output +transform operators into a combination of scf, tensor, and linalg Hsiangkai wrote: Done. https://github.co

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)

2024-07-01 Thread Hsiangkai Wang via llvm-branch-commits
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() { return success(); } +SmallVector +WinogradFilterTransformOp::getIterationDomain(OpBuilder &builder) { + Location loc = getLoc(); + Value zero = builder.create(loc, 0); + Value one = builder.create(

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)

2024-07-01 Thread Hsiangkai Wang via llvm-branch-commits
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() { return success(); } +SmallVector +WinogradFilterTransformOp::getIterationDomain(OpBuilder &builder) { + Location loc = getLoc(); + Value zero = builder.create(loc, 0); + Value one = builder.create(

[llvm-branch-commits] [mlir] [mlir][linalg] Add transform operator for Winograd Conv2D algorithm (PR #96182)

2024-07-01 Thread Hsiangkai Wang via llvm-branch-commits
@@ -3480,6 +3480,31 @@ DiagnosedSilenceableFailure transform::MapCopyToThreadsOp::applyToOne( return DiagnosedSilenceableFailure::success(); } +//===--===// +// WinogradConv2DOp +//===--

[llvm-branch-commits] [clang] c28e32d - [RISCV] Lazily add RVV C intrinsics.

2021-10-10 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2021-10-10T20:22:30+08:00 New Revision: c28e32d20fd4a334e49f64a041cbefe7cd1e8ce3 URL: https://github.com/llvm/llvm-project/commit/c28e32d20fd4a334e49f64a041cbefe7cd1e8ce3 DIFF: https://github.com/llvm/llvm-project/commit/c28e32d20fd4a334e49f64a041cbefe7cd1e8ce3.diff

[llvm-branch-commits] [llvm] 914e2f5 - [NFC] Use generic name for scalable vector stack ID.

2021-01-12 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2021-01-13T10:57:43+08:00 New Revision: 914e2f5a02f4f896eec9a00f536d1118bf1d9961 URL: https://github.com/llvm/llvm-project/commit/914e2f5a02f4f896eec9a00f536d1118bf1d9961 DIFF: https://github.com/llvm/llvm-project/commit/914e2f5a02f4f896eec9a00f536d1118bf1d9961.diff

[llvm-branch-commits] [llvm] 619eb14 - [NFC][RISCV] Remove useless code in RISCVRegisterInfo.td.

2021-01-15 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2021-01-15T20:08:51+08:00 New Revision: 619eb14775990d610236288f414a486d86df47cc URL: https://github.com/llvm/llvm-project/commit/619eb14775990d610236288f414a486d86df47cc DIFF: https://github.com/llvm/llvm-project/commit/619eb14775990d610236288f414a486d86df47cc.diff

[llvm-branch-commits] [llvm] 098dbf1 - [RISCV] Correct alignment settings for vector registers.

2021-01-16 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2021-01-16T23:21:29+08:00 New Revision: 098dbf190a5586d02f48b84eb41b93b701cdeb97 URL: https://github.com/llvm/llvm-project/commit/098dbf190a5586d02f48b84eb41b93b701cdeb97 DIFF: https://github.com/llvm/llvm-project/commit/098dbf190a5586d02f48b84eb41b93b701cdeb97.diff

[llvm-branch-commits] [llvm] 9dd5aea - [RISCV] Make LMUL field in VTYPE continuous.

2021-01-21 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2021-01-22T00:47:32+08:00 New Revision: 9dd5aea1e0397f693a739bffb03fd94dc8e1ec79 URL: https://github.com/llvm/llvm-project/commit/9dd5aea1e0397f693a739bffb03fd94dc8e1ec79 DIFF: https://github.com/llvm/llvm-project/commit/9dd5aea1e0397f693a739bffb03fd94dc8e1ec79.diff

[llvm-branch-commits] [llvm] 266820b - [RISCV] Add new V instructions in v1.0-08a0b46.

2021-01-21 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2021-01-22T00:59:58+08:00 New Revision: 266820be352d5b824cb01c93df1b00184fcc7803 URL: https://github.com/llvm/llvm-project/commit/266820be352d5b824cb01c93df1b00184fcc7803 DIFF: https://github.com/llvm/llvm-project/commit/266820be352d5b824cb01c93df1b00184fcc7803.diff

[llvm-branch-commits] [llvm] b8921af - [RISCV] Update V instructions constraints to conform to v1.0

2021-01-21 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2021-01-22T01:15:55+08:00 New Revision: b8921af63b0d746606f2482f3a020ea7cd316cd2 URL: https://github.com/llvm/llvm-project/commit/b8921af63b0d746606f2482f3a020ea7cd316cd2 DIFF: https://github.com/llvm/llvm-project/commit/b8921af63b0d746606f2482f3a020ea7cd316cd2.diff

[llvm-branch-commits] [llvm] 5d35422 - [RISCV] Correct DWARF number for vector registers.

2021-01-21 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2021-01-22T11:33:42+08:00 New Revision: 5d354220d44f11c70f36d5a357ec2a2208a6ab92 URL: https://github.com/llvm/llvm-project/commit/5d354220d44f11c70f36d5a357ec2a2208a6ab92 DIFF: https://github.com/llvm/llvm-project/commit/5d354220d44f11c70f36d5a357ec2a2208a6ab92.diff

[llvm-branch-commits] [llvm] 97e33fe - [RISCV] Implement vloxseg/vluxseg intrinsics.

2021-01-22 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2021-01-23T08:54:56+08:00 New Revision: 97e33feb08aa9c042408862e555423f037753e12 URL: https://github.com/llvm/llvm-project/commit/97e33feb08aa9c042408862e555423f037753e12 DIFF: https://github.com/llvm/llvm-project/commit/97e33feb08aa9c042408862e555423f037753e12.diff

[llvm-branch-commits] [llvm] e433715 - [NFC][RISCV] Move vmsge{u}.vx processing to RISCVAsmParser.

2021-01-01 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2021-01-02T08:42:53+08:00 New Revision: e4337159e3d1c70b1ec58f43fa59c9f0fd693e51 URL: https://github.com/llvm/llvm-project/commit/e4337159e3d1c70b1ec58f43fa59c9f0fd693e51 DIFF: https://github.com/llvm/llvm-project/commit/e4337159e3d1c70b1ec58f43fa59c9f0fd693e51.diff

[llvm-branch-commits] [llvm] 5e47606 - [NFC][AsmPrinter] Make comments for spill/reload more precise.

2021-01-10 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2021-01-11T15:00:27+08:00 New Revision: 5e476061deb82ed4e6d440445f8830e1c7bccaa6 URL: https://github.com/llvm/llvm-project/commit/5e476061deb82ed4e6d440445f8830e1c7bccaa6 DIFF: https://github.com/llvm/llvm-project/commit/5e476061deb82ed4e6d440445f8830e1c7bccaa6.diff

[llvm-branch-commits] [llvm] e0d43a3 - [RISCV][NFC] Define scalable vectors for half types.

2020-12-14 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2020-12-15T13:49:54+08:00 New Revision: e0d43a3b37a0d14c1caf3a79a4ad57a7a75fc3ae URL: https://github.com/llvm/llvm-project/commit/e0d43a3b37a0d14c1caf3a79a4ad57a7a75fc3ae DIFF: https://github.com/llvm/llvm-project/commit/e0d43a3b37a0d14c1caf3a79a4ad57a7a75fc3ae.diff

[llvm-branch-commits] [llvm] cbbdcfc - [RISCV] V does not imply F.

2020-12-14 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2020-12-15T14:59:22+08:00 New Revision: cbbdcfc47c86ddafe4ebad49f93dd37b513db0ac URL: https://github.com/llvm/llvm-project/commit/cbbdcfc47c86ddafe4ebad49f93dd37b513db0ac DIFF: https://github.com/llvm/llvm-project/commit/cbbdcfc47c86ddafe4ebad49f93dd37b513db0ac.diff

[llvm-branch-commits] [llvm] 14a91d6 - [RISCV][NFC] Define scalable vectors for half types.

2020-12-15 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2020-12-15T16:23:22+08:00 New Revision: 14a91d676b794db09c14abecf363650a8fc90c61 URL: https://github.com/llvm/llvm-project/commit/14a91d676b794db09c14abecf363650a8fc90c61 DIFF: https://github.com/llvm/llvm-project/commit/14a91d676b794db09c14abecf363650a8fc90c61.diff

[llvm-branch-commits] [llvm] f03609b - [RISCV] V does not imply F.

2020-12-16 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2020-12-17T10:57:36+08:00 New Revision: f03609b5c7531061be659e36824d37ef86a1fdf4 URL: https://github.com/llvm/llvm-project/commit/f03609b5c7531061be659e36824d37ef86a1fdf4 DIFF: https://github.com/llvm/llvm-project/commit/f03609b5c7531061be659e36824d37ef86a1fdf4.diff

[llvm-branch-commits] [llvm] 7087ae7 - [RISCV] Remove NoVReg to avoid compile warning messages.

2020-12-17 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2020-12-18T11:37:47+08:00 New Revision: 7087ae7be9f00b95d14bfba41264bbbd8f8711f2 URL: https://github.com/llvm/llvm-project/commit/7087ae7be9f00b95d14bfba41264bbbd8f8711f2 DIFF: https://github.com/llvm/llvm-project/commit/7087ae7be9f00b95d14bfba41264bbbd8f8711f2.diff

[llvm-branch-commits] [llvm] 41ab45d - [RISCV] Define vector vfwmul intrinsics.

2020-12-20 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2020-12-20T17:39:20+08:00 New Revision: 41ab45d6624602ba10486f044c0fd06db5b9bedb URL: https://github.com/llvm/llvm-project/commit/41ab45d6624602ba10486f044c0fd06db5b9bedb DIFF: https://github.com/llvm/llvm-project/commit/41ab45d6624602ba10486f044c0fd06db5b9bedb.diff

[llvm-branch-commits] [clang] 432d051 - [RISCV] Handle zfh in the arch string.

2020-12-02 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2020-12-03T09:16:44+08:00 New Revision: 432d05174ed00a217c0ad37e2e823154624c1311 URL: https://github.com/llvm/llvm-project/commit/432d05174ed00a217c0ad37e2e823154624c1311 DIFF: https://github.com/llvm/llvm-project/commit/432d05174ed00a217c0ad37e2e823154624c1311.diff

[llvm-branch-commits] [clang] 5e953a2 - [RISCV] Define preprocessor definitions for 'V' extension.

2020-12-04 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2020-12-05T08:34:32+08:00 New Revision: 5e953a274b2ada5bfa54b3d765e391abb03f474f URL: https://github.com/llvm/llvm-project/commit/5e953a274b2ada5bfa54b3d765e391abb03f474f DIFF: https://github.com/llvm/llvm-project/commit/5e953a274b2ada5bfa54b3d765e391abb03f474f.diff

[llvm-branch-commits] [llvm] 5aa584e - [RISCV] Separate masked and unmasked definitions for pseudo instructions.

2020-12-10 Thread Hsiangkai Wang via llvm-branch-commits
Author: Hsiangkai Wang Date: 2020-12-11T14:02:56+08:00 New Revision: 5aa584ec713c6aefc34ecc997d98c5f05210fa07 URL: https://github.com/llvm/llvm-project/commit/5aa584ec713c6aefc34ecc997d98c5f05210fa07 DIFF: https://github.com/llvm/llvm-project/commit/5aa584ec713c6aefc34ecc997d98c5f05210fa07.diff