[llvm-branch-commits] [llvm] release/19.x: [LSR] Fix matching vscale immediates (#100080) (PR #100359)

https://github.com/paulwalker-arm approved this pull request. https://github.com/llvm/llvm-project/pull/100359 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [AArch64] Avoid inlining if ZT0 needs preserving. (#101343) (PR #101932)

https://github.com/paulwalker-arm approved this pull request. https://github.com/llvm/llvm-project/pull/101932 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64] SLP can vectorize frem (PR #82488)

@@ -869,6 +870,18 @@ TargetTransformInfo::getOperandInfo(const Value *V) { return {OpInfo, OpProps}; } +InstructionCost TargetTransformInfo::getVecLibCallCost( +const int OpCode, const TargetLibraryInfo *TLI, VectorType *VecTy, +TTI::TargetCostKind CostKind) { + Typ

[llvm-branch-commits] [llvm] [AArch64] SLP can vectorize frem (PR #82488)

@@ -869,6 +870,18 @@ TargetTransformInfo::getOperandInfo(const Value *V) { return {OpInfo, OpProps}; } +InstructionCost TargetTransformInfo::getVecLibCallCost( +const int OpCode, const TargetLibraryInfo *TLI, VectorType *VecTy, +TTI::TargetCostKind CostKind) { + Typ

[llvm-branch-commits] [llvm] [AArch64] SLP can vectorize frem (PR #82488)

@@ -869,6 +870,18 @@ TargetTransformInfo::getOperandInfo(const Value *V) { return {OpInfo, OpProps}; } +InstructionCost TargetTransformInfo::getVecLibCallCost( +const int OpCode, const TargetLibraryInfo *TLI, VectorType *VecTy, +TTI::TargetCostKind CostKind) { + Typ

[llvm-branch-commits] [llvm] [AArch64] SLP can vectorize frem (PR #82488)

@@ -869,6 +870,18 @@ TargetTransformInfo::getOperandInfo(const Value *V) { return {OpInfo, OpProps}; } +InstructionCost TargetTransformInfo::getVecLibCallCost( +const int OpCode, const TargetLibraryInfo *TLI, VectorType *VecTy, +TTI::TargetCostKind CostKind) { + Typ

[llvm-branch-commits] [llvm] [AArch64] SLP can vectorize frem (PR #82488)

https://github.com/paulwalker-arm edited https://github.com/llvm/llvm-project/pull/82488 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64] SLP can vectorize frem (PR #82488)

@@ -869,6 +870,18 @@ TargetTransformInfo::getOperandInfo(const Value *V) { return {OpInfo, OpProps}; } +InstructionCost TargetTransformInfo::getVecLibCallCost( +const int OpCode, const TargetLibraryInfo *TLI, VectorType *VecTy, +TTI::TargetCostKind CostKind) { + Typ

[llvm-branch-commits] [llvm] [AArch64] SLP can vectorize frem (PR #82488)

https://github.com/paulwalker-arm commented: I've review the patch from both side so most of the comment will be void if you opt for the new TTI hook. That advantage of the TTI hook is that because it is specific to FREM you can hardware things like numbers of operands, which should streamlin

[llvm-branch-commits] [llvm] [AArch64] SLP can vectorize frem (PR #82488)

@@ -410,6 +410,14 @@ bool maskIsAllOneOrUndef(Value *Mask); /// for each lane which may be active. APInt possiblyDemandedEltsInMask(Value *Mask); +/// Returns the cost of a call when a target has a vector library function for +/// the given \p VecTy, otherwise an invalid cost.

[llvm-branch-commits] [llvm] [AArch64] SLP can vectorize frem (PR #82488)

@@ -1031,6 +1032,22 @@ APInt llvm::possiblyDemandedEltsInMask(Value *Mask) { return DemandedElts; } +InstructionCost +llvm::getVecLibCallCost(const Instruction *I, const TargetTransformInfo *TTI, +const TargetLibraryInfo *TLI, VectorType *VecTy, +

[llvm-branch-commits] [llvm] [AArch64] SLP can vectorize frem (PR #82488)

@@ -8362,9 +8362,12 @@ BoUpSLP::getEntryCost(const TreeEntry *E, ArrayRef VectorizedVals, unsigned OpIdx = isa(VL0) ? 0 : 1; TTI::OperandValueInfo Op1Info = getOperandInfo(E->getOperand(0)); TTI::OperandValueInfo Op2Info = getOperandInfo(E->getOperand(OpIdx));

[llvm-branch-commits] [llvm] [AArch64] SLP can vectorize frem (PR #82488)

@@ -1031,6 +1032,22 @@ APInt llvm::possiblyDemandedEltsInMask(Value *Mask) { return DemandedElts; } +InstructionCost +llvm::getVecLibCallCost(const Instruction *I, const TargetTransformInfo *TTI, +const TargetLibraryInfo *TLI, VectorType *VecTy, +

[llvm-branch-commits] [llvm] [AArch64] SLP can vectorize frem (PR #82488)

paulwalker-arm wrote: Changing `getArithmeticInstrCost` is just too dangerous. What if one opcode needs TLI for a different reason? all of a sudden all existing callers are entered into the contract (FREM is guaranteed to be transformed into a math call) without ensuring that's actually the c

[llvm-branch-commits] [llvm] 5148501 - [NFC][LLVM][SVE] Refactor predicate register ASM constraint parsing to use std::optional.

Author: Paul Walker Date: 2023-11-03T12:10:48Z New Revision: 51485019fb34a48dc6226bfa42d7449091e3f03d URL: https://github.com/llvm/llvm-project/commit/51485019fb34a48dc6226bfa42d7449091e3f03d DIFF: https://github.com/llvm/llvm-project/commit/51485019fb34a48dc6226bfa42d7449091e3f03d.diff LOG: [

[llvm-branch-commits] [clang] Add release note about ABI implementation changes for _BitInt on Arm (PR #105659)

https://github.com/paulwalker-arm approved this pull request. https://github.com/llvm/llvm-project/pull/105659 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64] Disable SVE paired ld1/st1 for callee-saves. (PR #107406)

https://github.com/paulwalker-arm approved this pull request. https://github.com/llvm/llvm-project/pull/107406 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] 2b8db40 - [SVE] Restrict the usage of REINTERPRET_CAST.

Author: Paul Walker Date: 2021-01-15T11:32:13Z New Revision: 2b8db40c92186731effd8948049919db8cf37dee URL: https://github.com/llvm/llvm-project/commit/2b8db40c92186731effd8948049919db8cf37dee DIFF: https://github.com/llvm/llvm-project/commit/2b8db40c92186731effd8948049919db8cf37dee.diff LOG: [

[llvm-branch-commits] [llvm] eba6dea - [SVE] Lower vector CTLZ, CTPOP and CTTZ operations.

Author: Paul Walker Date: 2021-01-05T10:42:35Z New Revision: eba6deab22b576004a209b3f42ccc5e58f7603bf URL: https://github.com/llvm/llvm-project/commit/eba6deab22b576004a209b3f42ccc5e58f7603bf DIFF: https://github.com/llvm/llvm-project/commit/eba6deab22b576004a209b3f42ccc5e58f7603bf.diff LOG: [

[llvm-branch-commits] [llvm] 6d35bd1 - [CodeGenPrepare] Update optimizeGatherScatterInst for scalable vectors.

Author: Paul Walker Date: 2020-12-15T10:57:51Z New Revision: 6d35bd1d48e9fdde38483e6b22a900daa7e3d46a URL: https://github.com/llvm/llvm-project/commit/6d35bd1d48e9fdde38483e6b22a900daa7e3d46a DIFF: https://github.com/llvm/llvm-project/commit/6d35bd1d48e9fdde38483e6b22a900daa7e3d46a.diff LOG: [

[llvm-branch-commits] [llvm] b74c4db - [SVE] Move INT_TO_FP i1 promotion into custom lowering.

Author: Paul Walker Date: 2020-12-15T11:57:07Z New Revision: b74c4dbb9634f6210c6539fb4c09b0b68cb3cf0a URL: https://github.com/llvm/llvm-project/commit/b74c4dbb9634f6210c6539fb4c09b0b68cb3cf0a DIFF: https://github.com/llvm/llvm-project/commit/b74c4dbb9634f6210c6539fb4c09b0b68cb3cf0a.diff LOG: [

[llvm-branch-commits] [llvm] 632f4d2 - [NFC] Fix a few SVEInstrInfo related stylistic issues.

Author: Paul Walker Date: 2020-12-15T16:10:38Z New Revision: 632f4d2747f0777157d10456dd431d8f4cece845 URL: https://github.com/llvm/llvm-project/commit/632f4d2747f0777157d10456dd431d8f4cece845 DIFF: https://github.com/llvm/llvm-project/commit/632f4d2747f0777157d10456dd431d8f4cece845.diff LOG: [

[llvm-branch-commits] [llvm] c0bc169 - [NFC][SVE] Clean up bfloat isel patterns that emit non-bfloat instructions.

Author: Paul Walker Date: 2020-12-18T13:20:41Z New Revision: c0bc169cb17397e981952dad7321b263756ddaa0 URL: https://github.com/llvm/llvm-project/commit/c0bc169cb17397e981952dad7321b263756ddaa0 DIFF: https://github.com/llvm/llvm-project/commit/c0bc169cb17397e981952dad7321b263756ddaa0.diff LOG: [

[llvm-branch-commits] [llvm] fc712eb - [AArch64] Fix Copy Elemination for negative values

Author: Tomas Matheson Date: 2020-12-18T13:30:46Z New Revision: fc712eb7aa00aabcdafda54776038efdc486d570 URL: https://github.com/llvm/llvm-project/commit/fc712eb7aa00aabcdafda54776038efdc486d570 DIFF: https://github.com/llvm/llvm-project/commit/fc712eb7aa00aabcdafda54776038efdc486d570.diff LOG

[llvm-branch-commits] [llvm] 8eec729 - [SVE] Lower vector BITREVERSE and BSWAP operations.

Author: Paul Walker Date: 2020-12-22T16:49:50Z New Revision: 8eec7294fea87273215592a2dc5bee6afd47d456 URL: https://github.com/llvm/llvm-project/commit/8eec7294fea87273215592a2dc5bee6afd47d456 DIFF: https://github.com/llvm/llvm-project/commit/8eec7294fea87273215592a2dc5bee6afd47d456.diff LOG: [

[llvm-branch-commits] [llvm] be85b3e - Fix some misnamed variables in sve-fixed-length-int-minmax.ll.

Author: Paul Walker Date: 2020-12-22T17:11:23Z New Revision: be85b3e4324b5a03abd929815b7fc1c2184db97a URL: https://github.com/llvm/llvm-project/commit/be85b3e4324b5a03abd929815b7fc1c2184db97a DIFF: https://github.com/llvm/llvm-project/commit/be85b3e4324b5a03abd929815b7fc1c2184db97a.diff LOG: F

[llvm-branch-commits] [llvm] [AArch64] Update feature dep. for Armv9.6 extensions (#125874) (PR #126210)

https://github.com/paulwalker-arm approved this pull request. https://github.com/llvm/llvm-project/pull/126210 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits