Changes in directory llvm/lib/CodeGen:
LiveIntervalAnalysis.cpp updated: 1.196 -> 1.197
---
Log message:
Don't recompute getNumOperands for each iteration.
---
Diffs of the changes: (+1 -1)
LiveIntervalAnalysis.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib
Changes in directory llvm-test:
Makefile.programs updated: 1.238 -> 1.239
---
Log message:
Add a facility for using the -disable-loop-extraction option with bugpoint.
---
Diffs of the changes: (+4 -0)
Makefile.programs |4
1 files changed, 4 insertions(+)
Index: llvm-test/Makefi
Changes in directory llvm/include/llvm/CodeGen:
LiveInterval.h updated: 1.25 -> 1.26
---
Log message:
Added "removeRange", which takes and removes an entire LiveRange.
---
Diffs of the changes: (+4 -0)
LiveInterval.h |4
1 files changed, 4 insertions(+)
Index: llvm/include/llvm
Changes in directory llvm/include/llvm/CodeGen:
LiveIntervalAnalysis.h updated: 1.64 -> 1.65
---
Log message:
Added a new method "CreateNewLiveInterval" which, given a list of
LiveRanges, creates a new LiveInterval from them. The LiveRanges should
have existed already in another LiveInterval, b
Changes in directory llvm/lib/CodeGen:
LiveIntervalAnalysis.cpp updated: 1.195 -> 1.196
---
Log message:
Added a new method "CreateNewLiveInterval" which, given a list of
LiveRanges, creates a new LiveInterval from them. The LiveRanges should
have existed already in another LiveInterval, but re
On Nov 15, 2006, at 6:04 PM, Chris Lattner wrote:
> The patch looks good, but please:
>
> 1. Change CreateNewLiveInterval to take LRs by const reference.
> This will require changing the iterators to be const_iterator
> instead of just iterator's.
>
Will do.
> 2. Please change "int* X" to "in
On Nov 15, 2006, at 5:03 PM, Bill Wendling wrote:
> Hi all,
>
> This is meant for a code review and NOT for submission (just yet).
> This is my implementation of Chow & Hennesey's Priority-Based
> Coloring Approach to Register Allocation. It's still in the
> experimental stages (though it c
Changes in directory llvm/test/Regression/CodeGen/PowerPC:
mem_update.ll updated: 1.3 -> 1.4
---
Log message:
make this harder
---
Diffs of the changes: (+26 -0)
mem_update.ll | 26 ++
1 files changed, 26 insertions(+)
Index: llvm/test/Regression/CodeGen/PowerPC
Hi all,
This is meant for a code review and NOT for submission (just yet).
This is my implementation of Chow & Hennesey's Priority-Based Coloring
Approach to Register Allocation. It's still in the experimental stages
(though it compiles the tests). I'd like people to look at it and let
me
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.264 -> 1.265
---
Log message:
fix broken encoding
---
Diffs of the changes: (+1 -1)
PPCInstrInfo.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
diff -u ll
Changes in directory llvm/lib/CodeGen:
LLVMTargetMachine.cpp updated: 1.5 -> 1.6
---
Log message:
enable the branch folding pass for the JIT.
---
Diffs of the changes: (+3 -0)
LLVMTargetMachine.cpp |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/CodeGen/LLVMTargetMachine.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCHazardRecognizers.cpp updated: 1.16 -> 1.17
PPCInstr64Bit.td updated: 1.29 -> 1.30
---
Log message:
add ppc64 r+i stores with update.
---
Diffs of the changes: (+72 -40)
PPCHazardRecognizers.cpp | 27 +++---
PPCInstr64Bit.td
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.220 -> 1.221
PPCInstrInfo.td updated: 1.263 -> 1.264
---
Log message:
add patterns for ppc32 preinc stores. ppc64 next.
---
Diffs of the changes: (+22 -7)
PPCISelDAGToDAG.cpp |8
PPCInstrInfo.td
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.td updated: 1.262 -> 1.263
---
Log message:
switch these back to the 'bad old way'
---
Diffs of the changes: (+20 -20)
PPCInstrInfo.td | 40
1 files changed, 20 insertions(+), 20 deletions
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.252 -> 1.253
SelectionDAG.cpp updated: 1.373 -> 1.374
---
Log message:
Fix an incorrectly inverted condition.
---
Diffs of the changes: (+1 -2)
DAGCombiner.cpp |2 +-
SelectionDAG.cpp |1 -
2 files chang
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.197 -> 1.198
---
Log message:
ChangeToRegister should clear IsImp bit.
---
Diffs of the changes: (+4 -4)
MachineInstr.h |8
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/include/llvm/Code
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.cpp updated: 1.84 -> 1.85
---
Log message:
Fix ppc64 epilog bug.
---
Diffs of the changes: (+1 -1)
PPCRegisterInfo.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cp
Changes in directory llvm/lib/Target/PowerPC:
PPCInstr64Bit.td updated: 1.28 -> 1.29
PPCInstrFormats.td updated: 1.83 -> 1.84
PPCInstrInfo.td updated: 1.261 -> 1.262
---
Log message:
Stop using isTwoAddress, switching to operand constraints instead.
Tell the codegen emitter that specific opera
Changes in directory llvm/utils/TableGen:
AsmWriterEmitter.cpp updated: 1.45 -> 1.46
CodeEmitterGen.cpp updated: 1.50 -> 1.51
CodeGenInstruction.h updated: 1.24 -> 1.25
CodeGenTarget.cpp updated: 1.78 -> 1.79
---
Log message:
Remove the isTwoAddress property from the CodeGenInstruction class.
Changes in directory llvm/lib/Target:
Target.td updated: 1.89 -> 1.90
---
Log message:
add a new field needed by the code emitter generator.
---
Diffs of the changes: (+4 -0)
Target.td |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/Target.td
diff -u llvm/lib/Target/
Changes in directory llvm-test/SingleSource/UnitTests/SignlessTypes:
cast2.cpp added (r1.1)
---
Log message:
A test case, derived from MultiSource/Applications/hbd involving the
incorrect ZEXT of a cast involved in a setcc.
---
Diffs of the changes: (+15 -0)
cast2.cpp | 15 ++
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.cpp updated: 1.72 -> 1.73
X86RegisterInfo.cpp updated: 1.177 -> 1.178
---
Log message:
Properly transfer kill / dead info.
---
Diffs of the changes: (+41 -21)
X86InstrInfo.cpp| 41 +++--
X86Regi
Changes in directory llvm/lib/Target/X86:
X86FloatingPoint.cpp updated: 1.59 -> 1.60
---
Log message:
Kill / dead info has been moved to MI's.
---
Diffs of the changes: (+11 -18)
X86FloatingPoint.cpp | 29 +++--
1 files changed, 11 insertions(+), 18 deletions(-)
Changes in directory llvm:
Makefile.rules updated: 1.409 -> 1.410
---
Log message:
Fix typo pointed out by Bryan Adams
---
Diffs of the changes: (+1 -1)
Makefile.rules |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/Makefile.rules
diff -u llvm/Makefile.rules:1.409 l
Changes in directory llvm/lib/CodeGen:
LiveVariables.cpp updated: 1.62 -> 1.63
---
Log message:
Do away with kill / dead maps. Move kill / dead info onto MI's.
---
Diffs of the changes: (+107 -81)
LiveVariables.cpp | 188 ++
1 files chang
Changes in directory llvm/lib/CodeGen:
LiveIntervalAnalysis.cpp updated: 1.194 -> 1.195
---
Log message:
A register def can be partially dead when the whole register has use(s) but a
subreg does not.
---
Diffs of the changes: (+8 -1)
LiveIntervalAnalysis.cpp |9 -
1 files chang
Changes in directory llvm/lib/Target/Sparc:
SparcRegisterInfo.cpp updated: 1.46 -> 1.47
---
Log message:
Properly transfer kill / dead info.
---
Diffs of the changes: (+9 -5)
SparcRegisterInfo.cpp | 14 +-
1 files changed, 9 insertions(+), 5 deletions(-)
Index: llvm/lib/Targ
Changes in directory llvm/lib/Target:
TargetInstrInfo.cpp updated: 1.21 -> 1.22
---
Log message:
commuteInstruction should propagate kill / dead info.
---
Diffs of the changes: (+10 -0)
TargetInstrInfo.cpp | 10 ++
1 files changed, 10 insertions(+)
Index: llvm/lib/Target/TargetI
Changes in directory llvm/lib/Target/Alpha:
AlphaRegisterInfo.cpp updated: 1.51 -> 1.52
---
Log message:
Properly transfer kill / dead info.
---
Diffs of the changes: (+5 -2)
AlphaRegisterInfo.cpp |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/Alph
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.cpp updated: 1.30 -> 1.31
PPCRegisterInfo.cpp updated: 1.83 -> 1.84
---
Log message:
Properly transfer kill / dead info.
---
Diffs of the changes: (+27 -13)
PPCInstrInfo.cpp| 10 ++
PPCRegisterInfo.cpp | 30 +
Changes in directory llvm/lib/CodeGen:
MachineInstr.cpp updated: 1.130 -> 1.131
---
Log message:
Minor updates.
---
Diffs of the changes: (+4 -4)
MachineInstr.cpp |8
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/Co
Changes in directory llvm/lib/CodeGen:
RegAllocLocal.cpp updated: 1.94 -> 1.95
---
Log message:
Match live variable changes.
---
Diffs of the changes: (+56 -10)
RegAllocLocal.cpp | 66 +-
1 files changed, 56 insertions(+), 10 deletions(-
Changes in directory llvm/include/llvm/CodeGen:
LiveVariables.h updated: 1.30 -> 1.31
---
Log message:
Do away with kill / dead maps. Move kill / dead info onto MI's.
---
Diffs of the changes: (+36 -95)
LiveVariables.h | 131 +++-
1 files
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.196 -> 1.197
---
Log message:
Add copyKillDeadInfo to copy kill / dead info; other minor updates.
---
Diffs of the changes: (+28 -8)
MachineInstr.h | 36
1 files changed, 28 inse
Changes in directory llvm/lib/Target/PowerPC:
PPCISelDAGToDAG.cpp updated: 1.219 -> 1.220
PPCISelLowering.cpp updated: 1.226 -> 1.227
PPCInstr64Bit.td updated: 1.27 -> 1.28
PPCInstrInfo.td updated: 1.260 -> 1.261
---
Log message:
fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use
Changes in directory llvm/include/llvm:
PassManager.h updated: 1.31 -> 1.32
---
Log message:
Add run(Function &F) support in FunctionPassManager_New
---
Diffs of the changes: (+6 -0)
PassManager.h |6 ++
1 files changed, 6 insertions(+)
Index: llvm/include/llvm/PassManager.h
diff
Changes in directory llvm/lib/VMCore:
PassManager.cpp updated: 1.31 -> 1.32
---
Log message:
Add run(Function &F) support in FunctionPassManager_New
---
Diffs of the changes: (+41 -6)
PassManager.cpp | 47 +--
1 files changed, 41 insertions(+),
Changes in directory llvm/lib/Target/CBackend:
Writer.cpp updated: 1.281 -> 1.282
---
Log message:
Simplify IntrinsicLowering and clarify that it is only for use by the
CBE and interpreter.
---
Diffs of the changes: (+1 -1)
Writer.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(
Changes in directory llvm/lib/Target/X86:
X86.h updated: 1.48 -> 1.49
X86JITInfo.h updated: 1.11 -> 1.12
---
Log message:
Remove unneeded forward decls
---
Diffs of the changes: (+0 -2)
X86.h|1 -
X86JITInfo.h |1 -
2 files changed, 2 deletions(-)
Index: llvm/lib/Target/X
Changes in directory llvm/include/llvm/CodeGen:
IntrinsicLowering.h updated: 1.10 -> 1.11
---
Log message:
Simplify IntrinsicLowering and clarify that it is only for use by the
CBE and interpreter.
---
Diffs of the changes: (+3 -30)
IntrinsicLowering.h | 33 +++---
Changes in directory llvm/lib/ExecutionEngine/Interpreter:
Interpreter.cpp updated: 1.32 -> 1.33
---
Log message:
Simplify IntrinsicLowering and clarify that it is only for use by the
CBE and interpreter.
---
Diffs of the changes: (+1 -1)
Interpreter.cpp |2 +-
1 files changed, 1 inser
Changes in directory llvm/lib/CodeGen:
IntrinsicLowering.cpp updated: 1.45 -> 1.46
---
Log message:
Simplify IntrinsicLowering and clarify that it is only for use by the
CBE and interpreter.
---
Diffs of the changes: (+3 -3)
IntrinsicLowering.cpp |6 +++---
1 files changed, 3 insertion
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.317 -> 1.318
---
Log message:
remove dead #include
---
Diffs of the changes: (+0 -1)
SelectionDAGISel.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.cpp updated: 1.82 -> 1.83
PPCInstr64Bit.td updated: 1.26 -> 1.27
---
Log message:
Fix the PPC regressions last night
---
Diffs of the changes: (+7 -7)
PPCInstr64Bit.td|2 +-
PPCRegisterInfo.cpp | 12 ++--
2 fil
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