/trunk/CREDITS.TXT?rev=37828r1=37827r2=37828view=diff
==
--- llvm/trunk/CREDITS.TXT (original)
+++ llvm/trunk/CREDITS.TXT Sat Jun 30 10:47:36 2007
@@ -171,7 +171,7 @@
N: Duraid Madina
E: [EMAIL PROTECTED]
W: http
Changes in directory llvm/lib/CodeGen:
RegAllocBigBlock.cpp updated: 1.3 - 1.4
---
Log message:
pull evan's fixes - should help the nightly tester (but there are still
some issues)
---
Diffs of the changes: (+63 -48)
RegAllocBigBlock.cpp | 111
Changes in directory llvm/lib/CodeGen:
RegAllocBigBlock.cpp updated: 1.4 - 1.5
---
Log message:
revert evan's fixes (and my doofusness) since they had a huge code
quality hit. will look at this soon.
---
Diffs of the changes: (+31 -63)
RegAllocBigBlock.cpp | 94
Changes in directory llvm/lib/CodeGen:
RegAllocBigBlock.cpp updated: 1.5 - 1.6
---
Log message:
ok, this much doesn't seem to bork anything
---
Diffs of the changes: (+48 -25)
RegAllocBigBlock.cpp | 73 +--
1 files changed, 48
Changes in directory llvm/lib/CodeGen:
RegAllocBigBlock.cpp updated: 1.6 - 1.7
---
Log message:
ok, this is something of a dirty hack, but it seems to work. (fixes e.g.
the SPASS miscompilation)
---
Diffs of the changes: (+16 -2)
RegAllocBigBlock.cpp | 18 --
1 files
Changes in directory llvm-test:
Makefile.programs updated: 1.271 - 1.272
---
Log message:
spass+oggenc work, therefore everything works(tm) ;)
---
Diffs of the changes: (+1 -1)
Makefile.programs |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/CodeGen:
RegAllocBigBlock.cpp updated: 1.1 - 1.2
---
Log message:
A bunch of fixes to the BigBlock allocator improve compile-time by ~20%
and code quality by ~2% on my tests.
A big thank you to Roman Levenstein for this patch! See
@@
//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file was developed by Duraid Madina and is distributed under
Changes in directory llvm-test:
Makefile.programs updated: 1.269 - 1.270
---
Log message:
give the bigblock allocator a workout
---
Diffs of the changes: (+1 -1)
Makefile.programs |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm-test/Makefile.programs
diff -u
Changes in directory llvm/include/llvm/CodeGen:
Passes.h updated: 1.27 - 1.28
LinkAllCodegenComponents.h updated: 1.5 - 1.6
---
Log message:
check in the BigBlock local register allocator
---
Diffs of the changes: (+10 -0)
LinkAllCodegenComponents.h |1 +
Passes.h |
Changes in directory llvm/lib/CodeGen:
RegAllocBigBlock.cpp added (r1.1)
---
Log message:
check in the BigBlock local register allocator
---
Diffs of the changes: (+852 -0)
RegAllocBigBlock.cpp | 852 +++
1 files changed, 852 insertions(+)
Hi all,
Attached is a new local register allocator tuned for big basic
blocks. It is fast and doesn't use much memory, but it is *slightly* slower
and does use more memory than the existing local allocator. Having said
that, it quickly gets close-to-optimal allocations on very large basic
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.60 - 1.61
IA64InstrInfo.td updated: 1.48 - 1.49
---
Log message:
fix storing bools to mem and unordered FP ops
---
Diffs of the changes: (+5 -5)
IA64ISelDAGToDAG.cpp |2 +-
IA64InstrInfo.td |8
Changes in directory llvm/lib/Transforms/Utils:
LowerInvoke.cpp updated: 1.39 - 1.40
---
Log message:
add setJumpBufSize() and setJumpBufAlignment() to target-lowering.
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example
Changes in directory llvm/include/llvm/Transforms:
Scalar.h updated: 1.67 - 1.68
---
Log message:
add setJumpBufSize() and setJumpBufAlignment() to target-lowering.
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example
---
Changes in directory llvm/lib/CodeGen:
LLVMTargetMachine.cpp updated: 1.1 - 1.2
---
Log message:
add setJumpBufSize() and setJumpBufAlignment() to target-lowering.
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example
---
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.77 - 1.78
---
Log message:
add setJumpBufSize() and setJumpBufAlignment() to target-lowering.
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example
Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.td updated: 1.46 - 1.47
---
Log message:
doo de doo
---
Diffs of the changes: (+158 -148)
IA64InstrInfo.td | 306 ---
1 files changed, 158 insertions(+), 148 deletions(-)
Changes in directory llvm/lib/Target/IA64:
IA64AsmPrinter.cpp updated: 1.22 - 1.23
---
Log message:
distinguish between objects and register names, now we can have stuff
with names like f84, in6 etc etc.
this should fix one or two tests
---
Diffs of the changes: (+12 -6)
Changes in directory llvm/autoconf:
configure.ac updated: 1.207 - 1.208
---
Log message:
previously, configure would die if GCC or ICC was not found. Now it'll
go through, but we do want to know if we're using GCC/ICC since they
share certain funky command line options (for dependency
Changes in directory llvm:
configure updated: 1.209 - 1.210
---
Log message:
zap
---
Diffs of the changes: (+0 -14)
configure | 14 --
1 files changed, 14 deletions(-)
Index: llvm/configure
diff -u llvm/configure:1.209 llvm/configure:1.210
--- llvm/configure:1.209
Changes in directory llvm:
Makefile.rules updated: 1.342 - 1.343
---
Log message:
oops, I meant this
---
Diffs of the changes: (+1 -1)
Makefile.rules |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/Makefile.rules
diff -u llvm/Makefile.rules:1.342
Changes in directory llvm:
Makefile.rules updated: 1.343 - 1.344
---
Log message:
HP aCC (and a bunch of other compilers, no doubt) don't share
GCC's syntax for auto-dependency generation stuff. This should
be changed to be disabling dependency stuff unless GCC/ICC is
found.
---
Diffs of
Changes in directory llvm:
configure updated: 1.210 - 1.211
---
Log message:
reverting previous change, will add support for other compilers later
---
Diffs of the changes: (+14 -0)
configure | 14 ++
1 files changed, 14 insertions(+)
Index: llvm/configure
diff -u
Changes in directory llvm/autoconf:
configure.ac updated: 1.208 - 1.209
---
Log message:
reverting previous change, will add support for other compilers later
---
Diffs of the changes: (+11 -0)
configure.ac | 11 +++
1 files changed, 11 insertions(+)
Index:
Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.td updated: 1.45 - 1.46
---
Log message:
now short immediates will get matched (previously constants were all
triggering movl 64bit imm fat instructions)
---
Diffs of the changes: (+3 -5)
IA64InstrInfo.td |8 +++-
1 files
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.36 - 1.37
---
Log message:
fix storing booleans (grawp missed this one)
---
Diffs of the changes: (+3 -3)
IA64ISelDAGToDAG.cpp |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index:
. See LICENSE.TXT for details.
+// This file was developed by Duraid Madina and is distributed under the
+// University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===--===//
//
@@ -56,7 +56,8 @@
std
Changes in directory llvm/lib/Target/IA64:
IA64RegisterInfo.td updated: 1.14 - 1.15
---
Log message:
fix stack corruption! Previously, 16-byte whole-FP-register stores were
being treated as needing only 8 bytes (though they were 16 byte aligned.)
This should fix a bunch of tests - anyone
Changes in directory llvm/lib/Target/IA64:
IA64Bundling.cpp added (r1.1)
IA64.h updated: 1.3 - 1.4
IA64InstrInfo.cpp updated: 1.3 - 1.4
IA64InstrInfo.td updated: 1.42 - 1.43
IA64RegisterInfo.cpp updated: 1.11 - 1.12
IA64TargetMachine.cpp updated: 1.10 - 1.11
---
Log message:
add bundling!
Changes in directory llvm/lib/Target/IA64:
IA64.td updated: 1.5 - 1.6
---
Log message:
die, die!! r15, you are not callee-saved
---
Diffs of the changes: (+0 -1)
IA64.td |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/IA64/IA64.td
diff -u
Changes in directory llvm-test/MultiSource/Applications:
Makefile updated: 1.22 - 1.23
---
Log message:
adding the ogg vorbis encoder
---
Diffs of the changes: (+1 -1)
Makefile |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm-test/MultiSource/Applications/Makefile
Changes in directory llvm-test:
LICENSE.TXT updated: 1.9 - 1.10
---
Log message:
oggenc is Free
---
Diffs of the changes: (+1 -0)
LICENSE.TXT |1 +
1 files changed, 1 insertion(+)
Index: llvm-test/LICENSE.TXT
diff -u llvm-test/LICENSE.TXT:1.9 llvm-test/LICENSE.TXT:1.10
---
Changes in directory llvm-test/MultiSource/Applications/oggenc:
COPYING added (r1.1)
LICENSE.TXT added (r1.1)
---
Log message:
license stuff
---
Diffs of the changes: (+341 -0)
COPYING | 340
LICENSE.TXT |1
2 files
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.26 - 1.27
IA64ISelLowering.cpp updated: 1.23 - 1.24
---
Log message:
fix sext breakage: now we correctly deal with functions that return
int vs uint
---
Diffs of the changes: (+5 -1)
IA64ISelDAGToDAG.cpp |2
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.27 - 1.28
IA64ISelLowering.cpp updated: 1.24 - 1.25
IA64ISelLowering.h updated: 1.4 - 1.5
IA64InstrInfo.td updated: 1.41 - 1.42
---
Log message:
remove RET hack, add proper support for rets (watching out for ret voids)
Changes in directory llvm/lib/Target/IA64:
IA64ISelLowering.cpp updated: 1.22 - 1.23
---
Log message:
fix calls that return f32
---
Diffs of the changes: (+7 -2)
IA64ISelLowering.cpp |9 +++--
1 files changed, 7 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm-test:
Makefile.programs updated: 1.184 - 1.185
---
Log message:
look at those cute little opcodes running around!!
---
Diffs of the changes: (+1 -1)
Makefile.programs |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm-test/Makefile.programs
Changes in directory llvm/lib/Target/IA64:
IA64TargetMachine.cpp updated: 1.8 - 1.9
---
Log message:
click click
---
Diffs of the changes: (+3 -5)
IA64TargetMachine.cpp |8 +++-
1 files changed, 3 insertions(+), 5 deletions(-)
Index: llvm/lib/Target/IA64/IA64TargetMachine.cpp
Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.td updated: 1.39 - 1.40
---
Log message:
fix boolean XOR (which fixes up comparisons..)
---
Diffs of the changes: (+4 -1)
IA64InstrInfo.td |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.25 - 1.26
IA64InstrInfo.td updated: 1.40 - 1.41
---
Log message:
fix storing bools! eek!
---
Diffs of the changes: (+5 -8)
IA64ISelDAGToDAG.cpp |4 ++--
IA64InstrInfo.td |9 +++--
2 files changed,
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.22 - 1.23
---
Log message:
fixing divides: FP should now be 100%, and integers are fine too
unless you try to div/mod 0 by anything, in which case you will
get some cute number, and not 0, which is bad.
---
Diffs of
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.23 - 1.24
---
Log message:
fixing divides
---
Diffs of the changes: (+9 -12)
IA64ISelDAGToDAG.cpp | 21 +
1 files changed, 9 insertions(+), 12 deletions(-)
Index:
Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.td updated: 1.38 - 1.39
IA64RegisterInfo.cpp updated: 1.9 - 1.10
IA64RegisterInfo.td updated: 1.12 - 1.13
---
Log message:
use proper (82-bit) spills/fills when spilling FP regs, so that
divides don't get broken. this fixes obsequi,
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.20 - 1.21
IA64ISelLowering.cpp updated: 1.21 - 1.22
---
Log message:
explain that r12 is the stack pointer reg
---
Diffs of the changes: (+5 -33)
IA64ISelDAGToDAG.cpp | 34 ++
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.19 - 1.20
---
Log message:
don't be a doofus - this fixes storing bools
---
Diffs of the changes: (+5 -2)
IA64ISelDAGToDAG.cpp |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/lib/Target/IA64:
IA64ISelLowering.cpp updated: 1.17 - 1.18
---
Log message:
sabre's (correct) fix means these guys need to be flagged as well (else
the scheduler will complain)
---
Diffs of the changes: (+7 -2)
IA64ISelLowering.cpp |9 +++--
1 files
Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.td updated: 1.35 - 1.36
---
Log message:
add support for selecting bools
FIXME: this is commented out because it makes tblgen go a bit fruity
---
Diffs of the changes: (+5 -1)
IA64InstrInfo.td |6 +-
1 files changed, 5
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.17 - 1.18
---
Log message:
cleanup GETFD
---
Diffs of the changes: (+3 -4)
IA64ISelDAGToDAG.cpp |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/IA64:
IA64ISelLowering.cpp updated: 1.12 - 1.13
---
Log message:
support functions that return bool (this should work but doesn't,
*maybe* due to a legalizer bug.)
---
Diffs of the changes: (+10 -10)
IA64ISelLowering.cpp | 20 ++--
Changes in directory llvm/lib/Target/IA64:
IA64ISelLowering.cpp updated: 1.8 - 1.9
---
Log message:
nasty paste-o, calls passing more than 8 arguments along were having
args 8 put into the wrong place
---
Diffs of the changes: (+2 -2)
IA64ISelLowering.cpp |4 ++--
1 files changed, 2
Changes in directory llvm/lib/Target/CBackend:
Writer.cpp updated: 1.249 - 1.250
---
Log message:
yet more C++ standards-compliance stuff.
---
Diffs of the changes: (+1 -0)
Writer.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/CBackend/Writer.cpp
diff -u
Changes in directory llvm/lib/CodeGen:
MachineCodeEmitter.cpp updated: 1.24 - 1.25
---
Log message:
mixed-STL programs are big and nasty :(
---
Diffs of the changes: (+1 -0)
MachineCodeEmitter.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/CodeGen/MachineCodeEmitter.cpp
Changes in directory llvm/lib/CodeGen:
RegAllocLinearScan.cpp updated: 1.116 - 1.117
---
Log message:
HB is *the* code janitor.
---
Diffs of the changes: (+1 -0)
RegAllocLinearScan.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp
diff -u
Changes in directory llvm/tools/llc:
llc.cpp updated: 1.119 - 1.120
---
Log message:
WAKEY WAKEY
---
Diffs of the changes: (+1 -1)
llc.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/tools/llc/llc.cpp
diff -u llvm/tools/llc/llc.cpp:1.119
Changes in directory llvm/include/llvm/CodeGen:
MachineConstantPool.h updated: 1.7 - 1.8
---
Log message:
undo yuletide naughtyness(tm)
---
Diffs of the changes: (+0 -1)
MachineConstantPool.h |1 -
1 files changed, 1 deletion(-)
Index:
Changes in directory llvm/include/llvm/CodeGen:
MachineConstantPool.h updated: 1.8 - 1.9
---
Log message:
be more polite in public headers
---
Diffs of the changes: (+1 -0)
MachineConstantPool.h |1 +
1 files changed, 1 insertion(+)
Index:
Changes in directory llvm/lib/VMCore:
Dominators.cpp updated: 1.64 - 1.65
---
Log message:
more HP-UX cleanliness
---
Diffs of the changes: (+1 -0)
Dominators.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/VMCore/Dominators.cpp
diff -u llvm/lib/VMCore/Dominators.cpp:1.64
Changes in directory llvm/include/llvm:
Linker.h updated: 1.16 - 1.17
---
Log message:
more standards compliance (damn, I can't wait for unordered_set (tee hee)
and unordered_map to make it into the standard)
Hurry up, JTC1 SC22 WG21 Library Working Group!
---
Diffs of the changes: (+1
Changes in directory llvm/lib/Transforms/Scalar:
LowerPacked.cpp updated: 1.5 - 1.6
---
Log message:
getting there...
---
Diffs of the changes: (+1 -0)
LowerPacked.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Transforms/Scalar/LowerPacked.cpp
diff -u
Changes in directory llvm/lib/Bytecode/Reader:
Analyzer.cpp updated: 1.20 - 1.21
ReaderWrappers.cpp updated: 1.52 - 1.53
---
Log message:
I bet pinski knows why g++ accepts this stuff
---
Diffs of the changes: (+3 -0)
Analyzer.cpp |1 +
ReaderWrappers.cpp |2 ++
2 files
Changes in directory llvm/lib/Bytecode/Archive:
ArchiveReader.cpp updated: 1.42 - 1.43
---
Log message:
more C++ daintiness
---
Diffs of the changes: (+1 -0)
ArchiveReader.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Bytecode/Archive/ArchiveReader.cpp
diff -u
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.16 - 1.17
---
Log message:
unbreak calls, a few more tests should run. Tomorrow: bugpoint!
---
Diffs of the changes: (+1 -2)
IA64ISelDAGToDAG.cpp |3 +--
1 files changed, 1 insertion(+), 2 deletions(-)
Changes in directory llvm/lib/Support:
CommandLine.cpp updated: 1.64 - 1.65
---
Log message:
MERRY CHRISTMAS EVERYONE!!! (what better way to spend christmas than
to try building LLVM on HP-UX! (the Right Way seems to be to tear out
the ancient STL that HP ship and use
Changes in directory llvm/lib/Support/bzip2:
Makefile updated: 1.3 - 1.4
---
Log message:
HP aCC chokes on this, but it's not required anyway: according to
the bzip2 homepage, only ancient (gcc 2.7.x ?) versions of GCC
require this? It certainly isn't needed for the current bzip2
sources.
Changes in directory llvm/utils/TableGen:
TableGen.cpp updated: 1.41 - 1.42
Record.cpp updated: 1.48 - 1.49
---
Log message:
more standards-compliance stuff
---
Diffs of the changes: (+3 -0)
Record.cpp |2 ++
TableGen.cpp |1 +
2 files changed, 3 insertions(+)
Index:
Changes in directory llvm/lib/Target/IA64:
IA64.td updated: 1.3 - 1.4
IA64InstrInfo.td updated: 1.30 - 1.31
IA64RegisterInfo.td updated: 1.11 - 1.12
---
Log message:
update tablegen files - nothing to see here
---
Diffs of the changes: (+18 -6)
IA64.td |1 +
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.13 - 1.14
---
Log message:
kill SelectCALL() in the DAG isel, we handle this in lowering now, like
SPARCv8. (we copy sparcv8's workaround for tablegen not being nice about
ISD::CALL/TAILCALL)
---
Diffs of the changes:
Changes in directory llvm/lib/Target/IA64:
IA64ISelLowering.cpp updated: 1.5 - 1.6
---
Log message:
I shoulda done this a *long* time ago (tm): implement calls properly,
i.e. r1/r12/rp are saved/restored regardless of scheduling/luck
TODO: calls to external symbols, indirect (function
Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.td updated: 1.31 - 1.32
---
Log message:
we need to emit the getf.d instruction in lowering, so add it
to IA64ISD
---
Diffs of the changes: (+11 -2)
IA64InstrInfo.td | 13 +++--
1 files changed, 11 insertions(+), 2
Changes in directory llvm/lib/Target/IA64:
IA64ISelLowering.cpp updated: 1.6 - 1.7
---
Log message:
this should take care of calls to varadic functions, but it doesn.,t
BUG: calling printf(string, float) will load the float into the wrong
register, completely forget about loading the string,
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAG.h updated: 1.80 - 1.81
---
Log message:
i need to do this to take over the earth
when I take over the earth, sabre will be happy because i'll stop asking
him silly questions!!
---
Diffs of the changes: (+9 -0)
Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.td updated: 1.32 - 1.33
---
Log message:
oops, back this out
---
Diffs of the changes: (+2 -3)
IA64InstrInfo.td |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/IA64/IA64InstrInfo.td
diff -u
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.10 - 1.11
---
Log message:
add support for div/rem to the dag-dag isel. yay.
---
Diffs of the changes: (+180 -0)
IA64ISelDAGToDAG.cpp | 180 +++
1 files changed,
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.6 - 1.7
---
Log message:
add support for loading bools
---
Diffs of the changes: (+7 -1)
IA64ISelDAGToDAG.cpp |8 +++-
1 files changed, 7 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/IA64:
IA64ISelLowering.cpp updated: 1.2 - 1.3
---
Log message:
kill redundant SP/GP/RP save/restores across calls
---
Diffs of the changes: (+3 -2)
IA64ISelLowering.cpp |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.7 - 1.8
---
Log message:
oops, forgot to load GP for indirect calls, though the old code now commented
out failed (e.g. methcall) - now the code compiles, though it's not quite
right just yet (tm) ;)
would fix this but
Changes in directory llvm-test:
Makefile.programs updated: 1.176 - 1.177
---
Log message:
fun with scheduling on ia64
---
Diffs of the changes: (+1 -1)
Makefile.programs |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm-test/Makefile.programs
diff -u
Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.td updated: 1.27 - 1.28
---
Log message:
fun with predicates! (add TRUNC i64-i1, AND i1 i1, fix XOR i1 i1)
---
Diffs of the changes: (+97 -41)
IA64InstrInfo.td | 137 ++-
1 files
Changes in directory llvm/include/llvm/Target:
TargetInstrItineraries.h updated: 1.4 - 1.5
---
Log message:
change NULL to 0, unbreaks the ppc target when building on ia64
---
Diffs of the changes: (+2 -2)
TargetInstrItineraries.h |4 ++--
1 files changed, 2 insertions(+), 2
Changes in directory llvm-test:
Makefile.programs updated: 1.177 - 1.178
---
Log message:
chicken out: sched=simple breaks quite a bit of the testsuite currently.
will look at this again later :)
---
Diffs of the changes: (+1 -1)
Makefile.programs |2 +-
1 files changed, 1
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.4 - 1.5
IA64ISelLowering.cpp updated: 1.1 - 1.2
---
Log message:
add support for loading FP constants +0.0 and +1.0 to the dag isel,
stop pretending -0.0 and -1.0 are machine constants
---
Diffs of the changes: (+8
Changes in directory llvm/lib/Target:
TargetSelectionDAG.td updated: 1.8 - 1.9
---
Log message:
add support for SELECT to TargetSelectionDAG.td, add support for
selecting ints to IA64, and a few other ia64 bits and pieces
---
Diffs of the changes: (+5 -0)
TargetSelectionDAG.td |5
Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.td updated: 1.23 - 1.24
---
Log message:
add support for SELECT to TargetSelectionDAG.td, add support for
selecting ints to IA64, and a few other ia64 bits and pieces
---
Diffs of the changes: (+38 -31)
IA64InstrInfo.td | 69
Changes in directory llvm/lib/Target/IA64:
IA64RegisterInfo.td updated: 1.9 - 1.10
---
Log message:
add F0 and F1 to the FP register class
---
Diffs of the changes: (+19 -3)
IA64RegisterInfo.td | 22 +++---
1 files changed, 19 insertions(+), 3 deletions(-)
Index:
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.5 - 1.6
---
Log message:
fix support for FP constants (this code asserts in the scheduler,
though)
---
Diffs of the changes: (+4 -2)
IA64ISelDAGToDAG.cpp |6 --
1 files changed, 4 insertions(+), 2
Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.td updated: 1.20 - 1.21
---
Log message:
add zeroextend predicate-integer
---
Diffs of the changes: (+42 -37)
IA64InstrInfo.td | 79 +--
1 files changed, 42 insertions(+), 37
Changes in directory llvm/lib/Target:
TargetSelectionDAG.td updated: 1.7 - 1.8
---
Log message:
add support for int-FP and FP-int ops, and add ia64 patterns for these
---
Diffs of the changes: (+11 -0)
TargetSelectionDAG.td | 11 +++
1 files changed, 11 insertions(+)
Index:
Changes in directory llvm/lib/Target/IA64:
IA64InstrInfo.td updated: 1.21 - 1.22
---
Log message:
add support for int-FP and FP-int ops, and add ia64 patterns for these
---
Diffs of the changes: (+12 -0)
IA64InstrInfo.td | 12
1 files changed, 12 insertions(+)
Index:
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.3 - 1.4
---
Log message:
FORTRAN!!! :( and other similarly unfortunate things mean that on ia64
one sometimes needs to pass FP args in both FP *and* integer registers.
---
Diffs of the changes: (+20 -0)
Changes in directory llvm/lib/Target/IA64:
IA64InstrFormats.td updated: 1.2 - 1.3
IA64InstrInfo.td updated: 1.19 - 1.20
---
Log message:
add FP compares and implicit register defs to the dag isel
---
Diffs of the changes: (+45 -23)
IA64InstrFormats.td |4 +++
IA64InstrInfo.td|
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