Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.160 - 1.161
---
Log message:
node predicates add to the complexity of a pattern. This ensures that the
X86 backend attempts to match small-immediate versions of instructions before
the full size immediate versions.
---
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.146 - 1.147
---
Log message:
remove some #ifdef'd out code, which should properly be in the dag combiner
anyway.
---
Diffs of the changes: (+0 -30)
SelectionDAGISel.cpp | 30
Changes in directory llvm/lib/Target/PowerPC:
README.txt updated: 1.59 - 1.60
---
Log message:
add a note
---
Diffs of the changes: (+2 -0)
README.txt |2 ++
1 files changed, 2 insertions(+)
Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/lib/Target/PowerPC/README.txt:1.59
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.45 - 1.46
---
Log message:
Add a framework for eliminating instructions that produces undemanded bits.
---
Diffs of the changes: (+9 -0)
TargetLowering.h |9 +
1 files changed, 9 insertions(+)
Index:
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.27 - 1.28
---
Log message:
Implement some feedback from sabre
---
Diffs of the changes: (+5 -5)
TargetLowering.cpp | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
Index:
Changes in directory llvm/lib/CodeGen:
VirtRegMap.cpp updated: 1.51 - 1.52
---
Log message:
significantly simplify the VirtRegMap code by pulling the SpillSlotsAvailable
and PhysRegsAvailable maps out into a new AvailableSpills struct. No
functionality change.
This paves the way for a
Changes in directory llvm/lib/CodeGen:
VirtRegMap.cpp updated: 1.52 - 1.53
---
Log message:
Fix a nasty problem on two-address machines in the following situation:
store EAX - [ss#0]
[ss#0] += 1
...
use(EAX)
In this case, it is not valid to rewrite this as:
store EAX - [ss#0]
EAX += 1
Changes in directory llvm/lib/CodeGen:
VirtRegMap.cpp updated: 1.53 - 1.54
---
Log message:
Handle another case exposed on X86.
---
Diffs of the changes: (+4 -0)
VirtRegMap.cpp |4
1 files changed, 4 insertions(+)
Index: llvm/lib/CodeGen/VirtRegMap.cpp
diff -u
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.46 - 1.47
---
Log message:
Add some methods for inline asm support.
---
Diffs of the changes: (+16 -3)
TargetLowering.h | 19 ---
1 files changed, 16 insertions(+), 3 deletions(-)
Index:
Changes in directory llvm/lib/Target:
TargetLowering.cpp updated: 1.28 - 1.29
---
Log message:
implementation of some methods for inlineasm
---
Diffs of the changes: (+41 -1)
TargetLowering.cpp | 42 +-
1 files changed, 41 insertions(+), 1
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.147 - 1.148
---
Log message:
Initial early support for non-register operands, like immediates
---
Diffs of the changes: (+42 -15)
SelectionDAGISel.cpp | 57
Changes in directory llvm/lib/Target/X86:
X86InstrInfo.td updated: 1.229 - 1.230
---
Log message:
Remove an unnecessary predicate.
---
Diffs of the changes: (+1 -2)
X86InstrInfo.td |3 +--
1 files changed, 1 insertion(+), 2 deletions(-)
Index: llvm/lib/Target/X86/X86InstrInfo.td
diff
Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAG.cpp updated: 1.62 - 1.63
SelectionDAGISel.cpp updated: 1.148 - 1.149
---
Log message:
Add initial support for immediates. This allows us to compile this:
int %rlwnm(int %A, int %B) {
%C = call int asm rlwnm $0, $1, $2, $3, $4,
Changes in directory llvm/win32/x86:
x86.vcproj updated: 1.19 - 1.20
---
Log message:
Keep Visual Studio informed.
---
Diffs of the changes: (+4 -5)
x86.vcproj |9 -
1 files changed, 4 insertions(+), 5 deletions(-)
Index: llvm/win32/x86/x86.vcproj
diff -u
Changes in directory llvm/lib/CodeGen:
VirtRegMap.cpp updated: 1.54 - 1.55
---
Log message:
Fix VC++ warning.
---
Diffs of the changes: (+1 -1)
VirtRegMap.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/CodeGen/VirtRegMap.cpp
diff -u
Changes in directory llvm/include/llvm/Analysis:
ScalarEvolutionExpander.h updated: 1.2 - 1.3
---
Log message:
add a method
---
Diffs of the changes: (+2 -0)
ScalarEvolutionExpander.h |2 ++
1 files changed, 2 insertions(+)
Index: llvm/include/llvm/Analysis/ScalarEvolutionExpander.h
Changes in directory llvm/include/llvm/CodeGen:
ScheduleDAG.h updated: 1.7 - 1.8
---
Log message:
Get rid of some memory leaks identified by Valgrind
---
Diffs of the changes: (+19 -4)
ScheduleDAG.h | 23 +++
1 files changed, 19 insertions(+), 4 deletions(-)
Index:
Changes in directory llvm/lib/Target/SparcV8:
SparcV8InstrInfo.cpp updated: 1.10 - 1.11
SparcV8InstrInfo.h updated: 1.6 - 1.7
SparcV8RegisterInfo.cpp updated: 1.34 - 1.35
SparcV8RegisterInfo.h updated: 1.7 - 1.8
SparcV8TargetMachine.cpp updated: 1.38 - 1.39
---
Log message:
Two changes:
1.
Changes in directory llvm/lib/Target/SparcV8:
README.txt updated: 1.48 - 1.49
---
Log message:
add a note
---
Diffs of the changes: (+1 -0)
README.txt |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/SparcV8/README.txt
diff -u llvm/lib/Target/SparcV8/README.txt:1.48
Changes in directory llvm/lib/Transforms/Scalar:
LoopStrengthReduce.cpp updated: 1.73 - 1.74
---
Log message:
Fix two significant bugs in LSR:
1. When rewriting code in outer loops, sometimes we would insert code into
inner loops that is invariant in that loop.
2. Notice that 4*(2+x) is
Changes in directory llvm/lib/Target/SparcV8:
SparcV8InstrInfo.cpp updated: 1.11 - 1.12
---
Log message:
fix a bug in my last checkin
---
Diffs of the changes: (+2 -2)
SparcV8InstrInfo.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index:
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