Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.110 - 1.111
ARMInstrVFP.td updated: 1.1 - 1.2
---
Log message:
match a reassociated form of fnmul. This implements CodeGen/ARM/fnmul.ll
---
Diffs of the changes: (+9 -2)
ARMISelDAGToDAG.cpp |1 +
ARMInstrVFP.td
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.108 - 1.109
ARMInstrInfo.td updated: 1.89 - 1.90
ARMInstrThumb.td updated: 1.15 - 1.16
---
Log message:
Special LDR instructions to load from non-pc-relative constantpools. These are
rematerializable. Only used for
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.109 - 1.110
ARMISelLowering.cpp updated: 1.24 - 1.25
ARMInstrInfo.cpp updated: 1.16 - 1.17
ARMInstrInfo.td updated: 1.90 - 1.91
ARMInstrThumb.td updated: 1.16 - 1.17
ARMRegisterInfo.cpp updated: 1.82 - 1.83
---
Log
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.107 - 1.108
---
Log message:
AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2]
---
Diffs of the changes: (+23 -0)
ARMISelDAGToDAG.cpp | 23 +++
1 files changed, 23 insertions(+)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.106 - 1.107
ARMRegisterInfo.cpp updated: 1.62 - 1.63
---
Log message:
Get rid of references to iostream.
---
Diffs of the changes: (+2 -4)
ARMISelDAGToDAG.cpp |1 -
ARMRegisterInfo.cpp |5 ++---
2 files
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.105 - 1.106
---
Log message:
Select add FI, c correctly.
---
Diffs of the changes: (+6 -1)
ARMISelDAGToDAG.cpp |7 ++-
1 files changed, 6 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.104 - 1.105
---
Log message:
- Store val, [sp, c] must be selected to tSTRsp.
- If c does not fit in the offset field, materialize sp + c into a register
using tADDhirr.
---
Diffs of the changes: (+34 -4)
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.100 - 1.101
---
Log message:
Various Thumb mode load / store isel bug fixes.
---
Diffs of the changes: (+38 -13)
ARMISelDAGToDAG.cpp | 51 ++-
1 files changed, 38
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.101 - 1.102
---
Log message:
Allow [ fi#c, imm ] as ARM load / store addresses.
---
Diffs of the changes: (+39 -25)
ARMISelDAGToDAG.cpp | 64 +++-
1 files changed, 39
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.96 - 1.97
---
Log message:
Expand SELECT (f32/f64) and FCOPYSIGN (f32/f64).
---
Diffs of the changes: (+5 -0)
ARMISelDAGToDAG.cpp |5 +
1 files changed, 5 insertions(+)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.94 - 1.95
---
Log message:
For PR950: http://llvm.org/PR950 :
Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
type of an
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.93 - 1.94
---
Log message:
fix comment
---
Diffs of the changes: (+1 -1)
ARMISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.91 - 1.92
---
Log message:
avoid using a constant table when a constant can be used inline
---
Diffs of the changes: (+82 -24)
ARMISelDAGToDAG.cpp | 106
1 files
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.89 - 1.90
---
Log message:
don't use ordinary addressing mode 1 when mvn is appropriate
---
Diffs of the changes: (+2 -0)
ARMISelDAGToDAG.cpp |2 ++
1 files changed, 2 insertions(+)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.90 - 1.91
ARMInstrInfo.td updated: 1.78 - 1.79
---
Log message:
more general matching of the MVN instruction
---
Diffs of the changes: (+11 -37)
ARMISelDAGToDAG.cpp | 37 +++--
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.88 - 1.89
ARMInstrInfo.td updated: 1.77 - 1.78
---
Log message:
use MVN to handle small negative constants
---
Diffs of the changes: (+32 -0)
ARMISelDAGToDAG.cpp | 21 +
ARMInstrInfo.td |
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.85 - 1.86
---
Log message:
add support for the r asm constraint
patch by Lauro Ramos Venancio
---
Diffs of the changes: (+27 -0)
ARMISelDAGToDAG.cpp | 27 +++
1 files changed, 27
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.83 - 1.84
---
Log message:
Match tblegen changes.
---
Diffs of the changes: (+16 -10)
ARMISelDAGToDAG.cpp | 26 --
1 files changed, 16 insertions(+), 10 deletions(-)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.80 - 1.81
---
Log message:
All targets expand BR_JT for now.
---
Diffs of the changes: (+2 -1)
ARMISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.79 - 1.80
ARMRegisterInfo.cpp updated: 1.22 - 1.23
ARMRegisterInfo.td updated: 1.5 - 1.6
---
Log message:
initial support for frame pointers
---
Diffs of the changes: (+44 -5)
ARMISelDAGToDAG.cpp |3 +++
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.78 - 1.79
---
Log message:
expand ISD::VACOPY
---
Diffs of the changes: (+1 -0)
ARMISelDAGToDAG.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.77 - 1.78
---
Log message:
expand ISD::MEMSET
---
Diffs of the changes: (+3 -0)
ARMISelDAGToDAG.cpp |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.76 - 1.77
---
Log message:
For PR950: http://llvm.org/PR950 :
This patch implements the first increment for the Signless Types feature.
All changes pertain to removing the ConstantSInt and ConstantUInt classes
in favor of
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.74 - 1.75
---
Log message:
expand brind so that we don't have to implement jump tables right now
---
Diffs of the changes: (+1 -0)
ARMISelDAGToDAG.cpp |1 +
1 files changed, 1 insertion(+)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.75 - 1.76
---
Log message:
expand SIGN_EXTEND_INREG
---
Diffs of the changes: (+4 -0)
ARMISelDAGToDAG.cpp |4
1 files changed, 4 insertions(+)
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.73 - 1.74
---
Log message:
implement CallingConv::Fast as CallingConv::C
---
Diffs of the changes: (+3 -1)
ARMISelDAGToDAG.cpp |4 +++-
1 files changed, 3 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.72 - 1.73
---
Log message:
expand ISD::SDIV, ISD::UDIV, ISD::SREM and ISD::UREM
---
Diffs of the changes: (+4 -0)
ARMISelDAGToDAG.cpp |4
1 files changed, 4 insertions(+)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.68 - 1.69
ARMInstrInfo.td updated: 1.48 - 1.49
---
Log message:
fix some fp condition codes
use non trapping comparison instructions
---
Diffs of the changes: (+28 -41)
ARMISelDAGToDAG.cpp | 60
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.69 - 1.70
---
Log message:
expand ISD::BRCOND
---
Diffs of the changes: (+2 -0)
ARMISelDAGToDAG.cpp |2 ++
1 files changed, 2 insertions(+)
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.65 - 1.66
ARMInstrInfo.td updated: 1.45 - 1.46
---
Log message:
implement unordered floating point compares
---
Diffs of the changes: (+78 -28)
ARMISelDAGToDAG.cpp | 95
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.66 - 1.67
---
Log message:
implement calls to functions that return long
---
Diffs of the changes: (+16 -9)
ARMISelDAGToDAG.cpp | 25 -
1 files changed, 16 insertions(+), 9 deletions(-)
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.67 - 1.68
---
Log message:
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
---
Diffs of the changes: (+5 -5)
ARMISelDAGToDAG.cpp | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.61 - 1.62
ARMInstrInfo.td updated: 1.38 - 1.39
---
Log message:
initial support for fp compares. Unordered compares not implemented yet
---
Diffs of the changes: (+49 -11)
ARMISelDAGToDAG.cpp | 50
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.62 - 1.63
ARMInstrInfo.td updated: 1.39 - 1.40
---
Log message:
compare doubles
---
Diffs of the changes: (+6 -2)
ARMISelDAGToDAG.cpp |4 ++--
ARMInstrInfo.td |4
2 files changed, 6 insertions(+), 2
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.63 - 1.64
ARMInstrInfo.td updated: 1.40 - 1.41
---
Log message:
add double - int conversion
---
Diffs of the changes: (+26 -0)
ARMISelDAGToDAG.cpp | 18 ++
ARMInstrInfo.td |8
2
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.64 - 1.65
ARMInstrInfo.td updated: 1.42 - 1.43
---
Log message:
uint - double conversion
---
Diffs of the changes: (+26 -0)
ARMISelDAGToDAG.cpp | 18 ++
ARMInstrInfo.td |8
2 files
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.58 - 1.59
---
Log message:
expand ISD::EXTLOAD
---
Diffs of the changes: (+2 -0)
ARMISelDAGToDAG.cpp |2 ++
1 files changed, 2 insertions(+)
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.59 - 1.60
---
Log message:
expand ISD::SELECT
---
Diffs of the changes: (+2 -0)
ARMISelDAGToDAG.cpp |2 ++
1 files changed, 2 insertions(+)
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.57 - 1.58
ARMInstrInfo.td updated: 1.35 - 1.36
---
Log message:
implement FUITOS and FUITOD
---
Diffs of the changes: (+31 -1)
ARMISelDAGToDAG.cpp | 22 ++
ARMInstrInfo.td | 10 +-
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.54 - 1.55
---
Log message:
fix some bugs affecting functions with no arguments
---
Diffs of the changes: (+4 -2)
ARMISelDAGToDAG.cpp |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.56 - 1.57
ARMInstrInfo.td updated: 1.32 - 1.33
---
Log message:
add optional input flag to FMRRD
---
Diffs of the changes: (+4 -3)
ARMISelDAGToDAG.cpp |4 ++--
ARMInstrInfo.td |3 ++-
2 files changed, 4
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.50 - 1.51
ARMInstrInfo.td updated: 1.31 - 1.32
---
Log message:
implement a ArgumentLayout class to factor code common to LowerFORMAL_ARGUMENTS
and LowerCALL
implement FMDRR
add support for f64 function arguments
---
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.51 - 1.52
---
Log message:
use a const ref for passing the vector to ArgumentLayout
---
Diffs of the changes: (+2 -2)
ARMISelDAGToDAG.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.52 - 1.53
---
Log message:
Make use of getStore().
---
Diffs of the changes: (+5 -6)
ARMISelDAGToDAG.cpp | 11 +--
1 files changed, 5 insertions(+), 6 deletions(-)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.49 - 1.50
ARMInstrInfo.td updated: 1.30 - 1.31
README.txt updated: 1.2 - 1.3
---
Log message:
Implement floating point constants
---
Diffs of the changes: (+11 -0)
ARMISelDAGToDAG.cpp |3 +++
ARMInstrInfo.td
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.48 - 1.49
ARMInstrInfo.td updated: 1.29 - 1.30
ARMRegisterInfo.td updated: 1.4 - 1.5
---
Log message:
fix the names of the 64bit fp register
initial support for returning 64bit floating point numbers
---
Diffs of the
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.47 - 1.48
ARMInstrInfo.td updated: 1.28 - 1.29
ARMRegisterInfo.td updated: 1.3 - 1.4
---
Log message:
add floating point registers
implement SINT_TO_FP
---
Diffs of the changes: (+137 -23)
ARMISelDAGToDAG.cpp | 32
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.45 - 1.46
---
Log message:
if a constant can't be an immediate, add it to the constant pool
---
Diffs of the changes: (+34 -4)
ARMISelDAGToDAG.cpp | 38 ++
1 files changed, 34
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.43 - 1.44
---
Log message:
Reflects MachineConstantPoolEntry changes.
---
Diffs of the changes: (+1 -1)
ARMISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.42 - 1.43
---
Log message:
add the correct fallback for ARMDAGToDAGISel::SelectAddrMode1
---
Diffs of the changes: (+3 -6)
ARMISelDAGToDAG.cpp |9 +++--
1 files changed, 3 insertions(+), 6 deletions(-)
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.32 - 1.33
ARMInstrInfo.td updated: 1.17 - 1.18
ARMTargetMachine.cpp updated: 1.5 - 1.6
---
Log message:
initial support for select
---
Diffs of the changes: (+42 -1)
ARMISelDAGToDAG.cpp | 26
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.31 - 1.32
---
Log message:
call computeRegisterProperties
---
Diffs of the changes: (+6 -0)
ARMISelDAGToDAG.cpp |6 ++
1 files changed, 6 insertions(+)
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.28 - 1.29
---
Log message:
select code like
ldr rx, [ry, #offset]
---
Diffs of the changes: (+34 -1)
ARMISelDAGToDAG.cpp | 35 ++-
1 files changed, 34 insertions(+), 1 deletion(-)
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.25 - 1.26
---
Log message:
Match tablegen changes.
---
Diffs of the changes: (+4 -3)
ARMISelDAGToDAG.cpp |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.26 - 1.27
---
Log message:
elimiante use of getNode that takes vector of operands.
---
Diffs of the changes: (+4 -3)
ARMISelDAGToDAG.cpp |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.27 - 1.28
---
Log message:
Eliminate use of getNode that takes a vector.
---
Diffs of the changes: (+2 -1)
ARMISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.24 - 1.25
ARMRegisterInfo.cpp updated: 1.12 - 1.13
---
Log message:
fix the spill code
---
Diffs of the changes: (+15 -7)
ARMISelDAGToDAG.cpp |6 ++
ARMRegisterInfo.cpp | 16 +---
2 files
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.23 - 1.24
ARMRegisterInfo.cpp updated: 1.9 - 1.10
---
Log message:
initial support for variable number of arguments
---
Diffs of the changes: (+37 -12)
ARMISelDAGToDAG.cpp | 24
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.22 - 1.23
---
Log message:
Match tablegen isel changes.
---
Diffs of the changes: (+1 -3)
ARMISelDAGToDAG.cpp |4 +---
1 files changed, 1 insertion(+), 3 deletions(-)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.21 - 1.22
---
Log message:
use a 'register pressure reducing' scheduler
make sure only one move is used in a hello world
---
Diffs of the changes: (+2 -0)
ARMISelDAGToDAG.cpp |2 ++
1 files changed, 2
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.19 - 1.20
ARMInstrInfo.td updated: 1.11 - 1.12
---
Log message:
add and use ARMISD::RET_FLAG
---
Diffs of the changes: (+10 -9)
ARMISelDAGToDAG.cpp | 15 +++
ARMInstrInfo.td |4 +++-
2 files
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.20 - 1.21
---
Log message:
Bug fix: always generate a RET_FLAG in LowerRET
fixes ret_null.ll and call.ll
---
Diffs of the changes: (+1 -1)
ARMISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.17 - 1.18
---
Log message:
Remove InFlightSet hack. No longer needed.
---
Diffs of the changes: (+0 -1)
ARMISelDAGToDAG.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.16 - 1.17
---
Log message:
implement function calling of functions with up to 4 arguments
---
Diffs of the changes: (+45 -3)
ARMISelDAGToDAG.cpp | 48 +---
1 files
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.12 - 1.13
ARMInstrInfo.cpp updated: 1.2 - 1.3
ARMRegisterInfo.cpp updated: 1.4 - 1.5
---
Log message:
handle the mov reg1, reg2 case in isMoveInstr
---
Diffs of the changes: (+20 -6)
ARMISelDAGToDAG.cpp | 10
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.11 - 1.12
---
Log message:
lower more then 4 formal arguments. The offset is currently hard coded.
implement SelectFrameIndex
---
Diffs of the changes: (+50 -15)
ARMISelDAGToDAG.cpp | 65
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.10 - 1.11
---
Log message:
add R0 to liveout
expand ret null (implements test/Regression/CodeGen/ARM/ret_void.ll)
note that a Flag link is missing between the copy and the branch
---
Diffs of the changes: (+13 -3)
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.9 - 1.10
ARMInstrInfo.td updated: 1.3 - 1.4
---
Log message:
Expand ret into CopyToReg;BRIND
---
Diffs of the changes: (+4 -18)
ARMISelDAGToDAG.cpp | 12 +++-
ARMInstrInfo.td | 10 +-
2 files
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.8 - 1.9
---
Log message:
Change RET node to include signness information of the return values. i.e.
RET chain, value1, sign1, value2, sign2, ...
---
Diffs of the changes: (+2 -2)
ARMISelDAGToDAG.cpp |4 ++--
1
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.7 - 1.8
---
Log message:
port the ARM backend to use ISD::CALL instead of LowerCallTo
---
Diffs of the changes: (+3 -12)
ARMISelDAGToDAG.cpp | 15 +++
1 files changed, 3 insertions(+), 12 deletions(-)
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.5 - 1.6
---
Log message:
Clear HandleMap and ReplaceMap after instruction selection. Or it may cause
non-deterministic behavior.
---
Diffs of the changes: (+2 -0)
ARMISelDAGToDAG.cpp |2 ++
1 files changed, 2
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.6 - 1.7
---
Log message:
Assert if InflightSet is not cleared after instruction selecting a BB.
---
Diffs of the changes: (+1 -0)
ARMISelDAGToDAG.cpp |1 +
1 files changed, 1 insertion(+)
Index:
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.2 - 1.3
ARMInstrInfo.td updated: 1.1 - 1.2
ARMRegisterInfo.cpp updated: 1.2 - 1.3
---
Log message:
implement movri
add a stub LowerFORMAL_ARGUMENTS
---
Diffs of the changes: (+14 -3)
ARMISelDAGToDAG.cpp |6
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