Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.149 - 1.150
X86ISelLowering.cpp updated: 1.413 - 1.414
X86ISelLowering.h updated: 1.100 - 1.101
---
Log message:
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.148 - 1.149
---
Log message:
Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
---
Diffs of the changes: (+8 -6)
X86ISelDAGToDAG.cpp | 14 --
1 files changed, 8 insertions(+), 6 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.145 - 1.146
X86InstrInfo.cpp updated: 1.78 - 1.79
---
Log message:
Two changes:
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.144 - 1.145
---
Log message:
Fix a miscompilation in the addr mode code trying to implement X | C and
X + C to promote LEA formation. We would incorrectly apply it in some cases
(test) and miss it in others.
This fixes
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.143 - 1.144
X86ISelLowering.cpp updated: 1.314 - 1.315
X86Subtarget.cpp updated: 1.49 - 1.50
---
Log message:
Linux GOT indirect reference is only necessary in PIC mode.
---
Diffs of the changes: (+5 -3)
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.142 - 1.143
X86TargetAsmInfo.cpp updated: 1.19 - 1.20
---
Log message:
Adjust #includes to compensate for lost of DerivedTypes.h in
TargetLowering.h
---
Diffs of the changes: (+2 -0)
X86ISelDAGToDAG.cpp |1 +
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.132 - 1.133
X86ISelLowering.cpp updated: 1.298 - 1.299
X86ISelLowering.h updated: 1.80 - 1.81
X86InstrInfo.td updated: 1.295 - 1.296
X86InstrX86-64.td updated: 1.8 - 1.9
---
Log message:
- Use a different wrapper node for
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.131 - 1.132
---
Log message:
Clean up.
---
Diffs of the changes: (+8 -8)
X86ISelDAGToDAG.cpp | 16
1 files changed, 8 insertions(+), 8 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.128 - 1.129
---
Log message:
For unsigned 8-bit division. Use movzbw to set the lower 8 bits of AX while
clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.122 - 1.123
---
Log message:
Match tblegen changes.
---
Diffs of the changes: (+16 -15)
X86ISelDAGToDAG.cpp | 31 ---
1 files changed, 16 insertions(+), 15 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.121 - 1.122
X86RegisterInfo.h updated: 1.41 - 1.42
---
Log message:
Unbreak VC++ build.
---
Diffs of the changes: (+4 -2)
X86ISelDAGToDAG.cpp |2 +-
X86RegisterInfo.h |4 +++-
2 files changed, 4
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.120 - 1.121
---
Log message:
silence warning
---
Diffs of the changes: (+0 -6)
X86ISelDAGToDAG.cpp |6 --
1 files changed, 6 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.119 - 1.120
---
Log message:
SelectScalarSSELoad should call CanBeFoldedBy as well.
---
Diffs of the changes: (+7 -3)
X86ISelDAGToDAG.cpp | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.117 - 1.118
X86ISelLowering.cpp updated: 1.274 - 1.275
X86InstrFPStack.td updated: 1.7 - 1.8
X86InstrInfo.td updated: 1.291 - 1.292
---
Log message:
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
---
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.116 - 1.117
---
Log message:
Doh. This wasn't causing problems by luck.
---
Diffs of the changes: (+1 -1)
X86ISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.113 - 1.114
---
Log message:
ComplexPatterns sse_load_f32 and sse_load_f64 returns in / out chain operands.
---
Diffs of the changes: (+10 -7)
X86ISelDAGToDAG.cpp | 17 ++---
1 files changed, 10
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.114 - 1.115
---
Log message:
Fold zero extending vector loads now that evan added the chain manip stuff.
This compiles both tests in X86/vec_ss_load_fold.ll into:
_test1:
movss 4(%esp), %xmm0
subss
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.115 - 1.116
---
Log message:
fix compilation failure of smg2000
---
Diffs of the changes: (+1 -1)
X86ISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.111 - 1.112
X86ISelLowering.cpp updated: 1.271 - 1.272
X86InstrFPStack.td updated: 1.6 - 1.7
X86InstrInfo.td updated: 1.287 - 1.288
X86InstrSSE.td updated: 1.162 - 1.163
X86InstrX86-64.td updated: 1.3 - 1.4
---
Log
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.112 - 1.113
---
Log message:
More isel time load folding checking for nodes that produce flag values.
See comment in CanBeFoldedBy() for detailed explanation.
---
Diffs of the changes: (+57 -6)
X86ISelDAGToDAG.cpp |
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.110 - 1.111
X86InstrSSE.td updated: 1.161 - 1.162
---
Log message:
completely disable folding of loads into scalar sse instructions and provide
a framework for doing it right. This fixes
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.109 - 1.110
---
Log message:
Not needed.
---
Diffs of the changes: (+0 -1)
X86ISelDAGToDAG.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.107 - 1.108
---
Log message:
Remove a unnecessary check.
---
Diffs of the changes: (+0 -1)
X86ISelDAGToDAG.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.106 - 1.107
---
Log message:
Fix a regression in the 32-bit port from the 64-bit port landing.
We now compile CodeGen/X86/lea-2.ll into:
_test:
movl 4(%esp), %eax
movl 8(%esp), %ecx
leal
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.98 - 1.99
---
Log message:
Add an optional pass to preprocess the DAG before x86 isel to allow selecting
more load/mod/store instructions.
---
Diffs of the changes: (+130 -0)
X86ISelDAGToDAG.cpp | 130
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.96 - 1.97
---
Log message:
Do not use getTargetNode() and SelectNodeTo() which takes more than 3
SDOperand arguments. Use the variants which take an array and number instead.
---
Diffs of the changes: (+4 -4)
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.95 - 1.96
---
Log message:
SelectNodeTo now returns a SDNode*.
---
Diffs of the changes: (+1 -1)
X86ISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.93 - 1.94
---
Log message:
Match tblgen changes; clean up.
---
Diffs of the changes: (+34 -79)
X86ISelDAGToDAG.cpp | 113 +++-
1 files changed, 34 insertions(+), 79
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.91 - 1.92
---
Log message:
SelectNodeTo() may return a SDOperand that is different from the input.
---
Diffs of the changes: (+1 -2)
X86ISelDAGToDAG.cpp |3 +--
1 files changed, 1 insertion(+), 2 deletions(-)
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.92 - 1.93
---
Log message:
Doh. Incorrectly inverted condition. Also add a isOnlyUse check to match
tablegen.
---
Diffs of the changes: (+2 -1)
X86ISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.90 - 1.91
X86ISelLowering.cpp updated: 1.243 - 1.244
---
Log message:
Match tablegen changes.
---
Diffs of the changes: (+38 -20)
X86ISelDAGToDAG.cpp | 26 ++
X86ISelLowering.cpp | 32
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.88 - 1.89
---
Log message:
Match tablegen isel changes.
---
Diffs of the changes: (+54 -101)
X86ISelDAGToDAG.cpp | 155 ++--
1 files changed, 54 insertions(+), 101
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.89 - 1.90
---
Log message:
Eliminate reachability matrix. It has to be calculated before any instruction
selection is done. That's rather expensive especially in situations where it
isn't really needed.
Move back to a
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.86 - 1.87
---
Log message:
Use of vectorbool causes some horrendous compile time regression (2x)!
Looks like libstdc++ implementation does not scale very well. Switch back
to using directly managed arrays.
---
Diffs of
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.87 - 1.88
---
Log message:
Reflect change to AssignTopologicalOrder().
---
Diffs of the changes: (+8 -5)
X86ISelDAGToDAG.cpp | 13 -
1 files changed, 8 insertions(+), 5 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.85 - 1.86
---
Log message:
Factor topological order code to SelectionDAG. Clean up.
---
Diffs of the changes: (+23 -87)
X86ISelDAGToDAG.cpp | 110 ++--
1 files changed,
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.83 - 1.84
---
Log message:
Some clean up.
---
Diffs of the changes: (+8 -6)
X86ISelDAGToDAG.cpp | 14 --
1 files changed, 8 insertions(+), 6 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
On Fri, 2006-07-28 at 01:05 -0500, Evan Cheng wrote:
+void DetermineReachibility(SDNode *f, SDNode *t);
Hate to be pedantic about this, but its Reachability (a between h and
b)
Reid.
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.84 - 1.85
---
Log message:
Can't spell.
---
Diffs of the changes: (+15 -15)
X86ISelDAGToDAG.cpp | 30 +++---
1 files changed, 15 insertions(+), 15 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.76 - 1.77
---
Log message:
isNonImmUse is replaced by IsFoldableBy
---
Diffs of the changes: (+1 -1)
X86ISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.77 - 1.78
---
Log message:
Calculate the portion of reachbility matrix on demand.
---
Diffs of the changes: (+42 -11)
X86ISelDAGToDAG.cpp | 53 +---
1 files changed,
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.78 - 1.79
---
Log message:
Allocating too large an array for ReachibilityMatrix.
---
Diffs of the changes: (+5 -2)
X86ISelDAGToDAG.cpp |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.79 - 1.80
---
Log message:
Brain cramp..
---
Diffs of the changes: (+1 -3)
X86ISelDAGToDAG.cpp |4 +---
1 files changed, 1 insertion(+), 3 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.80 - 1.81
---
Log message:
Another duh. Determine topological order before any target node is added.
---
Diffs of the changes: (+13 -13)
X86ISelDAGToDAG.cpp | 26 +-
1 files changed, 13
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.81 - 1.82
---
Log message:
Node selected into address mode cannot be folded.
---
Diffs of the changes: (+39 -0)
X86ISelDAGToDAG.cpp | 39 +++
1 files changed, 39 insertions(+)
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.82 - 1.83
---
Log message:
Rename IsFoldableBy to CanBeFoldedleBy
---
Diffs of the changes: (+3 -3)
X86ISelDAGToDAG.cpp |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.73 - 1.74
---
Log message:
Add support for m inline asm constraints.
---
Diffs of the changes: (+29 -1)
X86ISelDAGToDAG.cpp | 30 +-
1 files changed, 29 insertions(+), 1 deletion(-)
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.71 - 1.72
---
Log message:
Use xor to clear a register.
---
Diffs of the changes: (+4 -6)
X86ISelDAGToDAG.cpp | 10 --
1 files changed, 4 insertions(+), 6 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.72 - 1.73
X86RegisterInfo.cpp updated: 1.155 - 1.156
---
Log message:
Cygwin support. Patch by Anton Korobeynikov!
---
Diffs of the changes: (+28 -4)
X86ISelDAGToDAG.cpp |9 +++--
X86RegisterInfo.cpp | 23
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.69 - 1.70
X86InstrInfo.td updated: 1.271 - 1.272
---
Log message:
A addressing mode folding enhancement:
Fold c2 in (x c1) | c2 where (c2 c1)
e.g.
int test(int x) {
return (x 3) + 7;
}
This can be codegen'd as:
leal
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.70 - 1.71
---
Log message:
Remove bogus comment.
---
Diffs of the changes: (+0 -1)
X86ISelDAGToDAG.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.66 - 1.67
X86ISelLowering.h updated: 1.64 - 1.65
X86InstrBuilder.h updated: 1.20 - 1.21
X86InstrInfo.h updated: 1.51 - 1.52
X86JITInfo.cpp updated: 1.18 - 1.19
X86Relocations.h updated: 1.2 - 1.3
---
Log message:
Patches
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.67 - 1.68
---
Log message:
Clear HandleMap and ReplaceMap after instruction selection. Or it may cause
non-deterministic behavior.
---
Diffs of the changes: (+2 -0)
X86ISelDAGToDAG.cpp |2 ++
1 files changed, 2
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.65 - 1.66
---
Log message:
Back out indirect branch load folding hack. It broke some tests.
---
Diffs of the changes: (+0 -63)
X86ISelDAGToDAG.cpp | 63
1 files
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.63 - 1.64
---
Log message:
Missing break statements.
---
Diffs of the changes: (+3 -0)
X86ISelDAGToDAG.cpp |3 +++
1 files changed, 3 insertions(+)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.61 - 1.62
---
Log message:
Handle indirect call which folds a load manually. This never matches by
the TableGen generated code since the load's chain result is read by
the callseq_start node.
---
Diffs of the changes:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.62 - 1.63
X86InstrInfo.td updated: 1.270 - 1.271
---
Log message:
Remove unused patterns.
---
Diffs of the changes: (+4 -7)
X86ISelDAGToDAG.cpp |3 ++-
X86InstrInfo.td |8 ++--
2 files changed, 4
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.56 - 1.57
---
Log message:
#include Intrinsics.h into all dag isels
---
Diffs of the changes: (+1 -0)
X86ISelDAGToDAG.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.54 - 1.55
---
Log message:
Don't match x 1 to LEAL. It's better to emit x + x.
---
Diffs of the changes: (+4 -1)
X86ISelDAGToDAG.cpp |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.53 - 1.54
---
Log message:
* Cleaned up addressing mode matching code.
* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
they
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.52 - 1.53
X86ISelLowering.cpp updated: 1.95 - 1.96
X86ISelLowering.h updated: 1.31 - 1.32
X86InstrInfo.td updated: 1.248 - 1.249
---
Log message:
- Clean up the lowering and selection code of ConstantPool, GlobalAddress,
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.50 - 1.51
---
Log message:
X86 codegen tweak to use lea in another case:
Suppose base == %eax and it has multiple uses, then instead of
movl %eax, %ecx
addl $8, %ecx
use
leal 8(%eax), %ecx.
---
Diffs of the
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.48 - 1.49
---
Log message:
Prevent certain nodes that have already been selected from being folded into
X86 addressing mode. Currently we do not allow any node whose target node
produces a chain as well as any node that
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.45 - 1.46
---
Log message:
Match tblgen change.
---
Diffs of the changes: (+2 -2)
X86ISelDAGToDAG.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.43 - 1.44
---
Log message:
Change Select() from
SDOperand Select(SDOperand N);
to
void Select(SDOperand Result, SDOperand N);
---
Diffs of the changes: (+53 -38)
X86ISelDAGToDAG.cpp | 91
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.42 - 1.43
---
Log message:
- Update load folding checks to match those auto-generated by tblgen.
- Manually select SDOperand's returned by TryFoldLoad which make up the
load address.
---
Diffs of the changes: (+26
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.38 - 1.39
---
Log message:
Complex pattern's custom matcher should not call Select() on any operands.
Select them afterwards if it returns true.
---
Diffs of the changes: (+7 -13)
X86ISelDAGToDAG.cpp | 20
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.41 - 1.42
---
Log message:
Use SelectRoot() as entry of any tblgen based isel.
---
Diffs of the changes: (+2 -1)
X86ISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.33 - 1.34
X86ISelLowering.cpp updated: 1.49 - 1.50
---
Log message:
A obvious typo
---
Diffs of the changes: (+3 -1)
X86ISelDAGToDAG.cpp |2 ++
X86ISelLowering.cpp |2 +-
2 files changed, 3 insertions(+), 1
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.34 - 1.35
---
Log message:
Didn't mean to check that in.
---
Diffs of the changes: (+0 -2)
X86ISelDAGToDAG.cpp |2 --
1 files changed, 2 deletions(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.32 - 1.33
X86ISelLowering.cpp updated: 1.42 - 1.43
X86InstrInfo.td updated: 1.206 - 1.207
---
Log message:
Fix FP_TO_INT**_IN_MEM lowering.
---
Diffs of the changes: (+132 -103)
X86ISelDAGToDAG.cpp | 58
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.31 - 1.32
X86ISelLowering.cpp updated: 1.41 - 1.42
X86ISelPattern.cpp updated: 1.197 - 1.198
---
Log message:
Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.
---
Diffs of the changes: (+4
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.30 - 1.31
---
Log message:
silence a warning
---
Diffs of the changes: (+1 -0)
X86ISelDAGToDAG.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.25 - 1.26
X86ISelLowering.cpp updated: 1.25 - 1.26
X86InstrInfo.td updated: 1.192 - 1.193
---
Log message:
FP_TO_INT*_IN_MEM and x87 FP Select support.
---
Diffs of the changes: (+131 -21)
X86ISelDAGToDAG.cpp | 58
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.26 - 1.27
---
Log message:
Fit into 80 cols
---
Diffs of the changes: (+2 -1)
X86ISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.27 - 1.28
X86ISelPattern.cpp updated: 1.191 - 1.192
---
Log message:
implement FP_REG_KILL insertion for the dag-dag instruction selector
---
Diffs of the changes: (+59 -1)
X86ISelDAGToDAG.cpp | 59
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.24 - 1.25
X86InstrInfo.td updated: 1.191 - 1.192
---
Log message:
* Added undef patterns.
* Some reorg.
---
Diffs of the changes: (+83 -68)
X86ISelDAGToDAG.cpp |9 ---
X86InstrInfo.td | 142
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.22 - 1.23
---
Log message:
ISEL code for MULHU, MULHS, and UNDEF.
---
Diffs of the changes: (+82 -7)
X86ISelDAGToDAG.cpp | 89 +++-
1 files changed, 82 insertions(+),
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.23 - 1.24
---
Log message:
* Added integer div / rem.
* Fixed a load folding bug.
---
Diffs of the changes: (+98 -4)
X86ISelDAGToDAG.cpp | 102 +---
1 files changed,
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.21 - 1.22
---
Log message:
fold (shl x, 1) - (add x, x)
---
Diffs of the changes: (+0 -20)
X86ISelDAGToDAG.cpp | 20
1 files changed, 20 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.19 - 1.20
X86ISelLowering.cpp updated: 1.18 - 1.19
X86ISelLowering.h updated: 1.9 - 1.10
X86InstrInfo.td updated: 1.186 - 1.187
---
Log message:
DAG based isel call support.
---
Diffs of the changes: (+197 -41)
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.20 - 1.21
X86InstrInfo.td updated: 1.187 - 1.188
---
Log message:
Added ConstantFP patterns.
---
Diffs of the changes: (+33 -31)
X86ISelDAGToDAG.cpp | 27 ---
X86InstrInfo.td | 37
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.18 - 1.19
X86ISelLowering.cpp updated: 1.14 - 1.15
X86ISelLowering.h updated: 1.7 - 1.8
X86InstrInfo.td updated: 1.181 - 1.182
---
Log message:
* Fix a GlobalAddress lowering bug.
* Teach DAG combiner about X86ISD::SETCC
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.16 - 1.17
X86ISelLowering.cpp updated: 1.11 - 1.12
X86ISelLowering.h updated: 1.5 - 1.6
X86InstrInfo.td updated: 1.175 - 1.176
X86RegisterInfo.td updated: 1.25 - 1.26
---
Log message:
* Added lowering hook for external
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.17 - 1.18
---
Log message:
Remove ISD::RET select code. Now tblgen'd.
---
Diffs of the changes: (+0 -41)
X86ISelDAGToDAG.cpp | 41 -
1 files changed, 41 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.15 - 1.16
---
Log message:
It's essential we clear CodeGenMap after isel every basic block!
---
Diffs of the changes: (+1 -0)
X86ISelDAGToDAG.cpp |1 +
1 files changed, 1 insertion(+)
Index:
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.14 - 1.15
---
Log message:
Darwin API issue: indirect load of external and weak symbols.
---
Diffs of the changes: (+8 -3)
X86ISelDAGToDAG.cpp | 11 ---
1 files changed, 8 insertions(+), 3 deletions(-)
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.11 - 1.12
X86ISelLowering.cpp updated: 1.6 - 1.7
X86InstrInfo.td updated: 1.168 - 1.169
---
Log message:
* Promote all 1 bit entities to 8 bit.
* Handling extload (1 bit - 8 bit) and remove C++ code that handle 1 bit
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.8 - 1.9
---
Log message:
For ISD::RET, if # of operands = 2, try selection the real data dep. operand
first before the chain.
e.g.
int X;
int foo(int x)
{
x += X + 37;
return x;
}
If chain operand is selected first,
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.9 - 1.10
---
Log message:
When SelectLEAAddr() fails, it shouldn't cause the side effect of having the
base or index operands being selected.
---
Diffs of the changes: (+48 -17)
X86ISelDAGToDAG.cpp | 65
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.7 - 1.8
X86InstrInfo.td updated: 1.151 - 1.152
---
Log message:
* Added X86 store patterns.
* Added X86 dec patterns.
---
Diffs of the changes: (+19 -43)
X86ISelDAGToDAG.cpp | 33 -
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.6 - 1.7
X86InstrInfo.td updated: 1.148 - 1.149
---
Log message:
* Added intelligence to X86 LEA addressing mode matching routine so it returns
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.4 - 1.5
---
Log message:
SelectNodeTo now returns its result, we must pay attention to it.
---
Diffs of the changes: (+18 -20)
X86ISelDAGToDAG.cpp | 38 ++
1 files changed, 18
Changes in directory llvm/lib/Target/X86:
X86ISelDAGToDAG.cpp updated: 1.2 - 1.3
---
Log message:
Add load and other support to the dag-dag isel. Patch contributed by Evan
Cheng!
---
Diffs of the changes: (+225 -2)
X86ISelDAGToDAG.cpp | 227
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