Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.54 - 1.55
---
Log message:
Before assuming that the original code didn't work for Athlon64, the person who
replaced it with a FIXME should have determined what did work. Then he would
have
realized that the code was in
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.55 - 1.56
---
Log message:
In the event that some really old non-Intel or -AMD CPU is encountered...
---
Diffs of the changes: (+5 -2)
X86Subtarget.cpp |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
Jeff,
Before assuming that the original code didn't work for Athlon64, the person
who
replaced it with a FIXME should have determined what did work. Then he would
have
realized that the code was in fact correct, and would have avoided breaking
it.
The prev. code didn't know about AMD
Yes, it worked for AMD. I have AMD, and I wrote the code to support
AMD. I left the code the way it was because it was correct for AMD. I
actually tested it on an AMD system.
Anton Korobeynikov wrote:
Jeff,
Before assuming that the original code didn't work for Athlon64, the person
Looks like Evan broke it last October.
Jeff Cohen wrote:
Yes, it worked for AMD. I have AMD, and I wrote the code to support
AMD. I left the code the way it was because it was correct for AMD.
I actually tested it on an AMD system.
Anton Korobeynikov wrote:
Jeff,
Before assuming
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.52 - 1.53
---
Log message:
Autodetect MMX SSE stuff for AMD processors
---
Diffs of the changes: (+11 -10)
X86Subtarget.cpp | 21 +++--
1 files changed, 11 insertions(+), 10 deletions(-)
Index:
Ok. I see PPC does exactly the same thing. But this seems like a
temporary solution. Could we add some kind of JIT relocation model
which are target specific? Or any method that would allow llc to
codegen (by specifying some command line option?) in the exact same
way as the JIT would?
Hello, Chris.
PPC64 has a similar problem. It wants to do codegen in PIC mode, but
it doesn't want the JIT to make dyld stubs. As such, it does 'JIT
PIC' mode, which is like PIC but doesn't do the extra load to go
through dyld stubs.
Yes, It's quite the same. At codegen level we know
I took a look at mingw related code. It seems to me for mingw that
you can set relocation type to pic for llc and static for jit. No?
Then GVRequiresExtraLoad can just check relocation type?
Also GVRequiresExtraLoad now violates 80-col policy and its style is
inconsistent with the rest of
On Dec 20, 2006, at 12:25 AM, Evan Cheng wrote:
Ok. I see PPC does exactly the same thing. But this seems like a
temporary solution. Could we add some kind of JIT relocation model
which are target specific? Or any method that would allow llc to
codegen (by specifying some command line
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.44 - 1.45
---
Log message:
Fixed 80 cols style violation
---
Diffs of the changes: (+4 -2)
X86Subtarget.cpp |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/X86/X86Subtarget.cpp
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.41 - 1.42
X86Subtarget.h updated: 1.21 - 1.22
---
Log message:
Factor out GVRequiresExtraLoad() from .h to .cpp
---
Diffs of the changes: (+19 -13)
X86Subtarget.cpp | 17 +
X86Subtarget.h | 15
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.40 - 1.41
---
Log message:
16-byte stack alignment for X86-64 ELF. Patch by Dan Gohman.
---
Diffs of the changes: (+3 -1)
X86Subtarget.cpp |4 +++-
1 files changed, 3 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.38 - 1.39
---
Log message:
Use movl+xchgl instead of pushl+popl.
---
Diffs of the changes: (+2 -3)
X86Subtarget.cpp |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.36 - 1.37
X86Subtarget.h updated: 1.19 - 1.20
---
Log message:
Proper fix for rdar://problem/4770604 Thanks to Stuart Hastings!
---
Diffs of the changes: (+21 -12)
X86Subtarget.cpp | 25 +
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.37 - 1.38
---
Log message:
Proper fix.
---
Diffs of the changes: (+4 -5)
X86Subtarget.cpp |9 -
1 files changed, 4 insertions(+), 5 deletions(-)
Index: llvm/lib/Target/X86/X86Subtarget.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.32 - 1.33
---
Log message:
It appears the inline asm in GetCpuIDAndInfo() may clobbers some registers if
it isn't inlined (at -O3). Force it to be inlined.
---
Diffs of the changes: (+3 -3)
X86Subtarget.cpp |6
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.35 - 1.36
---
Log message:
80 col violation.
---
Diffs of the changes: (+4 -3)
X86Subtarget.cpp |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/X86/X86Subtarget.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.31 - 1.32
---
Log message:
Formating.
---
Diffs of the changes: (+1 -1)
X86Subtarget.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86Subtarget.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.29 - 1.30
---
Log message:
Fix a cross-build issue. The asmsyntax shouldn't be affected by the build
host, it should be affected by the target. Allow the command line option to
override in either case.
---
Diffs of the
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.27 - 1.28
---
Log message:
Later models likely to have Yonah like attributes.
---
Diffs of the changes: (+2 -1)
X86Subtarget.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.21 - 1.22
---
Log message:
Enable SSE (for the right subtargets)
---
Diffs of the changes: (+3 -6)
X86Subtarget.cpp |9 +++--
1 files changed, 3 insertions(+), 6 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.22 - 1.23
---
Log message:
Remove -disable-x86-sse
---
Diffs of the changes: (+2 -10)
X86Subtarget.cpp | 12 ++--
1 files changed, 2 insertions(+), 10 deletions(-)
Index: llvm/lib/Target/X86/X86Subtarget.cpp
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.23 - 1.24
---
Log message:
Duh
---
Diffs of the changes: (+0 -3)
X86Subtarget.cpp |3 ---
1 files changed, 3 deletions(-)
Index: llvm/lib/Target/X86/X86Subtarget.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.15 - 1.16
---
Log message:
Improve X86 subtarget support for Windows and AMD.
---
Diffs of the changes: (+77 -38)
X86Subtarget.cpp | 115 ---
1 files changed, 77
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.16 - 1.17
---
Log message:
Is64Bit reflects the capability of the chip, not an aspect of the target os
---
Diffs of the changes: (+0 -6)
X86Subtarget.cpp |6 --
1 files changed, 6 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.17 - 1.18
---
Log message:
Fix recognition of Intel CPUs.
---
Diffs of the changes: (+2 -0)
X86Subtarget.cpp |2 ++
1 files changed, 2 insertions(+)
Index: llvm/lib/Target/X86/X86Subtarget.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.10 - 1.11
---
Log message:
force sse/3dnow off until they work. This fixes all the x86 failures last night
---
Diffs of the changes: (+5 -0)
X86Subtarget.cpp |5 +
1 files changed, 5 insertions(+)
Index:
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.11 - 1.12
---
Log message:
A better workaround
---
Diffs of the changes: (+5 -6)
X86Subtarget.cpp | 11 +--
1 files changed, 5 insertions(+), 6 deletions(-)
Index: llvm/lib/Target/X86/X86Subtarget.cpp
diff -u
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.13 - 1.14
---
Log message:
initialize all instance vars
---
Diffs of the changes: (+7 -3)
X86Subtarget.cpp | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.14 - 1.15
---
Log message:
make this work on non-native hosts
---
Diffs of the changes: (+7 -3)
X86Subtarget.cpp | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.6 - 1.7
X86Subtarget.h updated: 1.5 - 1.6
---
Log message:
Make the X86 subtarget compute the basic target type: ELF, Cygwin, Darwin,
or native Win32
---
Diffs of the changes: (+24 -15)
X86Subtarget.cpp | 35
Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.7 - 1.8
X86Subtarget.h updated: 1.6 - 1.7
---
Log message:
Simplify the subtarget info, allow the asmwriter to do some target sensing
based on TargetType.
---
Diffs of the changes: (+2 -22)
X86Subtarget.cpp | 17
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