Mesa (master): ac/nir: for ubo load use correct num_components

Module: Mesa Branch: master Commit: 0084f4a42290ab54c185c9284a5670d4da4fc66e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0084f4a42290ab54c185c9284a5670d4da4fc66e Author: Dave Airlie Date: Tue Oct 31 11:29:54 2017 +1000 ac/nir: for ubo load use correct num_components I was hackin

Mesa (master): nir: fix a typo

Module: Mesa Branch: master Commit: fb87c40a58ac8fd8518c9a8e39da13385dd10978 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fb87c40a58ac8fd8518c9a8e39da13385dd10978 Author: Gwan-gyeong Mun Date: Tue Nov 7 08:28:25 2017 +0900 nir: fix a typo Signed-off-by: Mun Gwan-gyeong Reviewed

Mesa (master): glsl: Allow precision mismatch on dead data with GLSL ES 1.00

Module: Mesa Branch: master Commit: 0886be093fb871b0b6169718277e0f4d18df3ea7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0886be093fb871b0b6169718277e0f4d18df3ea7 Author: Tomasz Figa Date: Tue Sep 26 17:35:56 2017 +0900 glsl: Allow precision mismatch on dead data with GLSL ES 1.00

Mesa (master): i965: disable NIR linking on HSW and below

Module: Mesa Branch: master Commit: a9000cb860242d2d0308aec3e8fc20148a2c5eec URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9000cb860242d2d0308aec3e8fc20148a2c5eec Author: Timothy Arceri Date: Mon Nov 6 10:31:30 2017 +1100 i965: disable NIR linking on HSW and below Fixes: 379b24a

Mesa (master): radv: move is_local up to the winsys level.

Module: Mesa Branch: master Commit: 201b3b8d0d2359f56d8797867f59047cce5d160d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=201b3b8d0d2359f56d8797867f59047cce5d160d Author: Dave Airlie Date: Mon Nov 6 04:06:35 2017 + radv: move is_local up to the winsys level. We can avoid add

Mesa (master): radv: wrap cs_add_buffer in an inline. (v2)

Module: Mesa Branch: master Commit: 25660499b62a60f99ad72807fcc37f9fb622a2ea URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=25660499b62a60f99ad72807fcc37f9fb622a2ea Author: Dave Airlie Date: Mon Nov 6 04:05:59 2017 + radv: wrap cs_add_buffer in an inline. (v2) The next patch w

Mesa (master): radv: when loading regs no need to add buffer

Module: Mesa Branch: master Commit: 31b5da7958a8d7635d39ec160723bf6950443b32 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=31b5da7958a8d7635d39ec160723bf6950443b32 Author: Dave Airlie Date: Mon Nov 6 02:17:09 2017 + radv: when loading regs no need to add buffer The function t

Mesa (master): radv: pre-calculate user_data_0 registers and store in pipeline

Module: Mesa Branch: master Commit: 3bf8be41b8ea2a40e78f26159a905dd5a005af5b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3bf8be41b8ea2a40e78f26159a905dd5a005af5b Author: Dave Airlie Date: Mon Nov 6 06:49:55 2017 + radv: pre-calculate user_data_0 registers and store in pipeli

Mesa (master): dri: Add a flush control extension

Module: Mesa Branch: master Commit: b89067c84faed94b2b31cdebf2cc7ecfc41952f2 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b89067c84faed94b2b31cdebf2cc7ecfc41952f2 Author: Neil Roberts Date: Wed Oct 1 20:00:47 2014 +0100 dri: Add a flush control extension This advertises that the

Mesa (master): intel: Don't flush the old context in intelMakeCurrent

Module: Mesa Branch: master Commit: 8c0729fd99c8548ceaf40e273b809ce0a69d8a44 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c0729fd99c8548ceaf40e273b809ce0a69d8a44 Author: Neil Roberts Date: Wed Feb 4 10:20:12 2015 -0500 intel: Don't flush the old context in intelMakeCurrent It s

Mesa (master): egl: Implement EGL_KHR_context_flush_control

Module: Mesa Branch: master Commit: c0be3aae6cfe1e8a51ed21e6fa10c5a51a216c36 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c0be3aae6cfe1e8a51ed21e6fa10c5a51a216c36 Author: Adam Jackson Date: Thu Sep 22 03:47:55 2016 -0400 egl: Implement EGL_KHR_context_flush_control Reviewed-by: N

Mesa (master): glx: Implement GLX_ARB_context_flush_control

Module: Mesa Branch: master Commit: ba7679f48d6414c16655cb41689f2214630f04e5 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba7679f48d6414c16655cb41689f2214630f04e5 Author: Neil Roberts Date: Wed Oct 1 20:00:48 2014 +0100 glx: Implement GLX_ARB_context_flush_control Reviewed-by: A

Mesa (master): egl/dri2: Factor out context attribute initialization

Module: Mesa Branch: master Commit: 9ef7158a0985d789958eb43cf08476d50af00f2a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ef7158a0985d789958eb43cf08476d50af00f2a Author: Adam Jackson Date: Thu Sep 22 03:38:01 2016 -0400 egl/dri2: Factor out context attribute initialization Signe

Mesa (master): docs: Mark GLX_ARB_context_flush_control done

Module: Mesa Branch: master Commit: d547e18184978affd95a72dc524ca648efbe9812 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d547e18184978affd95a72dc524ca648efbe9812 Author: Adam Jackson Date: Mon Nov 6 16:10:22 2017 -0500 docs: Mark GLX_ARB_context_flush_control done Requires an u

Mesa (master): i965: Enable flush control

Module: Mesa Branch: master Commit: 6ce9006d76c050663af0be61cc88c3215d6f8cea URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6ce9006d76c050663af0be61cc88c3215d6f8cea Author: Neil Roberts Date: Wed Oct 1 20:00:50 2014 +0100 i965: Enable flush control Reviewed-by: Adam Jackson Revie

Mesa (master): gallium: Wire up flush control

Module: Mesa Branch: master Commit: 5cc06bec1993d856370545fb3f7f363757ddae8b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5cc06bec1993d856370545fb3f7f363757ddae8b Author: Adam Jackson Date: Wed Feb 4 13:05:36 2015 -0500 gallium: Wire up flush control Reviewed-by: Marek Olšák Re

Mesa (master): drisw: Enable flush control for llvmpipe and softpipe

Module: Mesa Branch: master Commit: 791d06b23bba7d8a785a89b86af6ccf03e1271ba URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=791d06b23bba7d8a785a89b86af6ccf03e1271ba Author: Adam Jackson Date: Wed Feb 4 13:04:26 2015 -0500 drisw: Enable flush control for llvmpipe and softpipe Hilar

Mesa (master): dri: Change __DriverApiRec:: CreateContext to take a struct for attribs

Module: Mesa Branch: master Commit: 6d87500fe12e77ad13db057430964b864cacb055 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d87500fe12e77ad13db057430964b864cacb055 Author: Neil Roberts Date: Wed Oct 1 20:00:46 2014 +0100 dri: Change __DriverApiRec::CreateContext to take a struct f

Mesa (master): etnaviv: ASTC texture support

Module: Mesa Branch: master Commit: 93ba3f29bbfd996dea5ecd053501800c11fc7f1c URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=93ba3f29bbfd996dea5ecd053501800c11fc7f1c Author: Wladimir J. van der Laan Date: Wed Nov 1 18:19:02 2017 +0100 etnaviv: ASTC texture support Add ASTC texture

Mesa (master): etnaviv: Update from rnndb

Module: Mesa Branch: master Commit: f1e1c60ff69dc54f3db00afa16237ff04dd32096 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f1e1c60ff69dc54f3db00afa16237ff04dd32096 Author: Wladimir J. van der Laan Date: Wed Nov 1 18:19:01 2017 +0100 etnaviv: Update from rnndb Updated as of etnav_

Mesa (master): etnaviv: Don't over-pad compressed textures

Module: Mesa Branch: master Commit: 96463614a30589d30c81eb33f559d633dc937eae URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=96463614a30589d30c81eb33f559d633dc937eae Author: Wladimir J. van der Laan Date: Thu Nov 2 16:08:42 2017 +0100 etnaviv: Don't over-pad compressed textures HAL

Mesa (master): radv: add initial copy descriptor support. (v2)

Module: Mesa Branch: master Commit: 4bcb48b8319fd8185a326bbd1f77191bddd35506 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4bcb48b8319fd8185a326bbd1f77191bddd35506 Author: Dave Airlie Date: Fri Nov 3 04:06:35 2017 + radv: add initial copy descriptor support. (v2) It appears t

Mesa (master): gallium: add PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET

Module: Mesa Branch: master Commit: 24d6318d2492a93c707e9216cb897a2b0a1565c7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=24d6318d2492a93c707e9216cb897a2b0a1565c7 Author: Marek Olšák Date: Thu Oct 26 01:50:44 2017 +0200 gallium: add PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET --- src/

Mesa (master): radeonsi: enable signed vertex buffer offsets

Module: Mesa Branch: master Commit: 3f58988b81965fc70fe8770b4d8912cf12f0a6f1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f58988b81965fc70fe8770b4d8912cf12f0a6f1 Author: Marek Olšák Date: Thu Oct 26 01:51:29 2017 +0200 radeonsi: enable signed vertex buffer offsets --- src/gall

Mesa (master): gallium/u_vbuf: use signed vertex buffers offsets for optimal uploads

Module: Mesa Branch: master Commit: 71f5fe36b7f4f092398d27a130ef18b7e0913889 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=71f5fe36b7f4f092398d27a130ef18b7e0913889 Author: Marek Olšák Date: Thu Oct 26 03:17:29 2017 +0200 gallium/u_vbuf: use signed vertex buffers offsets for optimal

Mesa (master): automake: include git_sha1.h.in in release tarball

Module: Mesa Branch: master Commit: e17e8934f9e4b008bdfb4f9abd8ed4faa604c7d9 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e17e8934f9e4b008bdfb4f9abd8ed4faa604c7d9 Author: Juan A. Suarez Romero Date: Fri Nov 3 18:54:21 2017 +0100 automake: include git_sha1.h.in in release tarball

Mesa (master): gallium/u_threaded: clean up tc_improve_map_buffer_flags and prevent reentry

Module: Mesa Branch: master Commit: a5d3999c31e2460f690b561b41170bb7bc24fc65 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a5d3999c31e2460f690b561b41170bb7bc24fc65 Author: Marek Olšák Date: Thu Nov 2 01:06:43 2017 +0100 gallium/u_threaded: clean up tc_improve_map_buffer_flags and

Mesa (master): gallium/u_threaded: don' t map big VRAM buffers for the first upload directly

Module: Mesa Branch: master Commit: 4b0dc098b2561c07c59f7dab2813640a25789bf1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b0dc098b2561c07c59f7dab2813640a25789bf1 Author: Marek Olšák Date: Thu Nov 2 00:00:53 2017 +0100 gallium/u_threaded: don't map big VRAM buffers for the first

Mesa (master): radeonsi: don' t map big VRAM buffers for the first upload directly

Module: Mesa Branch: master Commit: adab7f16ffd3ea4c52e8d07f40ca6ae4868c3706 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=adab7f16ffd3ea4c52e8d07f40ca6ae4868c3706 Author: Marek Olšák Date: Thu Nov 2 00:05:15 2017 +0100 radeonsi: don't map big VRAM buffers for the first upload dir