I was worried this might break radeonsi if xvmc wasn't enabled but seems ok.
Acked-by: Timothy Arceri
On 28/02/17 17:37, Michel Dänzer wrote:
From: Michel Dänzer
Fixes build failure with --enable-opencl --enable-xvmc:
make[4]: Entering
From: Dave Airlie
I messed this up when I wrote it, this fixes:
dEQP-VK.memory.pipeline_barrier.*uniform_texel_buffer.*
Cc: "17.0"
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 2 +-
1 file changed,
On 28/02/17 02:19 PM, Dieter Nützel wrote:
> This one fixes --enable-opencl (apart from Timothy's 'fix' commit), but
> NOT nine...
>
> Making all in targets/d3dadapter9
> make[4]: Entering directory '/opt/mesa/src/gallium/targets/d3dadapter9'
> CXXLDd3dadapter9.la
>
From: Michel Dänzer
Fixes build failure with --enable-opencl --enable-xvmc:
make[4]: Entering directory
'/home/daenzer/src/mesa-git/mesa/build-amd64/src/gallium/targets/xvmc'
CXXLDlibXvMCgallium.la
On 17-02-26 19:19:39, Emil Velikov wrote:
On 11 January 2017 at 15:43, Ben Widawsky wrote:
On 17-01-05 16:58:56, Rainer Hochecker wrote:
From: Rainer Hochecker
This allows eglCreateImageKHR to access P010 surfaces created by vaapi
Signed-off-by:
On 28/02/17 16:35, Dieter Nützel wrote:
Ugh,
Timothy's commit (4d0d813) was NOT enough,
Are you sure? I can build OpenCL and nine without this patch. What do
you mean by it was not enough? Did you get a build error? or something else?
then
with THIS I get the below and after reverting
Did a read-through and, overall, this looks great. I made a few comments
but they're fairly simple.
One question though: Am I correct in thinking that we are still disabling
HiZ for rendering when the image is in the general layout? I think it
should be easy enough to change now but I didn't
Ugh,
Timothy's commit (4d0d813) was NOT enough, then
with THIS I get the below and after reverting THIS I'm set...
[-]
make[1]: Entering directory '/opt/mesa'
make[1]: Nothing to be done for 'all-am'.
make[1]: Leaving directory '/opt/mesa'
-Dieter
Am 28.02.2017 06:19, schrieb Dieter Nützel:
Thank you! I've been meaning to do this. That said, I think we need
something in cmd_state_reset as well.
On Feb 27, 2017 5:22 PM, "Nanley Chery" wrote:
> Signed-off-by: Nanley Chery
> ---
> src/intel/vulkan/genX_cmd_buffer.c | 7 +++
> 1
On Feb 27, 2017 5:21 PM, "Nanley Chery" wrote:
We'll loop through this array when performing automatic layout
transitions.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_pass.c| 6 +-
src/intel/vulkan/anv_private.h | 7 +++
2
This one fixes --enable-opencl (apart from Timothy's 'fix' commit), but
NOT nine...
Making all in targets/d3dadapter9
make[4]: Entering directory '/opt/mesa/src/gallium/targets/d3dadapter9'
CXXLDd3dadapter9.la
Let me make sure I understand this patch correctly: In the previous patch
we made it so that we no longer unconditionally use HiZ for sampling so,
when the image is in the general layout, we don't need a HiZ resolve
because we are ignoring the HiZ buffer anyway.
On Feb 27, 2017 5:22 PM, "Nanley
From: Dave Airlie
This should fix the build.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/Automake.inc | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/r600/Automake.inc
b/src/gallium/drivers/r600/Automake.inc
index
Why store aux usage and not the just image layout? It doesn't really
matter whether we call layout_to_aux_usage here or when we emit the binding
tables. I'm just wondering why you made the choice this way.
On Feb 27, 2017 5:20 PM, "Nanley Chery" wrote:
Signed-off-by:
On Mon, Feb 27, 2017 at 10:25 PM, Dieter Nützel
wrote:
> Hello Timothy,
>
> after your latest commit I get this:
>
Same here... My standard mesa build enables both r600g/radeonsi and also
does --enable-opencl which pulls LLVM/libelf into r600g for compute
purposes.
Looks
On Feb 27, 2017 5:20 PM, "Nanley Chery" wrote:
Validate the inputs and actually verify that this image has a depth
buffer.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 1 +
src/intel/vulkan/anv_image.c | 7 +++
On Feb 27, 2017 5:21 PM, "Nanley Chery" wrote:
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 57 ++
1 file changed, 15 insertions(+), 42 deletions(-)
diff --git
Hello Timothy,
after your latest commit I get this:
make[4]: Entering directory '/opt/mesa/src/gallium/targets/pipe-loader'
CXXLDpipe_r600.la
../../../../src/gallium/drivers/r600/.libs/libr600.a(evergreen_compute.o):
In function `r600_shader_binary_read_config':
Reviewed-by: Jason Ekstrand
On Feb 27, 2017 5:20 PM, "Nanley Chery" wrote:
> Cc:
> Signed-off-by: Nanley Chery
> ---
> src/intel/vulkan/anv_pass.c | 22 +-
> 1 file
On 27/02/17 20:57, Michel Dänzer wrote:
On 25/02/17 01:56 PM, Timothy Arceri wrote:
On 24/02/17 21:02, Marek Olšák wrote:
On Fri, Feb 24, 2017 at 3:18 AM, Timothy Arceri
wrote:
On 24/02/17 08:49, Timothy Arceri wrote:
On 24/02/17 05:12, Marek Olšák wrote:
On Thu,
On 17-01-31 13:40:01, Jason Ekstrand wrote:
On Mon, Jan 23, 2017 at 10:21 PM, Ben Widawsky wrote:
FINISHME: Use the kernel's final choice for the fb modifier
bwidawsk@norris2:~/intel-gfx/kmscube (modifiers $)
~/scripts/measure_bandwidth.sh ./kmscube none
Read bandwidth:
On 17-02-01 09:30:21, Topi Pohjolainen Topi Pohjolainen wrote:
On Tue, Jan 31, 2017 at 01:37:25PM -0800, Jason Ekstrand wrote:
On Wed, Jan 25, 2017 at 10:39 AM, Pohjolainen, Topi
<[1]topi.pohjolai...@gmail.com> wrote:
On Mon, Jan 23, 2017 at 10:21:54PM -0800, Ben Widawsky wrote:
On 17-01-31 13:37:25, Jason Ekstrand wrote:
On Wed, Jan 25, 2017 at 10:39 AM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:
On Mon, Jan 23, 2017 at 10:21:54PM -0800, Ben Widawsky wrote:
> On Gen9 hardware, the display engine is able to scanout a compressed
> framebuffer by providing
On 27/02/17 09:20 PM, Marek Olšák wrote:
> On Mon, Feb 27, 2017 at 10:57 AM, Michel Dänzer wrote:
>> On 25/02/17 01:56 PM, Timothy Arceri wrote:
>>> On 24/02/17 21:02, Marek Olšák wrote:
On Fri, Feb 24, 2017 at 3:18 AM, Timothy Arceri
wrote:
On 17-02-27 18:40:41, Jason Ekstrand wrote:
On Mon, Feb 27, 2017 at 5:38 PM, Jason Ekstrand
wrote:
On Mon, Feb 27, 2017 at 4:56 PM, Ben Widawsky wrote:
On 17-01-31 13:24:55, Jason Ekstrand wrote:
On Mon, Jan 23, 2017 at 10:21 PM, Ben Widawsky
On 27/02/17 23:20, Marek Olšák wrote:
On Mon, Feb 27, 2017 at 10:57 AM, Michel Dänzer wrote:
On 25/02/17 01:56 PM, Timothy Arceri wrote:
On 24/02/17 21:02, Marek Olšák wrote:
On Fri, Feb 24, 2017 at 3:18 AM, Timothy Arceri
wrote:
On 24/02/17
On 28.02.2017 05:19, Dave Airlie wrote:
> On 27 February 2017 at 06:31, Constantine Charlamov
> wrote: >> Initially I was trying to implement for r600 optimization like in
> the d633e23192ef17207f4a6acd3009da3126aab395 commit for radeonsi, but failed
> because I need to
On 28.02.2017 05:38, Matt Turner wrote:
> On Sun, Feb 26, 2017 at 12:31 PM, Constantine Charlamov
> wrote:
>> Initially I was trying to implement for r600 optimization like in the
>> d633e23192ef17207f4a6acd3009da3126aab395 commit for radeonsi, but failed
>> because I need
On 28 February 2017 at 12:42, Constantine Charlamov wrote:
> On 28.02.2017 05:19, Dave Airlie wrote:
>> On 27 February 2017 at 06:31, Constantine Charlamov
>> wrote: >> Initially I was trying to implement for r600 optimization like in
>> the
On Mon, Feb 27, 2017 at 5:38 PM, Jason Ekstrand
wrote:
> On Mon, Feb 27, 2017 at 4:56 PM, Ben Widawsky wrote:
>
>> On 17-01-31 13:24:55, Jason Ekstrand wrote:
>>
>>> On Mon, Jan 23, 2017 at 10:21 PM, Ben Widawsky wrote:
>>>
>>> v2:
On Sun, Feb 26, 2017 at 12:31 PM, Constantine Charlamov
wrote:
> Initially I was trying to implement for r600 optimization like in the
> d633e23192ef17207f4a6acd3009da3126aab395 commit for radeonsi, but failed
> because I need to learn some more about GPUs internals. For
On 27 February 2017 at 06:31, Constantine Charlamov wrote:
> Initially I was trying to implement for r600 optimization like in the
> d633e23192ef17207f4a6acd3009da3126aab395 commit for radeonsi, but failed
> because I need to learn some more about GPUs internals. For another
Both look good to me.
Reviewed-by: Matt Turner
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
https://bugs.freedesktop.org/show_bug.cgi?id=98502
--- Comment #17 from Eugene Shalygin
---
To clarify: lspci was never waking up the dGPU. I assume that it was always
reading the device config file.
--
You are receiving this mail because:
You are the
We might crash in the final eglTerminate and gbm_device_destroy
functions, or atexit() handlers, at which point we've freed the
current_shader_names array. We shouldn't access it.
---
run.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
We're still crashing in atexit()
current_shader_names[i] is set to shader_test[i].filename. Before we
free that, we should NULL out the pointer (also indicating the current
thread is done with this shader). That way, the crash handler won't
print garbage when trying to list what threads were doing.
---
run.c | 2 ++
1 file
On Mon, Feb 27, 2017 at 4:56 PM, Ben Widawsky wrote:
> On 17-01-31 13:24:55, Jason Ekstrand wrote:
>
>> On Mon, Jan 23, 2017 at 10:21 PM, Ben Widawsky wrote:
>>
>> v2: Put the commit message as a comment (Topi)
>>>
>>> Cc: Topi Pohjolainen
https://bugs.freedesktop.org/show_bug.cgi?id=98502
--- Comment #16 from Eugene Shalygin
---
> Eugene if behaviour has changed across kernel versions...
I'm confident that from 2014 and up to 4.10.0 on my Gentoo machine this was
never the case. I don't
While an input attachment may only take on one of those two layouts,
other depth/stencil attachments that use the same image may have
HiZ-enabled layouts. Improves the average frame rate on a release
candidate of a proprietary Vulkan benchmark by 9.94% over 3 runs on my
SKL GT4.
This causes the
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index 1c31082136..b5eda3a13d 100644
---
On Fri, Feb 24, 2017 at 06:02:16PM -0800, Jason Ekstrand wrote:
> seems reasonable
>
> Reviewed-by: Jason Ekstrand
>
Thanks for the review! I've updated this patch a bit in the series I
just sent out.
-Nanley
> On Wed, Feb 22, 2017 at 4:33 PM, Nanley Chery
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 54 +-
1 file changed, 12 insertions(+), 42 deletions(-)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index
Due to recent commits, the sampler now bypasses the auxiliary HiZ buffer
when reading from a depth image subresource that is in the general
layout. Remove this unneeded resolve.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 17 +
This will be used to sample a depth input attachment without having to
pass through the HiZ buffer.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_image.c | 22 +-
src/intel/vulkan/anv_private.h | 6 ++
2 files changed, 27
We'll loop through this array when performing automatic layout
transitions.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_pass.c| 6 +-
src/intel/vulkan/anv_private.h | 7 +++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git
Don't allocate space for resolve attachments if the subpass has none.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_pass.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/intel/vulkan/anv_pass.c b/src/intel/vulkan/anv_pass.c
index
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index 60230bf14b..2cb4468696 100644
---
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 8 ++--
src/intel/vulkan/anv_private.h | 15 +++
2 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index
We will be using the image layout. Store the full struct directly from
the user.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 24
src/intel/vulkan/anv_cmd_buffer.c | 4 ++--
src/intel/vulkan/anv_pass.c| 21
These are needed to transition input attachments.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 85 ++
1 file changed, 85 insertions(+)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
Validate the inputs and actually verify that this image has a depth
buffer.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 1 +
src/intel/vulkan/anv_image.c | 7 +++
src/intel/vulkan/anv_private.h | 7 +--
3 files changed, 9 insertions(+), 6
Cc:
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_pass.c | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/src/intel/vulkan/anv_pass.c b/src/intel/vulkan/anv_pass.c
index
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_descriptor_set.c | 10 ++
src/intel/vulkan/anv_private.h| 5 +
2 files changed, 15 insertions(+)
diff --git a/src/intel/vulkan/anv_descriptor_set.c
b/src/intel/vulkan/anv_descriptor_set.c
index
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_image.c | 31 +--
1 file changed, 13 insertions(+), 18 deletions(-)
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index a17c398993..dd646a7027 100644
---
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 57 ++
1 file changed, 15 insertions(+), 42 deletions(-)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index
Allow HiZ for input attachment-capable depth/stencil buffers. Do so
without requiring sampling operations on such attachments to go through
the HiZ buffer.
Series sections:
* Patch 1: Fix a bug.
* Patch 2: Add a new layout to aux_usage function.
* Patches 3-6: Refactor.
* Patches 7-10: Don't
This function supersedes layout_to_hiz_usage().
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_image.c | 149 +
src/intel/vulkan/anv_private.h | 4 ++
2 files changed, 153 insertions(+)
diff --git
surf_usage is only useful to image views that may use HiZ buffers.
Storage image views don't use HiZ buffers.
v2: Update commit message and add an assertion.
Fixes: 055ff2ec521 ("anv: Replace anv_image_has_hiz() with ISL_AUX_USAGE_HIZ")
Signed-off-by: Nanley Chery
---
On 28 February 2017 at 09:08, Bas Nieuwenhuizen
wrote:
> Signed-off-by: Bas Nieuwenhuizen
For the series
Reviewed-by: Dave Airlie
> ---
> src/amd/vulkan/radv_descriptor_set.c | 23 ++-
> 1 file changed,
On 26 February 2017 at 09:57, Marek Olšák wrote:
> Hi,
>
> This series depends on the patch adding attributes at call sites:
> https://patchwork.freedesktop.org/series/20100/
>
> The only legacy intrinsics still in use are:
> - llvm.SI.load.const
> - llvm.SI.tbuffer.store (when
On 17-01-31 13:24:55, Jason Ekstrand wrote:
On Mon, Jan 23, 2017 at 10:21 PM, Ben Widawsky wrote:
v2: Put the commit message as a comment (Topi)
Cc: Topi Pohjolainen
Cc: Ville Syrjälä
Cc: Jason Ekstrand
Thanks a lot for your feedbacks.
Here follows final version.
Mauro
>From d0db1d0fd07fd0b5fb7580bb8dddf109389f28ba Mon Sep 17 00:00:00 2001
From: Mauro Rossi
Date: Tue, 28 Feb 2017 01:24:41 +0100
Subject: [PATCH] android: vulkan: add support for libmesa_vulkan_util
The
On 17-01-31 13:16:24, Jason Ekstrand wrote:
On Mon, Jan 23, 2017 at 10:21 PM, Ben Widawsky wrote:
Signed-off-by: Ben Widawsky
Acked-by: Daniel Stone
---
src/mesa/drivers/dri/i965/intel_screen.c | 18 ++
1 file
https://bugs.freedesktop.org/show_bug.cgi?id=98502
--- Comment #15 from Emil Velikov ---
(In reply to Mauro Santos from comment #13)
> Aren't most patches in mesa and libdrm by now? At least the versions
> provided by Arch already seem to have the patches (or at least
https://bugs.freedesktop.org/show_bug.cgi?id=98502
--- Comment #14 from Emil Velikov ---
(In reply to Tobias Droste from comment #12)
> (In reply to Eugene Shalygin from comment #11)
> > I have the same problem: Qt5 wakes up dGPU on launch [1]. However, I believe
> >
https://bugs.freedesktop.org/show_bug.cgi?id=98502
--- Comment #13 from Mauro Santos ---
(In reply to Tobias Droste from comment #12)
> (In reply to Eugene Shalygin from comment #11)
> > I have the same problem: Qt5 wakes up dGPU on launch [1]. However, I believe
> >
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/common/ac_nir_to_llvm.c | 16
1 file changed, 16 insertions(+)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 4f3d689db7e..db7194c3086 100644
---
We can then use constants for indexed loads.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_descriptor_set.c | 5 +
src/amd/vulkan/radv_descriptor_set.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/src/amd/vulkan/radv_descriptor_set.c
So we don't need to know about radv_sampler in ac_nir_to_llvm.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_descriptor_set.c | 14 +-
src/amd/vulkan/radv_descriptor_set.h | 2 +-
2 files changed, 6 insertions(+), 10 deletions(-)
diff --git
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_descriptor_set.c | 23 ++-
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/src/amd/vulkan/radv_descriptor_set.c
b/src/amd/vulkan/radv_descriptor_set.c
index d8399574f2a..ca5b28090b9
On Monday, February 27, 2017 5:42:36 AM PST Roland Scheidegger wrote:
> Sounds exactly like something which applications would get wrong (as the
> condition is indeed quite bizarre).
I agree - and it's pointless. I think it would be better to clarify
the specification to say that sampler-based
https://bugs.freedesktop.org/show_bug.cgi?id=98502
--- Comment #12 from Tobias Droste ---
(In reply to Eugene Shalygin from comment #11)
> I have the same problem: Qt5 wakes up dGPU on launch [1]. However, I believe
> that this is a kernel problem: the dGPU wakes up when a
https://bugs.freedesktop.org/show_bug.cgi?id=98502
--- Comment #11 from Eugene Shalygin
---
I have the same problem: Qt5 wakes up dGPU on launch [1]. However, I believe
that this is a kernel problem: the dGPU wakes up when a program tries to read
from
On Monday, February 27, 2017 5:49:03 AM PST Lionel Landwerlin wrote:
> Does this fix the double free issue I've been seeing in shader-db?
No. I was looking into that bug, and wrote these patches when trying
out various theories about what might be going wrong...but it doesn't
actually solve that
On Sat, 2017-02-25 at 20:46 -0800, Francisco Jerez wrote:
> Jan Vesely writes:
>
> > this allows to pass the generated files directly to llc or bugpoint
> >
> > v2: add atomic counter ID
> >
> > Signed-off-by: Jan Vesely
> > ---
> >
On Mon 27 Feb 2017, Chad Versace wrote:
> For anyone reading the new extension specs and asking "Wait? What's this
> OPAQUE_FD thing? And why do we have memory import/export for Win32
> handles but not for dma_bufs?".
>
> There does exist a dma_buf extension, VK_MESAX_external_memory_dma_buf,
>
Samuel Iglesias Gonsálvez writes:
> Previously, if we had accesses with different sizes to the same uniform, we
> might not
> push it aligned with the bigger one. This is a problem in BSW/BXT when we
> access
> an array of DF uniform with both direct and indirect
https://bugs.freedesktop.org/show_bug.cgi?id=99856
--- Comment #21 from Jan Vesely ---
(In reply to Mig from comment #19)
> Hello,
> I built the libclc package with the patch applied with the latest llvm/clang
> (5.0.0svn) on arch, and getting the following error
>
I have some comments below, some of them are a bit of work, some of them should
be pretty easy.
Dylan
Quoting Robert Bragg (2017-02-24 05:58:00)
> --- /dev/null
> +++ b/src/mesa/drivers/dri/i965/brw_oa.py
> @@ -0,0 +1,543 @@
> +#!/usr/bin/env python2
> +#
> +# Copyright (c) 2015 Intel
On 27 February 2017 at 19:20, Dylan Baker wrote:
> Quoting Emil Velikov (2017-02-26 10:26:24)
>> On 24 February 2017 at 18:21, Dylan Baker wrote:
>> > There are a number of small style cleanups and simplifications in this
>> > series,
>> > but the main
This allows us to allocate surface states from the command buffer when
pushing descriptor sets rather than allocating them through a
descriptor set pool.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_descriptor_set.c | 6 +++---
src/intel/vulkan/anv_private.h| 3 +++
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git
Hi all,
Here is a small series to enable 2 extensions from vulkan 1.0.42 :
- VK_KHR_push_descriptor
- VK_KHR_descriptor_update_template
Cheers,
Lionel Landwerlin (6):
anv: move buffer_view declaration
anv: make layout size computation helper available across compilation
units
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_cmd_buffer.c | 91 +
src/intel/vulkan/anv_device.c | 12 +
src/intel/vulkan/anv_entrypoints_gen.py | 1
We will need this declaration closer for readability later.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_private.h | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
This will be reused later on.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_descriptor_set.c | 214 +-
src/intel/vulkan/anv_private.h| 29 +
2 files
Signed-off-by: Lionel Landwerlin
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_cmd_buffer.c | 33
src/intel/vulkan/anv_descriptor_set.c | 146
src/intel/vulkan/anv_device.c |
Quoting Mauro Rossi (2017-02-25 10:31:43)
[snip]
> diff --git a/src/vulkan/util/gen_enum_to_str.py
> b/src/vulkan/util/gen_enum_to_str.py
> index 4b6fdf3..5d2bc54 100644
> --- a/src/vulkan/util/gen_enum_to_str.py
> +++ b/src/vulkan/util/gen_enum_to_str.py
> @@ -22,6 +22,7 @@
> """Create enum to
On Mon 27 Feb 2017, Jason Ekstrand wrote:
> ---
> src/util/vk_util.h | 17 +
> 1 file changed, 17 insertions(+)
Patch 4 if
Reviewed-by: Chad Versace
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Quoting Emil Velikov (2017-02-26 10:26:24)
> On 24 February 2017 at 18:21, Dylan Baker wrote:
> > There are a number of small style cleanups and simplifications in this
> > series,
> > but the main changes are:
> > - use a mako template to generate the header and code
OglTerrainFlyInst: 4.3506% +/- 0.359936% (N = 14)
OglTerrainFlyTess: 3.5859% +/- 0.221177% (N = 15)
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_tex_subimage.c | 11 +++
1 file changed, 11 insertions(+)
diff --git
Performance differences on SKL:
OglTexFilterTri: -5.59714% +/- 0.22248%
This is because the driver now starts to use lossless compression
for RGBA_UNORM mipmapped textures of level zero size 256x256. Bench
uploads data for 8 textures of this size and samples them all
in fragment shader. Upload
v2:
- Fix return value (s/MESA_FORMAT_NONE/false/) (Anuj)
- Move _mesa_tex_format_from_format_and_type() just
in the end avoiding additional if-block (Anuj)
- Explain better the array alignment restriction (Anuj)
- Do not bail out in case of gl_pixelstore_attrib::ImageHeight,
https://bugs.freedesktop.org/show_bug.cgi?id=99856
--- Comment #20 from Mig ---
That was the old error, sorry. After applying the patch the error is:
. Device: AMD TONGA (DRM 3.8.0 / 4.9.11-1-ARCH, LLVM 3.9.1)
'+fp64-fp16-denormals' is not a recognized feature for this
On Mon 27 Feb 2017, Jason Ekstrand wrote:
> We're about to have more UUIDs for different things so this one really
> needs to be properly labeled.
> ---
> src/intel/vulkan/anv_device.c | 5 +++--
> src/intel/vulkan/anv_pipeline_cache.c | 4 ++--
> src/intel/vulkan/anv_private.h| 2
On Mon 27 Feb 2017, Jason Ekstrand wrote:
> ---
> src/intel/vulkan/anv_device.c | 31 +--
> 1 file changed, 17 insertions(+), 14 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
> index f9e2203..26be55f 100644
> ---
On Fri, Feb 17, 2017 at 09:32:03PM +0200, Topi Pohjolainen wrote:
> Currently:
>
> 1) Blorp color clears and resolves emit unconditional render target
>flush + command stream after every clear/resolve (including
>regular non-fast clears).
>
> 2) Blorp color clears, resolves and blits
For lossless compression mcs is always allocated when miptree
itself is created. The deferred logic in blorp is only meant for
CCS_D (single sample fast clear without compression).
In intel_miptree_supports_lossless_compressed() one makes a
heuristic choice not to use compression for float types.
https://bugs.freedesktop.org/show_bug.cgi?id=99856
--- Comment #19 from Mig ---
Hello,
I built the libclc package with the patch applied with the latest llvm/clang
(5.0.0svn) on arch, and getting the following error
1. Device: AMD TONGA (DRM 3.8.0 / 4.9.11-1-ARCH, LLVM
Both are
Reviewed-by: Matt Turner
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