Re: [Mesa-dev] [PATCH 2/2] i965: return the fourcc saved in __DRIimage

On 04/05/2018 02:51 AM, James Xiong wrote: From: "Xiong, James" The planar_format in __DRIimage contains the original fourcc used to create the image, if it's set, return the saved fourcc directly; Otherwise fall back to the old way. Also we should validate the input parameter "value" first a

Re: [Mesa-dev] [PATCH] radv: enable the Polaris small primitive filter control

Reviewed-by: Bas Nieuwenhuizen On Thu, Apr 5, 2018 at 10:27 AM, Samuel Pitoiset wrote: > Enable it directly in the preamble, but do not enable line > on Polaris10/11/12 because there is a hw bug. > > There is possibly an issue when MSAA is off, but this doesn't > regress any CTS and AMDVLK doesn

Re: [Mesa-dev] [PATCH] radv: only enable PERFECT_ZPASS_COUNTS for precision occlusion queries

Reviewed-by: Bas Nieuwenhuizen On Thu, Apr 5, 2018 at 10:27 AM, Samuel Pitoiset wrote: > This unnecessary when the precision bit flag is not set, and this > might hurt performance. The Vulkan explains that not setting > VK_QUERY_CONTROL_PRECISE_BIT might be more efficient on some > implementatio

[Mesa-dev] [Bug 105847] Profile GL3bc is not available on X11GraphicsDevice

https://bugs.freedesktop.org/show_bug.cgi?id=105847 --- Comment #2 from Aidan --- Thanks for drawing my attention to these discussions. However as much as I would like to be able to act on this without further assistance I have just spent several hours trying to find my way around the suggested .

Re: [Mesa-dev] [PATCH] radv: disable TC-compat HTILE on Tonga and Iceland

On Thu, Apr 5, 2018 at 10:32 AM, Samuel Pitoiset wrote: > Ported from RadeonSI. > > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_image.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c > index dd3189c67d..44caf

[Mesa-dev] [PATCH 4/4] radv: don't pass the pipeline to radv_flush_constants()

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 05610adee8..2e12c8f403 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/s

[Mesa-dev] [PATCH 3/4] radv: rename radv_cmd_buffer_update_vertex_descriptors()

... to radv_flush_vertex_buffers(). Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 3ae3e33c3b..05610adee8 100644 --- a/src/amd/v

[Mesa-dev] [PATCH 2/4] radv: do not try to skip draw calls when VBOs upload failed

This is unnecessary because we record an error which should be returned by vkEndCommandBuffer(), and the app shouldn't submit a command buffer when this happens. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 20 ++-- 1 file changed, 6 insertions(+), 14 del

[Mesa-dev] [PATCH 1/4] radv: fix prefetching compute shaders on CIK and older chips

Because the check was moved to radv_emit_prefetch_L2(). Fixes: 4ad7595f35 ("radv: rename radv_emit_prefetch() to radv_emit_prefetch_L2()") Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/src/

Re: [Mesa-dev] [RFC] Mesa 17.3.x release problems and process improvements

On 5 April 2018 at 03:33, Ilia Mirkin wrote: > On Wed, Apr 4, 2018 at 12:12 PM, Emil Velikov > wrote: >> On 22 March 2018 at 00:39, Ilia Mirkin wrote: >>> Just one bit of feedback, for the rest I either agree or have no opinion: >>> >>> On Wed, Mar 21, 2018 at 8:28 PM, Emil Velikov >>> wrote:

Re: [Mesa-dev] [PATCH] nir: Check if u_vector_init() succeeds

Sorry about that. It doesn't hurt to check. Reviewed-by: Thomas Helland 2018-04-05 9:35 GMT+02:00 Topi Pohjolainen : > However, it only fails when running out of memory. Now, if we > are about to check that, we should be consistent and check > the allocation of the worklist as well. > > On the o

[Mesa-dev] [PATCH] radv: disable TC-compat HTILE on Tonga and Iceland

Ported from RadeonSI. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c | 5 + 1 file changed, 5 insertions(+) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index dd3189c67d..44caf0eeae 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_

[Mesa-dev] [PATCH] radv: only enable PERFECT_ZPASS_COUNTS for precision occlusion queries

This unnecessary when the precision bit flag is not set, and this might hurt performance. The Vulkan explains that not setting VK_QUERY_CONTROL_PRECISE_BIT might be more efficient on some implementations. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 4 +++- src/amd/vulk

[Mesa-dev] [PATCH] radv: enable the Polaris small primitive filter control

Enable it directly in the preamble, but do not enable line on Polaris10/11/12 because there is a hw bug. There is possibly an issue when MSAA is off, but this doesn't regress any CTS and AMDVLK doesn't have a workaround as well. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/si_cmd_buffer.c

Re: [Mesa-dev] [PATCH 17/17] winsys/amdgpu: always set AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE

Patches 16-17 are: Reviewed-by: Samuel Pitoiset Those two are quite interesting. I will probably update my kernel and experiment something. On 04/04/2018 03:59 AM, Marek Olšák wrote: From: Marek Olšák There is a kernel patch that adds the new flag. --- src/gallium/winsys/amdgpu/drm/amdg

Re: [Mesa-dev] [PATCH 15/17] radeonsi: always prefetch later shaders after the draw packet

Reviewed-by: Samuel Pitoiset On 04/05/2018 02:33 AM, Marek Olšák wrote: From: Marek Olšák so that the draw is started as soon as possible. v2: only prefetch the API VS and VBO descriptors --- src/gallium/drivers/radeonsi/si_cp_dma.c | 89 +--- src/gallium/drive

Re: [Mesa-dev] [PATCH 14/17] radeonsi: emit shader pointers before cache flushes & waits

Patches 13-14 are: Reviewed-by: Samuel Pitoiset On 04/04/2018 03:59 AM, Marek Olšák wrote: From: Marek Olšák This code was written with the constant engine in mind. We can simplify it now. --- src/gallium/drivers/radeonsi/si_state_draw.c | 20 +++- 1 file changed, 7 insert

Re: [Mesa-dev] [PATCH 12/17] radeonsi/gfx9: don't use the workaround for gather4 + stencil

Patches 11-12 are: Acked-by: Samuel Pitoiset On 04/04/2018 03:59 AM, Marek Olšák wrote: From: Marek Olšák it doesn't seem to be needed. --- src/gallium/drivers/radeonsi/si_state.c | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeon

Re: [Mesa-dev] [PATCH 10/17] radeonsi: force 2D tiling on VI only when TC-compat HTILE is really enabled

Patches 4-10 are: Reviewed-by: Samuel Pitoiset On 04/04/2018 03:59 AM, Marek Olšák wrote: From: Marek Olšák just pass the flag that indicates it. --- src/gallium/drivers/radeon/r600_texture.c | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/src/gallium/dr

Re: [Mesa-dev] [PATCH] intel/dev: Assert the number of slices is not zero

Rb On 05/04/18 08:43, Topi Pohjolainen wrote: Fixes: c1900f5b intel: devinfo: add helper functions to fill... CID: 1433511 CC: Lionel Landwerlin Signed-off-by: Topi Pohjolainen --- src/intel/dev/gen_device_info.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/

[Mesa-dev] [Bug 105871] Discolored KDE panels after updating to Mesa 18.0 on Intel broadwell

https://bugs.freedesktop.org/show_bug.cgi?id=105871 --- Comment #14 from Tapani Pälli --- (In reply to sergio.callegari from comment #13) > As an alternate/complement solution to the patched xserver-xorg-core on the > Padoka ppa, for those using kde plasma, there is now also a patch to kwin to >

[Mesa-dev] [Bug 105871] Discolored KDE panels after updating to Mesa 18.0 on Intel broadwell

https://bugs.freedesktop.org/show_bug.cgi?id=105871 --- Comment #13 from sergio.calleg...@gmail.com --- As an alternate/complement solution to the patched xserver-xorg-core on the Padoka ppa, for those using kde plasma, there is now also a patch to kwin to fix the visuals selection. https://phabr

Re: [Mesa-dev] [RFC] Mesa 17.3.x release problems and process improvements

On Wed, 2018-04-04 at 11:27 -0700, Mark Janes wrote: > "Juan A. Suarez Romero" writes: > > > On Wed, 2018-04-04 at 10:07 -0700, Mark Janes wrote: > > > Emil Velikov writes: > > > > In detail: > > > > * make the patch queue, release date and blockers accessible at any > > > >point in time: >

[Mesa-dev] [PATCH] intel/dev: Assert the number of slices is not zero

Fixes: c1900f5b intel: devinfo: add helper functions to fill... CID: 1433511 CC: Lionel Landwerlin Signed-off-by: Topi Pohjolainen --- src/intel/dev/gen_device_info.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_in

[Mesa-dev] [PATCH 2/2] st/mesa: finalise tcs/tes/geom NIR before storing it to the cache

We don't create variants of the NIR so here we finalise it before caching to avoid unnecessary processing when restoring it. --- src/mesa/state_tracker/st_program.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/src/mesa/state_tracker/st_program.c b/src/mesa/state

[Mesa-dev] [PATCH 1/2] st/mesa: exit st_translate_fragment_program() earlier for NIR path

This avoids a bunch of scanning that is only used by the TGSI path. --- src/mesa/state_tracker/st_program.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mesa/state_tracker/st_program.c b/src/mesa/state_tracker/st_program.c index 5bf76e1b888..a740c874c9e 100

[Mesa-dev] [Bug 105871] Discolored KDE panels after updating to Mesa 18.0 on Intel broadwell

https://bugs.freedesktop.org/show_bug.cgi?id=105871 --- Comment #12 from sergio.calleg...@gmail.com --- Tapani Pälli's suggestion that the bug was the same as in the other case was 100% correct! Having been notified about this thread, Paulo Dias has very quickly put up on his padoka stable ppa an

[Mesa-dev] [PATCH] nir: Check if u_vector_init() succeeds

However, it only fails when running out of memory. Now, if we are about to check that, we should be consistent and check the allocation of the worklist as well. On the other hand there are other places where we don't check for allocation failures. Therefore I'm not sure if we bother here either. C

[Mesa-dev] [Bug 105901] Warn about mipmap-incomplete texture being used

https://bugs.freedesktop.org/show_bug.cgi?id=105901 --- Comment #1 from Ruslan Kabatsayev --- Created attachment 138612 --> https://bugs.freedesktop.org/attachment.cgi?id=138612&action=edit Test program -- You are receiving this mail because: You are the assignee for the bug. You are the QA C

[Mesa-dev] [Bug 105901] Warn about mipmap-incomplete texture being used

https://bugs.freedesktop.org/show_bug.cgi?id=105901 Bug ID: 105901 Summary: Warn about mipmap-incomplete texture being used Product: Mesa Version: 17.2 Hardware: Other OS: All Status: NEW Severity: enhance

Re: [Mesa-dev] [PATCH 02/17] ac/surface: don't set the display flag for obviously unsupported cases

On 2018-04-04 07:35 PM, Marek Olšák wrote: > On Wed, Apr 4, 2018 at 9:01 AM, Michel Dänzer wrote: >> On 2018-04-04 02:57 PM, Marek Olšák wrote: >>> On Wed, Apr 4, 2018, 6:18 AM Michel Dänzer >> > wrote: >>> >>> On 2018-04-04 03:59 AM, Marek Olšák wrote: >>> > Fro

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