Re: [Mesa-dev] 10-bit Mesa/Gallium support

On Thu, Nov 23, 2017 at 2:02 PM, Mario Kleiner <mario.kleiner...@gmail.com> wrote: > On 11/23/2017 07:44 PM, Ilia Mirkin wrote: >> >> On Thu, Nov 23, 2017 at 1:31 PM, Mario Kleiner >> <mario.kleiner...@gmail.com> wrote: >>> >>> On 11/23/2017 06:4

Re: [Mesa-dev] 10-bit Mesa/Gallium support

On Thu, Nov 23, 2017 at 1:31 PM, Mario Kleiner <mario.kleiner...@gmail.com> wrote: > On 11/23/2017 06:45 PM, Ilia Mirkin wrote: >> >> On Thu, Nov 23, 2017 at 12:35 PM, Marek Olšák <mar...@gmail.com> wrote: >>> >>> Hi everybody, >>> >&g

Re: [Mesa-dev] 10-bit Mesa/Gallium support

On Thu, Nov 23, 2017 at 12:55 PM, Michel Dänzer <mic...@daenzer.net> wrote: > On 2017-11-23 06:45 PM, Ilia Mirkin wrote: >> On Thu, Nov 23, 2017 at 12:35 PM, Marek Olšák <mar...@gmail.com> wrote: >>> Hi everybody, >>> >>> Mario, feel free

Re: [Mesa-dev] 10-bit Mesa/Gallium support

On Thu, Nov 23, 2017 at 12:35 PM, Marek Olšák wrote: > Hi everybody, > > Mario, feel free to push your patches if you haven't yet. (except the > workaround) > > For AMD, I applied Mario's patches (except Wayland - that didn't > apply) and added initial Gallium support: >

Re: [Mesa-dev] [PATCH] Adding tiled to linear conversion functionality

On Wed, Nov 22, 2017 at 6:00 AM, Satyajit Sahu wrote: > Add tiled to linear conversion and expose outside mesa. > Also exposing the create compute and destroy surface fucntions outside. typo: functions > > Change-Id: Ie464ba0eac5d80048797bef1f6ad730c22947601 What's this?

Re: [Mesa-dev] [RFC] gallium/u_blitter: support blitting PIPE_BUFFERs

Are you sure you're not looking for resource_copy_region? BUFFERs can be wide (128MB in many impls), 1D textures can't. There are probably other differences. On Wed, Nov 22, 2017 at 9:43 AM, Rob Clark wrote: > It is useful for staging/shadow transfers for drivers to be able

Re: [Mesa-dev] [PATCH 15/15] radeonsi: enable gs support for nir backend

On Wed, Nov 22, 2017 at 5:30 AM, Timothy Arceri wrote: > --- > src/gallium/drivers/radeonsi/si_pipe.c | 3 ++- > src/gallium/drivers/radeonsi/si_shader_nir.c | 10 -- > src/mesa/state_tracker/st_glsl_to_nir.cpp| 12 > 3 files changed, 22

Re: [Mesa-dev] [AppVeyor] mesa master #6216 failed

Build started git clone -q --depth=100 --branch=master git://anongit.freedesktop.org/mesa/mesa C:\projects\mesa warning: Could not find remote branch master to clone. fatal: Remote branch master not found in upstream origin Command exited with code 128 Not your commit's fault. On Mon, Nov 20,

Re: [Mesa-dev] [PATCH 14/14] st/glsl_to_nir: enable NIR link time opts

Should this work out of the box for freedreno and vc4 as well? Or will those need changes like radeonsi did? On Mon, Nov 20, 2017 at 10:37 PM, Timothy Arceri wrote: > --- > src/mesa/state_tracker/st_glsl_to_nir.cpp | 77 > +++ > 1 file

Re: [Mesa-dev] [Freedreno] [PATCH 1/2] nir: allow texture offsets with cube maps

On Mon, Nov 20, 2017 at 7:08 PM, Jason Ekstrand <ja...@jlekstrand.net> wrote: > On Mon, Nov 20, 2017 at 3:11 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: >> >> On Mon, Nov 20, 2017 at 5:16 PM, Jason Ekstrand <ja...@jlekstrand.net> >> wrote: >> > On

Re: [Mesa-dev] [Freedreno] [PATCH 1/2] nir: allow texture offsets with cube maps

On Mon, Nov 20, 2017 at 5:16 PM, Jason Ekstrand <ja...@jlekstrand.net> wrote: > On Sun, Nov 19, 2017 at 11:54 AM, Ilia Mirkin <imir...@alum.mit.edu> wrote: >> >> GL doesn't have this, but some hardware supports it. This is convenient >> for lowering tg4 to plain

[Mesa-dev] [PATCH] freedreno/a4xx: add stencil texturing support

Copied from a5xx, should be identical. Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> --- docs/features.txt| 6 ++--- src/gallium/drivers/freedreno/a4xx/fd4_emit.c| 2 ++ src/gallium/drivers/freedreno/a4xx/fd4_format.c | 11 +--- src/gallium/d

[Mesa-dev] [PATCH 1/2] nir: allow texture offsets with cube maps

GL doesn't have this, but some hardware supports it. This is convenient for lowering tg4 to plain texture calls, which is necessary on Adreno A4xx hardware. Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> --- src/compiler/nir/nir.h | 15 +-- 1 file changed, 13 insertions

[Mesa-dev] [PATCH 2/2] freedreno/ir3: add a pass to lower tg4 to txl, enable gather on a4xx

ff --git a/src/gallium/drivers/freedreno/ir3/ir3_nir_lower_tg4_to_tex.c b/src/gallium/drivers/freedreno/ir3/ir3_nir_lower_tg4_to_tex.c new file mode 100644 index 000..087688cd234 --- /dev/null +++ b/src/gallium/drivers/freedreno/ir3/ir3_nir_lower_tg4_to_tex.c @@ -0,0 +1,139

Re: [Mesa-dev] [PATCH 1/2] st/mesa: don't move ssbo after atomic buffers if we support hw atomics

Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> On Thu, Nov 16, 2017 at 9:05 PM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > There is no need to have these overlap if we support hw atomics. > > Signed-off-by: Dave Airlie

Re: [Mesa-dev] [PATCH 1/2] mesa: Implement ARB_texture_filter_minmax

On Thu, Nov 16, 2017 at 2:57 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > On Thu, Nov 16, 2017 at 2:49 PM, Ian Romanick <i...@freedesktop.org> wrote: >> On 11/14/2017 02:54 PM, Scott D Phillips wrote: >>> This extension provides a new

Re: [Mesa-dev] [PATCH 1/2] mesa: Implement ARB_texture_filter_minmax

On Thu, Nov 16, 2017 at 2:49 PM, Ian Romanick wrote: > On 11/14/2017 02:54 PM, Scott D Phillips wrote: >> This extension provides a new texture and sampler parameter >> (TEXTURE_REDUCTION_MODE_ARB) which allows applications to produce >> a filtered texel value by computing a

Re: [Mesa-dev] [PATCH] etnaviv: Fix point sprite issue on HALTI0

On Thu, Nov 16, 2017 at 1:20 PM, Wladimir J. van der Laan <laa...@gmail.com> wrote: > On Thu, Nov 16, 2017 at 12:26:05PM -0500, Ilia Mirkin wrote: >> On Thu, Nov 16, 2017 at 7:15 AM, Wladimir <laa...@gmail.com> wrote: > >> The point of the texcoord seman

Re: [Mesa-dev] [PATCH] etnaviv: Fix point sprite issue on HALTI0

On Thu, Nov 16, 2017 at 7:15 AM, Wladimir wrote: >> I think it would be reasonable to re-emit the shader state (or maybe >> just the varyings) when the primitive type changes from points to >> non-points. It virtually never happens that the same shader combo is >> used for

Re: [Mesa-dev] [PATCH v2] mesa/teximage: add TEXTURE_CUBE_MAP_ARRAY target for CompressedTexImage3D

On Wed, Nov 15, 2017 at 5:49 PM, Nanley Chery <nanleych...@gmail.com> wrote: > On Wed, Nov 15, 2017 at 12:08:58PM -0500, Ilia Mirkin wrote: >> On Wed, Nov 15, 2017 at 11:54 AM, Juan A. Suarez Romero >> <jasua...@igalia.com> wrote: >> > From section

Re: [Mesa-dev] [PATCH] amd: build addrlib with C++11

On Wed, Nov 15, 2017 at 12:47 PM, Dylan Baker wrote: > Nope. meson builds all C++ code as C++11 because so much of mesa's C++ code > cannot be built without it (Because of LLVM). As far as I can tell the GLSL > compiler and the Intel Compiler are the only C++ code in mesa not

Re: [Mesa-dev] [PATCH v2] mesa/teximage: add TEXTURE_CUBE_MAP_ARRAY target for CompressedTexImage3D

On Wed, Nov 15, 2017 at 11:54 AM, Juan A. Suarez Romero wrote: > From section 8.7, page 179 of OpenGL ES 3.2 spec: > > An INVALID_OPERATION error is generated by CompressedTexImage3D > if internalformat is one of the the formats in table 8.17 and target > is not

Re: [Mesa-dev] [PATCH v2 1/2] nv50/ir: optimize signed integer modulo by pow-of-2

On Sun, Nov 12, 2017 at 9:09 AM, Tobias Klausmann <tobias.johannes.klausm...@mni.thm.de> wrote: > > On 11/12/17 3:53 AM, Ilia Mirkin wrote: >> >> It's common to use signed int modulo in GLSL. As it happens, the GLSL >> specs allow the result to be undefined, but t

[Mesa-dev] [PATCH v2 1/2] nv50/ir: optimize signed integer modulo by pow-of-2

It's common to use signed int modulo in GLSL. As it happens, the GLSL specs allow the result to be undefined, but that seems fairly surprising. It's not that much more effort to get it right, at least for positive modulo operators. Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> --- v1

[Mesa-dev] [PATCH 1/2] nv50/ir: optimize signed integer modulo by pow-of-2

It's common to use signed int modulo in GLSL. As it happens, the GLSL specs allow the result to be undefined, but that seems fairly surprising. It's not that much more effort to get it right, at least for positive modulo operators. Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> --

[Mesa-dev] [PATCH 2/2] nv50/ir: add optimization for modulo by a non-power-of-2 value

We can still use the optimized division methods which make use of multiplication with overflow. Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> --- src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 15 +++ 1 file changed, 15 insertions(+) diff --git a/src/gallium/d

Re: [Mesa-dev] [PATCH 3/4] r600: use ieee version of rcp

On Thu, Nov 9, 2017 at 12:27 PM, Jan Vesely wrote: > On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote: >> From: Roland Scheidegger >> >> r600 used the clamped version for rcp, whereas both evergreen and cayman >> used the ieee version. I

Re: [Mesa-dev] [PATCH v3] glsl/linker: location aliasing requires types to have the same width

On Tue, Nov 7, 2017 at 4:50 AM, Iago Toral Quiroga wrote: > Regarding location aliasing requirements, the OpenGL spec says: > > "Further, when location aliasing, the aliases sharing the location >must have the same underlying numerical type (floating-point or >

Re: [Mesa-dev] [PATCH 2/9] gallium/tgsi: start adding hw atomics (v3.1)

Just some naming trivia, not a proper review: On Wed, Nov 8, 2017 at 8:54 PM, Dave Airlie wrote: > From: Dave Airlie > > This adds support for a hw atomic counters to TGSI. > > A new register file for storing atomic counters is added, > along with a new

Re: [Mesa-dev] [PATCH] amd/addrlib: update to latest version

On Wed, Nov 8, 2017 at 4:13 AM, Nicolai Hähnle wrote: > On 08.11.2017 09:53, Michel Dänzer wrote: >> >> On 07/11/17 10:58 PM, Marek Olšák wrote: >>> >>> On Tue, Nov 7, 2017 at 9:01 PM, Nicolai Hähnle >>> wrote: On 07.11.2017 18:35, Michel Dänzer

Re: [Mesa-dev] [PATCH 2/2] r600: use the clamped versions of rcp/rsq for eg/cayman.

Actually cayman gets half of it - it gets the abs, but not clamped. I wonder what happens if you go the other way -- use the IEEE version of the op for RSQ() (presumably you're not testing this on cayman). On Wed, Nov 8, 2017 at 1:18 AM, Ilia Mirkin <imir...@alum.mit.edu> wrote: >

Re: [Mesa-dev] [PATCH 2/2] r600: use the clamped versions of rcp/rsq for eg/cayman.

tgsi_rsq appears to ignore the passed-in op and always puts in ALU_OP1_RECIPSQRT_CLAMPED anyways. It also sticks an absolute value on the RSQ() argument. This only happens for eg, not cayman. (Probably why only the rcp_clamped change appeared to be necessary.) This is odd though, because there's

Re: [Mesa-dev] [PATCH] glsl: Make #pragma STDGL invariant(all) only modify outputs.

_out) > var->data.invariant = true; > break; >case MESA_SHADER_FRAGMENT: > - if (var->data.mode == ir_var_shader_in) > + if (var->data.mode == ir_var_shader_out) > var->data.invariant = true; > break;

Re: [Mesa-dev] [PATCH v2 2/2] glsl/linker: location aliasing requires types to have the same width

So are we saying that you can't have explicit components on a bindless sampler/image varying, which are defined as 64-bit integer types? On Mon, Nov 6, 2017 at 7:22 AM, Iago Toral Quiroga wrote: > Regarding location aliasing requirements, the OpenGL spec says: > > "Further,

Re: [Mesa-dev] [PATCH 2/2] r600g: use SIMPLE_FLOAT for blending to avoid NaNs in RTs

On Mon, Nov 6, 2017 at 8:48 AM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > On Mon, Nov 6, 2017 at 6:21 AM, Nicolai Hähnle <nhaeh...@gmail.com> wrote: >> On 06.11.2017 05:22, Ilia Mirkin wrote: >>> >>> Radeonsi also sets this flag. >>> >>&g

Re: [Mesa-dev] [PATCH 1/2] nv50: make blending work so that zero wins in a multiplication

On Mon, Nov 6, 2017 at 8:44 AM, Tobias Klausmann <tobias.johannes.klausm...@mni.thm.de> wrote: > > On 11/6/17 5:22 AM, Ilia Mirkin wrote: >> >> This matches nvc0 behavior, tested with the fbo-float-nan piglit. >> >> Signed-off-by: Ilia Mirkin <imir...@alum.m

Re: [Mesa-dev] [PATCH 2/2] r600g: use SIMPLE_FLOAT for blending to avoid NaNs in RTs

On Mon, Nov 6, 2017 at 6:21 AM, Nicolai Hähnle <nhaeh...@gmail.com> wrote: > On 06.11.2017 05:22, Ilia Mirkin wrote: >> >> Radeonsi also sets this flag. >> >> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103544 >> Signed-off-by: Ilia Mirkin <imi

[Mesa-dev] [PATCH 1/2] nv50: make blending work so that zero wins in a multiplication

This matches nvc0 behavior, tested with the fbo-float-nan piglit. Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> --- src/gallium/drivers/nouveau/nv50/nv50_screen.c | 5 + 1 file changed, 5 insertions(+) diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/d

[Mesa-dev] [PATCH 2/2] r600g: use SIMPLE_FLOAT for blending to avoid NaNs in RTs

Radeonsi also sets this flag. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103544 Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> --- This needs testing with the fbo-float-nan piglit that was recently added. Just guessing that this is the right flag to set here. src/gallium/d

Re: [Mesa-dev] [PATCH] nv50,nvc0: enable using LOAD from constbuf

On Sun, Nov 5, 2017 at 1:13 PM, Tobias Klausmann <tobias.johannes.klausm...@mni.thm.de> wrote: > > On 11/5/17 4:48 PM, Ilia Mirkin wrote: >> This enables std430-style packing for UBOs which aren't otherwise marked >> as std140. >> >> There might be small r

[Mesa-dev] [PATCH] nv50,nvc0: enable using LOAD from constbuf

This enables std430-style packing for UBOs which aren't otherwise marked as std140. There might be small register lifetime changes as a result of removed duplicate loads in some cases, but this seems worth it overall. Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> --- src/gallium/d

Re: [Mesa-dev] [PATCH 2/2] glsl/linker: location aliasing requires types to have the same width

On Fri, Nov 3, 2017 at 6:56 AM, Iago Toral Quiroga wrote: > Regarding location aliasing requirements, the OpenGL spec says: > > "Further, when location aliasing, the aliases sharing the location >must have the same underlying numerical type (floating-point or >

Re: [Mesa-dev] [PATCH 1/2] glsl/linker: use without_array() to retrieve type

Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> However I might recommend doing like const glsl_type *type_without_array = type->without_array(); if (type_without_array->is_interface()) { for (... ; i < type_without_array->length; i++) { field = _without_array-&

Re: [Mesa-dev] [PATCH 01/10] glsl: add support for tracking atomic counter index across stages.

On Thu, Nov 2, 2017 at 1:42 AM, Dave Airlie wrote: > From: Dave Airlie > > If we have hardware like evergreen with limited hw counters, we need > to assign each used counter in a series of linked shaders a unique > index so the driver can assign them to the

Re: [Mesa-dev] [PATCH 0/2] etnaviv: ASTC texture support

On Thu, Nov 2, 2017 at 7:55 AM, Wladimir J. van der Laan <laa...@gmail.com> wrote: > On Wed, Nov 01, 2017 at 01:27:30PM -0400, Ilia Mirkin wrote: >> On Wed, Nov 1, 2017 at 1:19 PM, Wladimir J. van der Laan >> <laa...@gmail.com> wrote: >> > Add ASTC textur

Re: [Mesa-dev] More gratitude for Meson

On Wed, Nov 1, 2017 at 7:03 PM, Dylan Baker <dy...@pnwbakers.com> wrote: > Quoting Ilia Mirkin (2017-11-01 15:52:56) >> On Wed, Nov 1, 2017 at 6:49 PM, Chad Versace <chadvers...@chromium.org> >> wrote: >> > On Wed 01 Nov 2017, Dylan Baker wrote: >> &g

Re: [Mesa-dev] More gratitude for Meson

On Wed, Nov 1, 2017 at 6:49 PM, Chad Versace wrote: > On Wed 01 Nov 2017, Dylan Baker wrote: >> Quoting Chad Versace (2017-11-01 14:43:28) >> > Wow. 10 seconds from a clean checkout to an installed Vulkan driver. > >> Glad that it's working out for you guys! >> >> Can I

Re: [Mesa-dev] [PATCH 2/2] etnaviv: ASTC texture support

On Wed, Nov 1, 2017 at 3:32 PM, Wladimir J. van der Laan wrote: > >> These formats are in a completely different space from the others, in the >> hardware (programmed through a different register), so IMO it makes sense to >> add a new format bit for it, just like for

Re: [Mesa-dev] [PATCH 0/2] etnaviv: ASTC texture support

On Wed, Nov 1, 2017 at 1:19 PM, Wladimir J. van der Laan wrote: > Add ASTC texture support for hardware that supports this > (currently only GC3000 on i.MX6qp is known to have this). > > Piglit output: > > $ bin/khr_compressed_astc-miptree_gles2 > PIGLIT: {"subtest":

Re: [Mesa-dev] [PATCH 2/2] mesa/st: implement max combined output resources limiting.

Series is Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> On Tue, Oct 31, 2017 at 7:58 PM, Dave Airlie <airl...@gmail.com> wrote: > From: Dave Airlie <airl...@redhat.com> > > if the driver sets the cap, then use the value it gives us. > > Signed-off-by

Re: [Mesa-dev] Mesa 17.2.4 release candidate

On Mon, Oct 30, 2017 at 12:43 PM, Andres Gomez <ago...@igalia.com> wrote: > On Mon, 2017-10-30 at 11:39 -0400, Ilia Mirkin wrote: >> On Mon, Oct 30, 2017 at 11:29 AM, Emil Velikov <emil.l.veli...@gmail.com> >> wrote: >> > On 28 October 2017 at 21:35, An

Re: [Mesa-dev] Mesa 17.2.4 release candidate

On Mon, Oct 30, 2017 at 11:29 AM, Emil Velikov <emil.l.veli...@gmail.com> wrote: > On 28 October 2017 at 21:35, Andres Gomez <ago...@igalia.com> wrote: >> On Fri, 2017-10-27 at 14:14 -0400, Ilia Mirkin wrote: >>> On Fri, Oct 27, 2017 at 1:43 PM, Andres G

Re: [Mesa-dev] Mesa 17.2.4 release candidate

On Fri, Oct 27, 2017 at 1:43 PM, Andres Gomez <ago...@igalia.com> wrote: > Rejected (6) > ==== > > Ilia Mirkin (1): > glsl: fix derived cs variables > > Reason: Commit is too big for stable at this point. The issue it fixes in regular compute shaders i

Re: [Mesa-dev] [PATCH] glsl: add varying resources for arrays of complex types

On Fri, Oct 27, 2017 at 11:07 AM, Juan A. Suarez Romero <jasua...@igalia.com> wrote: > On Fri, 2017-10-27 at 10:27 -0400, Ilia Mirkin wrote: >> On Fri, Oct 27, 2017 at 10:03 AM, Juan A. Suarez Romero >> <jasua...@igalia.com> wrote: >> > This patch i

Re: [Mesa-dev] [PATCH] glsl: add varying resources for arrays of complex types

On Fri, Oct 27, 2017 at 10:03 AM, Juan A. Suarez Romero <jasua...@igalia.com> wrote: > This patch is mostly a patch done by Ilia Mirkin. > > It fixes KHR-GL45.enhanced_layouts.varying_structure_locations. > > CC: Ilia Mirkin <imir...@alum.mit.edu> > Bugzilla

Re: [Mesa-dev] [PATCH] formatquery: use correct target check for IMAGE_FORMAT_COMPATIBILITY_TYPE

On Fri, Oct 27, 2017 at 5:18 AM, Alejandro Piñeiro wrote: > From the spec: >"IMAGE_FORMAT_COMPATIBILITY_TYPE: The matching criteria use for the > resource when used as an image textures is returned in > . This is equivalent to calling GetTexParameter" > > So we

Re: [Mesa-dev] [PATCH 1/3] gallium: add PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET

On Thu, Oct 26, 2017 at 1:23 PM, Eric Anholt wrote: > Marek Olšák writes: > >> From: Marek Olšák > > Could you hit vc5, as well? > > I'm not clear on why this is a pipe_cap instead of just updating type or > comments on the pipe structs to

Re: [Mesa-dev] [Mesa-stable] [PATCH v2] glsl: fix derived cs variables

udes not being larger than 100 lines, which this ones exceeds > by far: > https://www.mesa3d.org/submittingpatches.html#criteria > > Hence, by now I'm inclined to reject it. > > Let me know what you think. > > > On Sun, 2017-10-22 at 17:37 -0400, Ilia Mirkin wrote: >>

Re: [Mesa-dev] [PATCH 2/3] mesa: enable ARB_texture_buffer_* extensions in the Compatibility profile

On Sat, Oct 21, 2017 at 8:54 AM, Marek Olšák wrote: > From: Marek Olšák > > We already have piglit tests testing alpha, luminance, and intensity > formats. They were skipped by piglit until now. > > Additionally, I'm enabling one ARB_texture_buffer_range

Re: [Mesa-dev] Build mesa-dev on Windows with AVX instruction set problem

On Wed, Oct 25, 2017 at 6:15 PM, Fabrício Ceolin < fabricio.ceo...@miningmath.com> wrote: > Hi, > > Thanks. I recompiled everything (on Windows) using this real machine: > > #under msys2 > $ cat /proc/cpuinfo > processor : 0 > vendor_id : GenuineIntel > cpu family : 6 > model

Re: [Mesa-dev] [PATCH v2 9/8] glsl/linker: refactor check_location_aliasing

first and dvec3 is specified second, since it'll be up to the processing of the dvec3 to determine the conflict on the second slot.) Assuming that all checks out, Acked-by: Ilia Mirkin <imir...@alum.mit.edu> On Wed, Oct 25, 2017 at 5:15 AM, Iago Toral Quiroga <ito...@igalia.com> wro

Re: [Mesa-dev] [PATCH v2 10/8] glsl/linker: Fix type checks for location aliasing

object to this interpretation, but perhaps you can raise a question with Khronos regarding what exactly is incompatible. Either way, this patch is Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> > +*/ > + if (type->is_float() || type->is_double()) >

Re: [Mesa-dev] [PATCH v2 8/8] glsl/linker: validate explicit locations for SSO programs

For all the patches in the series that I didn't have comments on, Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> On Tue, Oct 24, 2017 at 5:28 AM, Iago Toral Quiroga <ito...@igalia.com> wrote: > v2: > - we only need to validate inputs to the first stage and outputs >

Re: [Mesa-dev] [PATCH v2 4/8] glsl/linker: outputs in the same location must share interpolation

On Tue, Oct 24, 2017 at 5:28 AM, Iago Toral Quiroga wrote: > From ARB_enhanced_layouts: > > "[...]when location aliasing, the aliases sharing the location > must have the same underlying numerical type (floating-point or > integer) and the same auxiliary storage and >

Re: [Mesa-dev] [PATCH v2 2/8] glsl/linker: refactor link-time validation of output locations

On Tue, Oct 24, 2017 at 5:28 AM, Iago Toral Quiroga wrote: > Move the checks for explicit locations to a separate function. We > will use this in a follow-up patch to validate locations for interface > variables where we need to validate each interface member rather than > the

Re: [Mesa-dev] [PATCH] mesa: fix GL_{COLOR, DEPTH, STENCIL}_COMPONENTS queries for TBOs

d for TBO's, right? Although _mesa_is_color_format returns true for unsupported formats as well... although that's probably a separate bug. Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> > + >if (_mesa_is_color_format(internalformat)) >

[Mesa-dev] [PATCH v2] glsl: fix derived cs variables

. Reported-by: Stephane Chevigny <stephane.chevi...@polymtl.ca> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103393 Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> --- Well this all turned out to be a deeper rabbit-hole than I was anticipatin

Re: [Mesa-dev] [PATCH] glsl: fix derived cs variables for variable group sizes

On Sat, Oct 21, 2017 at 3:18 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > Both gl_GlobalInvocationID and gl_LocalInvocationIndex depend on the > gl_WorkGroupSize. However with variable group sizes, this value is not > available. Use the gl_LocalGroupSizeARB instead,

[Mesa-dev] [PATCH] glsl: fix derived cs variables for variable group sizes

is not defined. Reported-by: Stephane Chevigny <stephane.chevi...@polymtl.ca> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103393 Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> --- src/compiler/glsl/builtin_variables.cpp | 12 +++- 1 fil

Re: [Mesa-dev] [PATCH v2 05/32] glsl: Zero per_vertex_accumulator::fields for valgrind & nir_serialize

On Fri, Oct 20, 2017 at 9:52 PM, Jordan Justen wrote: > On 2017-10-20 14:14:25, Jason Ekstrand wrote: >> On Thu, Oct 19, 2017 at 4:51 PM, Kenneth Graunke >> wrote: >> >> > On Wednesday, October 18, 2017 10:31:53 PM PDT Jordan Justen wrote: >> > >

Re: [Mesa-dev] [PATCH 3/3] glsl/linker: validate explicit locations for SSO programs

On Fri, Oct 20, 2017 at 12:26 PM, Timothy Arceri <tarc...@itsqueeze.com> wrote: > > > On 21/10/17 03:00, Ilia Mirkin wrote: >> >> On Fri, Oct 20, 2017 at 11:55 AM, Timothy Arceri <tarc...@itsqueeze.com> >> wrote: >>> >>> >>> >&

Re: [Mesa-dev] [PATCH 3/3] glsl/linker: validate explicit locations for SSO programs

On Fri, Oct 20, 2017 at 11:55 AM, Timothy Arceri <tarc...@itsqueeze.com> wrote: > > > On 21/10/17 00:35, Ilia Mirkin wrote: >> >> On Fri, Oct 20, 2017 at 6:46 AM, Iago Toral Quiroga <ito...@igalia.com> >> wrote: >>> >&g

Re: [Mesa-dev] [PATCH 3/3] glsl/linker: validate explicit locations for SSO programs

On Fri, Oct 20, 2017 at 6:46 AM, Iago Toral Quiroga wrote: > --- > src/compiler/glsl/link_varyings.cpp | 53 > + > src/compiler/glsl/link_varyings.h | 4 +++ > src/compiler/glsl/linker.cpp| 6 + > 3 files changed, 63

Re: [Mesa-dev] [PATCH 2/4] glsl/linker: fix location aliasing checks for interface variables

On Thu, Oct 19, 2017 at 10:18 PM, Timothy Arceri wrote: > > > On 20/10/17 03:31, Iago Toral Quiroga wrote: >> >> The existing code was checking the whole interface variable rather >> than its members, which is not what we want: we want to check >> aliasing for each member

Re: [Mesa-dev] [PATCH 2/4] glsl/linker: fix location aliasing checks for interface variables

On Thu, Oct 19, 2017 at 5:35 PM, Timothy Arceri <tarc...@itsqueeze.com> wrote: > > > On 20/10/17 08:27, Timothy Arceri wrote: >> >> >> >> On 20/10/17 08:19, Timothy Arceri wrote: >>> >>> On 20/10/17 04:21, Ilia Mirkin wrote: >

Re: [Mesa-dev] [PATCH 2/4] glsl/linker: fix location aliasing checks for interface variables

On Thu, Oct 19, 2017 at 5:19 PM, Timothy Arceri <tarc...@itsqueeze.com> wrote: > On 20/10/17 04:21, Ilia Mirkin wrote: >> >> On Thu, Oct 19, 2017 at 12:45 PM, Ilia Mirkin <imir...@alum.mit.edu> >> wrote: >>> >>> On Thu, Oct 19, 201

Re: [Mesa-dev] [PATCH 2/4] glsl/linker: fix location aliasing checks for interface variables

On Thu, Oct 19, 2017 at 12:45 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > On Thu, Oct 19, 2017 at 12:40 PM, Iago Toral <ito...@igalia.com> wrote: >> On Thu, 2017-10-19 at 12:37 -0400, Ilia Mirkin wrote: >>> Will this work with SSO shaders? Presumably the vali

Re: [Mesa-dev] [PATCH 2/4] glsl/linker: fix location aliasing checks for interface variables

On Thu, Oct 19, 2017 at 12:40 PM, Iago Toral <ito...@igalia.com> wrote: > On Thu, 2017-10-19 at 12:37 -0400, Ilia Mirkin wrote: >> Will this work with SSO shaders? Presumably the validation still has >> to happen, but I don't think cross_validate_outputs_to_inputs() will >

Re: [Mesa-dev] [PATCH 2/4] glsl/linker: fix location aliasing checks for interface variables

Will this work with SSO shaders? Presumably the validation still has to happen, but I don't think cross_validate_outputs_to_inputs() will end up getting called. On Thu, Oct 19, 2017 at 12:31 PM, Iago Toral Quiroga wrote: > The existing code was checking the whole interface

Re: [Mesa-dev] [PATCH 4/4] meson: build nouveau veaux driver

On Tue, Oct 17, 2017 at 2:51 PM, Dylan Baker wrote: > Gah. French is one of the few romance languages I've never learned even a > little > of. > > Fixed locally, would you like me to send a v2? I have faith in your sed -i skills. Hopefully you'll push it somewhere though so

Re: [Mesa-dev] meson for remaining class drivers

On Mon, Oct 16, 2017 at 9:05 PM, Timothy Arceri wrote: > On 17/10/17 11:55, Dylan Baker wrote: >> >> Here is build support for the three remaining classic drivers, radeon >> (r100), >> r200, and the nouveau-veaux driver. None of these are too crazy, but I >> don't >> have

Re: [Mesa-dev] [PATCH 4/4] meson: build nouveau veaux driver

Old, not calves... On Oct 16, 2017 8:56 PM, "Dylan Baker" wrote: Build tested only. Signed-off-by: Dylan Baker --- meson.build | 4 +- meson_options.txt| 2 +-

[Mesa-dev] [PATCH v2] nv50, nvc0: fix push hint logic in presence of a start offset

Previously buffer offsets were passed in explicitly as an offset, which had to be added to the resource address. Now they are passed in via an increased 'start' parameter. As a result, we were double-adding the start offset in this kind of situation. This condition was triggered by piglit's

[Mesa-dev] [PATCH] nvc0: fix push hint logic in presence of a start offset

Previously buffer offsets were passed in explicitly as an offset, which had to be added to the resource address. Now they are passed in via an increased 'start' parameter. As a result, we were double-adding the start offset in this kind of situation. This condition was triggered by piglit's

Re: [Mesa-dev] [PATCH] i965/fs: Extend the live ranges of VGRFs which leave loops

I hope I'm not butting in too much with irrelevant info, but I think we had a similar issue in nouveau. On Kepler, texture instructions take an arbitrary amount of time to complete, and only write into destination registers on completion, while other instructions are executing after that tex

Re: [Mesa-dev] [PATCH 2/3] mesa: move _mesa_half_is_negative() to half_float.h

On Mon, Oct 9, 2017 at 5:07 PM, Roland Scheidegger wrote: > Am 09.10.2017 um 22:56 schrieb Brian Paul: >> --- >> src/mesa/main/imports.h | 6 -- >> src/util/half_float.h | 8 >> 2 files changed, 8 insertions(+), 6 deletions(-) >> >> diff --git

Re: [Mesa-dev] [PATCH] mesa: Use immutable level count in FramebufferTexture error check.

Hi Ken, Have a look at https://patchwork.freedesktop.org/patch/134865/ https://patchwork.freedesktop.org/patch/135410/ No idea what the outcome of that was. I guess some code reorg has happened since too. If, after reading through those, you think this is right - go ahead :) I've lost all

Re: [Mesa-dev] [PATCH] gallium: remove TGSI_OPCODE_KILL

On Thu, Oct 5, 2017 at 1:45 PM, Marek Olšák <mar...@gmail.com> wrote: > On Thu, Oct 5, 2017 at 4:45 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: >> Like Roland, I don't see what's being gained. It's more code >> everywhere and harder to read the TGSI directly. > >

Re: [Mesa-dev] [PATCH] gallium: remove TGSI_OPCODE_KILL

Like Roland, I don't see what's being gained. It's more code everywhere and harder to read the TGSI directly. Neither nv30 nor nv50+ do the checks you suggest. On Thu, Oct 5, 2017 at 9:00 AM, Marek Olšák wrote: > I understand, but you can get KILL by checking if src0 is an

Re: [Mesa-dev] [PATCH] radv: emit fmuladd instead of fma to llvm.

robably not a great idea to > then give them an unfused mul+add -- it's legal, thanks to GLSL's > weasel-wording, but probably not what you really want, on HW which > actually does have an FMA instruction :) > > Connor > > > On Wed, Oct 4, 2017 at 11:25 AM, Ilia Mirkin <im

Re: [Mesa-dev] [PATCH] radv: emit fmuladd instead of fma to llvm.

Wouldn't this guarantee that nothing is fused (and thus fine)? Presumably fmuladd always does mul+add either as 1 or 2 instructions? On Wed, Oct 4, 2017 at 10:57 AM, Connor Abbott wrote: > If the fma has the exact flag, then we need to use the llvm.fma > intrinsic. These

Re: [Mesa-dev] [PATCH] gallium: do not automatically enable clip planes when a vertex shader writes to gl_ClipDistance

On Tue, Oct 3, 2017 at 4:25 AM, Nicolai Hähnle wrote: > On 03.10.2017 09:54, Olivier Lauffenburger wrote: >>> >>> On 29/09/17 12:17, Nicolai Hähnle wrote: On 28.09.2017 20:02, Roland Scheidegger wrote: > > Am 28.09.2017 um 18:19 schrieb Jose Fonseca: >>

Re: [Mesa-dev] [PATCH 3/3] nv50, nvc0/ir: Display shared memory usage in pipe_debug_message

Looks like this will upset my parser which is the only consumer of this info: https://cgit.freedesktop.org/mesa/shader-db/tree/nv-report.py Should be doable to rewrite it to not care about order. Or stick your new thing at the end. Either way. On Mon, Oct 2, 2017 at 2:57 PM, Pierre Moreau

Re: [Mesa-dev] [PATCH v2] i965: skip reading clip distances from the URB for the FS if possible

On Thu, Sep 28, 2017 at 6:33 AM, Iago Toral Quiroga wrote: > we can skip these slots when they are not read in the fragment shader > and they are positioned right after a VUE header that we are already > skipping. We also need to ensure that we are passing at least one other >

Re: [Mesa-dev] [PATCH mesa 6/6] scons: use python3-compatible string-check

On Tue, Sep 26, 2017 at 7:07 AM, Jose Fonseca wrote: > On 25/09/17 14:30, Eric Engestrom wrote: >> >> I pushed the rest of the series. >> See below for discussion on this patch. >> >> >> On Wednesday, 2017-09-20 17:05:21 +, Jose Fonseca wrote: >>> >>> On 19/09/17 15:14,

Re: [Mesa-dev] [Mesa-stable] [PATCH] nv50/ir: skip optimizing ADD+SHL to SHLADD when src(1) is 0

On Tue, Sep 26, 2017 at 6:30 AM, Samuel Pitoiset <samuel.pitoi...@gmail.com> wrote: > > > On 09/26/2017 12:29 PM, Juan A. Suarez Romero wrote: >> >> On Mon, 2017-05-01 at 12:11 -0400, Ilia Mirkin wrote: >>> >>> On Mon, May 1, 2017 at 12:09 PM, Samuel P

Re: [Mesa-dev] [PATCH] i965: skip reading clip distances from the URB for the FS if possible

Perhaps a debug message would be warranted in such a situation? I suspect it would be difficult to debug, esp if it came up in a regular application. On Sep 26, 2017 3:50 AM, "Iago Toral Quiroga" wrote: we can skip these slots when they are not read in the fragment shader and

Re: [Mesa-dev] [PATCH] freedreno: actually mark SSBOs as being written

We do, based on the program... an ssbo may be marked as readonly. Not sure if it's worth-while retrieving that info though. On Mon, Sep 25, 2017 at 11:12 AM, Tomeu Vizoso wrote: > As the comments say, we don't have a way of knowing for sure that they > will be only

Re: [Mesa-dev] [PATCH mesa 4/6] scons: use python3-compatible maps

On Tue, Sep 19, 2017 at 10:14 AM, Eric Engestrom wrote: > Signed-off-by: Eric Engestrom > --- > src/gallium/drivers/swr/SConscript | 6 ++ > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH mesa 6/6] scons: use python3-compatible string-check

This might be python3-compatible, but it's not the same thing. str != unicode. Not sure where "names" can come from, but if it can come in as a unicode string, this won't work. On Tue, Sep 19, 2017 at 10:14 AM, Eric Engestrom wrote: > Signed-off-by: Eric Engestrom

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