On Mon, Nov 13, 2017 at 3:32 PM, Matt Turner wrote:
> On Wed, Oct 25, 2017 at 4:25 PM, Jason Ekstrand
> wrote:
> > Some hardware (CHV, BXT) have special restrictions on register regions
> > when doing integer multiplication. We want to respect those when we
> > lower to DxW multiplication.
>
>
On Wed, Oct 25, 2017 at 4:25 PM, Jason Ekstrand wrote:
> Some hardware (CHV, BXT) have special restrictions on register regions
> when doing integer multiplication. We want to respect those when we
> lower to DxW multiplication.
This is not a good commit message. I am very familiar with the CHV,
Some hardware (CHV, BXT) have special restrictions on register regions
when doing integer multiplication. We want to respect those when we
lower to DxW multiplication.
Cc: mesa-sta...@lists.freedesktop.org
---
src/intel/compiler/brw_fs.cpp | 16 +---
1 file changed, 9 insertions(+),
