On 09/20/2013 05:23 PM, Christoph Brill wrote:
2013/9/20 Tapani Pälli tapani.pa...@intel.com
mailto:tapani.pa...@intel.com
Hello;
On my SNB desktop machine shader-db takes ~2.4secs without cache,
with cache
it takes ~1.8secs (~2.7 when cache gets generated) (values are avg
On Mon, Sep 23, 2013 at 12:09 PM, Chia-I Wu olva...@gmail.com wrote:
On Fri, Sep 20, 2013 at 10:50 PM, Paul Berry stereotype...@gmail.com wrote:
On 17 September 2013 19:54, Chia-I Wu olva...@gmail.com wrote:
Hi Paul,
On Mon, Sep 16, 2013 at 3:46 PM, Chia-I Wu olva...@gmail.com wrote:
On
https://bugs.freedesktop.org/show_bug.cgi?id=69682
--- Comment #6 from Denis M. (Phr33d0m) g...@politeia.in ---
Created attachment 86334
-- https://bugs.freedesktop.org/attachment.cgi?id=86334action=edit
xorg.conf
(In reply to comment #4)
Sorry for reopening. Anyway, Denis, please attach your
Am 22.09.2013 22:29, schrieb Emil Velikov:
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
While it's not absolutely necessary for the VDPAU state tracker it makes
sense consequently use Makefile.source all around the place.
Reviewed-by: Christian König christian.koe...@amd.com
---
Am 22.09.2013 22:29, schrieb Emil Velikov:
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Christian König christian.koe...@amd.com
---
src/gallium/state_trackers/xvmc/Makefile.am | 8 ++--
src/gallium/state_trackers/xvmc/Makefile.sources | 6 ++
2 files
On Sun, Sep 22, 2013 at 10:37:19AM -0700, Ben Widawsky wrote:
After the last patch, we can replace the region allocated in the miptree
creation with a more straightforward (and hopefully smaller resulting)
buffer based on the bspec's allocation formula.
Since I am relatively new to this part
What I need to do for that.
Is that I need to port LLVM to vxWorks?
--
此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo
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https://bugs.freedesktop.org/show_bug.cgi?id=69682
--- Comment #7 from Marek Olšák mar...@gmail.com ---
Sorry, I don't have any other tricks. I only knew that Load glx must not be
present in xorg.conf for Glamor to work.
--
You are receiving this mail because:
You are the assignee for the bug.
From: Christian König christian.koe...@amd.com
Signed-off-by: Christian König christian.koe...@amd.com
---
src/gallium/state_trackers/vdpau/decode.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/gallium/state_trackers/vdpau/decode.c
From: Christian König christian.koe...@amd.com
Signed-off-by: Christian König christian.koe...@amd.com
---
src/gallium/auxiliary/vl/vl_mpeg12_bitstream.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/vl/vl_mpeg12_bitstream.c
From: Christian König christian.koe...@amd.com
Commonly used to find start codes and has far less overhead
to searching manually.
Signed-off-by: Christian König christian.koe...@amd.com
---
src/gallium/auxiliary/vl/vl_vlc.h | 84 ++-
1 file changed, 74
From: Christian König christian.koe...@amd.com
Signed-off-by: Christian König christian.koe...@amd.com
---
src/gallium/state_trackers/vdpau/decode.c| 20 +++-
src/gallium/state_trackers/vdpau/vdpau_private.h | 1 +
2 files changed, 12 insertions(+), 9 deletions(-)
diff
From: Christian König christian.koe...@amd.com
This is only supported on NI+, but the kernel takes care of those limitations.
Signed-off-by: Christian König christian.koe...@amd.com
---
src/gallium/drivers/radeon/radeon_uvd.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
From: Christian König christian.koe...@amd.com
Similar to GFX and DMA.
Signed-off-by: Christian König christian.koe...@amd.com
---
src/gallium/drivers/radeon/radeon_uvd.c | 6 --
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 6 ++
2 files changed, 6 insertions(+), 6 deletions(-)
From: Christian König christian.koe...@amd.com
Only create one screen for each winsys instance.
This helps with buffer sharing and interop handling.
Signed-off-by: Christian König christian.koe...@amd.com
---
src/gallium/drivers/r300/r300_screen.c| 3 +++
On Sun, Sep 22, 2013 at 9:48 AM, 罗勇刚(Yonggang Luo)
luoyongg...@gmail.com wrote:
What I need to do for that.
You'd need to port the radeon drm kernel module to vxWorks to start with.
Is that I need to port LLVM to vxWorks?
You only need llvm for compute (OpenCL) for r600g at the moment.
Alex
Hi All,
I'd like to draw your attention the existence of an new (1) XML
scheme database for GL, GLES, WGL, GLX and EGL.
There are a number tools (like the dispatch table in piglit for
instance, header file generation etc) which would quite likely benefit
from this new source of data from
Reviewed-by: Marek Olšák marek.ol...@amd.com
Marek
On Mon, Sep 23, 2013 at 3:58 PM, Christian König
deathsim...@vodafone.de wrote:
From: Christian König christian.koe...@amd.com
Similar to GFX and DMA.
Signed-off-by: Christian König christian.koe...@amd.com
---
This is kind of hard to read. I think it would be nicer to:
1) Move the pipe_reference variable from the winsys to the screen.
2) Have the screen create the winsys, instead of just receiving a
pointer to it, so that the winsys doesn't have to be
reference-counted, because the screen is.
Marek
On
Patches 1, 2, 3v2, 4v2, 5, 6, and 7 are
Reviewed-by: Ian Romanick ian.d.roman...@.intel.com
On 09/20/2013 06:52 PM, Eric Anholt wrote:
Since I'm going to be talking about the megadrivers idea next week at
XDC, I thought I'd look at what the impact would be of an alternate
option, and to do
From: Marek Olšák marek.ol...@amd.com
This fixes piglit:
- shaders/glsl-fs-texture2d-masked
- shaders/glsl-fs-texture2d-masked-4
Signed-off-by: Marek Olšák marek.ol...@amd.com
---
lib/Target/R600/SIISelLowering.cpp | 27 +--
1 file changed, 21 insertions(+), 6
The preprocessor currently eats multiple #else directives
int the same #if(def) ... #endif block. While I haven't been able
to find anything that explicitly disallows it, it's nonsensical
and should probably not be allowed.
Add checks to reject the code.
---
I'm not entirely sure why
After the last patch, we can replace the region allocated in the miptree
creation with a more straightforward (and hopefully smaller resulting)
buffer based on the bspec's allocation formula.
Since I am relatively new to this part of the bspec, I would very much
appreciate scrutiny during review
I think this breaks drivers which use ir_to_mesa, because mix can be
used in this way in GLSL 1.20 too.
Marek
On Sat, Sep 7, 2013 at 2:57 AM, Matt Turner matts...@gmail.com wrote:
It's a ?: that operates per-component on vectors. Will be used in
upcoming lowering pass for ldexp and the
On Mon, Sep 23, 2013 at 10:35 PM, Erik Faye-Lund kusmab...@gmail.com wrote:
The preprocessor currently eats multiple #else directives
int the same #if(def) ... #endif block. While I haven't been able
to find anything that explicitly disallows it, it's nonsensical
and should probably not be
On Mon, Sep 23, 2013 at 2:02 PM, Marek Olšák mar...@gmail.com wrote:
I think this breaks drivers which use ir_to_mesa, because mix can be
used in this way in GLSL 1.20 too.
Marek
Indeed, it's reported as https://bugs.freedesktop.org/show_bug.cgi?id=69202
I was hoping someone would implement
Or maybe not. Nevermind.
Marek
On Mon, Sep 23, 2013 at 11:02 PM, Marek Olšák mar...@gmail.com wrote:
I think this breaks drivers which use ir_to_mesa, because mix can be
used in this way in GLSL 1.20 too.
Marek
On Sat, Sep 7, 2013 at 2:57 AM, Matt Turner matts...@gmail.com wrote:
It's a
When subdiving a triangle we're using a temporary array to store
the new coordinates for the subdivided triangles. Unfortunately
the array used for that was not aligned properly causing
random crashes in the llvm jit code which was trying to load
vectors from it.
Signed-off-by: Zack Rusin
resolve_ud_negate works around issues with the CMP instruction; it isn't
necessary for other instructions.
Since Eric originally wrote this code, we've added the CMP() instruction
emitter, which now internally does resolve_ud_negate() on both operands.
So we can drop the explicit calls to
emit_bool_to_cond_code() takes separate paths for ir_expressions and.
If the argument to emit_bool_to_cond_code() is an ir_expression, we
loop over the operands, calling accept() on each of them, which
generates assembly code to compute that subexpression. We then emit
one or two final
No, I've got a patch for Gallium, I will send it in a moment.
Marek
On Mon, Sep 23, 2013 at 11:25 PM, Matt Turner matts...@gmail.com wrote:
On Mon, Sep 23, 2013 at 2:02 PM, Marek Olšák mar...@gmail.com wrote:
I think this breaks drivers which use ir_to_mesa, because mix can be
used in this
Am 23.09.2013 23:31, schrieb Zack Rusin:
When subdiving a triangle we're using a temporary array to store
the new coordinates for the subdivided triangles. Unfortunately
the array used for that was not aligned properly causing
random crashes in the llvm jit code which was trying to load
On Mon, Sep 23, 2013 at 2:12 PM, Kenneth Graunke kenn...@whitecape.org wrote:
emit_bool_to_cond_code() takes separate paths for ir_expressions and.
Sentence ends unexpectedly?
If the argument to emit_bool_to_cond_code() is an ir_expression, we
loop over the operands, calling accept() on each
On 09/23/2013 02:52 PM, Matt Turner wrote:
On Mon, Sep 23, 2013 at 2:12 PM, Kenneth Graunke kenn...@whitecape.org
wrote:
emit_bool_to_cond_code() takes separate paths for ir_expressions and.
Sentence ends unexpectedly?
Oops. I meant to delete that.
If the argument to
i965 implements this with a single (multiple destination) instruction,
ADDC. Emitting ADDC directly from uaddCarry() would be ideal, but our
optimization passes don't know how to copy with expressions with
side-effects.
Radeon has an ADDC_UINT instruction that only generates the carry
bit. I've
i965 implements this with a single (multiple destination) instruction,
SUBB. Emitting SUBB directly from usubBorrow() would be ideal, but our
optimization passes don't know how to copy with expressions with
side-effects.
Radeon has an SUBB_UINT instruction that only generates the borrow
bit. I've
---
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4.h | 5 +
2 files changed, 6 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index b77d4de..60aabf6 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++
Using the ADDC and SUBB instructions on Gen7.
---
src/mesa/drivers/dri/i965/brw_defines.h | 2 ++
src/mesa/drivers/dri/i965/brw_disasm.c | 2 ++
src/mesa/drivers/dri/i965/brw_eu.h | 2 ++
src/mesa/drivers/dri/i965/brw_eu_emit.c | 2 ++
---
I've noticed that the vec4 backend doesn't use the ARF register file. Is this
because we decided that it's not necessary and we can just use HW_REG?
So, this patch will probably need a fixup.
src/mesa/drivers/dri/i965/brw_fs.cpp | 16 +++-
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 3 +++
src/mesa/drivers/dri/i965/brw_shader.cpp | 19 +++
src/mesa/drivers/dri/i965/brw_shader.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4.cpp | 3 +++
4 files changed, 26 insertions(+)
diff --git
---
src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 11 +++
src/mesa/drivers/dri/i965/brw_vec4_emit.cpp | 11 +++
2 files changed, 22 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
index 9b897c5..d76934f 100644
---
---
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 101 +++
2 files changed, 102 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index a56f561..d776b5a 100644
---
---
src/mesa/drivers/dri/i965/brw_vec4.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 102 +
2 files changed, 103 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index b0d15fe..919f0b1 100644
From: Marek Olšák marek.ol...@amd.com
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 271cf05..0d1506d 100644
---
From: Marek Olšák marek.ol...@amd.com
Fixes spec/EXT_texture_integer/fbo-blending.
---
src/gallium/drivers/radeonsi/si_state.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index
This code incorrectly worked by falling through to /proc/dri method.
Now that /proc/dri is removed, drmOpenByName() fails even when udev
identification succeeds.
Signed-off-by: Jay Cornwall j...@jcornwall.me
---
xf86drm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Am 24.09.2013 02:37, schrieb mar...@gmail.com:
From: Marek Olšák marek.ol...@amd.com
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
On 09/21/2013 08:43 PM, Ian Romanick wrote:
On 09/21/2013 03:16 PM, Kenneth Graunke wrote:
On 09/20/2013 06:52 PM, Eric Anholt wrote:
This gives the compiler the chance to inline and not export class symbols
even in the absence of LTO. Saves about 60kb on disk.
This is probably worth doing.
On 09/23/2013 04:13 PM, Matt Turner wrote:
---
I've noticed that the vec4 backend doesn't use the ARF register file. Is this
because we decided that it's not necessary and we can just use HW_REG?
So, this patch will probably need a fixup.
I believe so. I think we should convert the scalar
On 09/23/2013 04:13 PM, Matt Turner wrote:
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 3 +++
src/mesa/drivers/dri/i965/brw_shader.cpp | 19 +++
src/mesa/drivers/dri/i965/brw_shader.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4.cpp | 3 +++
4 files changed, 26
On 09/23/2013 04:12 PM, Matt Turner wrote:
Calculates the carry out of the addition of two values and the
borrow from subtraction respectively. Will be used in uaddCarry() and
usubBorrow() built-in implementations.
Patches 1-5 and 8 are:
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
This is better than overriding the extension enable based on the
language version; it's robust against shaders that do:
#version 140
#extension GL_ARB_uniform_buffer_object : disable
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Cc: Paul Berry stereotype...@gmail.com
Cc: Ian
Explicit attribute locations are supported with GLSL 3.30, GLSL ES 3.00,
or #extension GL_ARB_explicit_attrib_location: enable. Using a helper
function makes it easy to check for this.
This enables support in GLSL 3.30, which was previously missing.
Previously, we overrode the extension enable
This provides an interface for applications (and OpenGL-based tools) to
access GPU performance counters. Since the exact performance counters
available vary between vendors and hardware generations, the extension
provides an API the application can use to get the names, types, and
minimum/maximum
Ironlake's counters are always enabled; userspace can simply send a
MI_REPORT_PERF_COUNT packet to take a snapshot of them. This makes it
easy to implement.
The counters are documented in the source code for the intel-gpu-tools
intel_perf_counters utility.
v2: Adjust for core data structure
Every caller passed true.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/main/teximage.c| 6 +++---
src/mesa/main/texobj.c | 9 +++--
src/mesa/main/texobj.h | 3 +--
src/mesa/main/texparam.c| 2 +-
Silences Unused pointer value defect reported by Coverity.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/mesa/program/ir_to_mesa.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index
Fixes Uninitialized scalar field defect reported by Coverity.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/glsl/lower_vector.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/glsl/lower_vector.cpp b/src/glsl/lower_vector.cpp
index 9172b6a..a658410 100644
---
Fixes Uninitialized pointer field defect reported by Coverity.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/glsl/lower_variable_index_to_cond_assign.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/glsl/lower_variable_index_to_cond_assign.cpp
Fixes Unintialized scalar field defect reported by Coverity.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/glsl/lower_jumps.cpp | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/glsl/lower_jumps.cpp b/src/glsl/lower_jumps.cpp
index 97b1abb..02f65f0 100644
---
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