Hi;
This is version 2 of the shader cache patches. I've fixed issues with
Lightsmark and Warsow that the first series had, I was not simply caching
enough information for reconstructing ir_variables correctly. Internal API
has some changes and data is now first written to memory and then dumped
Patch introduces gl_shader_cache class that uses ir_cache
to save and load shaders from the disk. This can be used
to implement automatic 'behind the scenes' shader cache for
the compiler.
TODO
- recursive cache directory generation
- env variable to enable/disable cache
- configure option to
will be used by compiler code when loading shaders from the cache
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/linker.cpp | 2 +-
src/glsl/linker.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index
Patch takes gl_shader_cache in to use if Mesa is compiled with
additional option '--enable-shadercache'. When compiling a shader,
compiler first checks the cache if shader exists already or does
it need to be compiled. Compiler also attempts to cache all
compiled shaders.
Signed-off-by: Tapani
Hi,
No, I said it would be better to use st_choose_matching_format in
st_ChooseTextureFormat,
because st_choose_matching_format does exactly what you're trying to do.
I have gone ahead and implemented what I had in mind. See the attached patch.
Marek
One thing to make sure of in the
Hello Christian,
after latest git pull I've only MPEG1, MPEG2_SIMPLE and MPEG2_MAIN with
my RV730 (AGP).
All nice videos didn't play any longer.
-Dieter
BTW I'm not on Mesa Devel, so please CC me.
/opt/mesa vdpauinfo
display: :0 screen: 0
API version: 1
Information string: G3DVL VDPAU
We have the destination framebuffer object passed in; there's no need to
go digging around in the context.
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
On Son, 2013-09-29 at 22:34 +0200, Dieter Nützel wrote:
after latest git pull I've only MPEG1, MPEG2_SIMPLE and MPEG2_MAIN with
my RV730 (AGP).
That probably means you lost UVD support for some reason. Assuming UVD
is still enabled in the kernel, can you bisect which Mesa change caused
the
From: Chia-I Wu o...@lunarg.com
Hi,
This series of patches implements the emulation SIMD16 sample_d with dual
SIMD8 sample_d. Before the changes, the compiler would fail to generate
SIMD16 code for fragment shaders that use textureGrad. And that hurts the
performance.
The first four patches
From: Chia-I Wu o...@lunarg.com
SIMD8 sampler messages are allowed in SIMD16 mode, and they could not work
without BRW_COMPRESSION_2NDHALF. Later PRMs (gen5 and later) do not
explicitly state whether BRW_COMPRESSION_2NDHALF is allowed, but they do have
examples using send with SecHalf. It
From: Chia-I Wu o...@lunarg.com
When the instruction to send the sampler message is forced uncompressed or
sechalf, send SIMD8 one even in SIMD16 mode.
Signed-off-by: Chia-I Wu o...@lunarg.com
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 3 ++-
1 file changed, 2 insertions(+), 1
From: Chia-I Wu o...@lunarg.com
FS_OPCODE_OVERWRITE_DST is used to indicate that the destination register is
(completely) overwritten. No code is emitted, but the liveness analysis can
use it as a hint to add the destination register to DEF bitset. This is
needed because it is hard to figure
From: Chia-I Wu o...@lunarg.com
Copy sechalf to the new register, otherwise we would read wrong HW registers.
Signed-off-by: Chia-I Wu o...@lunarg.com
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
From: Chia-I Wu o...@lunarg.com
Add fs_visitor::emit_texture, which is used to emit the texture instruction
after the message payload has been set up.
Signed-off-by: Chia-I Wu o...@lunarg.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 10 ++-
src/mesa/drivers/dri/i965/brw_fs_fp.cpp
From: Chia-I Wu o...@lunarg.com
Add fs_visitor::emit_dual_texture_gen7 that emulate SIMD16 sample_d with dual
SIMD8 sample_d on gen7+. Fix fs_generator::generate_tex to send SIMD8
messages when force_uncompressed or force_sechalf is set.
No piglit quick.tests regression on Ivy Bridge and
On 30.09.2013 10:06, Michel Dänzer wrote:
On Son, 2013-09-29 at 22:34 +0200, Dieter Nützel wrote:
after latest git pull I've only MPEG1, MPEG2_SIMPLE and MPEG2_MAIN with
my RV730 (AGP).
Same problem on PALM. Bisection shows that it is caused by commit
68f6dec32. The initialization order
UVD was checked before the info fields were initialized. Introduced
by commit 68f6dec32.
---
src/gallium/drivers/r600/r600_pipe.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_pipe.c
b/src/gallium/drivers/r600/r600_pipe.c
index
On 30 September 2013 02:18, Dave Airlie airl...@gmail.com wrote:
So this led me to look at the spec and the mesa code, and I noticed it
appears at some point maybe around 3.1 that FBOs are no longer
considered shared objects at least in core profile, but mesa always
seems to share them, just
When used with a cube array in VS, failed assertion in ir_validate:
Assignment count of LHS write mask channels enabled not
matching RHS vector size (3 LHS, 4 RHS).
To fix this, swizzle the RHS correctly for the writemask.
This showed up in the ARB_texture_gather tests, which exercise
This series adds support for ARB_texture_gather in core mesa and in i965 for
Gen7+.
Notable changes from V3:
- Only emit extra surface state, recompiles, etc if the shader actually uses
gather4.
- Use SCS to accomplish the workaround on Haswell [will need testing]
Cc: Kenneth Graunke
From: Maxence Le Dore maxence.led...@gmail.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/mapi/glapi/gen/ARB_texture_gather.xml | 14 ++
src/mapi/glapi/gen/gl_API.xml | 2 +-
src/mesa/main/context.c | 4
src/mesa/main/extensions.c
From: Maxence Le Dore maxence.led...@gmail.com
V2 [Chris Forbes]:
- Add new pattern, fixup parameter reading.
V3: Rebase onto new builtins machinery
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/builtin_functions.cpp | 35 +++
Adds the Gen7 message IDs, a new SHADER_OPCODE_TG4 pseudo-op, and
low-level support for emitting it via generate_tex().
V3: Updated for changes in master.
Signed-off-by: Chris Forbes chr...@ijw.co.nz
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_defines.h
Lowers ir_tg4 (from textureGather and textureGatherOffset builtins) to
SHADER_OPCODE_TG4.
The usual post-sampling swizzle workaround can't work for ir_tg4,
so avoid doing that:
* For R/G/B/A swizzles use the hardware channel select (lives in the
same dword in the header as the texel offset),
Pretty much the same as the FS case. Channel select goes in the header,
V2: Less mangling.
V3: Avoid sampling at all, for degenerate swizzles.
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_vec4.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp |
---
src/glsl/ir_set_program_inouts.cpp | 9 +
src/mesa/main/mtypes.h | 2 ++
2 files changed, 11 insertions(+)
diff --git a/src/glsl/ir_set_program_inouts.cpp
b/src/glsl/ir_set_program_inouts.cpp
index 1267d6d..ab23538 100644
--- a/src/glsl/ir_set_program_inouts.cpp
+++
V4: Only flag quirks if there are any uses of gather in the shader,
to avoid spurious recompiles just because someone happened to use
RG32F.
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4
src/mesa/drivers/dri/i965/brw_program.h
gather4 GREEN channel against a surface with format R32G32_FLOAT doesn't work
correctly on IVB. w/a from bspec:
- use R32G32_FLOAT_LD = 0x97 instead, for gather4 only.
- select BLUE channel to read GREEN
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
Worst-case is that *every* texunit uses a format that needs overriding.
V4: Place the gather slots last, so shaders which don't use gather don't
get penalized by having a huge binding table.
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_context.h | 20
This allows us to use a different surface format for gather4, which is
required for R32G32_FLOAT to work on Gen7.
V4: - Only emit alternate surface state for shaders which will actually
use it.
- Pass a simple 'for_gather' flag rather than a function pointer.
The callee can decide
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_context.c | 1 +
src/mesa/drivers/dri/i965/intel_extensions.c | 4
2 files changed, 5 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 8 ++--
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 8 ++--
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
The new surface channel select bits allow us to avoid having to
recompile the shader for this workaround.
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_wm.c| 5 +++--
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 14 --
2 files
It will indeed select RGBA32F if you supply GL_RGBA and GL_FLOAT, etc.
Marek
On Mon, Sep 30, 2013 at 9:36 AM, Rogovin, Kevin kevin.rogo...@intel.com wrote:
Hi,
No, I said it would be better to use st_choose_matching_format in
st_ChooseTextureFormat,
because st_choose_matching_format does
https://bugs.freedesktop.org/show_bug.cgi?id=55951
Tim Allen screwt...@froup.com changed:
What|Removed |Added
CC||screwt...@froup.com
--
Hi, I have committed a simpler fix as 7b25f52a95fe13bfc86c4d421328f6df7690876c .
Marek
On Mon, Sep 30, 2013 at 10:53 AM, Grigori Goronzy g...@chown.ath.cx wrote:
UVD was checked before the info fields were initialized. Introduced
by commit 68f6dec32.
---
src/gallium/drivers/r600/r600_pipe.c
Hi all,
I've been tracking through src/mesa/vbo and tracking down the dispatch stuff
in relation to the stuff in src/mesa/vbo. I see how the function entries in
vbo_context#exec and vbo_context#save are filled (by essentially macros defined
in of src/mesa/vbo/vbo_attrib_tmp.h interacting with
op 11-09-13 21:11, Ian Romanick schreef:
Just an FYI...
The 9.2 branch is falling a bit behind. I'm going to trickle out
patches to the stable branch over the next few days / week. My plan is
to do 9.2.1 during the week of XDC.
If your favorite patch hasn't made it out but is listed by
On Mon, Sep 30, 2013 at 11:01 AM, Henri Verbeet hverb...@gmail.com wrote:
On 30 September 2013 02:18, Dave Airlie airl...@gmail.com wrote:
So this led me to look at the spec and the mesa code, and I noticed it
appears at some point maybe around 3.1 that FBOs are no longer
considered shared
Am 30.09.2013 10:47, schrieb Grigori Goronzy:
On 30.09.2013 10:06, Michel Dänzer wrote:
On Son, 2013-09-29 at 22:34 +0200, Dieter Nützel wrote:
after latest git pull I've only MPEG1, MPEG2_SIMPLE and MPEG2_MAIN
with
my RV730 (AGP).
Same problem on PALM. Bisection shows that it is caused
I re-ran piglit with my resource streamer v2 implementation + this patch and
actually this fixed sporadic lockups that I've been struggling with. As
discussed at F2F with Chad and Paul, we need this for RS. I'll be posting the
RS v2 soon quite soon.
-abdiel
On Friday, September 27, 2013
On 09/27/2013 10:51 PM, Vinson Lee wrote:
There is an earlier null check for draw so draw could be null here as
well.
Fixes Dereference after null check defect reported by Coverity.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/gallium/auxiliary/draw/draw_pipe_unfilled.c | 2 +-
1
On 09/27/2013 11:52 PM, Vinson Lee wrote:
The block size for all formats is currently at least 1 byte. Add an
assertion for this.
This should silence several Coverity Division or modulo by zero
defects.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/gallium/auxiliary/util/u_format.h
On 09/27/2013 10:30 PM, Vinson Lee wrote:
shader has already been dereferenced earlier so cannot be null here.
Fixes Dereference before null check defect reported by Coverity.
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/gallium/drivers/llvmpipe/lp_state_fs.c | 2 +-
1 file
On 09/28/2013 08:46 AM, Emil Velikov wrote:
v2: Remove xf86PciInfo.h, all drivers provide their own PCI ID list
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
---
src/gallium/state_trackers/xorg/xorg_driver.c | 1 -
src/gallium/state_trackers/xorg/xorg_output.c | 7 ---
2 files
On 09/28/2013 08:46 AM, Emil Velikov wrote:
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
---
src/gallium/state_trackers/xorg/xorg_driver.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/state_trackers/xorg/xorg_driver.c
On 09/28/2013 08:46 AM, Emil Velikov wrote:
Commit a9f8baf00b264 removed the first and only use of the variables
but forgot to remove them.
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
---
src/gallium/state_trackers/xorg/xorg_xv.c | 4
1 file changed, 4 deletions(-)
diff --git
On 09/28/2013 08:46 AM, Emil Velikov wrote:
Already available and used in other places of configure.ac.
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
---
configure.ac | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/configure.ac b/configure.ac
index
On Sat, Sep 28, 2013 at 03:01:15PM +0100, Emil Velikov wrote:
On 28/09/13 04:48, Tom Stellard wrote:
On Sun, Sep 22, 2013 at 09:29:28PM +0100, Emil Velikov wrote:
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
As long as you have build tested these with both automake and scons and
u_rect.h was including u_surface.h just to avoid touching a bunch
of other source files after some functions were moved from u_rect.h
to u_surface.h. This patch cleans up that hack.
---
src/gallium/auxiliary/util/u_format.c|2 +-
src/gallium/auxiliary/util/u_rect.h |6
On 09/29/2013 05:18 PM, Dave Airlie wrote:
Hey,
So for virgl I was praying I could avoid having to keep a GL context
on the host per guest context but it appears to do
NV_conditional_render properly I either need the ability to
suspend/resume queries (maybe I could write an extension) or I
From: Roland Scheidegger srol...@vmware.com
There's two reasons for this:
1) even when ignoring rho approximation for cube maps, the result is still
not correct, but it's better as the max error at edges is now sqrt(2) instead
of 2 (which was a full mip level), same as it is for ordinary 2d maps
Paul Berry stereotype...@gmail.com writes:
From the bspec documentation of the SEND instruction:
destination region cannot cross the 256-bit register boundary.
To avoid violating this restriction when executing SIMD16 texturing
operations (such as those used by blorp), we need to ensure
Vinson Lee v...@freedesktop.org writes:
Fixes Resource leak defect reported by Coverity.
Signed-off-by: Vinson Lee v...@freedesktop.org
Reviewed-by: Eric Anholt e...@anholt.net
pgpsVboHuAB85.pgp
Description: PGP signature
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Emil Velikov emil.l.veli...@gmail.com writes:
On 28/09/13 01:41, Eric Anholt wrote:
Emil Velikov emil.l.veli...@gmail.com writes:
* clone the drienv to driswenv and adjust approapriately
* export driswenv and use it in dri-swrast
* ensure __NOT_HAVE_DRM_H is defined for drisw, similar
to
I don't understand all the details, but I did confirm
that it pacified the simulator.
Acked-by: Chad Versace chad.vers...@linux.intel.com
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On 30/09/13 17:06, Eric Anholt wrote:
Emil Velikov emil.l.veli...@gmail.com writes:
On 28/09/13 01:41, Eric Anholt wrote:
Emil Velikov emil.l.veli...@gmail.com writes:
* clone the drienv to driswenv and adjust approapriately
* export driswenv and use it in dri-swrast
* ensure
Strictly speaking xmlpool does not require drm, although it's main
(and upto recently only user HW drivers) did. With the dri patch(es)
swrast now require xmlpool, thus changing that to dri seems like the
only sane option.
In other words without this patch and with HW drivers disabled,
swrast will
On 09/30/2013 12:48 AM, Chris Forbes wrote:
We have the destination framebuffer object passed in; there's no need to
go digging around in the context.
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 8
1 file changed, 4 insertions(+),
On 09/28/2013 12:38 AM, Eric Anholt wrote:
Carl Worth cwo...@cworth.org writes:
For some reason that I don't yet fully understand, Glaze does not work with
libEGL unless libEGL is linked with -Bsymbolic.[*]
Beyond that specific reason, all of the reasons for which libGL.so is linked
with
https://bugs.freedesktop.org/show_bug.cgi?id=69874
--- Comment #5 from Emil Velikov emil.l.veli...@gmail.com ---
(In reply to comment #3)
Yeah. And subdir-objects is broken for the way we have our build set up at
the moment (libdricore built from a separate directory, on the same .c files
as
On 09/30/2013 03:08 AM, Chris Forbes wrote:
From: Maxence Le Dore maxence.led...@gmail.com
V2 [Chris Forbes]:
- Add new pattern, fixup parameter reading.
V3: Rebase onto new builtins machinery
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/glsl/builtin_functions.cpp
Paul Berry stereotype...@gmail.com writes:
On 15 September 2013 00:19, Francisco Jerez curroje...@riseup.net wrote:
[...]
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 762832a..412d27a 100644
---
Paul Berry stereotype...@gmail.com writes:
On 15 September 2013 00:10, Francisco Jerez curroje...@riseup.net wrote:
Analogous to the GLSL IR predicate with the same name. This patch
fixes the three dead code elimination passes and the VEC4/FS
instruction scheduling passes so they leave
On 09/30/2013 11:03 AM, Ian Romanick wrote:
On 09/30/2013 03:08 AM, Chris Forbes wrote:
From: Maxence Le Dore maxence.led...@gmail.com
V2 [Chris Forbes]:
- Add new pattern, fixup parameter reading.
V3: Rebase onto new builtins machinery
Reviewed-by: Kenneth Graunke
Starting with Ivybridge, the hierarchical had relaxed requirements for
its allocation. Following a simple formula in the bspec was all you
needed to satisfy the requirement.
To prepare the code for this, extract all places where the miptree was
used, when we really only needed the region. This
After the last patch, we can replace the region allocated in the miptree
creation with a more straightforward (and hopefully smaller resulting)
buffer based on the bspec's allocation formula.
Since I am relatively new to this part of the bspec, I would very much
appreciate scrutiny during review
I'm planning on doing driver extension parsing from 3 places, and making
the extension loading step a bit longer.
---
src/glx/dri2_glx.c | 6 ++
src/glx/dri_common.c | 14 ++
src/glx/dri_common.h | 2 ++
3 files changed, 18 insertions(+), 4 deletions(-)
diff --git
Here are the megadrivers changes, after the prep series I posted earlier.
A few tiny updates to the prep series are available in my tree as
megadriver-prep and this series is available as megadrivers-5
FPS improvement on GLB2.7 with INTEL_NO_HW=1: 2.61061% +/- 1.16957% (n=50)
One question I have
Turns out already we have this nice mechanism for providing optional
things from the driver to the loader, and I was going to have to rename
the public global symbol to avoid conflicts when doing megadrivers.
While the former __driConfigOptions is technically loader interface, this
is the only
The previous interface relied on a static struct, which meant tha the
driver didn't get a chance to edit the struct before the struct got used.
For megadrivers, I want to return a variable struct based on what driver
is getting loaded.
---
include/GL/internal/dri_interface.h | 13 +
This way they aren't all sitting in the global namespace (with the same
name per driver).
---
src/gallium/state_trackers/dri/common/dri_screen.c | 10 +++---
src/gallium/state_trackers/dri/common/dri_screen.h | 2 ++
src/gallium/state_trackers/dri/drm/dri2.c | 1 +
---
src/egl/drivers/dri2/egl_dri2.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 04ab564..7c07fd6 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++
---
configure.ac | 26 +++---
src/mesa/drivers/dri/Makefile.am | 2 ++
src/mesa/drivers/dri/swrast/Makefile.am | 18 +++---
src/mesa/drivers/dri/swrast/Makefile.sources | 6 --
No driver uses it any more, and it's been replaced by megadrivers.
---
configure.ac | 11 -
src/mesa/Makefile.am | 6 +--
src/mesa/drivers/dri/Makefile.am | 2 +-
src/mesa/drivers/dri/i965/Makefile.am | 2 +-
src/mesa/libdricore/Makefile.am
Previously, we've split things such that mesa core is in libdricore,
exposing the whole Mesa core interface in the global namespace, and the
i965_dri.so code all links against that. Along with polluting application
namespace terribly, it requires extra PLT indirections and prevents LTO.
Instead,
This will allow a megadrivers build to reference the actual driver being
loaded from the shared dri_util screen creation code.
---
include/GL/internal/dri_interface.h| 27 +++--
src/egl/drivers/dri2/egl_dri2.c| 27 +
src/egl/drivers/dri2/egl_dri2.h
---
src/mesa/drivers/dri/gen-symbol-redefs.py | 68 +++
1 file changed, 68 insertions(+)
create mode 100755 src/mesa/drivers/dri/gen-symbol-redefs.py
diff --git a/src/mesa/drivers/dri/gen-symbol-redefs.py
b/src/mesa/drivers/dri/gen-symbol-redefs.py
new file mode
As we move to megadrivers, we are unable to build multiple drivers with
the same public global symbol per driver (Think an X Server with an intel
and a nouveau driver, and the X Server implementing indirect for both --
we have to actually talk to the right driver). By slipping the
driDriverAPI
---
configure.ac | 2 +-
src/mesa/drivers/dri/Makefile.am | 2 ++
src/mesa/drivers/dri/nouveau/Makefile.am | 23 ++-
src/mesa/drivers/dri/nouveau/nouveau_screen.c | 15 +--
i915 has symbols for formerly-shared code that conflict with i965, so we
define them away using gen-symbol-redefs.py. Options considered:
- This option. Downsides: The symbols in profiling and debugging don't
match the source. The symbol list may change in the future and we won't
notice
This required some reordering of headers to ensure that the symbol name
redefines happened before any prototypes.
---
configure.ac | 2 +-
src/mesa/drivers/dri/Makefile.am | 4 +
src/mesa/drivers/dri/r200/Makefile.am | 18 +---
---
lib/Target/R600/R600ISelLowering.cpp | 6 +-
lib/Target/R600/R600Instructions.td | 4
lib/Target/R600/R600Intrinsics.td| 1 +
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/lib/Target/R600/R600ISelLowering.cpp
b/lib/Target/R600/R600ISelLowering.cpp
index
---
src/gallium/drivers/r600/r600_llvm.c | 7 +--
src/gallium/drivers/r600/r600_shader.c | 1 +
src/gallium/drivers/radeon/radeon_llvm.h | 1 +
3 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_llvm.c
b/src/gallium/drivers/r600/r600_llvm.c
---
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
index 8ff9abd..ac2e511 100644
---
Am 30.09.2013 17:14, schrieb Brian Paul:
u_rect.h was including u_surface.h just to avoid touching a bunch
of other source files after some functions were moved from u_rect.h
to u_surface.h. This patch cleans up that hack.
---
src/gallium/auxiliary/util/u_format.c|2 +-
On 09/27/2013 09:42 PM, Paul Berry wrote:
In commit 247f90c77e8f3894e963d796628246ba0bde27b5 (i965/gs: Set
control data header size/format appropriately for EndPrimitive()), I
incorrectly numbered the DWORDs in the 3DSTATE_GS command starting
from 1 instead of starting from 0. This caused the
Eric Anholt e...@anholt.net writes:
Could you print which thing is trying to get resolved early? I see a
few egl* calls within main/egl*.c (eglQueryAPI(), eglGetDisplay(),
eglWaitClient()), and I'm wondering if not having Bsymbolic on them is
causing an RTLD_NOW (perhaps by the
On 09/27/2013 04:46 PM, Kenneth Graunke wrote:
This was only used for uploading batchbuffer data, and only on 32-bit
systems. If this is actually useful, we might want to use it more
widely. But more than likely, it isn't.
This probably is still useful, alas. The glibc memcpy wants to do an
On 09/27/2013 04:46 PM, Kenneth Graunke wrote:
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_context.h | 95 +++-
src/mesa/drivers/dri/i965/intel_context.h | 142
--
2 files changed, 93 insertions(+),
On 09/27/2013 04:45 PM, Kenneth Graunke wrote:
This series combines brw_context.[ch] and intel_context.[ch],
and cleans up our context creation code quite a bit. A bunch of
functionality was awkwardly split between the two sets of files;
now it's all in one place.
While this series is
After the last patch, we can replace the region allocated in the miptree
creation with a more straightforward (and hopefully smaller resulting)
buffer based on the bspec's allocation formula.
Since I am relatively new to this part of the bspec, I would very much
appreciate scrutiny during review
On 09/30/2013 03:08 AM, Chris Forbes wrote:
This series adds support for ARB_texture_gather in core mesa and in i965 for
Gen7+.
Notable changes from V3:
- Only emit extra surface state, recompiles, etc if the shader actually uses
gather4.
- Use SCS to accomplish the workaround on Haswell
On Tue, Oct 1, 2013 at 2:27 AM, Ian Romanick i...@freedesktop.org wrote:
On 09/27/2013 04:46 PM, Kenneth Graunke wrote:
This was only used for uploading batchbuffer data, and only on 32-bit
systems. If this is actually useful, we might want to use it more
widely. But more than likely, it
On 09/27/2013 04:45 PM, Kenneth Graunke wrote:
error is a very generic name. dri_ctx_error is the name used in
intelInitContext(), which is more specific.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_context.c | 6 +++---
1 file changed, 3
On 09/27/2013 04:45 PM, Kenneth Graunke wrote:
This was always set to false, and is only used for debugging.
To enable it, simply change the if (0) block and recompile.
So, the difference is that you could change emit_state_always in GDB,
but I'm not sure that matters.
Signed-off-by: Kenneth
On 09/27/2013 04:45 PM, Kenneth Graunke wrote:
It actually just wants generation checking, and brw-gen is the usual
way of doing that. In the future, we'll also want to check brw-hw_ctx,
which isn't available from the screen.
While we're changing the function signature, convert from studly
On 09/27/2013 04:45 PM, Kenneth Graunke wrote:
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_context.c | 10 +++---
src/mesa/drivers/dri/i965/brw_device_info.c | 9 -
src/mesa/drivers/dri/i965/brw_device_info.h | 16
On 09/27/2013 04:45 PM, Kenneth Graunke wrote:
Now that there isn't an intel_context structure, the split between
brw_context.[ch] and intel_context.[ch] is rather awkward and arbitrary.
Removing intel_context.[ch] seems desirable, but not everything really
belongs in brw_context.[ch], either.
On 09/27/2013 06:24 PM, Emil Velikov wrote:
On 28/09/13 00:45, Kenneth Graunke wrote:
This series combines brw_context.[ch] and intel_context.[ch],
and cleans up our context creation code quite a bit. A bunch of
functionality was awkwardly split between the two sets of files;
now it's all in
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