[Mesa-dev] [PATCH 055/140] amd/addrlib: Add support for ETC2 and ASTC formats.

From: Kevin Furrow --- src/amd/addrlib/addrtypes.h | 14 + src/amd/addrlib/core/addrelemlib.cpp | 105 ++- src/amd/addrlib/core/addrelemlib.h | 1 + 3 files changed, 119 insertions(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 035/140] amdgpu/addrlib: Fix number of //

From: Xavi Zhang Find ^/{80,99}$ and replace them to 100 "/" Signed-off-by: Nicolai Hähnle --- src/amd/addrlib/addrinterface.cpp | 24 src/amd/addrlib/addrinterface.h| 32

[Mesa-dev] [PATCH 049/140] amdgpu/addrlib: Fix the issue that tcCompatible HTILE slice size is not calculated correctly

From: Nicolai Hähnle --- src/amd/addrlib/addrinterface.h | 2 ++ src/amd/addrlib/core/addrlib1.cpp | 16 2 files changed, 18 insertions(+) diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h index 8506a45..d2d6d94 100644

[Mesa-dev] [PATCH 044/140] amdgpu/addrlib: Check prt flag for PRT_THIN1 extra padding for DCC.

From: Xavi Zhang --- src/amd/addrlib/r800/ciaddrlib.cpp | 35 +-- src/amd/addrlib/r800/ciaddrlib.h| 6 ++-- src/amd/addrlib/r800/egbaddrlib.cpp | 70 - src/amd/addrlib/r800/egbaddrlib.h | 8 ++---

[Mesa-dev] [PATCH 082/140] radeonsi/gfx9: ELEMENT_SIZE change

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_compute.c | 16 ++-- src/gallium/drivers/radeonsi/si_descriptors.c | 6 +- 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_compute.c

[Mesa-dev] [PATCH 088/140] radeonsi/gfx9: trivial shader and ring changes

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state_shaders.c | 20 +++- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index

[Mesa-dev] [PATCH 045/140] amdgpu/addrlib: do some tile mode conversions to display surface

From: Frans Gu --- src/amd/addrlib/core/addrlib1.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/amd/addrlib/core/addrlib1.cpp b/src/amd/addrlib/core/addrlib1.cpp index 516229a..9cdc459 100644 --- a/src/amd/addrlib/core/addrlib1.cpp +++

[Mesa-dev] [PATCH 050/140] amdgpu/addrlib: Seperate 2 dcc related workarounds by different flags

From: Nicolai Hähnle 1) dccCompatible for padding MSAA surface to support fast clear 2) dccPipeWorkaround for padding surface to support dcc --- src/amd/addrlib/addrinterface.h| 6 +- src/amd/addrlib/core/addrlib1.cpp | 2 ++ src/amd/addrlib/r800/ciaddrlib.cpp

[Mesa-dev] [PATCH 053/140] amd/addrlib: Adjust slie size after pitch and actual height adjustment

From: Frans Gu --- src/amd/addrlib/r800/egbaddrlib.cpp | 57 - 1 file changed, 31 insertions(+), 26 deletions(-) diff --git a/src/amd/addrlib/r800/egbaddrlib.cpp b/src/amd/addrlib/r800/egbaddrlib.cpp index fe98d2f..0cd27ad 100644 ---

[Mesa-dev] [PATCH 060/140] radeonsi: code shuffling in si_init_depth_surface

From: Marek Olšák use fewer local variables, re-order the assignments, so that the GFX9 diff is smaller here. --- src/gallium/drivers/radeonsi/si_state.c | 86 - 1 file changed, 32 insertions(+), 54 deletions(-) diff --git

[Mesa-dev] [PATCH 051/140] amdgpu/addrlib: Bump version to 6.01

From: Nicolai Hähnle Signed-off-by: Nicolai Hähnle --- src/amd/addrlib/addrinterface.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h index

[Mesa-dev] [PATCH 092/140] gallium/radeon: move pre-GFX9 radeon_surf.* members to radeon_surf.u.legacy.*

From: Marek Olšák --- src/gallium/drivers/r600/evergreen_state.c | 104 +++--- src/gallium/drivers/r600/r600_blit.c | 4 +- src/gallium/drivers/r600/r600_state.c | 64 - src/gallium/drivers/radeon/r600_test_dma.c

[Mesa-dev] [PATCH 098/140] gallium/radeon: move pre-GFX9 radeon_bo_metadata.* to u.legacy.*

From: Marek Olšák --- src/gallium/drivers/r300/r300_texture.c | 14 ++--- src/gallium/drivers/radeon/r600_texture.c | 64 +-- src/gallium/drivers/radeon/radeon_winsys.h| 24 + src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 74

[Mesa-dev] [PATCH 093/140] gallium/radeon: add GFX9 surface info to radeon_surf

From: Marek Olšák --- src/gallium/drivers/radeon/radeon_winsys.h | 38 ++ 1 file changed, 38 insertions(+) diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index 3dec92c..bfc067d 100644 ---

[Mesa-dev] [PATCH 089/140] radeonsi/gfx9: pad shader binaries by 128 bytes

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_shader.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index cc0ef96..226924b 100644 ---

[Mesa-dev] [PATCH 096/140] winsys/amdgpu: wire up new addrlib for GFX9

From: Marek Olšák --- src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 400 - 1 file changed, 399 insertions(+), 1 deletion(-) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c index

[Mesa-dev] [PATCH 090/140] radeonsi/gfx9: draw changes

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state_draw.c | 43 1 file changed, 31 insertions(+), 12 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index

[Mesa-dev] [PATCH 075/140] radeonsi/gfx9: query changes - EVENT_WRITE and SET_PREDICATION

From: Marek Olšák --- src/gallium/drivers/radeon/r600_query.c | 29 +++-- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c index e269c39..dcd217b 100644

[Mesa-dev] [PATCH 099/140] radeonsi/gfx9: update r600_print_texture_info

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 3 +- src/gallium/drivers/radeon/r600_texture.c | 63 ++- src/gallium/drivers/radeonsi/si_debug.c | 4 +- 3 files changed, 65 insertions(+), 5 deletions(-) diff --git

[Mesa-dev] [PATCH 100/140] radeonsi/gfx9: stub testdma - array_mode_to_string

From: Marek Olšák --- src/gallium/drivers/radeon/r600_test_dma.c | 30 ++ 1 file changed, 18 insertions(+), 12 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_test_dma.c b/src/gallium/drivers/radeon/r600_test_dma.c index

[Mesa-dev] [PATCH 095/140] winsys/amdgpu: update amdgpu_addr_create for GFX9

From: Marek Olšák --- src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 47 -- 1 file changed, 30 insertions(+), 17 deletions(-) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c index

[Mesa-dev] [PATCH 097/140] winsys/amdgpu: set num_tile_pipes, pipe_interleave_bytes for GFX9

From: Marek Olšák --- src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c index 4becd2a..d1d6327

[Mesa-dev] [PATCH 105/140] radeonsi/gfx9: update can_sample_z/s flags

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 129b3f4..1838de4 100644 ---

[Mesa-dev] [PATCH 107/140] radeonsi/gfx9: CB changes

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 3 +- src/gallium/drivers/radeonsi/si_state.c | 174 ++ 2 files changed, 125 insertions(+), 52 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h

[Mesa-dev] [PATCH 103/140] radeonsi/gfx9: update si_set_optimal_micro_tile_mode

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 44 ++- 1 file changed, 38 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index f372341..ebd2c5c

[Mesa-dev] [PATCH 112/140] radeonsi/gfx9: enable clamping for Z UNORM formats promoted to Z32F

From: Marek Olšák so that shaders don't have to do it. --- src/gallium/drivers/radeonsi/si_state.c | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index

[Mesa-dev] [PATCH 137/140] radeon/vce: update for firwmare 53.17

From: Leo Liu Signed-off-by: Leo Liu --- src/gallium/drivers/radeon/radeon_vce.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c index be2..b5ace7b

[Mesa-dev] [PATCH 119/140] radeonsi/gfx9: use ACQUIRE_MEM

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state_draw.c | 23 +-- 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index

[Mesa-dev] [PATCH 130/140] radeonsi/gfx9: disable features that don't work

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 8 +++- src/gallium/drivers/radeonsi/si_shader.c| 5 +++-- src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 4 +++- src/gallium/drivers/radeonsi/si_state.c | 3 ++-

Re: [Mesa-dev] [PATCH 6/5] i965: Turn on support for image modifiers

On 17-03-20 16:21:53, Jason Ekstrand wrote: On Mon, Mar 20, 2017 at 4:15 PM, Ben Widawsky wrote: On 17-03-20 12:03:24, Jason Ekstrand wrote: My only question here is whether or not we want to add a "supported modifiers" query to DRIimage before we bump the version number.

Re: [Mesa-dev] [PATCH] mesa glthread: allow asynchronous pixel transfer operation when a buffer is bound

On 20.03.2017 14:33, Markus Wick wrote: Am 2017-03-20 14:21, schrieb Nicolai Hähnle: On 17.03.2017 18:59, gregory hainaut wrote: If the application is badly/strangely coded, glthread will make it worst. The solution ought to be either fix the app or don't use glthread. It would be nice if

[Mesa-dev] [PATCH 001/140] amdgpu/addrlib: rename SiAddrLib/CiAddrLib to match internal spelling

From: Nicolai Hähnle Signed-off-by: Nicolai Hähnle --- src/amd/addrlib/r800/ciaddrlib.cpp | 110 src/amd/addrlib/r800/ciaddrlib.h | 12 +-- src/amd/addrlib/r800/siaddrlib.cpp | 168

[Mesa-dev] [PATCH 005/140] amdgpu/addrlib: Make comments shorter

From: Xavi Zhang Signed-off-by: Nicolai Hähnle --- src/amd/addrlib/addrinterface.h | 76 - 1 file changed, 29 insertions(+), 47 deletions(-) diff --git a/src/amd/addrlib/addrinterface.h

[Mesa-dev] [PATCH 008/140] amdgpu/addrlib: Let Kaveri go general stereo right eye offset padding path

From: Xavi Zhang Kaveri (2-pipe) macro tiling mode table was initially set to all 4-aspect-ratio so the swizzling path did not work for it and then we chose to pad the offset. We now discover the root cause is that if ratio > 2, the swizzling path does not work. So we can

[Mesa-dev] [PATCH 007/140] amdgpu/addrlib: Rewrite tile mode optmization code

From: Xavi Zhang Note: remove reference to degrade4Space and use opt4Space instead. --- src/amd/addrlib/addrinterface.h| 6 ++-- src/amd/addrlib/core/addrcommon.h | 3 +- src/amd/addrlib/core/addrlib.cpp | 47

[Mesa-dev] [PATCH 018/140] amdgpu/addrlib: force all zero tile info for linear general.

From: Carlos Xiong --- src/amd/addrlib/r800/ciaddrlib.cpp | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp index f72f5a2..d4f8c64 100644 ---

[Mesa-dev] [PATCH 000/140] RadeonSI: Initial Vega10 support

Hi, This is initial Vega10 support for radeonsi. It supports everything except geometry shaders and tessellation, so it's limited to GL 3.1. The missing features are under way. There is also UVD and VCE support. The first 57 patches only update addrlib. Vega10 support is the rest. Please

[Mesa-dev] [PATCH 002/140] amdgpu/addrlib: Change to compute TC compatible stencil info

From: Carlos Xiong Change the logic to compute tc compatible stencil info via depth's tileIndex instead of using depth's tileInfo. So the clients can get the stencil's tileInfo computed from macroModeTable. If the stencil tileInfo is same as depth tileInfo, then stencil is

[Mesa-dev] [PATCH 004/140] amdgpu/addrlib: add new flag nonSplit

From: XiaoYuan Zheng Flag tcCompatible has different usage in CI and VI. Add a new flag "nonSplit" for CI. --- src/amd/addrlib/addrinterface.h| 3 ++- src/amd/addrlib/r800/ciaddrlib.cpp | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [PATCH 006/140] amdgpu/addrlib: Add a flag "tcCompatible" to surface info output structure.

From: Carlos Xiong Even if surface info input flag "tcComaptible" is enabled, tc compatible may be not supported if tile split happens for depth surfaces. Add a new flag in output structure to notify client to disable tc compatible in this case. ---

[Mesa-dev] [PATCH 010/140] amdgpu/addrlib: add disableLinearOpt flag

From: Xavi Zhang --- src/amd/addrlib/addrinterface.h | 3 ++- src/amd/addrlib/core/addrcommon.h | 3 ++- src/amd/addrlib/core/addrlib.cpp | 5 - 3 files changed, 8 insertions(+), 3 deletions(-) diff --git a/src/amd/addrlib/addrinterface.h

[Mesa-dev] [PATCH 003/140] amdgpu/addrlib: allow tileSplitBytes greater than row size

From: Xiao-Tao Zai Carrizo row size is 1K, while tileSplitBytes is 2K for a 4xAA 32bpp depth surface. Remove the sanity check that tileSplitBytes must be greater than row size. There could be performance loss but may be covered by non-split depth which enables tc-compatible

[Mesa-dev] [PATCH 069/140] radeonsi/gfx9: add IB parser support

From: Marek Olšák Both GFX6 and GFX9 fields are printed next to each other in parsed IBs. The Python script parses both headers like one stream and tries to merge all definitions. --- src/amd/Makefile.common.am | 4 +-- src/amd/common/ac_debug.c

[Mesa-dev] [PATCH 056/140] amd/addrlib: Fix selection of swizzle modes for 3D compressed images.

From: Kevin Furrow --- src/amd/addrlib/core/addrelemlib.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/addrlib/core/addrelemlib.cpp b/src/amd/addrlib/core/addrelemlib.cpp index 477a078..a60a667 100644 ---

[Mesa-dev] [PATCH 068/140] radeonsi/gfx9: set the LLVM processor, require LLVM 5.0

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.c | 2 ++ src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 7 +++ 2 files changed, 9 insertions(+) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c

[Mesa-dev] [PATCH 059/140] amd/addrlib: silence warnings

From: Marek Olšák --- src/amd/addrlib/addrinterface.cpp| 4 ++-- src/amd/addrlib/gfx9/gfx9addrlib.cpp | 10 +- src/amd/addrlib/gfx9/rbmap.cpp | 10 +- src/amd/addrlib/r800/egbaddrlib.cpp | 6 +++--- 4 files changed, 15 insertions(+), 15

[Mesa-dev] [PATCH 054/140] amd/addrlib: Bump version to 6.02

From: Joe Ma --- src/amd/addrlib/addrinterface.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h index d960859..cfd2476 100644 --- a/src/amd/addrlib/addrinterface.h +++

[Mesa-dev] [PATCH 062/140] amd: normalize register definition formatting

From: Marek Olšák This resolves trivial conflicts with gfx9d.h caused by different formatting. Some fields are also renamed. --- src/amd/common/r600d_common.h | 68 - src/amd/common/sid.h | 138 +++---

[Mesa-dev] [PATCH 021/140] amdgpu/addrlib: Fix invalid access to m_tileTable

From: Nicolai Hähnle Sometimes client driver passes valid tile info into address library, in this case, the tile index is computed in function HwlPostCheckTileIndex instead of CiAddrLib::HwlSetupTileCfg. We need to call HwlPostCheckTileIndex to calculate the correct tile

[Mesa-dev] [PATCH 077/140] radeonsi/gfx9: Gather4 no longer needs the workaround

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_shader.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index b5cb41d..a6f4ce9 100644 ---

[Mesa-dev] [PATCH 046/140] amdgpu/addrlib: Adjust bank equation bit order based on macro tile aspect ratio settings

From: Frans Gu By this way, we can have valid equation for 2D_THIN1 tile mode. Add flag "preferEquation" to return equation index without adjusting input tile mode. --- src/amd/addrlib/addrinterface.h| 7 +- src/amd/addrlib/r800/ciaddrlib.cpp | 80 ++-

[Mesa-dev] [PATCH 085/140] radeonsi/gfx9: rasterizer changes

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index eacb1b4..af09003 100644 ---

[Mesa-dev] [PATCH 052/140] amd/addrlib: Apply input pitch after internal pitch aligning

From: Frans Gu --- src/amd/addrlib/r800/egbaddrlib.cpp | 45 +++-- 1 file changed, 33 insertions(+), 12 deletions(-) diff --git a/src/amd/addrlib/r800/egbaddrlib.cpp b/src/amd/addrlib/r800/egbaddrlib.cpp index 7942d20..fe98d2f 100644 ---

[Mesa-dev] [PATCH 083/140] radeonsi/gfx9: set NUM_RECORDS correctly

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_descriptors.c | 2 +- src/gallium/drivers/radeonsi/si_shader.c | 2 +- src/gallium/drivers/radeonsi/si_state.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git

[Mesa-dev] [PATCH v2 4/5] i965: Use aubinator/genxml for INTEL_DEBUG=bat state decoding.

This deletes all of our handwritten code in favor of autogenerated genxml-based decoding. This should be much more usable, as the old code isn't entirely accurate - we updated some things for new generations, but not everything. Aubinator has one annoying limitation: it has no idea how many

[Mesa-dev] [PATCH v2 2/5] intel: Move tools/decoder.[ch] to common/gen_decoder.[ch].

This way they become part of libintel_common.la so I can use them in the i965 driver. --- src/intel/Makefile.sources | 2 ++ src/intel/Makefile.tools.am | 2 -- src/intel/{tools/decoder.c => common/gen_decoder.c} | 2 +- src/intel/{tools/decoder.h

[Mesa-dev] [PATCH 132/140] radeon/uvd: adapt gfx9 surface to uvd

From: Leo Liu Signed-off-by: Leo Liu Acked-by: Alex Deucher --- src/gallium/drivers/r600/r600_uvd.c | 4 +- src/gallium/drivers/radeon/radeon_uvd.c | 103 +++---

Re: [Mesa-dev] [PATCH 4/5] i965: Handle Y-tiled modifier

On 17-03-20 15:36:37, Jason Ekstrand wrote: On Mon, Mar 20, 2017 at 3:25 PM, Ben Widawsky wrote: On 17-03-20 12:00:44, Jason Ekstrand wrote: On Fri, Mar 17, 2017 at 5:34 PM, Ben Widawsky wrote: This patch begins introducing how we'll actually handle

[Mesa-dev] [PATCH 138/140] radeon/uvd: set correct vega10 db pitch alignment

From: Boyuan Zhang Create new function to get correct alignment based on Asics, and change the corresponding decode message buffer and dpb buffer size calculations Signed-off-by: Boyuan Zhang Reviewed-by: Christian König

[Mesa-dev] [PATCH 104/140] radeonsi/gfx9: pass correct parameters to buffer_get_handle

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 20 ++-- 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index ebd2c5c..129b3f4 100644 ---

[Mesa-dev] [PATCH 134/140] winsys/surface: add height pitch for gfx9

From: Leo Liu Signed-off-by: Leo Liu Acked-by: Alex Deucher --- src/gallium/drivers/radeon/radeon_winsys.h | 1 + src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 1 + 2 files changed, 2 insertions(+) diff --git

[Mesa-dev] [PATCH 131/140] radeon/uvd: add uvd soc15 register

From: Leo Liu Signed-off-by: Leo Liu Acked-by: Alex Deucher --- src/gallium/drivers/radeon/radeon_uvd.c | 26 ++ src/gallium/drivers/radeon/radeon_uvd.h | 5 + 2 files changed, 27 insertions(+), 4

[Mesa-dev] [PATCH 121/140] radeonsi/gfx9: don't write mipmap level offsets to BO metadata

From: Marek Olšák GFX9 doesn't have (usable) mipmap offsets. --- src/gallium/drivers/radeonsi/si_state.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index

[Mesa-dev] [PATCH 116/140] radeonsi/gfx9: emit BREAK_BATCH in emit_framebuffer_state

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state.c | 5 + 1 file changed, 5 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index d0c9072..134a520 100644 ---

Re: [Mesa-dev] [PATCH 000/140] RadeonSI: Initial Vega10 support

It's also here: https://cgit.freedesktop.org/~mareko/mesa/log/?h=vega10 Marek On Mon, Mar 20, 2017 at 11:42 PM, Marek Olšák wrote: > Hi, > > This is initial Vega10 support for radeonsi. It supports everything > except geometry shaders and tessellation, so it's limited to GL

[Mesa-dev] [PATCH] i965: Shut up major()/minor() warnings.

Recent glibc generates this warning: brw_performance_query.c:1648:13: warning: In the GNU C Library, "minor" is defined by . For historical compatibility, it is currently defined by as well, but we plan to remove this soon. To use "minor", include directly. If you did not intend to use a

Re: [Mesa-dev] [PATCH v2] r600g/sb: Fix memory leak by reworking uses list (rebased)

Pushed, thanks. Marek On Mon, Mar 20, 2017 at 9:39 PM, Dieter Nützel wrote: > Tested-by: Dieter Nützel > > > Am 20.03.2017 19:16, schrieb Constantine Kharlamov: >> >> The author is Heiko Przybyl(CC'ing), the patch is rebased on top of >> Bartosz

Re: [Mesa-dev] [PATCH 4/5] Android: drop Android 4.4 (KitKat) support

On Mon, Mar 20, 2017 at 11:03 AM, Emil Velikov wrote: > On 20 March 2017 at 01:33, Rob Herring wrote: >> Any users of KitKat are likely using an older version of Mesa and >> KitKat support adds complexity to the make files. Dropping support >> allows

Re: [Mesa-dev] [PATCH 4/5] i965: Handle Y-tiled modifier

On Mon, Mar 20, 2017 at 3:25 PM, Ben Widawsky wrote: > On 17-03-20 12:00:44, Jason Ekstrand wrote: > >> On Fri, Mar 17, 2017 at 5:34 PM, Ben Widawsky wrote: >> >> This patch begins introducing how we'll actually handle the potentially >>> many modifiers

[Mesa-dev] [PATCH 057/140] amd/addrlib: Not all ETC2 formats are 128bpp... add new ETC2 formats to differentiate between 64 and 128bpp formats.

From: Kevin Furrow --- src/amd/addrlib/addrtypes.h | 2 ++ src/amd/addrlib/core/addrelemlib.cpp | 24 ++- src/amd/addrlib/core/addrelemlib.h | 38 +++- 3 files changed, 45 insertions(+), 19 deletions(-) diff

[Mesa-dev] [PATCH 026/140] amdgpu/addrlib: add equation generation

From: Nicolai Hähnle 1. Add new surface flags needEquation for client driver use to force the surface tile setting equation compatible. Override 2D/3D macro tile mode to PRT_* tile mode if this flag is TRUE and num slice > 1. 2. Add numEquations and pEquationTable in

[Mesa-dev] [PATCH 047/140] amdgpu/addrlib: add matchStencilTileCfg and tcCompatible fixes

From: Xavi Zhang The usage should be client first call AddrComputeSurfaceInfo() on depth surface with flag "matchStencilTilecfg", AddrLib will use 2DThin1 tile index for depth as much as possible and do not down grade unless alignment requirement cannot be met. 1. If there

[Mesa-dev] [PATCH 027/140] amdgpu/addrlib: Add a flag to skip calculate indices

From: Xavi Zhang This is useful for debugging and special cases for stencil surfaces do not require texture fetch compatible. --- src/amd/addrlib/addrinterface.h | 3 ++- src/amd/addrlib/r800/egbaddrlib.cpp | 30 ++

[Mesa-dev] [PATCH 042/140] amdgpu/addrlib: Always returns pixelPitch in original pixels

From: Xavi Zhang --- src/amd/addrlib/core/addrlib1.cpp | 24 ++-- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/src/amd/addrlib/core/addrlib1.cpp b/src/amd/addrlib/core/addrlib1.cpp index 34e286e..d65fd02 100644 ---

[Mesa-dev] [PATCH 041/140] amdgpu/addrlib: fix crash on allocation failure

From: Sabre Shao --- src/amd/addrlib/core/addrelemlib.cpp | 6 +- src/amd/addrlib/core/addrobject.cpp | 41 src/amd/addrlib/core/addrobject.h| 14 ++-- src/amd/addrlib/r800/ciaddrlib.h | 3 ++-

[Mesa-dev] [PATCH 034/140] amdgpu/addrlib: Cleanup.

From: Nicolai Hähnle Signed-off-by: Nicolai Hähnle --- src/amd/addrlib/core/addrcommon.h| 2 +- src/amd/addrlib/core/addrelemlib.cpp | 22 +++--- src/amd/addrlib/core/addrelemlib.h | 2 +-

[Mesa-dev] [PATCH 040/140] amdgpu/addrlib: Add flag to report if a surface can have dcc ram

From: Frans Gu --- src/amd/addrlib/addrinterface.h| 3 ++- src/amd/addrlib/r800/ciaddrlib.cpp | 25 - src/amd/addrlib/r800/siaddrlib.h | 4 ++-- 3 files changed, 28 insertions(+), 4 deletions(-) diff --git a/src/amd/addrlib/addrinterface.h

[Mesa-dev] [PATCH 048/140] amdgpu/addrlib: Add a new output flag to notify client that the returned tile index is for PRT on SI

From: Nicolai Hähnle If this flag is set for mip0, client should set prt flag for sub mips, so that address lib can select the correct tile index for sub mips. --- src/amd/addrlib/addrinterface.h| 5 - src/amd/addrlib/r800/siaddrlib.cpp | 1 + 2 files changed, 5

[Mesa-dev] [PATCH 036/140] amdgpu/addrlib: Pad pitch to multiples of 256 for DCC surface on Fiji

From: Nicolai Hähnle The change also modifies function CiLib::HwlPadDimensions to report adjusted pitch alignment. --- src/amd/addrlib/core/addrlib1.cpp | 12 +++ src/amd/addrlib/core/addrlib1.h | 10 +++--- src/amd/addrlib/r800/ciaddrlib.cpp | 66

[Mesa-dev] [PATCH 043/140] amdgpu/addrlib: Add new flags minimizePadding and maxBaseAlign

From: Frans Gu 1) minimizePadding - Use 1D tile mode if padded size of 2D is bigger than 1D 2) maxBaseAlign - Force PRT tile mode if macro block size is bigger than requested alignment. Also, related changes to tile mode optimization for needEquation. ---

[Mesa-dev] [PATCH 037/140] amdgpu/addrlib: style cleanup

From: Nicolai Hähnle Signed-off-by: Nicolai Hähnle --- src/amd/addrlib/r800/ciaddrlib.cpp | 25 ++--- src/amd/addrlib/r800/egbaddrlib.cpp | 18 +- 2 files changed, 15 insertions(+), 28 deletions(-) diff

[Mesa-dev] [PATCH 063/140] amd: resolve remaining definition conflicts with gfx9d.h

From: Marek Olšák Add _GFX6 and _GFX9 suffixes to conflicting definitions. sid.h and gfx9d.h can now be included in the same file. --- src/amd/common/gfx9d.h| 60 +-- src/amd/common/sid.h | 60

[Mesa-dev] [PATCH 019/140] amdgpu/addrlib: add tcCompatible htile addr from coordinate support.

From: XiaoYuan Zheng --- src/amd/addrlib/addrinterface.h| 3 +++ src/amd/addrlib/core/addrlib1.cpp | 31 +++-- src/amd/addrlib/core/addrlib1.h| 8 +++ src/amd/addrlib/r800/ciaddrlib.cpp | 47 +-

[Mesa-dev] [PATCH 014/140] amdgpu/addrlib: Change comment alignment

From: Nicolai Hähnle Signed-off-by: Nicolai Hähnle --- src/amd/addrlib/addrinterface.h | 24 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/src/amd/addrlib/addrinterface.h

[Mesa-dev] [PATCH 029/140] amdgpu/addrlib: Disable tcComaptible when depth surface is not macro tiled

From: Roy Zhan Experiment show 1D tiling + TcCompatible cannot work together. --- src/amd/addrlib/r800/ciaddrlib.cpp | 37 - 1 file changed, 20 insertions(+), 17 deletions(-) diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp

[Mesa-dev] [PATCH 017/140] amdgpu/addrlib: Add a member "bpp" for input of method AddrConvertTileIndex and AddrConvertTileInfoToHW

From: Nicolai Hähnle When clients queries tile Info from tile index and expects accurate tileSplit info, bits per pixel info is required to be provided since this is necessary for computing tileSplitBytes; otherwise Addrlib will return value of "tileBytes" instead if

[Mesa-dev] [PATCH 031/140] amdgpu/addrlib: Add a new tile mode ADDR_TM_UNKNOWN

From: Frans Gu This can be used by address lib client to ask address lib to select tile mode. --- src/amd/addrlib/addrinterface.h| 3 +- src/amd/addrlib/addrtypes.h| 3 +- src/amd/addrlib/core/addrlib1.cpp | 32 + src/amd/addrlib/core/addrlib1.h|

[Mesa-dev] [PATCH 078/140] radeonsi/gfx9: don't set PA_SC_RASTER_CONFIG*

From: Marek Olšák The registers don't exist on GFX9. --- src/gallium/drivers/radeonsi/si_state.c | 34 ++--- 1 file changed, 19 insertions(+), 15 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c

[Mesa-dev] [PATCH 118/140] radeonsi/gfx9: only use CE RAM for most-used descriptors

From: Marek Olšák because the CE RAM size decreased to 4 KB. --- src/gallium/drivers/radeonsi/si_descriptors.c | 26 +- src/gallium/drivers/radeonsi/si_state.h | 2 ++ 2 files changed, 23 insertions(+), 5 deletions(-) diff --git

[Mesa-dev] [PATCH 120/140] radeonsi/gfx9: flush CB & DB caches with an EOP TS event

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state_draw.c | 107 +-- 1 file changed, 84 insertions(+), 23 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index

[Mesa-dev] [PATCH 108/140] radeonsi/gfx9: DB changes

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 8 +- src/gallium/drivers/radeonsi/si_state.c | 262 +- 2 files changed, 176 insertions(+), 94 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h

[Mesa-dev] [PATCH 124/140] radeonsi/gfx9: handle pitch and offset overrides for texture_from_handle

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 29 ++--- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index df260b6..0231fe2

[Mesa-dev] [PATCH 123/140] radeonsi/gfx9: set/validate GFX9 BO metadata

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 20 +++- src/gallium/drivers/radeon/radeon_winsys.h | 5 + 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c

[Mesa-dev] [PATCH 122/140] radeonsi/gfx9: add radeon_surf.gfx9.surf_offset

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 2 +- src/gallium/drivers/radeon/radeon_winsys.h | 1 + src/gallium/drivers/radeonsi/si_descriptors.c | 2 ++ src/gallium/drivers/radeonsi/si_state.c| 2 ++

[Mesa-dev] [PATCH 101/140] radeonsi/gfx9: update HTILE/CMASK/FMASK allocators

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 8cc9f2a..10ee46a 100644 ---

[Mesa-dev] [PATCH 139/140] radeon/vce: update vce support to firmware 53.19.4

From: Leo Liu Signed-off-by: Leo Liu --- src/gallium/drivers/radeon/radeon_vce.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c index b5ace7b..70c1e60

Re: [Mesa-dev] Hash Collision Risk Maths with Salt values.

> Peter, > > While there may be things of value in your replies I would kindly ask > you [again] to try and keep your replies brief. > If one is to choose between working on a feature/bug and reading a > 900+ (word) email I'd imagine they'll choose the former. > > I'm saying this for your own good

Re: [Mesa-dev] [PATCH 6/5] i965: Turn on support for image modifiers

On 17-03-20 12:03:24, Jason Ekstrand wrote: My only question here is whether or not we want to add a "supported modifiers" query to DRIimage before we bump the version number. It's probably not super-important because we can always bump the version number again. Meh. Remind me what the

Re: [Mesa-dev] [PATCH 4/5] i965: Handle Y-tiled modifier

On 17-03-20 12:00:44, Jason Ekstrand wrote: On Fri, Mar 17, 2017 at 5:34 PM, Ben Widawsky wrote: This patch begins introducing how we'll actually handle the potentially many modifiers coming in from the API, how we'll store them, and the structure in the code to support it.

[Mesa-dev] [PATCH 023/140] amdgpu/addrlib: Add new interface to support macro mode index query

From: Frans Gu --- src/amd/addrlib/addrinterface.cpp | 32 + src/amd/addrlib/addrinterface.h | 42 +++ src/amd/addrlib/core/addrlib1.cpp | 37 ++ src/amd/addrlib/core/addrlib1.h

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