Re: [Mesa-dev] [PATCH 14/30] intel/isl: Add an enum for describing auxiliary compression state

On Tue, Jun 6, 2017 at 10:11 PM, Chad Versace wrote: > On Tue 06 Jun 2017, Jason Ekstrand wrote: > > On Tue, Jun 6, 2017 at 6:00 PM, Chad Versace wrote: > > > > > On Tue 06 Jun 2017, Jason Ekstrand wrote: > > > > On Tue, Jun 6, 2017 at 1:32 PM, Jason

Re: [Mesa-dev] [PATCH 14/30] intel/isl: Add an enum for describing auxiliary compression state

On Tue 06 Jun 2017, Jason Ekstrand wrote: > On Tue, Jun 6, 2017 at 6:00 PM, Chad Versace wrote: > > > On Tue 06 Jun 2017, Jason Ekstrand wrote: > > > On Tue, Jun 6, 2017 at 1:32 PM, Jason Ekstrand > > wrote: > > > > > > > On Tue, Jun 6, 2017 at 1:22 PM,

Re: [Mesa-dev] [PATCH 16/30] i965: Use the new resolve function for several simple cases

On Fri 26 May 2017, Jason Ekstrand wrote: > --- > src/mesa/drivers/dri/i965/brw_context.c| 2 +- > src/mesa/drivers/dri/i965/intel_blit.c | 14 -- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 12 +--- > src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 18

Re: [Mesa-dev] [PATCH 15/30] i965/miptree: Add new entrypoints for resolve management

On Fri 26 May 2017, Jason Ekstrand wrote: > This commit adds a new unified interface for doing resolves. The basic > format is that, prior to any surface access such as texturing or > rendering, you call intel_miptree_prepare_access. If the surface was > written, you call

Re: [Mesa-dev] [PATCH 14/30] intel/isl: Add an enum for describing auxiliary compression state

On Tue 06 Jun 2017, Jason Ekstrand wrote: > On Tue, Jun 6, 2017 at 1:22 PM, Chad Versace > wrote: > > > On Fri 26 May 2017, Jason Ekstrand wrote: > > > This enum describes all of the states that a auxiliary compressed > > > surface can have. All of the states as well

Re: [Mesa-dev] [PATCH 15/30] i965/miptree: Add new entrypoints for resolve management

On Fri 26 May 2017, Jason Ekstrand wrote: > This commit adds a new unified interface for doing resolves. The basic > format is that, prior to any surface access such as texturing or > rendering, you call intel_miptree_prepare_access. If the surface was > written, you call

Re: [Mesa-dev] [PATCH 14/30] intel/isl: Add an enum for describing auxiliary compression state

On Tue, Jun 6, 2017 at 5:41 PM, Chad Versace wrote: > On Tue 06 Jun 2017, Jason Ekstrand wrote: > > On Tue, Jun 6, 2017 at 1:22 PM, Chad Versace > > wrote: > > > > > On Fri 26 May 2017, Jason Ekstrand wrote: > > > > This enum describes all of the

Re: [Mesa-dev] [PATCH 14/30] intel/isl: Add an enum for describing auxiliary compression state

On Tue 06 Jun 2017, Jason Ekstrand wrote: > On Tue, Jun 6, 2017 at 1:32 PM, Jason Ekstrand wrote: > > > On Tue, Jun 6, 2017 at 1:22 PM, Chad Versace > > wrote: > > > >> On Fri 26 May 2017, Jason Ekstrand wrote: > > How about a section after the

[Mesa-dev] [PATCH 10/11] i965: Set step_rate == 0 for interleaved vertex buffers

Before, we weren't setting step rate so we got whatever old value happened to be lying around. This can lead to some interesting rendering errors. In particular, if you run the OpenGL ES CTS with dEQP-GLES3.functional.instanced.types.mat2x4 immediately followed by one of the

[Mesa-dev] [PATCH 11/11] i965: Use blorp for depth/stencil clears on gen6+

--- src/mesa/drivers/dri/i965/brw_blorp.c | 106 ++ src/mesa/drivers/dri/i965/brw_blorp.h | 4 ++ src/mesa/drivers/dri/i965/brw_clear.c | 6 ++ 3 files changed, 116 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c

[Mesa-dev] [PATCH 05/11] i965: Remove some of the remnants of meta

--- src/mesa/drivers/dri/i965/brw_context.h | 1 - src/mesa/drivers/dri/i965/brw_wm.c| 2 +- src/mesa/drivers/dri/i965/genX_state_upload.c | 2 +- 3 files changed, 2 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.h

[Mesa-dev] [PATCH 08/11] i965/blorp: Do a depth flush/stall prior to HiZ operations

Without this stall, the test group ES3-CTS.functional.fbo.msaa.\* hangs about 1 out of every 2 or 3 times on my Sky Lake GT3 laptop. With the flush and stall, I can run it 6 times in a row without a hang. Cc: "17.1" --- src/mesa/drivers/dri/i965/brw_blorp.c |

[Mesa-dev] [PATCH 07/11] i965/blorp: Set no_depth_or_stencil correctly

--- src/mesa/drivers/dri/i965/genX_blorp_exec.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c index 3451d71..0de3038 100644 --- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c +++

[Mesa-dev] [PATCH 09/11] i965: Disable the interleaved vertex optimization when instancing

Instance divisor is a property of the vertex buffer and not the vertex element so if we ever see anything other than 0, bail. Cc: "17.1" --- src/mesa/drivers/dri/i965/brw_draw_upload.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff

[Mesa-dev] [PATCH 01/11] i965/blorp: Set aux_usage to NONE for miplevels without HiZ

--- src/mesa/drivers/dri/i965/brw_blorp.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 28be620..763ce05 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c

[Mesa-dev] [PATCH 00/11] i965: Use BLORP for depth/stencil clears

This little series switches the GL driver to use BLORP for depth and stencil clears. BLORP has had depth/stencil clear support ever since we started using it in the Vulkan driver but we didn't hook it up in GL because of a few very hard-to-debug CTS fails. Patches 10 takes care of those and we

[Mesa-dev] [PATCH 06/11] i965: Remove some unneeded fields from brw_context

--- src/mesa/drivers/dri/i965/brw_context.h | 12 1 file changed, 12 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 3f4b86a..965c7b9 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++

[Mesa-dev] [PATCH 02/11] mesa: Add a BUFFER_BITS mask for depth+stencil

--- src/mesa/main/mtypes.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index 7ec0123..d77c26a 100644 --- a/src/mesa/main/mtypes.h +++ b/src/mesa/main/mtypes.h @@ -187,6 +187,9 @@ typedef enum BUFFER_BIT_COLOR6

[Mesa-dev] [PATCH 03/11] i965/miptree: Choose the stencil layout in miptree_create_layout

This ensures that we get the correct layout for all stencil buffers, not just those which are created as separate stencil for a depth buffer. --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [PATCH 04/11] intel/isl: Properly set SeparateStencilBufferEnable on gen5-6

On gen5-6, SeparateStencilBufferEnable and HierarchicalDepthBufferEnable come hand in hand and we have to set either both or neither. --- src/intel/isl/isl_emit_depth_stencil.c | 13 ++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git

[Mesa-dev] [PATCH 1/2] radv: move the pipeline static pieces of ia multi vgt calcs to pipeline.

From: Dave Airlie This shifts a bunch of the pipeline specific calcs into pipeline creation. This should allow better optimising of the multi vgt calcs --- src/amd/vulkan/radv_pipeline.c | 62 ++ src/amd/vulkan/radv_private.h | 6

[Mesa-dev] [PATCH 2/2] radv: only update ia_multi_vgt_param if something changes.

From: Dave Airlie This in theory should reduce the number of calculations for this register per draw. --- src/amd/vulkan/radv_private.h | 2 ++ src/amd/vulkan/si_cmd_buffer.c | 11 +++ 2 files changed, 13 insertions(+) diff --git a/src/amd/vulkan/radv_private.h

Re: [Mesa-dev] [PATCH 14/30] intel/isl: Add an enum for describing auxiliary compression state

On Tue, Jun 6, 2017 at 6:00 PM, Chad Versace wrote: > On Tue 06 Jun 2017, Jason Ekstrand wrote: > > On Tue, Jun 6, 2017 at 1:32 PM, Jason Ekstrand > wrote: > > > > > On Tue, Jun 6, 2017 at 1:22 PM, Chad Versace > > > > wrote:

Re: [Mesa-dev] [PATCH v14 15/36] i965: Improve same-buffer restriction for imports

On June 5, 2017 6:10:22 PM Varad Gautam wrote: Hi Daniel, On Mon, 2017-06-05 at 14:53 +0100, Daniel Stone wrote: Hi Varad, On 30 May 2017 at 12:53, Varad Gautam wrote: > > +   /* We only support all planes from the same bo. > +*

Re: [Mesa-dev] [PATCH] Android: define PIPE_OS_BSD

2017-06-06 13:06 GMT+08:00 Chih-Wei Huang : > 2017-06-05 21:04 GMT+08:00 Emil Velikov : >> On 4 June 2017 at 04:31, Chih-Wei Huang wrote: >>> Android bionic is derived from OpenBSD. So the logics of BSD >>> almost apply

Re: [Mesa-dev] [PATCH] glcpp: fix #undef to match latest spec update and GLSLang implementation

This didn't get any reviews, any takers? It fixes a couple of CTS tests so it would be good to have it merged. Iago On Tue, 2017-05-30 at 13:25 +0200, Iago Toral Quiroga wrote: > GLSL ES spec includes the following: > >    "It is an error to undefine or to redefine a built-in >

Re: [Mesa-dev] [PATCH 5/5] st/mesa: use texture_barrier before CopyPixels blits where src == dst

On Tue, Jun 6, 2017 at 4:28 AM, Michel Dänzer wrote: > On 06/06/17 01:50 AM, Marek Olšák wrote: >> From: Marek Olšák >> >> radeonsi won't flush caches if set_framebuffer_state doesn't change >> anything. >> --- >>

Re: [Mesa-dev] [PATCH] glthread: remove extra _mesa_glthread_finish() from generated code

Reviewed-by: Marek Olšák Marek On Tue, Jun 6, 2017 at 7:08 AM, Timothy Arceri wrote: > The other user of print_sync_dispatch() was ending up with code that > looked like: > > _mesa_glthread_finish(ctx); >

Re: [Mesa-dev] [PATCH 06/14] radv: add GFX9 to initialisation cmd buffer.

On Tue, Jun 6, 2017 at 1:14 AM, Dave Airlie wrote: > From: Dave Airlie > > This just adds support for initialising some GFX9 registers, > and handles the different init for the VGT reuse reg. > > Signed-off-by: Dave Airlie > --- >

Re: [Mesa-dev] [PATCH] dri3/GLX: Fix drawable invalidation

On 01/06/17 07:13 PM, Thomas Hellstrom wrote: > A number of internal VMware apitrace traces image comparisons fail with > dri3 because the viewport transformation becomes incorrect after an X > drawable resize. The incorrect viewport transformation sometimes persist > until the second draw-call

Re: [Mesa-dev] [PATCH] glcpp: fix #undef to match latest spec update and GLSLang implementation

Looks good to me. Reviewed-by: Samuel Pitoiset On 05/30/2017 01:25 PM, Iago Toral Quiroga wrote: GLSL ES spec includes the following: "It is an error to undefine or to redefine a built-in (pre-defined) macro name." But desktop GLSL doesn't. This has

Re: [Mesa-dev] [PATCH] i965: Don't try to resolve CCS with MESA_FORMAT_NONE.

Hi, On 06.06.2017 02:58, Kenneth Graunke wrote: On Monday, June 5, 2017 2:03:45 AM PDT Tapani Pälli wrote: FWIW this change fixes also regression on Android wallpaper since that commit. I'm planning on dropping this patch, as it seems that commit 708664159e18487b6676fd5b4c33f52003f81d9e

[Mesa-dev] [PATCH 2/3] radv/vulkan: Move radv_get_driver_version to src/vulkan/util

This means it can be reused for other Vulkan drivers. Also fix up a typo, need to search for '.' in the version string rather than ','. Signed-off-by: Alex Smith --- src/amd/vulkan/radv_device.c | 24 + src/vulkan/Makefile.sources | 1 +

[Mesa-dev] [PATCH 1/3] util/vulkan: Move Vulkan utilities to src/vulkan/util

We have Vulkan utilities in both src/util and src/vulkan/util. The latter seems a more appropriate place for Vulkan-specific things, so move them there. Signed-off-by: Alex Smith --- src/amd/vulkan/radv_device.c| 2 +- src/amd/vulkan/radv_formats.c | 3

[Mesa-dev] [PATCH v2 3/3] anv: Set driver version to Mesa version

As already done by RADV. v2: Move version calculation function to src/vulkan/util to share with RADV. Signed-off-by: Alex Smith --- src/intel/vulkan/anv_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_device.c

[Mesa-dev] [PATCH 1/2] etnaviv: don't flush resource to self without TS

From: Lucas Stach A resolve to self is only necessary if the resource is fast cleared, so there is never a need to do so if there is no TS allocated. Signed-off-by: Lucas Stach --- src/gallium/drivers/etnaviv/etnaviv_resource.h | 2 +- 1 file changed, 1

[Mesa-dev] [PATCH 2/2] etnaviv: flush resource when binding as sampler view

As TS is also allowed on sampler resources, we need to make sure to resolve to self when binding the resource as a texture, to avoid stale content being sampled. Signed-off-by: Lucas Stach --- src/gallium/drivers/etnaviv/etnaviv_texture.c | 3 +++ 1 file changed, 3

Re: [Mesa-dev] [PATCH 3/6] etnaviv: honor PIPE_TRANSFER_UNSYNCHRONIZED flag

Am Dienstag, den 30.05.2017, 17:40 +0200 schrieb Philipp Zabel: > On Fri, 2017-05-19 at 11:41 +0200, Lucas Stach wrote: > > This gets rid of quite a bit of CPU/GPU sync on frequent vertex buffer > > uploads and I haven't seen any of the issues mentioned in the comment, > > so this one seems stale.

Re: [Mesa-dev] [PATCH 0/3] Fix missing initializer errors in generated tables

On Tue, Jun 6, 2017 at 7:16 AM, Chih-Wei Huang wrote: > 2017-06-05 3:57 GMT+08:00 Marek Olšák : >> NAK. >> >> In C/C++, the initializer is used to clear the memory to 0s, thus, >> adding 0s to the initializer is redundant and unnecessary. Empty >>

Re: [Mesa-dev] [PATCH v2 02/23] mesa: add KHR_no_error support for glVertexArrayVertexBuffers()

On 06/06/2017 01:04 AM, Fredrik Höglund wrote: On Monday 05 June 2017, Samuel Pitoiset wrote: Signed-off-by: Samuel Pitoiset Reviewed-by: Timothy Arceri --- src/mapi/glapi/gen/ARB_direct_state_access.xml | 2 +- src/mesa/main/varray.c

Re: [Mesa-dev] [PATCH 1/2] etnaviv: don't flush resource to self without TS

On Tue, Jun 06, 2017 at 12:38:23PM +0200, Lucas Stach wrote: > From: Lucas Stach > > A resolve to self is only necessary if the resource is fast cleared, so > there is never a need to do so if there is no TS allocated. > > Signed-off-by: Lucas Stach Does this

[Mesa-dev] [PATCH] android: build system changes for Vulkan utilities move

Signed-off-by: Tapani Pälli --- Android build system changes required for: https://lists.freedesktop.org/archives/mesa-dev/2017-June/158027.html Android.common.mk | 1 + src/intel/Android.vulkan.mk | 1 + src/vulkan/Android.mk | 2 ++ 3 files changed,

Re: [Mesa-dev] [PATCH 1/3] util/vulkan: Move Vulkan utilities to src/vulkan/util

Looks nice to me, I've sent required changes to Android build system for this change as addition. On 06/06/2017 12:42 PM, Alex Smith wrote: We have Vulkan utilities in both src/util and src/vulkan/util. The latter seems a more appropriate place for Vulkan-specific things, so move them there.

Re: [Mesa-dev] [PATCH 1/3] util/vulkan: Move Vulkan utilities to src/vulkan/util

Aha, sorry, I missed that. Do you want me to fold your patch into this one and send a v2? Alex On 6 June 2017 at 12:11, Tapani Pälli wrote: > Looks nice to me, I've sent required changes to Android build system for > this change as addition. > > > On 06/06/2017 12:42

Re: [Mesa-dev] [PATCH 2/6] etnaviv: slim down resource waiting

On Fri, May 19, 2017 at 11:41:08AM +0200, Lucas Stach wrote: > cpu_prep() already does all the required waiting, so the only thing that > needs to be done is flushing the commandstream, if a GPU write is pending. Looks good to me. Reviewed-By: Wladimir J. van der Laan >

Re: [Mesa-dev] [PATCH 1/3] util/vulkan: Move Vulkan utilities to src/vulkan/util

On 06/06/2017 02:13 PM, Alex Smith wrote: Aha, sorry, I missed that. Do you want me to fold your patch into this one and send a v2? That would be ideal as working build makes bisecting a lot less painful, thanks! Alex On 6 June 2017 at 12:11, Tapani Pälli

Re: [Mesa-dev] [PATCH 2/4] configure/r600: Only require libdrm_amdgpu if CL is enabled

On 5 June 2017 at 21:31, Aaron Watry wrote: > Otherwise r600g will fail to build when the amdgpu drm library is missing > And the code that pulls amdgpu is not used by r600g, which makes this misplaced duck tape. As you/Jan don't have the time to properly address this, I'll try

[Mesa-dev] [PATCH v3] i965: Support dmabuf import with modifiers

Add support for createImageFromDmaBufs2, adding a modifier to the original, and allow importing CCS resources with auxiliary data from dmabufs. v2: avoid DRIimageExtension version bump, pass single modifier to createImageFromDmaBufs2. v3: rebase to 'i965: Improve same-buffer restriction for

Re: [Mesa-dev] [PATCH v3] egl/android: support for EGL_KHR_partial_update

On 6 June 2017 at 14:54, Eric Engestrom wrote: > On Monday, 2017-06-05 17:04:28 +0100, Emil Velikov wrote: >> > + * If the width of the passed rect is greater than the surface's >> > + * width then it is clamped to the width of the surface. Same with >> > + * height. >>

[Mesa-dev] [PATCH v2] i965: Add tiling mode to BO import

From: Daniel Stone When importing a dmabuf, verify that the tiling mode matches what was expected. v2: rebase to 'i965: Improve same-buffer restriction for imports' v2. Signed-off-by: Daniel Stone Signed-off-by: Varad Gautam

[Mesa-dev] [PATCH v2] i965: Improve same-buffer restriction for imports

From: Daniel Stone Intel hardware requires that all planes of an image come from the same buffer, which is currently implemented by testing that all FDs are numerically the same. However, when going through a winsys (e.g.) or anything which transits FDs individually, the

Re: [Mesa-dev] [PATCH v3] egl/android: support for EGL_KHR_partial_update

On Monday, 2017-06-05 19:37:55 +0530, Harish Krupo wrote: > This patch adds support for the EGL_KHR_partial_update extension for > android platform. It passes 36/37 tests in dEQP for EGL_KHR_partial_update. > 1 test not supported. > > v2: add fallback for eglSetDamageRegionKHR (Tapani) > > v3:

[Mesa-dev] [PATCH 1/5] radeonsi: enable TC-compatible stencil compression on VI

From: Marek Olšák Most things are in place. Ideally we won't see decompress blits for stencil anymore. --- src/gallium/drivers/radeonsi/si_blit.c| 2 ++ src/gallium/drivers/radeonsi/si_descriptors.c | 8 src/gallium/drivers/radeonsi/si_state_draw.c | 3 ++-

[Mesa-dev] [PATCH 3/5] radeonsi: disable the patch ID workaround on SI when the patch ID isn't used

From: Marek Olšák The workaround causes a massive performance decrease on 1-SE parts. (Cape Verde, Hainan, Oland) The performance regression is already part of 17.0 and 17.1. Cc: 17.0 17.1 ---

Re: [Mesa-dev] [PATCH v2] util/vulkan: Move Vulkan utilities to src/vulkan/util

Acked-by: Jason Ekstrand I haven't looked at the details, but it's a good idea. Thanks for doing it! On Tue, Jun 6, 2017 at 4:31 AM, Alex Smith wrote: > We have Vulkan utilities in both src/util and src/vulkan/util. The > latter seems a more

Re: [Mesa-dev] [PATCH v2 3/3] anv: Set driver version to Mesa version

Both patch 2 and 3 are Reviewed-by: Jason Ekstrand On Tue, Jun 6, 2017 at 2:42 AM, Alex Smith wrote: > As already done by RADV. > > v2: Move version calculation function to src/vulkan/util to share with > RADV. > > Signed-off-by: Alex

Re: [Mesa-dev] [PATCH 2/3] radv/vulkan: Move radv_get_driver_version to src/vulkan/util

On Tue, Jun 6, 2017 at 5:17 AM, Emil Velikov wrote: > Hi Alex, > > On 6 June 2017 at 10:42, Alex Smith wrote: > > This means it can be reused for other Vulkan drivers. Also fix up a > > typo, need to search for '.' in the version string

Re: [Mesa-dev] [PATCH v3] egl/android: support for EGL_KHR_partial_update

On Monday, 2017-06-05 17:04:28 +0100, Emil Velikov wrote: > > + * If the width of the passed rect is greater than the surface's > > + * width then it is clamped to the width of the surface. Same with > > + * height. > > + */ > > + > > +static void > > +_eglSetDamageRegionKHRClampRects(_EGLDisplay*

[Mesa-dev] [PATCH 2/5] radeonsi: don't use 1D tiling for Z/S on VI to get TC-compatible HTILE

From: Marek Olšák It's always good to have fewer decompress blits. --- src/gallium/drivers/radeon/r600_texture.c | 16 +--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c

[Mesa-dev] [PATCH 5/5] radeonsi: clean up decompress blend state names

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_blit.c | 4 ++-- src/gallium/drivers/radeonsi/si_pipe.c | 8 src/gallium/drivers/radeonsi/si_pipe.h | 4 ++-- src/gallium/drivers/radeonsi/si_state.c | 4 ++-- 4 files changed, 10 insertions(+), 10

[Mesa-dev] [PATCH 4/5] gallium/radeon: clean up a misleading statement from the old days

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index f0c1bec..663d6fc 100644 ---

Re: [Mesa-dev] [PATCH v2] radv/vulkan: Move radv_get_driver_version to src/vulkan/util

Yes, please! On 6 June 2017 at 16:12, Jason Ekstrand wrote: > Reviewed-by: Jason Ekstrand > > Alex, do you need someone to push these for you? > > On Tue, Jun 6, 2017 at 8:09 AM, Alex Smith > wrote: > >> This means it

Re: [Mesa-dev] [PATCH 2/4] configure/r600: Only require libdrm_amdgpu if CL is enabled

On Tue, Jun 6, 2017 at 8:51 AM, Emil Velikov wrote: > > On 5 June 2017 at 21:31, Aaron Watry wrote: > > Otherwise r600g will fail to build when the amdgpu drm library is missing > > > And the code that pulls amdgpu is not used by r600g, which makes

[Mesa-dev] [PATCH v2] radv/vulkan: Move radv_get_driver_version to src/vulkan/util

This means it can be reused for other Vulkan drivers. Also fix up a typo, need to search for '.' in the version string rather than ','. v2: Remove unneeded temporary version variable (Emil, Eric) Signed-off-by: Alex Smith --- src/amd/vulkan/radv_device.c | 24

Re: [Mesa-dev] [PATCH v2] radv/vulkan: Move radv_get_driver_version to src/vulkan/util

Reviewed-by: Jason Ekstrand Alex, do you need someone to push these for you? On Tue, Jun 6, 2017 at 8:09 AM, Alex Smith wrote: > This means it can be reused for other Vulkan drivers. Also fix up a > typo, need to search for '.' in the version

[Mesa-dev] [PATCH v15 0/7] i965 modifier import and advertisement

Hi, With the initial modifier enablement patches being merged, and Jason's comments about doing a lot of work in the vicinity of CCS with blorp/ISL, I'm cleaving this patch series into 3. Varad is taking over the Gallium/Freedreno parts as an independent series, since there are no longer any

[Mesa-dev] [PATCH 3/7] i965: Move fallback size assignment out of bufmgr

The bufmgr took a mandatory size argument, which would only be used if the kernel size query failed, i.e. an older kernel. It didn't actually check that the BO size was sufficient for use. Pull the check out of the bufmgr, and actually check that the BO is sufficiently-sized for our import one

[Mesa-dev] [PATCH 6/7] i965: Support dmabuf import with modifiers

From: Varad Gautam Add support for createImageFromDmaBufs2, adding a modifier to the original, and allow importing CCS resources with auxiliary data from dmabufs. v2: avoid DRIimageExtension version bump, pass single modifier to createImageFromDmaBufs2.

[Mesa-dev] [PATCH 2/7] i965: Invert image modifier/tiling inference

When allocating images, we record a tiling mode and then work backwards to infer the modifier. Unfortunately this is the wrong way around, since it is a one:many mapping (e.g. TILING_Y can be plain Y-tiling, or Y-tiling with CCS). Invert the mapping, so we record a modifier first and then map

[Mesa-dev] [PATCH v2 1/1] radeonsi: Use libdrm to get chipset name

v2: Add a func pointer to radeon_winsys to support radeon later. Change-Id: I614ea71424f9e5c97e4ae68654315d28c89eaa5f Signed-off-by: Samuel Li --- src/gallium/drivers/radeon/r600_pipe_common.c | 11 ++- src/gallium/drivers/radeon/radeon_winsys.h| 2 ++

Re: [Mesa-dev] [PATCH 2/2] mesa: inline update_image_transfer_state() into _mesa_update_pixel()

With Ian's suggestion series: Reviewed-by: Timothy Arceri On 07/06/17 06:58, Samuel Pitoiset wrote: Signed-off-by: Samuel Pitoiset --- src/mesa/main/pixel.c | 19 +-- 1 file changed, 5 insertions(+), 14 deletions(-) diff

[Mesa-dev] [PATCH 2/3] radv: move calculating the vertex sgpr to the pipeline.

From: Dave Airlie There is no need to calculate this at draw time. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_cmd_buffer.c | 63 ++-- src/amd/vulkan/radv_pipeline.c | 10 +++

[Mesa-dev] [PATCH 3/3] radv: move lots of index related things into the bind.

From: Dave Airlie This just moves lots of stuff to the bind stage rather than dealing with it in the draw stage. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_cmd_buffer.c | 29 - src/amd/vulkan/radv_private.h| 4

[Mesa-dev] [PATCH 1/3] radv: rename and make global some functions.

From: Dave Airlie I want to use these in the pipeline setup stage. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_cmd_buffer.c | 24 src/amd/vulkan/radv_private.h| 5 + 2 files changed, 17 insertions(+), 12

[Mesa-dev] XDC 2017 : Call for paper

Hello, I have the pleasure to announce that the X.org Developer Conference 2017 will be held in Mountain View, California from September 20th to September 22nd. The venue is located at the Googleplex. The official page for the event is http://www.x.org/wiki/Events/XDC2017 while the call for

Re: [Mesa-dev] [PATCH] intel: Fix broxton 2x6 way size computation

Tested-by: Mark Janes Anuj Phogat writes: > This patch is undoing the changes to way size computation > in broxton 2x6, made by below commit: > > Commit: 0d576fbfbe912cf3fb9ab594bb31eb58bccf2138 > Author: Anuj Phogat >

Re: [Mesa-dev] [PATCH 14/30] intel/isl: Add an enum for describing auxiliary compression state

On Tue, Jun 6, 2017 at 1:32 PM, Jason Ekstrand wrote: > On Tue, Jun 6, 2017 at 1:22 PM, Chad Versace > wrote: > >> On Fri 26 May 2017, Jason Ekstrand wrote: >> > This enum describes all of the states that a auxiliary compressed >> > surface can

Re: [Mesa-dev] [PATCH] svga: fix git_sha1.h include path in Android.mk

And here is last (v3) version tested by building nougat-x86 >From 052df48ae71b82b04ed8f634101d0ec919b497e5 Mon Sep 17 00:00:00 2001 From: Mauro Rossi Date: Tue, 6 Jun 2017 23:15:05 +0200 Subject: [PATCH 1/5] svga: fix git_sha1.h include path in Android.mk (v3) Adds

Re: [Mesa-dev] [PATCH 2/2] mesa: inline update_image_transfer_state() into _mesa_update_pixel()

On 06/06/2017 01:58 PM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > src/mesa/main/pixel.c | 19 +-- > 1 file changed, 5 insertions(+), 14 deletions(-) > > diff --git a/src/mesa/main/pixel.c b/src/mesa/main/pixel.c > index

Re: [Mesa-dev] [PATCH 1/6] mesa: Add _mesa_format_fallback_rgba_to_rgbx()

On Tue 06 Jun 2017, Dylan Baker wrote: > Quoting Chad Versace (2017-06-06 13:36:55) > > The new function takes a mesa_format and, if the format is an alpha > > format with a non-alpha variant, returns the non-alpha format. > > Otherwise, it returns the original format. > > > > Example: > >

Re: [Mesa-dev] [PATCH 5/5] r100: Silence numerous unused this or that warnings

On 06/01/2017 09:26 AM, Marek Olšák wrote: > For the series: > > Reviewed-by: Marek Olšák > > About your r100-r200 coding style question, I don't have a specific > answer. It's up to you what you wanna do with it. Okay. I think I'm going to just start using the same style

Re: [Mesa-dev] [PATCH mesa] tree-wide: remove trailing backslash

On 06/01/2017 06:48 AM, Eric Engestrom wrote: > Simple search for a backslash followed by two newlines. > If one of the newlines were to be removed, this would cause issues, so > let's just remove these trailing backslashes. > > Signed-off-by: Eric Engestrom > --- > >

Re: [Mesa-dev] [PATCH 1/6] mesa: Add _mesa_format_fallback_rgba_to_rgbx()

Quoting Chad Versace (2017-06-06 15:11:18) > On Tue 06 Jun 2017, Dylan Baker wrote: > > Quoting Chad Versace (2017-06-06 13:36:55) > > > The new function takes a mesa_format and, if the format is an alpha > > > format with a non-alpha variant, returns the non-alpha format. > > > Otherwise, it

[Mesa-dev] [PATCH] nir: make various getters take const pointers

This will allow to constify other things. Signed-off-by: Grazvydas Ignotas --- src/compiler/nir/nir.h | 25 + src/compiler/nir/nir_lower_io.c | 2 +- 2 files changed, 14 insertions(+), 13 deletions(-) diff --git a/src/compiler/nir/nir.h

Re: [Mesa-dev] [PATCH v2 56/64] radeonsi: decompress resident textures/images before graphics/compute

On Tue, May 30, 2017 at 10:36 PM, Samuel Pitoiset wrote: > Similar to the existing decompression code path except that it > loops over the list of resident textures/images. > > v2: - store pipe_sampler_view instead of si_sampler_view > > Signed-off-by: Samuel Pitoiset

Re: [Mesa-dev] [PATCH v2] mesa: wrap blit_framebuffer() into blit_framebuffer_err()

Thanks. Reviewed-by: Timothy Arceri On 07/06/17 05:57, Samuel Pitoiset wrote: Also add ALWAYS_INLINE to blit_framebuffer(). v2: - use correct parameters Signed-off-by: Samuel Pitoiset --- src/mesa/main/blit.c | 34

[Mesa-dev] [PATCH 1/3] ac/nir: mark some arguments const

Most functions are only inspecting nir, so nir related arguments can be marked const. Some more can be done if/when some nir changes are accepted. Signed-off-by: Grazvydas Ignotas --- does *not* depend on the nir patch src/amd/common/ac_nir_to_llvm.c | 61

[Mesa-dev] [PATCH 2/3] ac/nir: convert several ifs to a switch

Also solve "outinfo may be used uninitialized" warning by putting in an unreachable(). Signed-off-by: Grazvydas Ignotas --- src/amd/common/ac_nir_to_llvm.c | 20 +++- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git

Re: [Mesa-dev] [PATCH v2 13/23] mesa: add KHR_no_error support for glBlitFramebuffer()

1-13: Reviewed-by: Timothy Arceri On 06/06/17 07:44, Samuel Pitoiset wrote: Signed-off-by: Samuel Pitoiset --- src/mapi/glapi/gen/ARB_framebuffer_object.xml | 2 +- src/mesa/main/blit.c | 15 +++

[Mesa-dev] [PATCH 3/3] radv/meta: remove an unused variable

Trivial. Signed-off-by: Grazvydas Ignotas --- src/amd/vulkan/radv_meta_clear.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index f4cb787..d7e7c5b 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++

[Mesa-dev] [PATCH] intel: Fix broxton 2x6 way size computation

This patch is undoing the changes to way size computation in broxton 2x6, made by below commit: Commit: 0d576fbfbe912cf3fb9ab594bb31eb58bccf2138 Author: Anuj Phogat i965: Simplify l3 way size computations By making use of l3_banks field in gen_device_info struct

[Mesa-dev] [PATCH] radv: move chip_class extraction down further.

From: Dave Airlie This seems to matter here in a profile, without this we spend a lot more time exiting this function with no flush bits. Signed-off-by: Dave Airlie --- src/amd/vulkan/si_cmd_buffer.c | 15 ++- 1 file changed, 10

Re: [Mesa-dev] [PATCH 4/5] mesa: add scissor() and scissor_array() helpers

On 07/06/17 05:58, Samuel Pitoiset wrote: Signed-off-by: Samuel Pitoiset --- src/mesa/main/scissor.c | 57 - 1 file changed, 37 insertions(+), 20 deletions(-) diff --git a/src/mesa/main/scissor.c

Re: [Mesa-dev] [PATCH v2 56/64] radeonsi: decompress resident textures/images before graphics/compute

On Wed, Jun 7, 2017 at 1:27 AM, Marek Olšák wrote: > On Tue, May 30, 2017 at 10:36 PM, Samuel Pitoiset > wrote: >> Similar to the existing decompression code path except that it >> loops over the list of resident textures/images. >> >> v2: - store

Re: [Mesa-dev] [PATCH v2 58/64] radeonsi: track use of bindless samplers/images from tgsi_shader_info

On Tue, May 30, 2017 at 10:36 PM, Samuel Pitoiset wrote: > This adds some new helper functions to know if the current draw > call (or dispatch compute) is using bindless samplers/images, > based on TGSI analysis. > > Signed-off-by: Samuel Pitoiset

Re: [Mesa-dev] [PATCH] intel: Fix broxton 2x6 way size computation

On Tuesday, June 6, 2017 4:34:36 PM PDT Anuj Phogat wrote: > This patch is undoing the changes to way size computation > in broxton 2x6, made by below commit: > > Commit: 0d576fbfbe912cf3fb9ab594bb31eb58bccf2138 > Author: Anuj Phogat > i965: Simplify l3 way size

Re: [Mesa-dev] [PATCH] radv: move chip_class extraction down further.

On Wed, Jun 7, 2017 at 1:35 AM, Dave Airlie wrote: > From: Dave Airlie > > This seems to matter here in a profile, without this we spend a lot > more time exiting this function with no flush bits. > > Signed-off-by: Dave Airlie > --- >

Re: [Mesa-dev] [PATCH 1/3] radv: rename and make global some functions.

This series is Reviewed-by: Bas Nieuwenhuizen On Wed, Jun 7, 2017 at 1:18 AM, Dave Airlie wrote: > From: Dave Airlie > > I want to use these in the pipeline setup stage. > > Signed-off-by: Dave Airlie > ---

Re: [Mesa-dev] [PATCH 1/3] ac/nir: mark some arguments const

This series is Reviewed-by: Bas Nieuwenhuizen On Wed, Jun 7, 2017 at 1:31 AM, Grazvydas Ignotas wrote: > Most functions are only inspecting nir, so nir related arguments can be > marked const. Some more can be done if/when some nir changes are >

Re: [Mesa-dev] [PATCH v2 1/1] radeonsi: Use libdrm to get chipset name

Reviewed-by: Marek Olšák Marek On Wed, Jun 7, 2017 at 12:21 AM, Samuel Li wrote: > v2: Add a func pointer to radeon_winsys to support radeon later. > > Change-Id: I614ea71424f9e5c97e4ae68654315d28c89eaa5f > Signed-off-by: Samuel Li >

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