Re: [Mesa-dev] [PATCH] i965 : Performance Improvement

On Thursday, July 13, 2017 9:49:40 PM PDT Marathe, Yogesh wrote: > Kenneth, > > > -Original Message- > > From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf > > Of Kenneth Graunke > > Sent: Friday, July 14, 2017 10:05 AM > > To: mesa-dev@lists.freedesktop.org > > Cc:

Re: [Mesa-dev] [PATCH 2/3] nv20: Fix GL_CLAMP

On 07/13/2017 06:50 PM, Ilia Mirkin wrote: > According to rnndb, GL_CLAMP with value 0x5 is actually supported on > nv10+. I'd name the function *_nv10. > > I have, at various times, tried to solve some issues by using the 0x5 > clamp on my nv1x hardware (nv17 and nv18), with no positive effect.

Re: [Mesa-dev] [PATCH] i965 : Performance Improvement

On 07/13/2017 09:35 PM, Kenneth Graunke wrote: > On Thursday, July 13, 2017 9:09:09 PM PDT aravindan.muthuku...@intel.com > wrote: >> From: Aravindan M > > The commit title should be something like, "i965: Optimize atom state > flag checks" rather than a generic

Re: [Mesa-dev] XCOM: Enemy Unknown vs. NaN texture unit LOD bias

On Thursday, July 13, 2017 4:23:14 PM PDT Ian Romanick wrote: > On 07/10/2017 11:25 PM, Kenneth Graunke wrote: > > Hello, > > > > Mesa master has been hitting assert failures when running "XCOM: Enemy > > Unknown" since commit f8d69beed49c64f883bb8ffb28d4960306baf575, where we > > started

[Mesa-dev] [RFC v2 09/23] anv/image: Refactor how tiling is chosen

From: Chad Versace The code that chooses the image's tiling flags, extract it into a new function, choose_isl_tiling_flags(). This reduces the diff in future patches for the upcoming dma_buf-import extension, in which the the tiling code will become more complex. ---

[Mesa-dev] [RFC v2 21/23] RFC: anv: Drop unneeded struct anv_image_create_info

From: Chad Versace Now that anv_image_create() is gone, there is no need for struct anv_image_create_info. The struct just adds an unused layer of indirection. --- src/intel/vulkan/anv_image.c | 38 +++---

[Mesa-dev] [RFC v2 17/23] RFC: anv: Implement VK_MESAX_external_image_dma_buf

From: Chad Versace For now, we support dma_buf images for only a single format, VK_FORMAT_R8G8B8A8_UNORM. And the image must be a "simple" image: 2D, single-sample, non-mipmappped, non-array, non-cube. --- src/intel/vulkan/anv_device.c | 4 +

[Mesa-dev] [RFC v2 19/23] RFC: anv/wsi: Use VK_MESAX_external_image_dma_buf

From: Chad Versace When creating a VkSurface for X11, we created the underlying VkImage by calling anv_image_create() and passing driver-private info to it. We can now accomplish the same thing without driver-private info, using VK_MESAX_external_image_dma_buf. In

[Mesa-dev] [RFC v2 13/23] anv: Set anv_surface::offset earlier

From: Chad Versace Set anv_surface::offset *before* calling add_surface(). No intended change in behavior. This patch prepares for supporting user-provided surface offsets, a feature required for VK_MESAX_external_image_dma_buf. --- src/intel/vulkan/anv_image.c | 15

[Mesa-dev] [RFC v2 16/23] RFC: anv: Implement VK_MESAX_external_memory_dma_buf

From: Chad Versace For now, we support dma_bufs only for VkBuffers. The VK_MESAX_external_memory_dma_buf spec allows us to support dma_buf VkImages, but we choose to defer that support until VK_MESAX_external_image_dma_buf. --- src/intel/vulkan/anv_device.c

[Mesa-dev] [RFC v2 15/23] RFC: anv: Implement VK_EXT_get_image_properties

From: Chad Versace --- src/intel/vulkan/anv_entrypoints_gen.py | 1 + src/intel/vulkan/anv_image.c| 13 + 2 files changed, 14 insertions(+) diff --git a/src/intel/vulkan/anv_entrypoints_gen.py b/src/intel/vulkan/anv_entrypoints_gen.py index

[Mesa-dev] [RFC v2 22/23] RFC: vulkan/wsi: Add modifiers to WSI image creation

From: Daniel Stone Allow the WSI to provide a set of modifiers to be used along with the format. For now, no winsys provides any modifier support. Add a fallback to the previous default (X-tiling) inside ANV. RADV remains somewhat broken in the presence of a winsys which

[Mesa-dev] [RFC v2 23/23] RFC: vulkan/wsi: Add support for DRI3 v1.1

From: Daniel Stone Adds support for multiple planes and buffer modifiers. --- src/intel/vulkan/anv_wsi.c | 7 +- src/vulkan/wsi/wsi_common_x11.c | 137 2 files changed, 131 insertions(+), 13 deletions(-) diff --git

[Mesa-dev] [RFC v2 20/23] RFC: anv: Drop unused anv_image_create()

From: Chad Versace --- src/intel/vulkan/anv_image.c | 26 ++ src/intel/vulkan/anv_private.h | 5 - 2 files changed, 6 insertions(+), 25 deletions(-) diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c index

[Mesa-dev] [RFC v2 18/23] RFC: anv: Drop vkCreateDmaBufImageINTEL()

From: Chad Versace This "extension" function predates Vulkan 1.0 and Vulkan WSI. We created it during the early days of bringing up the Vulkan driver. We used it for testing the early driver because, in those early days, there was no other way to import/export a tiled

[Mesa-dev] [RFC v2 14/23] RFC: vulkan: Update registry for MESAX dma_buf extensions

From: Chad Versace Update vulkan.h and vk.xml from [1]: git://github.com/chadversary/vulkan-spec refs/tags/chadv/test/2017-03-06-VK_MESAX_external This pulls in the following extensions: - VK_EXT_get_image_properties - VK_MESAX_external_memory_dma_buf -

[Mesa-dev] [RFC v2 12/23] anv: Handle failure in make_hiz_surface_maybe()

From: Chad Versace make_ccs_surface_maybe() correctly handles failure isl_surf_get_ccs_surf(). When it fails, the resultant VkImage is still valid, just without a ccs surface. Same of make_mcs_surface_maybe() and isl_surf_get_mcs_surf(). Fix make_hiz_surface_maybe()

[Mesa-dev] [RFC v2 11/23] anv/image: Refactor creation of aux surfaces

From: Chad Versace Creation of hiz, ccs, and mcs surfaces was encoded by a giant 'if' tree at the tail of make_surface(). This patch extracts that 'if' tree into the new functions: make_hiz_surface_maybe() make_ccs_surface_maybe() make_mcs_surface_maybe()

[Mesa-dev] [RFC v2 10/23] anv/image: Fix return type of make_surface()

From: Chad Versace make_surface() always returns VK_SUCCESS, so change its return type to 'void'. This simplifies the return-code handling in anv_image_create_info() and removes a goto. --- src/intel/vulkan/anv_image.c | 15 ++- 1 file changed, 2

[Mesa-dev] [RFC v2 04/23] intel/isl: Add ISL <-> GEM tiling conversion

From: Daniel Stone Add a simple conversion from ISL tiling to GEM BO tiling flags, and use that instead of hardcoding I915_TILING_X in the ANV WSI. Signed-off-by: Daniel Stone --- src/intel/isl/isl.c| 28

[Mesa-dev] [RFC v2 08/23] anv/image: Better var names in vkCreateImage

From: Chad Versace - Rename the anv_image_create_info vars from 'create_info' to 'anv_info'. - Rename the VkImageCreateInfo vars from 'pCreateInfo' and 'vk_info' to 'base_info'. This reduces the diff and eliminates ambiguity in follow-up patches for upcoming

[Mesa-dev] [RFC v2 00/23] DRI3 v1.1, ANV dmabuf

Hi, Please see the previous submission email for context: https://lists.freedesktop.org/archives/mesa-dev/2017-June/158457.html This version mainly fixes small issues with the DRI3 v1.1 patches as suggested by Emil Velikov and Matt Turner. -- Louis-Francis Chad Versace (18): intel/isl: Add

[Mesa-dev] [RFC v2 05/23] isl: Add isl_surf_get_drm_format_mod()

From: Chad Versace --- src/intel/isl/isl.c | 35 +++ src/intel/isl/isl.h | 15 +++ 2 files changed, 50 insertions(+) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 19aa2bac33..a8a074719f 100644 ---

[Mesa-dev] [RFC v2 03/23] intel/isl: Add ISL <-> DRM modifier conversion

From: Chad Versace It converts a DRM format modifier to and from enum isl_tiling and aux_usage. That's all. --- src/intel/Makefile.isl.am | 1 + src/intel/isl/isl.c | 59 +++ src/intel/isl/isl.h | 16

[Mesa-dev] [RFC v2 06/23] anv: Add func anv_get_raw_format()

From: Chad Versace Like anv_get_format(), but the returned format is not adjusted, not even for the aspect. Add anv_get_raw_isl_format() too, to match anv_get_isl_format(). --- src/intel/vulkan/anv_formats.c | 7 +++ src/intel/vulkan/anv_private.h | 8 2

[Mesa-dev] [RFC v2 07/23] anv: Annotate anv_get_*format() as pure

From: Chad Versace --- src/intel/vulkan/anv_private.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 88bda9a9d6..0e9fd26348 100644 --- a/src/intel/vulkan/anv_private.h +++

[Mesa-dev] [RFC v2 01/23] dri3: Move up fourcc utility function

It will be needed in next patches. Signed-off-by: Louis-Francis Ratté-Boulianne --- src/loader/loader_dri3_helper.c | 42 - 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/src/loader/loader_dri3_helper.c

[Mesa-dev] [RFC v2 02/23] RFC: egl/x11: Support DRI3 v1.1

Add support for DRI3 v1.1, which allows pixmaps to be backed by multi-planar buffers, or those with format modifiers. This is both for allocating render buffers, as well as EGLImage imports from a native pixmap (EGL_NATIVE_PIXMAP_KHR). Signed-off-by: Louis-Francis Ratté-Boulianne

Re: [Mesa-dev] [PATCH] i965 : Performance Improvement

Kenneth, > -Original Message- > From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf > Of Kenneth Graunke > Sent: Friday, July 14, 2017 10:05 AM > To: mesa-dev@lists.freedesktop.org > Cc: Muthukumar, Aravindan > Subject: Re: [Mesa-dev]

[Mesa-dev] [PATCH 2/2] util: Make CLAMP turn NaN into MIN.

The previous implementation of CLAMP() allowed NaN to pass through unscathed, by failing both comparisons. NaN isn't exactly a value between MIN and MAX, which can break the assumptions of many callers. This patch changes CLAMP to convert NaN to MIN, arbitrarily. Callers that need NaN to be

[Mesa-dev] [PATCH 1/2] meta: Actually initialize ImmutableLevels to 1.

Otherwise, ImmutableLevels is 0, which is an illegal value. Later, _mesa_meta_setup_sampler will use _mesa_texture_parameteriv to set texObj->MaxLevel = CLAMP(params[0], texObj->BaseLevel, texObj->ImmutableLevels - 1); which turns into a completely bogus

[Mesa-dev] [PATCH] i965 : Performance Improvement

From: Aravindan M This patch improves CPI Rate(Cycles per Instruction) and CPU time utilization for i965. The functions check_state and brw_pipeline_state_finished was found poor CPU utilization from performance analysis. Change-Id:

Re: [Mesa-dev] [PATCH] i965 : Performance Improvement

On Thursday, July 13, 2017 9:09:09 PM PDT aravindan.muthuku...@intel.com wrote: > From: Aravindan M The commit title should be something like, "i965: Optimize atom state flag checks" rather than a generic "Performance Improvement" > This patch improves CPI

[Mesa-dev] [PATCH] i965 : Performance Improvement

From: Aravindan M This patch improves CPI Rate(Cycles per Instruction) and CPU time utilization for i965. The functions check_state and brw_pipeline_state_finished was found poor CPU utilization from performance analysis. Change-Id:

[Mesa-dev] [Bug 101775] Xorg segfault since 147d7fb "st/mesa: add a winsys buffers list in st_context"

https://bugs.freedesktop.org/show_bug.cgi?id=101775 Michel Dänzer changed: What|Removed |Added Status|NEW |RESOLVED

Re: [Mesa-dev] [PATCH 1/8] spirv: Import the latest 1.0.2 header from Khronos

On 07/13/2017 06:57 PM, Jason Ekstrand wrote: > On Thu, Jul 13, 2017 at 6:38 PM, Ian Romanick > wrote: > > Shouldn't this also update capability_to_string in spriv_info.c? > > > Yes, probably. > > > I'm > also questioning

Re: [Mesa-dev] [PATCH 1/8] spirv: Import the latest 1.0.2 header from Khronos

On Thu, Jul 13, 2017 at 6:38 PM, Ian Romanick wrote: > Shouldn't this also update capability_to_string in spriv_info.c? Yes, probably. > I'm > also questioning that implementation... there are huge blocks in that > array (e.g., all the elements from 61 to 4322) that

Re: [Mesa-dev] [PATCH 2/3] nv20: Fix GL_CLAMP

According to rnndb, GL_CLAMP with value 0x5 is actually supported on nv10+. I'd name the function *_nv10. I have, at various times, tried to solve some issues by using the 0x5 clamp on my nv1x hardware (nv17 and nv18), with no positive effect. This is a piglit run I have around from some time

Re: [Mesa-dev] [PATCH 1/8] spirv: Import the latest 1.0.2 header from Khronos

Shouldn't this also update capability_to_string in spriv_info.c? I'm also questioning that implementation... there are huge blocks in that array (e.g., all the elements from 61 to 4322) that are zeroed out by the initialization. This will cause spirv_capability_to_string() to happily return NULL

Re: [Mesa-dev] [PATCH 3/4] i965: Use async maps for BufferSubData to regions with no valid data.

Quoting Chris Wilson (2017-06-13 12:57:05) > Quoting Kenneth Graunke (2017-06-13 01:33:31) > > When writing a region of a buffer via glBufferSubData(), we can write > > the data asynchronously if the destination doesn't contain any data. > > Even if it's busy, the data was undefined, so the new

Re: [Mesa-dev] XCOM: Enemy Unknown vs. NaN texture unit LOD bias

On 07/10/2017 11:25 PM, Kenneth Graunke wrote: > Hello, > > Mesa master has been hitting assert failures when running "XCOM: Enemy > Unknown" since commit f8d69beed49c64f883bb8ffb28d4960306baf575, where we > started asserting that the SAMPLER_STATE LOD Bias value actually fits in > the correct

Re: [Mesa-dev] [PATCH 4/4] i965: Orphan storage in MapBufferRange if invalidating all valid data.

On Thursday, July 13, 2017 3:04:59 PM PDT Jason Ekstrand wrote: > Do you have any data on how much this helps? Regardless, the series is > > Reviewed-by: Jason Ekstrand Thanks! It turns out that, no, I don't have any data on this patch. I'd originally found it helpful,

[Mesa-dev] [PATCH 0/8] anv: Implement VK_KHR_external_semaphore

This series adds back in the VK_KHR_external_semaphore extensions and re-ups my userspace patches to use the new kernel API I proposed on top of DRM syncobj. For the KHR version, I'd like to wait on advertising the extension until the syncobj kernel bits land. That way we never have to worry

[Mesa-dev] [PATCH 5/8] intel/drm: Pull in the i916 fence array API

--- include/drm-uapi/i915_drm.h | 30 -- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h index c26bf7c..338c8c2 100644 --- a/include/drm-uapi/i915_drm.h +++ b/include/drm-uapi/i915_drm.h @@ -431,6

[Mesa-dev] [PATCH 7/8] anv: Use DRM sync objects for external semaphores when available

--- src/intel/vulkan/anv_batch_chain.c | 56 +++ src/intel/vulkan/anv_device.c | 1 + src/intel/vulkan/anv_private.h | 8 src/intel/vulkan/anv_queue.c | 93 -- 4 files changed, 134 insertions(+), 24 deletions(-) diff

[Mesa-dev] [PATCH 2/8] anv: Submit a dummy batch when only semaphores are provided.

Vulkan allows you to do a submit whose only job is to wait on and trigger semaphores. The easiest way for us to support that right now is to insert a dummy execbuf. --- src/intel/vulkan/anv_batch_chain.c | 28 +--- src/intel/vulkan/anv_device.c | 26

[Mesa-dev] [PATCH 8/8] anv: Advertise VK_KHR_external_semaphore

--- src/intel/vulkan/anv_device.c | 12 1 file changed, 12 insertions(+) diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index fe464e0..712cc7f 100644 --- a/src/intel/vulkan/anv_device.c +++ b/src/intel/vulkan/anv_device.c @@ -414,6 +414,10 @@ static const

[Mesa-dev] [PATCH 3/8] anv/gem: Use EXECBUFFER2_WR when the FENCE_OUT flag is set

Reviewed-by: Chad Versace --- src/intel/vulkan/anv_gem.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_gem.c b/src/intel/vulkan/anv_gem.c index ac47da4..36692f5 100644 --- a/src/intel/vulkan/anv_gem.c +++

[Mesa-dev] [PATCH 6/8] anv/gem: Add a drm syncobj support

--- src/intel/vulkan/anv_gem.c | 52 src/intel/vulkan/anv_gem_stubs.c | 24 +++ src/intel/vulkan/anv_private.h | 4 3 files changed, 80 insertions(+) diff --git a/src/intel/vulkan/anv_gem.c b/src/intel/vulkan/anv_gem.c index

[Mesa-dev] [PATCH 4/8] anv: Implement support for exporting semaphores as FENCE_FD

--- src/intel/vulkan/anv_batch_chain.c | 68 -- src/intel/vulkan/anv_device.c | 1 + src/intel/vulkan/anv_gem.c | 36 src/intel/vulkan/anv_private.h | 23 + src/intel/vulkan/anv_queue.c | 56

[Mesa-dev] [PATCH 1/8] anv: Add a basic implementation of VK_KHX_external_semaphore

This patch adds an implementation based on DRM BOs. We don't actually advertise the extension yet because we want to add a couple more paths first. --- src/intel/vulkan/anv_entrypoints_gen.py | 6 ++ src/intel/vulkan/anv_queue.c| 116 ++-- 2 files

[Mesa-dev] [PATCH] ac/nir: rewrite shared variable handling (v2)

From: Connor Abbott Translate the NIR variables directly to LLVM instead of lowering to a TGSI-style giant array of vec4's and then back to a variable. This should fix indirect dereferences, make shared variables more tightly packed, and make LLVM's alias analysis more

Re: [Mesa-dev] [PATCH 4/4] i965: Orphan storage in MapBufferRange if invalidating all valid data.

Do you have any data on how much this helps? Regardless, the series is Reviewed-by: Jason Ekstrand On Mon, Jun 12, 2017 at 5:33 PM, Kenneth Graunke wrote: > We can promote INVALIDATE_RANGE_BIT to INVALIDATE_BUFFER_BIT if the > range contains the

[Mesa-dev] [PATCH] st/va: Fix scaling list ordering for H.265

Mesa here requires the scaling lists in diagonal scan order, but VAAPI passes them in raster scan order. Therefore, rearrange the elements when copying. (This ordering was likely inherited from VDPAU, which does pass them in diagonal scan order.) Signed-off-by: Mark Thompson

[Mesa-dev] [PATCH] gallium/u_blitter: don't use TXF for scaled blits

From: Marek Olšák There seems to be a rounding difference with F2I vs nearest filtering. The precise problem in the rounding is unknown. This fixes an incorrect output with OpenMAX encoding. --- src/gallium/auxiliary/util/u_blitter.c | 10 ++ 1 file changed, 6

[Mesa-dev] [PATCH 1/8] spirv: Import the latest 1.0.2 header from Khronos

--- src/compiler/spirv/spirv.h | 41 + 1 file changed, 37 insertions(+), 4 deletions(-) diff --git a/src/compiler/spirv/spirv.h b/src/compiler/spirv/spirv.h index 89354c0..61559a1 100644 --- a/src/compiler/spirv/spirv.h +++ b/src/compiler/spirv/spirv.h @@

[Mesa-dev] [PATCH 3/8] spirv/nir: Add some useful asserts for type decorations

Now that vtn_type has piles of unions, we should assert sanity before setting fields that may stomp others. --- src/compiler/spirv/spirv_to_nir.c | 4 1 file changed, 4 insertions(+) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index 763dbf4..89ebc5f

[Mesa-dev] [PATCH 2/8] spirv: Add support for the StorageBuffer storage class

--- src/compiler/spirv/vtn_variables.c | 4 1 file changed, 4 insertions(+) diff --git a/src/compiler/spirv/vtn_variables.c b/src/compiler/spirv/vtn_variables.c index 5af27bf..4f21fdd 100644 --- a/src/compiler/spirv/vtn_variables.c +++ b/src/compiler/spirv/vtn_variables.c @@ -1405,6

[Mesa-dev] [PATCH 5/8] nir/spirv: Add a helper for pushing SSA values

--- src/compiler/spirv/spirv_to_nir.c | 5 +++-- src/compiler/spirv/vtn_cfg.c | 11 +-- src/compiler/spirv/vtn_private.h | 9 + src/compiler/spirv/vtn_variables.c | 5 +++-- 4 files changed, 20 insertions(+), 10 deletions(-) diff --git

[Mesa-dev] [PATCH 8/8] anv: Advertise support for VK_KHR_variable_pointers

We don't support the general version yet because that requires us to lower shared variables up-front in SPIR-V -> NIR. This shouldn't be a whole lot of work but it's not something we support today. --- src/intel/vulkan/anv_device.c | 11 +++

[Mesa-dev] [PATCH 6/8] nir/spirv: Add support for SPV_KHR_variable_pointers

--- src/compiler/spirv/nir_spirv.h | 1 + src/compiler/spirv/spirv_to_nir.c | 42 --- src/compiler/spirv/vtn_cfg.c | 5 +++-- src/compiler/spirv/vtn_private.h | 23 +-- src/compiler/spirv/vtn_variables.c | 45

[Mesa-dev] [PATCH 4/8] nir/spirv: Implement OpPtrAccessChain for buffers

--- src/compiler/spirv/spirv_to_nir.c | 4 +++- src/compiler/spirv/vtn_private.h | 11 --- src/compiler/spirv/vtn_variables.c | 23 +++ 3 files changed, 34 insertions(+), 4 deletions(-) diff --git a/src/compiler/spirv/spirv_to_nir.c

[Mesa-dev] [PATCH 7/8] anv: Advertise support for VK_KHR_storage_buffer_storage_class

--- src/intel/vulkan/anv_device.c | 4 src/intel/vulkan/anv_entrypoints_gen.py | 1 + 2 files changed, 5 insertions(+) diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index 6fc57cd..cc37f40 100644 --- a/src/intel/vulkan/anv_device.c +++

[Mesa-dev] [PATCH 0/8] anv, spirv: Implement VK_KHR_variable_pointers

This little series contains the SPIR-V and ANV bits for the new VK_KHR_variable_pointers extension and it's prerequisite extension VK_KHR_storage_buffer_storage_class. Cc: Connor Abbott Jason Ekstrand (8): spirv: Import the latest 1.0.2 header from Khronos spirv: Add

[Mesa-dev] [PATCH 7/8] anv: Implement VK_KHR_dedicated_allocation

We always recommend sub-allocation and don't do anything special for dedicated allocations. --- src/intel/vulkan/anv_device.c | 18 ++ src/intel/vulkan/anv_entrypoints_gen.py | 1 + 2 files changed, 19 insertions(+) diff --git a/src/intel/vulkan/anv_device.c

[Mesa-dev] [PATCH 4/8] vulkan: Update to the new 1.0.54 spec XML and headers

There is one small ANV change here because we used the VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX enum in the BO cache and that had to be updated to have the _KHR suffix. --- There's more to this patch but I dropped the XML and header update because they are highly uninteresting. The only interesting

[Mesa-dev] [PATCH 6/8] anv: Implement VK_KHR_get_memory_requirements2

--- src/intel/vulkan/anv_device.c | 47 + src/intel/vulkan/anv_entrypoints_gen.py | 1 + 2 files changed, 48 insertions(+) diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index e63742f..b374fac 100644 ---

[Mesa-dev] [PATCH 5/8] anv: Advertise version 1.0.54

--- src/intel/vulkan/anv_device.c | 2 +- src/intel/vulkan/dev_icd.json.in | 2 +- src/intel/vulkan/intel_icd.json.in | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index 3ee21a8..e63742f 100644 ---

[Mesa-dev] [PATCH 8/8] anv: Implement VK_KHR_external_memory_*

--- src/intel/vulkan/anv_device.c | 86 +++-- src/intel/vulkan/anv_entrypoints_gen.py | 3 ++ src/intel/vulkan/anv_formats.c | 79 ++ 3 files changed, 163 insertions(+), 5 deletions(-) diff --git

[Mesa-dev] [PATCH 1/8] anv: Drop support for VK_KHX_external_memory_*

These have been formally deprecated by Khronos never to be shipped again. The KHR versions should be implemented/used instead. --- src/intel/vulkan/anv_device.c | 84 ++--- src/intel/vulkan/anv_entrypoints_gen.py | 3 -- src/intel/vulkan/anv_formats.c

[Mesa-dev] [PATCH 3/8] radv: Drop support for VK_KHX_external_memory_*

These have been formally deprecated by Khronos never to be shipped again. The KHR versions should be implemented/used instead. --- src/amd/vulkan/radv_device.c | 68 +--- src/amd/vulkan/radv_entrypoints_gen.py | 3 - src/amd/vulkan/radv_formats.c | 112

[Mesa-dev] [PATCH 2/8] anv: Drop support for VK_KHX_external_semaphore_*

These have been formally deprecated by Khronos never to be shipped again. The KHR versions should be implemented/used instead. --- src/intel/vulkan/anv_device.c | 12 src/intel/vulkan/anv_entrypoints_gen.py | 3 - src/intel/vulkan/anv_queue.c| 115

[Mesa-dev] [PATCH 0/8] vulkan: Update to 1.0.54

This little series updates us to the 1.0.54 headers and XML. The major change here is that 1.0.54 dropped the VK_KHX_external* extensions and replaced them with VK_KHR variants. The first three patches drop support for the KHX versions from anv and radv and the last 3 implement the KHR version

Re: [Mesa-dev] [PATCH 0/8] compiler: Add a new gl_image_format enum and use it

On Thu, Jul 13, 2017 at 9:57 AM, Eric Anholt wrote: > Jason Ekstrand writes: > > > I know what you're all thinking: Why are we adding yet another format > > enum? I asked myself the same question. Really, I've spent enough of my > > life writing format

Re: [Mesa-dev] [PATCH 1/2] intel/decoder: Reuse the MAX2 macro instead of defining another one.

This series is : Reviewed-by: Lionel Landwerlin Thanks! On 13/07/17 19:37, Eric Anholt wrote: --- src/intel/common/gen_decoder.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/intel/common/gen_decoder.c

[Mesa-dev] [PATCH] egl: propagate EGL_BAD_ATTRIBUTE during EGLImage attr parsing

From: Emil Velikov Earlier commit refactored/split the parsing into separate hunks. While no functional change was intended, it did not attribute that different error is set when the attrib. value is incorrect. Fixes: 3ee2be4113d ("egl: split

[Mesa-dev] [PATCH 1/2] intel/decoder: Reuse the MAX2 macro instead of defining another one.

--- src/intel/common/gen_decoder.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c index ba3a5139aec6..60591ad666bf 100644 --- a/src/intel/common/gen_decoder.c +++ b/src/intel/common/gen_decoder.c @@ -39,8

[Mesa-dev] [PATCH 2/2] intel/decoder: Reuse the gen_make_gen() helper.

--- src/intel/common/gen_decoder.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c index 60591ad666bf..85880143f00e 100644 --- a/src/intel/common/gen_decoder.c +++ b/src/intel/common/gen_decoder.c @@ -39,8

Re: [Mesa-dev] [PATCH 03/10] egl: split _eglParseImageAttribList into per extension functions

On 13 July 2017 at 08:48, Michel Dänzer wrote: > On 30/06/17 08:15 PM, Emil Velikov wrote: >> Will allow us to simplify existing code and make further improvements >> short and simple. >> >> No functional change intended. > > Famous last words. :) > Unfortunately. > This

[Mesa-dev] [Bug 100708] Trine 2 doesn't start on radeonsi on mesa 17

https://bugs.freedesktop.org/show_bug.cgi?id=100708 --- Comment #9 from Kamil Páral --- I can confirm this problem with Radeon 270. I've seen this error: XIO: fatal IO error 11 (Resource temporarily unavailable) on X server ":0" after 178 requests (178 known

Re: [Mesa-dev] [PATCH 0/9] intel: coverity round of fixes

On Thu, Jul 13, 2017 at 10:08 AM, Lionel Landwerlin wrote: > Hi all, > > Here are some fixes for coverity issues. > > Cheers, > > Lionel Landwerlin (9): > isl: use 64bit arithmetic to compute size > intel/compiler: remove check unsigned is >= 0 > i965:

Re: [Mesa-dev] [PATCH] st/mesa: handle stfbi being NULL on entry of st_framebuffer_reuse_or_create

Reviewed-by: Charmaine Lee From: Lucas Stach Sent: Thursday, July 13, 2017 10:01 AM To: mesa-dev@lists.freedesktop.org Cc: Charmaine Lee; Brian Paul Subject: [PATCH] st/mesa: handle stfbi being NULL on entry

[Mesa-dev] [PATCH 8/9] anv: don't use strcpy for copying strings

CID: 1358935 Signed-off-by: Lionel Landwerlin --- src/intel/vulkan/anv_device.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index 39c907e9f2d..d3607deccfc 100644 ---

[Mesa-dev] [PATCH 5/9] intel/compiler: don't check unsigned is >= 0

CID: 1224468 Signed-off-by: Lionel Landwerlin --- src/intel/compiler/brw_vec4_gs_visitor.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_vec4_gs_visitor.cpp b/src/intel/compiler/brw_vec4_gs_visitor.cpp index

[Mesa-dev] [PATCH 7/9] intel/compiler: no need to check unsigned is >= 0

CID: 1338342 Signed-off-by: Lionel Landwerlin --- src/intel/compiler/brw_fs_nir.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index a9dce42c38d..aea2c625630 100644 ---

[Mesa-dev] [PATCH 9/9] aubinator: don't leak fd of opened aubfile

CID: 1373563 Signed-off-by: Lionel Landwerlin --- src/intel/tools/aubinator.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c index 6c9a8f052c2..48d4456cc16 100644 --- a/src/intel/tools/aubinator.c +++

[Mesa-dev] [PATCH 3/9] i965: map_gtt: check mapping address before adding offset

The NULL check might fail if offset isn't 0. CID: 971379 Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] [PATCH 6/9] i965: fix missing NULL return if allocation fails

CID: 1250585 Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/intel_buffer_objects.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c b/src/mesa/drivers/dri/i965/intel_buffer_objects.c index

[Mesa-dev] [PATCH 4/9] i965: check pointer before dereferencing it

Check that irb isn't NULL before accessing irb->Base.Base.NumSamples. CID: 1026046 Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/intel_tex_copy.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git

[Mesa-dev] [PATCH 1/9] isl: use 64bit arithmetic to compute size

If we allow the size to be more than 2^32, then we should compute it in 64bit arithmetic otherwise we might run into overflow issues. CID: 1412892, 1412891 Signed-off-by: Lionel Landwerlin --- src/intel/isl/isl.c | 4 ++-- 1 file changed, 2 insertions(+), 2

[Mesa-dev] [PATCH 2/9] intel/compiler: remove check unsigned is >= 0

By definition unsigned are always >= 0. CID: 742212 Signed-off-by: Lionel Landwerlin --- src/intel/compiler/brw_eu_emit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index

[Mesa-dev] [PATCH 0/9] intel: coverity round of fixes

Hi all, Here are some fixes for coverity issues. Cheers, Lionel Landwerlin (9): isl: use 64bit arithmetic to compute size intel/compiler: remove check unsigned is >= 0 i965: map_gtt: check mapping address before adding offset i965: check pointer before dereferencing it intel/compiler:

[Mesa-dev] [PATCH] st/mesa: handle stfbi being NULL on entry of st_framebuffer_reuse_or_create

Apparently this can happen. Just bail out early in that case, as all the called functions return NULL in that case. Fixes weston-terminal for me. Fixes: 147d7fb772a7 ("st/mesa: add a winsys buffers list in st_context") Signed-off-by: Lucas Stach ---

Re: [Mesa-dev] [PATCH 0/8] compiler: Add a new gl_image_format enum and use it

Jason Ekstrand writes: > I know what you're all thinking: Why are we adding yet another format > enum? I asked myself the same question. Really, I've spent enough of my > life writing format enum conversion tables that I should know better. > > It all started as an

Re: [Mesa-dev] [PATCH] st/mesa: add a winsys buffers list in st_context

OK, thanks, I missed that. Brian Paul wrote: A patch to fix this was already posted and reviewed. I'll push it soon since I think Michel is off-line this time of day. -Brian On 07/13/2017 09:17 AM, Andy Furniss wrote: This breaks startx on radeonsi for me on a R9 285. [ 5297.130] (II)

Re: [Mesa-dev] [PATCH] anv/pipeline: use BITFIELD64_BIT() to check enable vertex inputs

On Thu, Jul 13, 2017 at 7:48 AM, Juan A. Suarez Romero wrote: > When initializing the ANV pipeline, one of the tasks is checking which > vertex inputs are enabled. This is done by checking if the enabled bits > in inputs_read. > > But the mask to use is computed doing `(1 <<

Re: [Mesa-dev] [PATCH v2 05/11] gbm: Pull out FourCC <-> DRIimage format table

On July 13, 2017 9:03:01 AM Daniel Stone wrote: Hi, On 13 July 2017 at 16:59, Jason Ekstrand wrote: On July 13, 2017 4:13:17 AM Daniel Stone wrote: + /* The two GBM_BO_FORMAT_[XA]RGB formats alias the GBM_FORMAT_* +

Re: [Mesa-dev] [PATCH v2 11/11] egl/wayland: Use linux-dmabuf interface for buffers

On July 13, 2017 4:13:04 AM Daniel Stone wrote: When available, use the zwp_linux_dambuf_v1 interface to create buffers, which allows multiple planes and buffer modifiers to be used. Signed-off-by: Daniel Stone --- configure.ac

Re: [Mesa-dev] [PATCH v2 10/11] egl/wayland: Remove duplicate wl_buffer creation code

Hi, Apologies if the mobile client mangles formatting. I've heard this new version is better, so let's see if it's really true. On Thu, 13 Jul 2017 at 5:20 pm, Jason Ekstrand wrote: > On July 13, 2017 4:13:53 AM Daniel Stone wrote: > > @@ -650,21

Re: [Mesa-dev] [PATCH v2 01/11] util: Remove u_math from u_vector

On Thursday, 2017-07-13 15:38:11 +0200, Lucas Stach wrote: > Am Donnerstag, den 13.07.2017, 12:12 +0100 schrieb Daniel Stone: > > u_vector.h doesn't actually use anything from u_math, but it does mean > > everyone has to pull in src/gallium/auxiliary/util includes. > > > > Just remove it, adding

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