On Thursday, October 12, 2017 10:56:57 PM PDT Jason Ekstrand wrote:
> This was a leftover from i915. The one caller in i965 always passes in
> false so there's no point in having the parameter.
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 17 +
> src/mesa/drivers/dri/i
fast_clear_op is leftover from the meta-fast-clear days.
No idea what the other thing was for, but it isn't used now.
---
src/mesa/drivers/dri/i965/brw_context.h | 3 ---
src/mesa/drivers/dri/i965/genX_state_upload.c | 1 -
2 files changed, 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i
This really makes more sense in the intel_batchbuffer struct.
---
src/mesa/drivers/dri/i965/brw_compute.c | 4 ++--
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/brw_draw.c | 4 ++--
src/mesa/drivers/dri/i965/genX_blorp_exec.c | 4 ++--
src/me
https://bugs.freedesktop.org/show_bug.cgi?id=103253
Bug ID: 103253
Summary: blob.h:138:1: error: unknown type name 'ssize_t'
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Mac OS X (All)
Status: NEW
Quoting Kenneth Graunke (2017-10-13 08:38:15)
> This really makes more sense in the intel_batchbuffer struct.
Reviewed-by: Chris Wilson
-Chris
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-de
Quoting Kenneth Graunke (2017-10-13 08:38:14)
> fast_clear_op is leftover from the meta-fast-clear days.
> No idea what the other thing was for, but it isn't used now.
Simply mechanics so no great insight required, I hope,
Reviewed-by: Chris Wilson
-Chris
_
When we have up to 16 FS inputs, the SF unit will reorder our inputs
to be consecutive, however, when we have more than 16 we need to
to read our inputs from the URB exactly as they have been
output from the previous stage. This means that for SSO we have to
consider if we have URB padding due to u
Technically only for Sandybridge and later core designs, but finally we
can claim support for allowing clients to create glBufferObjects from
their own memory.
---
docs/relnotes/17.3.0.html | 1 +
1 file changed, 1 insertion(+)
diff --git a/docs/relnotes/17.3.0.html b/docs/relnotes/17.3.0.html
in
Since v3.16 (though universal access was only enabled by default in v4.6),
the kernel has offered the ability to wrap any system memory (i.e. RAM
and not I/O mapped memory) into an object that can be used by the GPU. The
caveat is that this object is marked as cache coherent (so that the client
can
We know that we will only ever need to lookup an external handle and so
can defer adding a bo to the external ht until it is ever exported or
imported, keeping that hashtable compact.
Cc: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_bufmgr.c | 36 +++---
1 file c
All GEN GPU can bind to any piece of memory (thanks UMA), and so through
a special ioctl we can map a chunk of page-aligned client memory into
the GPU address space. However, not all GEN are equal. Some have
cache-coherency between the CPU and the GPU, whilst the others are
incoherent and rely on s
The primary benefit for this is that we get format conversion for
"free", along with detiling and cache flushing (most relevant for !llc).
Using the GPU does impose a bandwidth cost that is presumably better
used for rendering, hence we limit the use to readback into client
memory (not pbo) where w
Recent kernels do exclude snoop access for i965g/i965gm as it does not
work as advertised. However to avoid depending on a recent kernel for
old hardware, mark the presence of the bug in gen_device_info.
See kernel commit df0700e53047662c167836bd6fdeea55d5d8dcfa
Author: Chris Wilson
Date: Wed S
On 12 October 2017 at 19:13, Nicolai Hähnle wrote:
> On 12.10.2017 19:05, Emil Velikov wrote:
>>
>> On 10 October 2017 at 13:11, Nicolai Hähnle wrote:
>>>
>>> From: Nicolai Hähnle
>>>
>>> Replace the undefined destination by a new temporary register.
>>>
>>> Cleanup merge_two_dsts while we're at
SSIZE_T is included on the headers. We include it in most
places, but not necessary all. It brings a lot of baggage, so I don't
recommend including it just for a ssize_t defitinion.
Instead I'd recommend replacing ssize_t in our code with plain standard
intptr_t.
If you really rather use
Per https://bugs.freedesktop.org/show_bug.cgi?id=103253 it's not just
MSVC. So I'd really recommend sticking to one of the standard C types:
intptr_t or int64_t.
Jose
On 13/10/17 10:41, Jose Fonseca wrote:
SSIZE_T is included on the headers. We include it in most
places, but not necessary
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
This commit fixes two issues: First, we were returning false regardless
of whether or not the function made progress. Second, we were calling
nir_metadata_preserve far more often than needed; we only need to call
it once
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
---
src/intel/vulkan/anv_pipeline.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 7bfdb5c..e08bdd9 100644
--- a/src/intel/vul
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
We already handle it in brw_preprocess_nir
---
src/intel/vulkan/anv_pipeline.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index e08bdd9..9645d68
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
We currently have a bug where nir_lower_system_values gets called before
nir_lower_var_copies so it will miss any system value uses which come
from a copy_var intrinsic. Moving it to after brw_preprocess_nir fixes
this pro
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
---
src/compiler/nir/nir_lower_wpos_ytransform.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/compiler/nir/nir_lower_wpos_ytransform.c
b/src/compiler/nir/nir_lower_wpos_ytransform.c
index 771c6ff..425e4b8
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
---
src/intel/compiler/brw_nir.c| 2 ++
src/intel/vulkan/anv_pipeline.c | 2 --
src/mesa/drivers/dri/i965/brw_program.c | 2 --
3 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/int
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
We want this to get called before nir_lower_subgroups which is going in
brw_preprocess_nir. Now that nir_lower_wpos_ytransform can handle
system values, this should be safe to do.
---
src/mesa/drivers/dri/i965/brw_progra
On 13/10/17 06:48, Jason Ekstrand wrote:
This commit pulls nir_lower_read_invocations_to_scalar along with most
of the guts of nir_opt_intrinsics (which mostly does subgroup lowering)
into a new nir_lower_subgroups pass. There are various other bits of
subgroup lowering that we're going to want
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
This would be useful a number of places
---
src/compiler/nir/nir.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 1154c42..17efc9b 100644
--- a/src/comp
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
This way they can return either a uvec4 or a uint64_t. At the moment,
this is a no-op since we still always return a uint64_t.
---
src/compiler/glsl/glsl_to_nir.cpp | 1 +
src/compiler/nir/nir_intrinsics.h
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
Ballot intrinsics return a bitfield of subgroups. In GLSL and some
SPIR-V extensions, they return a uint64_t. In SPV_KHR_shader_ballot,
they return a uvec4. Also, some back-ends would rather pass around
32-bit values bec
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
The SUBGROUP_*_MASK system values are uint64_t when coming in from GLSL
but uvec4 when coming in from SPIR-V. Lowering based on type allows us
to nicely handle both.
---
src/compiler/nir/nir_lower_system_values.c | 5 +++
Acked-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
The GL_ARB_shader_ballot spec says that gl_SubGroupSizeARB is declared
as a uniform. This means that it cannot change across an invocation
such as a draw call or a compute dispatch. For compute shaders, we're
ok because we o
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
---
src/compiler/spirv/vtn_private.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/compiler/spirv/vtn_private.h b/src/compiler/spirv/vtn_private.h
index 8458462..e7a7c36 100644
--- a/src/compiler/spirv/vt
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
Our previous handling of barriers always used the big hammer and didn't
correctly emit memory barriers when specified along with a control
barrier. This commit completely reworks the way we emit barriers to
make things bot
Acked-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
We were already validating that the parent type goes along with the
child type but we weren't actually validating that the parent type is
reasonable. This fixes that.
---
src/compiler/nir/nir_validate.c | 18 +++
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:48, Jason Ekstrand wrote:
Most of NIR doesn't allow doing array indexing on a vector (though it
does on a matrix). However, nir_lower_io handles it just fine and this
behavior is needed for shared variables in Vulkan. This commit makes
glsl_get_ar
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:57, Jason Ekstrand wrote:
In the early days of the Vulkan driver, we thought it would be a good
idea to just make genN just fall back to the genN-1 code if it didn't
need to be any different for genN. While this seemed like a good idea,
it ultimate
Nice!
Reviewed-by: Lionel Landwerlin
On 13/10/17 06:58, Jason Ekstrand wrote:
These are pulled directly from brw_multisample_state.h
---
src/intel/common/gen_sample_positions.h | 65 +
1 file changed, 65 insertions(+)
diff --git a/src/intel/common/gen_sample
On Thu, Oct 12, 2017 at 01:51:24PM -0700, Dylan Baker wrote:
> Both patches are:
> Reviewed-by: Dylan Baker
Thanks guys. Pushed.
>
> Quoting Ville Syrjala (2017-10-12 09:34:55)
> > From: Ville Syrjälä
> >
> > Build i915 with meson. More or less copied from i965, with all
> > the unneeded cruf
On 10/13/2017 12:47 AM, Bas Nieuwenhuizen wrote:
Why don't we use the approach from patch 3 for this?
Yeah, will do.
Otherwise the series is r-b?
On Wed, Oct 11, 2017 at 10:25 AM, Samuel Pitoiset
wrote:
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 1 +
1 fil
From: Marek Olšák
IB size: -0.4%
---
src/gallium/drivers/radeonsi/si_descriptors.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
b/src/gallium/drivers/radeonsi/si_descriptors.c
index 9ba8df6..6e1fd8
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_state.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state.h
b/src/gallium/drivers/radeonsi/si_state.h
index bc7e7b3..8ce3cdb 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++
Hi,
This series:
- switches IB placement to GTT WC
- uses SPI_SHADER_USER_DATA_COMMON on GFX9
- combines setting of 2 per-stage descriptor pointers into 1 SET_SH_REG packet
- if there is only 1 constant buffer and 0 shader and atomic buffers,
the constant buffer pointer is directly set into SI_S
From: Marek Olšák
Let's use the same user data SGPRs in all stages.
(for SPI_SHADER_USER_DATA_COMMON_0)
---
src/gallium/drivers/radeonsi/si_descriptors.c | 24 -
src/gallium/drivers/radeonsi/si_shader.c | 31 +++
2 files changed, 16 insertions(+),
From: Marek Olšák
This should decrease IB fetch latency.
---
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 0a657f7..8fbe8ae 1
From: Marek Olšák
It shows the sum of all IBs per frame.
---
src/gallium/drivers/radeon/r600_query.c | 4
src/gallium/drivers/radeon/r600_query.h | 1 +
src/gallium/drivers/radeon/radeon_winsys.h| 1 +
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 1 +
src/
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_blit.c | 2 +-
src/gallium/drivers/radeonsi/si_state.h | 4 ++--
src/gallium/drivers/radeonsi/si_state_draw.c | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_blit.c
b/src/gall
From: Marek Olšák
IB size: -1.6%
---
src/gallium/drivers/radeonsi/si_descriptors.c | 66 ---
1 file changed, 39 insertions(+), 27 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
b/src/gallium/drivers/radeonsi/si_descriptors.c
index a0f3dcf..a2b7c
From: Marek Olšák
i.e. don't use |=
---
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 19 +++
src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 1 +
2 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
b/src/gallium/winsys/amdgpu/drm
From: Marek Olšák
This allows us to change the pointer arbitrarily.
---
src/gallium/drivers/radeonsi/si_cp_dma.c | 3 ++-
src/gallium/drivers/radeonsi/si_descriptors.c | 27 +++
src/gallium/drivers/radeonsi/si_state.h | 2 +-
3 files changed, 18 insertions(+)
From: Marek Olšák
SI_SGPR_CONST_AND_SHADER_BUFFERS now contains the pointer to const buffer 0
if there is no other buffer there.
Benefits:
- there is no constbuf descriptor upload and shader load
It's assumed that all constant addresses are within bounds. Non-constant
addresses are clamped agai
From: Marek Olšák
---
src/amd/common/ac_llvm_build.c| 42 ++-
src/amd/common/ac_llvm_build.h| 14
src/amd/common/ac_nir_to_llvm.c | 22 ++--
src/gallium/drivers/radeonsi/si_shader.c | 34 +
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.c | 26 ++
1 file changed, 10 insertions(+), 16 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 62a056d..ff372ae 100644
--- a/src/gallium/dri
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_descriptors.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
b/src/gallium/drivers/radeonsi/si_descriptors.c
index a2b7c11..cac203b 100644
--- a/src/gallium/driv
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_descriptors.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
b/src/gallium/drivers/radeonsi/si_descriptors.c
index cac203b..3c33e85 100644
--- a/src/gallium/drive
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_descriptors.c | 34 ++-
1 file changed, 23 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
b/src/gallium/drivers/radeonsi/si_descriptors.c
index 6e1fd80..a0f3dcf 100644
--- a
From: Marek Olšák
the old one is being deprecated or removed
---
src/amd/common/ac_nir_to_llvm.c | 3 ++-
src/gallium/drivers/radeonsi/si_shader.c | 4 +++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
i
On 12 October 2017 at 16:34, Mario Kleiner wrote:
> On 10/11/2017 05:25 PM, Emil Velikov wrote:
>>
>> On 10 October 2017 at 11:34, Tapani Pälli wrote:
>>>
>>> Reviewed-by: Tapani Pälli
>>>
>>> I think this fix can/should land separately from the set.
>>>
>> Yes, please. Thanks for catching that
Hi
Have you ran any benchmarks against these?
Cheers
Mike
On Fri, 13 Oct 2017 at 13:04 Marek Olšák wrote:
> Hi,
>
> This series:
> - switches IB placement to GTT WC
> - uses SPI_SHADER_USER_DATA_COMMON on GFX9
> - combines setting of 2 per-stage descriptor pointers into 1 SET_SH_REG
> packet
Hi Vedran,
Just pushed the LLVM version bump, so this patch should be able to go in.
I won't be able to offer any review here, apart from a small suggestion.
On 9 October 2017 at 00:08, Vedran Miletić wrote:
> #include
> #include
> @@ -63,11 +56,7 @@
> namespace clover {
> namespace ll
On Fri, Oct 13, 2017 at 2:24 PM, Mike Lothian wrote:
> Hi
>
> Have you ran any benchmarks against these?
No I haven't.
For the IB placement, I measured the decrease in CP stalls using
performance counters, but generally CP isn't memory-bound on radeonsi
due to our optimized packet ordering.
For
Isn't the logic inverted here?
2017-10-13 14:04 GMT+02:00 Marek Olšák :
> From: Marek Olšák
>
> the old one is being deprecated or removed
> ---
> src/amd/common/ac_nir_to_llvm.c | 3 ++-
> src/gallium/drivers/radeonsi/si_shader.c | 4 +++-
> 2 files changed, 5 insertions(+), 2 deletion
Yes good point.
Marek
On Fri, Oct 13, 2017 at 3:39 PM, Ernst Sjöstrand wrote:
> Isn't the logic inverted here?
>
> 2017-10-13 14:04 GMT+02:00 Marek Olšák :
>> From: Marek Olšák
>>
>> the old one is being deprecated or removed
>> ---
>> src/amd/common/ac_nir_to_llvm.c | 3 ++-
>> src/g
On 5 October 2017 at 20:12, Dylan Baker wrote:
> Quoting Emil Velikov (2017-10-05 11:26:40)
>> On 5 October 2017 at 18:12, Dylan Baker wrote:
>> > This has the same problem as the previous commit, generated headers and
>> > hardcoded paths.
>> >
>> Something's strange here. You already have the "
Nevermind. I'm dropping this patch. It's incomplete.
Marek
On Fri, Oct 13, 2017 at 3:49 PM, Marek Olšák wrote:
> Yes good point.
>
> Marek
>
> On Fri, Oct 13, 2017 at 3:39 PM, Ernst Sjöstrand wrote:
>> Isn't the logic inverted here?
>>
>> 2017-10-13 14:04 GMT+02:00 Marek Olšák :
>>> From: Marek
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Henri Verbeet
---
I should still have commit access.
---
src/vulkan/wsi/wsi_common_x11.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/vulkan/wsi/wsi_common_x11.c b/src/vulkan/wsi/wsi_common_x11.c
index ecdaf91..22b067b 100644
--- a/s
From: Emil Velikov
Currently all the build systems but Meson generate the header in
src/mapi/glapi. Meson cannot do that since:
- it does not allow user control over the location of output files
- moving the generation rule(s) causes explosion due to the unusual
structure of glapi and friends
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 78a250214a..c0fe12b489 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/s
My guess is that the GPU is going to report VM faults if
vkCmdDrawIndirectCountAMD() (and friends) are used.
Signed-off-by: Samuel Pitoiset
Cc: mesa-sta...@lists.freedesktop.org
---
src/amd/vulkan/radv_cmd_buffer.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/amd/vulkan/radv_cmd_buf
Quoting Emil Velikov (2017-10-13 07:01:24)
> On 5 October 2017 at 20:12, Dylan Baker wrote:
> > Quoting Emil Velikov (2017-10-05 11:26:40)
> >> On 5 October 2017 at 18:12, Dylan Baker wrote:
> >> > This has the same problem as the previous commit, generated headers and
> >> > hardcoded paths.
> >
Hi Henri,
On 13 October 2017 at 16:10, Henri Verbeet wrote:
> Cc: mesa-sta...@lists.freedesktop.org
> Signed-off-by: Henri Verbeet
Fixes: e73d136a023 ("vulkan/wsi/x11: Implement FIFO mode.")
Reviewed-by: Emil Velikov
Please give it time for Vulkan devs to take a look.
Thanks
Emil
___
On 13 October 2017 at 18:21, Dylan Baker wrote:
> Quoting Emil Velikov (2017-10-13 07:01:24)
>> On 5 October 2017 at 20:12, Dylan Baker wrote:
>> > Quoting Emil Velikov (2017-10-05 11:26:40)
>> >> On 5 October 2017 at 18:12, Dylan Baker wrote:
>> >> > This has the same problem as the previous co
r-b
On Fri, Oct 13, 2017 at 6:20 PM, Samuel Pitoiset
wrote:
> My guess is that the GPU is going to report VM faults if
> vkCmdDrawIndirectCountAMD() (and friends) are used.
>
> Signed-off-by: Samuel Pitoiset
> Cc: mesa-sta...@lists.freedesktop.org
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 2 ++
On 13/10/17 18:44, Jason Ekstrand wrote:
ssize_t is a GNU extension and is not available on Windows or MacOS.
Instead, we use intptr_t which should be effectively equivalent and is
part of the C standard. This should fix the Windows and Mac OS builds.
Cc: Jose Fonseca
Cc: Vinson Lee
Fixes: 3a
ssize_t is a GNU extension and is not available on Windows or MacOS.
Instead, we use intptr_t which should be effectively equivalent and is
part of the C standard. This should fix the Windows and Mac OS builds.
Cc: Jose Fonseca
Cc: Vinson Lee
Fixes: 3af1c829891a4530682bce113fdd512d4f2de3c6
Bugz
Tested-by: Mark Janes
Emil Velikov writes:
> From: Emil Velikov
>
> Currently all the build systems but Meson generate the header in
> src/mapi/glapi. Meson cannot do that since:
> - it does not allow user control over the location of output files
> - moving the generation rule(s) causes exp
Quoting Emil Velikov (2017-10-13 10:27:38)
> On 13 October 2017 at 18:21, Dylan Baker wrote:
> > Quoting Emil Velikov (2017-10-13 07:01:24)
> >> On 5 October 2017 at 20:12, Dylan Baker wrote:
> >> > Quoting Emil Velikov (2017-10-05 11:26:40)
> >> >> On 5 October 2017 at 18:12, Dylan Baker wrote:
For list posterity:
Reviewed-by: Dylan Baker
Quoting Emil Velikov (2017-10-13 08:35:47)
> From: Emil Velikov
>
> Currently all the build systems but Meson generate the header in
> src/mapi/glapi. Meson cannot do that since:
> - it does not allow user control over the location of output files
>
Hi Jason, you actually dropped max_dispatch_width so you might want to
update the commit message.
Michael
Am 13.10.2017 08:13 schrieb "Jason Ekstrand" :
The only things that adjust min_dispatch_width are render target writes
which don't happen in compute shaders so they're pointless.
---
src/in
Quoting Emil Velikov (2017-10-13 08:35:47)
> From: Emil Velikov
>
> Currently all the build systems but Meson generate the header in
> src/mapi/glapi. Meson cannot do that since:
> - it does not allow user control over the location of output files
> - moving the generation rule(s) causes explos
This passes 33/37 deqp tests related to partial_update, 4 are not
supported.
Signed-off-by: Harish Krupo
---
src/egl/drivers/dri2/platform_wayland.c | 68 -
1 file changed, 59 insertions(+), 9 deletions(-)
diff --git a/src/egl/drivers/dri2/platform_wayland.c
b/s
Emil Velikov writes:
> Hi Vedran,
>
> Just pushed the LLVM version bump, so this patch should be able to go in.
> I won't be able to offer any review here, apart from a small suggestion.
>
> On 9 October 2017 at 00:08, Vedran Miletić wrote:
>
>> #include
>> #include
>> @@ -63,11 +56,7 @@
>>
Signed-off-by: Dylan Baker
---
src/mesa/main/tests/meson.build | 44 +
src/mesa/meson.build| 3 +++
2 files changed, 47 insertions(+)
create mode 100644 src/mesa/main/tests/meson.build
diff --git a/src/mesa/main/tests/meson.build b/src/mesa/m
On 13 October 2017 at 19:13, Dylan Baker wrote:
> Quoting Emil Velikov (2017-10-13 08:35:47)
>> From: Emil Velikov
>>
>> Currently all the build systems but Meson generate the header in
>> src/mapi/glapi. Meson cannot do that since:
>> - it does not allow user control over the location of output
On Fri, Oct 13, 2017 at 10:44 AM, Jason Ekstrand wrote:
> ssize_t is a GNU extension and is not available on Windows or MacOS.
> Instead, we use intptr_t which should be effectively equivalent and is
> part of the C standard. This should fix the Windows and Mac OS builds.
>
> Cc: Jose Fonseca
>
https://bugs.freedesktop.org/show_bug.cgi?id=103264
Bug ID: 103264
Summary: cache-test fails on Mac OS X 10.13
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Mac OS X (All)
Status: NEW
Severity: n
https://bugs.freedesktop.org/show_bug.cgi?id=103265
Bug ID: 103265
Summary: [llvmpipe] piglit depth-tex-compare regression
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Ke
Thank you Thomas for the update, then.
Awaiting your coming work.
Regards,
Dieter
Am 10.10.2017 15:22, schrieb Thomas Helland:
Hi!
Thanks for keeping up with the long wait =)
I revisited this not too long ago, and found that with the new
pointer hashing function the benefits are zero to negati
https://bugs.freedesktop.org/show_bug.cgi?id=103266
Bug ID: 103266
Summary: [llvmpipe] piglit sampler-cube-shadow regression
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
https://bugs.freedesktop.org/show_bug.cgi?id=103265
--- Comment #1 from Roland Scheidegger ---
(In reply to Vinson Lee from comment #0)
> commit be3ab867bd444594f9d9e0f8e59d305d15769afd
> Author: Marek Olšák
> Date: Mon Oct 2 22:30:55 2017 +0200
>
> tgsi: implement tgsi_util_get_inst_usag
This builds ddebug, noop, rbug, and trace drivers.
Signed-off-by: Dylan Baker
---
src/gallium/{ => drivers/ddebug}/meson.build | 13 -
src/gallium/{ => drivers/noop}/meson.build | 12 +++-
src/gallium/{ => drivers/rbug}/meson.build | 13 -
src/gallium/{ => dri
These are currently auto-generated, but meson needs the same files, so
lets commit them to reduce duplication.
v3: - Rename .build to build-support
cc: Emil Velikov
Signed-off-by: Dylan Baker
---
I ran make dist and that works (after patching out the swr llvm 3.9 check). I
alos built that tar
This can be applied to all GLX implementations, and in autotools this is
guarded only by the --enable-glx-tls flag. Since this is on by default
in autotools, and is strictly better than being off, the meson build
doesn't even have a toggle for it.
Signed-off-by: Dylan Baker
Reviewed-by: Eric Anho
Signed-off-by: Dylan Baker
Reviewed-by: Eric Anholt
---
meson.build | 35 ---
meson_options.txt | 1 +
2 files changed, 21 insertions(+), 15 deletions(-)
diff --git a/meson.build b/meson.build
index 17187f3d909..ff2ce55e924 100644
--- a/meson.build
+++ b/m
When we start adding non-free software platforms support we'll need to
guard this, but for now it should be fine as is.
Signed-off-by: Dylan Baker
Reviewed-by: Eric Anholt
---
meson.build | 1 +
1 file changed, 1 insertion(+)
diff --git a/meson.build b/meson.build
index 2f73215ca52..e68469262b
Signed-off-by: Dylan Baker
Reviewed-by: Eric Anholt
---
meson.build | 25 +
meson_options.txt| 2 +
src/mesa/meson.build | 143 ++-
3 files changed, 158 insertions(+), 12 deletions(-)
diff --git a/meson.build b/meson.build
Rather than group dependencies in complex groups, use a flatter
structure with split dependencies to avoid checking for the same
dependencies twice.
v2: - Fix building vulkan drivers without gallium or dri drivers
v3: - Drop TODO comment that is done
- Fix typo in commit message
Signed-off-by
Tested with a GK107.
v2: - Add target for nouveau standalone compiler. This target is not
built by default.
v3: - Add nouveau to list of drivers built by default
Signed-off-by: Dylan Baker
---
meson.build | 6 +
meson_options.txt
Signed-off-by: Dylan Baker
---
meson.build | 1 +
src/gallium/meson.build | 1 +
src/gallium/{ => state_trackers/dri}/meson.build | 46 +++-
3 files changed, 39 insertions(+), 9 deletions(-)
copy src/gallium/{ =>
These are used by gallium drivers.
Signed-off-by: Dylan Baker
---
meson.build | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/meson.build b/meson.build
index 54230a91ed5..2f73215ca52 100644
--- a/meson.build
+++ b/meson.build
@@ -433,14 +433,28 @@ endif
This confused the with_dri flag which is meant to control Direct
Rendering Infrastructure, not classic drivers
Signed-off-by: Dylan Baker
Reviewed-by: Eric Anholt
---
src/mesa/drivers/dri/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/meson.
This hooks up the bits necessary to build gallium dri drivers, with
radeonSI as the first example driver. This isn't tested yet.
---
meson.build | 4 +-
src/gallium/drivers/radeonsi/meson.build | 2 +-
src/gallium/meson.build | 3 +-
src/gallium/tar
To put one argument on each line. This results in the file being much
longer, but I think much more readable.
Suggested-by: Eero Tamminen
Signed-off-by: Dylan Baker
---
meson_options.txt | 170 +-
1 file changed, 129 insertions(+), 41 deletion
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