Re: [Mesa-dev] [PATCH 3/3] docs/releasing: Add note about using a staging branch

On Wed, 2018-05-23 at 09:50 -0700, Dylan Baker wrote: > Quoting Juan A. Suarez Romero (2018-05-22 00:04:07) > > For the first two patches in the series: > > > > Reviewed-by: Juan A. Suarez > > > > > > For the 3rd patch, I'm fine with the proposal, but I would like to know

Re: [Mesa-dev] Gitlab migration

On Wednesday, May 23, 2018 6:23:14 PM PDT Jason Ekstrand wrote: > Agreed. The gitlab/github issue system has some scaling problems. The > tagging system isn't as good as bugzilla's categorization. Also, the > ability to move bugs back and forth between mesa and kernel is a pretty > killer

Re: [Mesa-dev] Gitlab migration

On May 23, 2018 23:18:08 Kenneth Graunke wrote: On Wednesday, May 23, 2018 1:58:14 PM PDT Nicolai Hähnle wrote: Hi Jason, On 23.05.2018 21:34, Jason Ekstrand wrote: Mesa developers, tl;dr. Please go to gitlab.freedesktop.org , create

[Mesa-dev] [PATCH] i965: Implement threaded GL support.

Now i965 supports mesa_glthread=true like Gallium drivers do. According to Markus (degasus), the Citra emulator now runs ~30% faster. Emmanuel (linkmauve) also reported that the Dolphin emulator improved by 2.8x on one game. (Both of those still need to be added to drirc.) An Intel Mesa CI run

Re: [Mesa-dev] Gitlab migration

On Wednesday, May 23, 2018 1:58:14 PM PDT Nicolai Hähnle wrote: > Hi Jason, > > On 23.05.2018 21:34, Jason Ekstrand wrote: > > Mesa developers, > > > > tl;dr. Please go to gitlab.freedesktop.org > > , create your account, and upload your > > SSH keys.

Re: [Mesa-dev] Gitlab migration

On 05/24/2018 09:31 AM, Jason Ekstrand wrote: On May 23, 2018 23:18:08 Kenneth Graunke wrote: On Wednesday, May 23, 2018 1:58:14 PM PDT Nicolai Hähnle wrote: Hi Jason, On 23.05.2018 21:34, Jason Ekstrand wrote: Mesa developers, tl;dr.  Please go to

[Mesa-dev] [PATCH] Android: fix a missing nir_intrinsics.h error

The commit 76dfed8ae2d5 changed nir_intrinsics.h to be a generated header, but the corresponding dependency was not updated for Android. It causes the error: [ 0% 19/4336] target C: libmesa_pipe_radeonsi <= external/mesa/src/gallium/drivers/radeonsi/si_debug.c ... In file included from

Re: [Mesa-dev] [PATCH] dri3: Stricter SBC wraparound handling

On Wed, 2018-05-16 at 11:10 +0200, Michel Dänzer wrote: > From: Michel Dänzer > > Prevents spuriously bumping the upper 32 bits of the SBC, which results > in hangs with the modesetting driver from xserver 1.20. > I've picked this patch for 18.0, as it was nominated

Re: [Mesa-dev] [PATCH 4/8] gallium: add PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY

Reviewed-by: Nicolai Hähnle On 23.05.2018 22:58, Marek Olšák wrote: From: Marek Olšák --- src/gallium/docs/source/screen.rst | 6 ++ src/gallium/drivers/etnaviv/etnaviv_screen.c | 1 +

Re: [Mesa-dev] Gitlab migration

On Thu, May 24, 2018 at 3:23 AM, Jason Ekstrand wrote: > On Wed, May 23, 2018 at 5:49 PM, Jordan Justen > wrote: >> >> On 2018-05-23 15:16:58, wrote: >> > On Wed, May 23, 2018 at 5:48 PM, Jordan Justen >> > wrote: >>

[Mesa-dev] [Bug 105464] Reading per-patch outputs in Tessellation Control Shader returns undefined values

https://bugs.freedesktop.org/show_bug.cgi?id=105464 --- Comment #13 from Samuel Pitoiset --- The tessellation demo looks good on vega here. What changed in LLVM since last time? If you really want to enable this by default, I would like to run CTS before. -- You are

Re: [Mesa-dev] Gitlab migration

Hi all, I'm going to attempt to interleave a bunch of replies here. On 23 May 2018 at 20:34, Jason Ekstrand wrote: > The freedesktop.org admins are trying to move as many projects and services > as possible over to gitlab and somehow I got hoodwinked into spear-heading > it

[Mesa-dev] [PATCH] i965: Disable guardband clipping on SandyBridge for odd dimensions

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104388 Signed-off-by: Andriy Khulap --- src/mesa/drivers/dri/i965/genX_state_upload.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c

[Mesa-dev] [PATCH 4/4] radv: fix dumping compute shader on the graphics queue

The graphics pipeline can be NULL. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c index c84e3be25bb..5a9b43644ed

Re: [Mesa-dev] Gitlab migration

Hi, On 24 May 2018 at 11:46, Daniel Stone wrote: > It _is_ possible to bend Jenkins to your will - Mark's excellent and > super-helpful work with Intel's CI is testament to that - and in some > environments it's fine, but after a few years of trying, I just don't > think

Re: [Mesa-dev] Gitlab migration

On Thu, May 24, 2018 at 8:18 AM, Kenneth Graunke wrote: > On Wednesday, May 23, 2018 1:58:14 PM PDT Nicolai Hähnle wrote: >> Hi Jason, >> >> On 23.05.2018 21:34, Jason Ekstrand wrote: >> > Mesa developers, >> > >> > tl;dr. Please go to gitlab.freedesktop.org >> >

[Mesa-dev] [PATCH] i965: Disable guardband clipping on SandyBridge for odd dimensions

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104388 Signed-off-by: Andriy Khulap --- src/mesa/drivers/dri/i965/genX_state_upload.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c

Re: [Mesa-dev] [PATCH 8/8] mesa: expose ARB_tessellation_shader in the compatibility profile

On 24.05.2018 15:32, Timothy Arceri wrote: On 24/05/18 18:41, Nicolai Hähnle wrote: What about selection and feedback mode for geometry shaders and tessellation? For now this will only enable the extension in compat when using env overrides. So this patch should be ok as is IMO. Fair

Re: [Mesa-dev] [PATCH 0/8] GL compatibility: Basic GS and tessellation enablement

All looks good to me :) Series: Reviewed-by: Timothy Arceri On 24/05/18 06:58, Marek Olšák wrote: Hi, This advances GL compatibility support a little bit. Geometry and tessellation shaders should work if you don't combine them with non-GLSL stages. All GLSL legacy

[Mesa-dev] [Bug 105464] Reading per-patch outputs in Tessellation Control Shader returns undefined values

https://bugs.freedesktop.org/show_bug.cgi?id=105464 --- Comment #14 from Nicolai Hähnle --- I don't know. Farhana asked me to test this since I have a Mesa setup. I'd appreciate if you could give a CTS run a shot. -- You are receiving this mail because: You are the QA

[Mesa-dev] [Bug 106619] [OpenCL][llvm-svn]build failure addPassesToEmitFile candidate expects 6 arguments, 3 provided

https://bugs.freedesktop.org/show_bug.cgi?id=106619 --- Comment #3 from LoneVVolf --- Patch 1-3-clover-Fix-build-after-llvm-r332881.patch as suggested by jan vesely is now being applied to the archlinux AUR mesa-git package. Build goes fine now and running clinfo gives a

Re: [Mesa-dev] [PATCH] dri3: Stricter SBC wraparound handling

On 2018-05-24 09:24 AM, Juan A. Suarez Romero wrote: > On Wed, 2018-05-16 at 11:10 +0200, Michel Dänzer wrote: >> From: Michel Dänzer >> >> Prevents spuriously bumping the upper 32 bits of the SBC, which results >> in hangs with the modesetting driver from xserver 1.20. >>

Re: [Mesa-dev] [PATCH] Android: fix a missing nir_intrinsics.h error

I haven't experienced this error but changes LGTM: Reviewed-by: Tapani Pälli On 05/24/2018 10:10 AM, Chih-Wei Huang wrote: The commit 76dfed8ae2d5 changed nir_intrinsics.h to be a generated header, but the corresponding dependency was not updated for Android. It causes

[Mesa-dev] [Bug 105464] Reading per-patch outputs in Tessellation Control Shader returns undefined values

https://bugs.freedesktop.org/show_bug.cgi?id=105464 --- Comment #12 from Nicolai Hähnle --- Created attachment 139738 --> https://bugs.freedesktop.org/attachment.cgi?id=139738=edit radv testing patch Hey Samuel, I re-tested this (on Tonga) with the latest LLVM trunk and

Re: [Mesa-dev] Gitlab migration

Hi, On 24 May 2018 at 02:23, Jason Ekstrand wrote: > On Wed, May 23, 2018 at 5:49 PM, Jordan Justen > wrote: >> Another project I'm involved with had a contingency that swore >> github's "issues" were completely inadequate compared to bugzilla,

Re: [Mesa-dev] [PATCH 8/8] mesa: expose ARB_tessellation_shader in the compatibility profile

On 24/05/18 18:41, Nicolai Hähnle wrote: What about selection and feedback mode for geometry shaders and tessellation? For now this will only enable the extension in compat when using env overrides. So this patch should be ok as is IMO. Cheers, Nicolai On 23.05.2018 22:58, Marek Olšák

Re: [Mesa-dev] [PATCH 7/8] mesa: expose AMD_vertex_shader_layer in the compatibility profile

Reviewed-by: Nicolai Hähnle On 23.05.2018 22:58, Marek Olšák wrote: From: Marek Olšák This requires layered FBOs from GL 3.2. Gallium drivers don't expose this yet due to: "st/mesa: use PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY" ---

Re: [Mesa-dev] [RFC PATCH] gallium: add interface for advanced MSAA

On 18.05.2018 06:05, Marek Olšák wrote: From: Marek Olšák The interface only uses general MSAA terms, so it's "advanced MSAA" and not something vendor-specific. It's a proper subset of EQAA, and a proper superset of CSAA, so it's neither. Changes: - pipe_resource is

Re: [Mesa-dev] [PATCH 8/8] mesa: expose ARB_tessellation_shader in the compatibility profile

What about selection and feedback mode for geometry shaders and tessellation? Cheers, Nicolai On 23.05.2018 22:58, Marek Olšák wrote: From: Marek Olšák Gallium drivers don't expose this yet due to: "st/mesa: use PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY" ---

Re: [Mesa-dev] [PATCH 3/8] mesa: update fixed-func state constants for TCS, TES, GS

On 23.05.2018 22:58, Marek Olšák wrote: From: Marek Olšák --- src/mesa/main/state.c | 64 --- 1 file changed, 36 insertions(+), 28 deletions(-) diff --git a/src/mesa/main/state.c b/src/mesa/main/state.c index

Re: [Mesa-dev] [PATCH 1/6] ac/surface/gfx6: don't overallocate mipmapped HTILE

For the series: Reviewed-by: Nicolai Hähnle On 23.05.2018 23:29, Marek Olšák wrote: ping On Wed, May 16, 2018 at 9:47 PM, Marek Olšák > wrote: From: Marek Olšák >

Re: [Mesa-dev] [PATCH 1/7] swr/rast: Added in-place building to SCATTERPS

Patchset (1/7) Reviewed-by: Bruce Cherniak > On May 23, 2018, at 2:58 PM, Alok Hota wrote: > > SCATTERPS previously assumed it was being used with an existing basic > block > --- > .../drivers/swr/rasterizer/jitter/builder_mem.cpp | 29

Re: [Mesa-dev] Gitlab migration

On Thu, May 24, 2018 at 3:23 PM, Daniel Stone wrote: > Hi, > > On 24 May 2018 at 02:23, Jason Ekstrand wrote: >> On Wed, May 23, 2018 at 5:49 PM, Jordan Justen >> wrote: >>> Another project I'm involved with had a

Re: [Mesa-dev] [RFC PATCH] gallium: add interface for advanced MSAA

On Thu, May 24, 2018 at 4:11 AM, Nicolai Hähnle wrote: > On 18.05.2018 06:05, Marek Olšák wrote: > >> From: Marek Olšák >> >> The interface only uses general MSAA terms, so it's "advanced MSAA" and >> not >> something vendor-specific. >> >> It's a proper

Re: [Mesa-dev] [PATCH 8/8] mesa: expose ARB_tessellation_shader in the compatibility profile

On Thu, May 24, 2018 at 10:18 AM, Nicolai Hähnle wrote: > On 24.05.2018 15:32, Timothy Arceri wrote: > >> On 24/05/18 18:41, Nicolai Hähnle wrote: >> >>> What about selection and feedback mode for geometry shaders and >>> tessellation? >>> >> >> For now this will only enable

[Mesa-dev] [PATCH] mesa: do not leak ctx->Shader.ReferencedProgram references

When glUseProgram is used, references to the included shaders are added in ctx->Shader.ReferencedProgram. But those references are not decreased when the shader data is deallocated. Thus, those shaders are leaked. Explicitely remove the pending references to these shaders. Fixes: e6506b3cd23

Re: [Mesa-dev] [PATCH 1/3] clover: Fix build after llvm r332881.

On Tue, May 22, 2018 at 6:43 PM, Jan Vesely wrote: > r332881 added an extra parameter to the emit function. > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106619 > Signed-off-by: Jan Vesely > --- >

[Mesa-dev] [PATCH v2 1/2] util/u_math: Implement a logbase2 function for unsigned long

From: Pierre Moreau v2 (Karol Herbst ): * removed unneeded ll * ll -> ull Signed-off-by: Karol Herbst --- src/gallium/auxiliary/util/u_math.h | 55 + src/util/bitscan.h | 11 ++ 2

[Mesa-dev] [PATCH 1/4] radv: remove unused parameter in radv_dump_annotated_shader()

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c index e55489d71d1..72c7c39fcb8 100644 ---

[Mesa-dev] [PATCH 3/4] radv: add radv_dump_pipeline_state() helper

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 17 +++-- 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c index 5cdbf5bea9a..c84e3be25bb 100644 ---

Re: [Mesa-dev] [PATCH 0/3] egl/android: Remove dependencies on specific grallocs

Hey, I don't think I've received any feedback on this version yet. If anyone has some time to spare, it would be nice to get it merged. Just to be clear about the libdrm branch linked in the cover letter, it is not required. Only for virgl platforms which happens to be what I tested on. Rob.

[Mesa-dev] [Bug 105464] Reading per-patch outputs in Tessellation Control Shader returns undefined values

https://bugs.freedesktop.org/show_bug.cgi?id=105464 --- Comment #15 from Samuel Pitoiset --- Yeah, I will do. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug.___

Re: [Mesa-dev] [PATCH 2/2] radv: call nir_lower_io_to_temporaries for VS, GS, TES and FS

From what I recall with my testing on radeonsi this wasn't really the ideal thing to do. Especially when varyings arrays are accessed via and indirect index, register use very quickly gets out of control. On 23/05/18 22:31, Samuel Pitoiset wrote: Do not lower FS inputs because this moves

[Mesa-dev] [PATCH 13/16] docs: Edits to fix toctrees.

ReStructured Text toctrees are used to automatically generate the sidebar. But all top-level headings get added to it by default. In order to workaround this, you must create one and only one top-level heading for each page. --- docs/download.rst | 2 +- docs/faq.rst | 2 +-

[Mesa-dev] [PATCH 14/16] docs: Major manual edits to environment vars.

This is a huge page. The edits I've done here take full advantage of reStructured text and Sphinx's awesome built-in style for explaining commands and variables. Enjoy! --- docs/envvars.rst | 604 ++- 1 file changed, 425 insertions(+), 179

[Mesa-dev] [PATCH 16/16] docs: Remove unneeded mesa css file.

Goodbye old css file. You belong in 1999 from whence you came. --- docs/mesa.css | 63 --- 1 file changed, 63 deletions(-) delete mode 100644 docs/mesa.css diff --git a/docs/mesa.css b/docs/mesa.css deleted file mode 100644 index

[Mesa-dev] [PATCH 12/16] docs: Fix Sphinx compile errors.

This just involves some quick fixes to formatting of the affected pages. --- docs/autoconf.rst| 1 + docs/conf.py | 2 +- docs/dispatch.rst| 72 ++-- docs/egl.rst | 2 ++ docs/releasing.rst | 14

[Mesa-dev] [PATCH 08/16] docs: Add a navigation sidebar.

From: Jean Hertel This is the new main sidebar. --- docs/index.rst | 90 ++ 1 file changed, 90 insertions(+) diff --git a/docs/index.rst b/docs/index.rst index e11b1e4ecc..f2ab63fb63 100644 --- a/docs/index.rst

[Mesa-dev] [PATCH 10/16] docs: Toctree for systems.rst as in jhertel docs.

Toctree directives create automatically generated navigation sidebars. This is the new deprecated systems sidebar. --- docs/systems.rst | 6 ++ 1 file changed, 6 insertions(+) diff --git a/docs/systems.rst b/docs/systems.rst index 707abeeed9..b05aff0621 100644 --- a/docs/systems.rst +++

Re: [Mesa-dev] [PATCH] mesa: do not leak ctx->Shader.ReferencedProgram references

Pushed. Thanks for the patch. On 25/05/18 03:56, Jose Dapena Paz wrote: When glUseProgram is used, references to the included shaders are added in ctx->Shader.ReferencedProgram. But those references are not decreased when the shader data is deallocated. Thus, those shaders are leaked.

Re: [Mesa-dev] [PATCH v3] mesa: handle a bunch of formats in IMPLEMENTATION_COLOR_READ_*

Reviewed-by: Gurchetan Singh On Wed, May 23, 2018 at 1:36 AM Tomeu Vizoso wrote: > Virgl could save a lot of work converting buffers in the host side > between formats if Mesa supported a bunch of other formats when reading > pixels. >

[Mesa-dev] [PATCH 00/16] Move the Mesa Website to Sphinx

It's time to move the Mesa-3d.org website into the 21st century. We have chosen to move to Sphinx and resStructured text for a number of reasons: 1. Syntax highlighting for code snippets. 2. Snazzy highlighting for variables and function names. 3. Consistency with the Gallium drivers, which

[Mesa-dev] [PATCH 09/16] docs: Add toctree to relnotes

From: Jean Hertel Toctree directives create automatically generated navigation sidebars. This is the new relnotes sidebar. --- docs/relnotes.rst | 197 ++ 1 file changed, 197 insertions(+) diff --git

[Mesa-dev] [PATCH 03/16] docs: Remove contents.html

The old navigation bar, may it rest in peace, causes major problems when running the rstConverter.py script. It's also unneeded. Let's get rid of it now. --- docs/contents.html | 108 - 1 file changed, 108 deletions(-) delete mode 100644

[Mesa-dev] [PATCH 01/16] Added ci yaml file for Gitlab.

For now, all this does is copy our current webpage into a public folder. Daniel Stone has the server configured to check this public folder and host the index.html as mesa-test.freedesktop.org. When this patch series is approved, Daniel will change it to point at mesa-3d.org. --- .gitlab-ci.yml |

[Mesa-dev] [PATCH 06/16] docs: Add Sphinx configuration file.

From: Jean Hertel This tells Sphinx how to build our website from reStructured Text. Signed-off-by: Jean Hertel --- docs/conf.py | 162 +++ 1 file changed, 162 insertions(+) create mode

[Mesa-dev] [PATCH 07/16] docs: Add command for Sphinx build.

This does two things. 1. It pulls a Docker image which is a Linux system with Sphinx and the Read the Docs Sphinx theme already installed. 2. It uses sphinx-build to build html from our rst pages. --- .gitlab-ci.yml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 02/16] docs: Add python script that converts html to rst.

Use Beautiful Soup to fix bad html, then use pandoc for converting to rst. --- docs/rstConverter.py | 23 +++ 1 file changed, 23 insertions(+) create mode 100755 docs/rstConverter.py diff --git a/docs/rstConverter.py b/docs/rstConverter.py new file mode 100755 index

Re: [Mesa-dev] [PATCH 00/16] Move the Mesa Website to Sphinx

A few of the commits are quite large and awaiting list approval. I suggest that you take a look at the code here: https://gitlab.freedesktop.org/ldeks/mesa/tree/website1_75, and the new website here: https://mesa-test.freedesktop.org/index.html Laura On Thu, May 24, 2018 at 5:27 PM, Laura

Re: [Mesa-dev] [PATCH 2/2] radv: call nir_lower_io_to_temporaries for VS, GS, TES and FS

On Fri, May 25, 2018 at 2:25 AM, Timothy Arceri wrote: > > From what I recall with my testing on radeonsi this wasn't really the ideal > thing to do. Especially when varyings arrays are accessed via and indirect > index, register use very quickly gets out of control. in

Re: [Mesa-dev] [PATCH 3/3] radeonsi: fix passing gl_ClipVertex for GS and tess

On 23.05.2018 23:05, Marek Olšák wrote: From: Marek Olšák Also add the printf call. --- src/gallium/drivers/radeonsi/si_shader.c| 5 - src/gallium/drivers/radeonsi/si_shader.h| 2 +- src/gallium/drivers/radeonsi/si_state_shaders.c | 5 +++-- 3

Re: [Mesa-dev] [PATCH] st/mesa: simplify lastLevel determination in st_finalize_texture

Seems plausible, although that code tends to be tricky as hell. Assuming no piglit / CTS regressions: Reviewed-by: Nicolai Hähnle On 23.05.2018 22:43, Marek Olšák wrote: From: Marek Olšák This fixes shader images where we always bind stObj->pt

Re: [Mesa-dev] Gitlab migration

On 24.05.2018 08:46, Tapani Pälli wrote: * [Optional] Merge-request workflow.  With the rise of github, there are many developers out there who are used to the merge-request workflow and switching to that may lower the barrier to entry for new contributors. I admit that it's been a while

Re: [Mesa-dev] Mesa documentation (was: Gitlab migration)

Hi, On 23.05.2018 22:34, Jason Ekstrand wrote: [...]> One of the motivations for doing this now is that there has been some desire to move the mesa website away from raw HTML and over to a platform such as sphinx.  If we're going to do that, we need a system for building the website whenever

[Mesa-dev] [PATCH 2/4] radv: rework how shaders are dumped when generating a hang report

Use a flag for the active stages instead. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 41 ++--- 1 file changed, 15 insertions(+), 26 deletions(-) diff --git a/src/amd/vulkan/radv_debug.c

Re: [Mesa-dev] [PATCH] radv: run the EarlyCSEMemSSA LLVM pass

On 05/24/2018 11:00 PM, Tom Stellard wrote: On 05/24/2018 01:55 PM, Samuel Pitoiset wrote: It's recommended by the instruction combining pass, and RadeonSI also runs it. This pass used to segfault with one shader of F12017 but it has been fixed somewhere in LLVM 7. Do you know which patch

Re: [Mesa-dev] Applying for Project Piglit for OpenMAX under X.org Evoc

On Fri, May 11, 2018 at 11:57 AM, Prateek Chanda wrote: > Dear Sir/Madam > > > > I am writing this letter as I am planning for my application for a project > work on Piglit for OpenMAX under X.org Evoc. I have already spoken to my > mentor and have discussed with him the

[Mesa-dev] [PATCH 09/53] intel/fs: Fix Gen4-5 FB write AA data payload munging for non-EOT writes.

From: Francisco Jerez Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_fs_generator.cpp | 26 -- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/src/intel/compiler/brw_fs_generator.cpp

[Mesa-dev] [PATCH 11/53] intel/fs: Pull FB write implied headers from src[0]

Now that we have the implied header in src[0] for tracking purposes, we may as well use it in the generator. This makes things a tiny bit more general. --- src/intel/compiler/brw_fs_generator.cpp | 15 ++- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git

[Mesa-dev] [PATCH 17/53] i965: Re-arrange shader kernel setup in WM state

--- src/mesa/drivers/dri/i965/genX_state_upload.c | 94 --- 1 file changed, 57 insertions(+), 37 deletions(-) diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index 4f44b99..6d430f6 100644 ---

[Mesa-dev] [PATCH 16/53] intel/fs: Remove program key argument from generator.

From: Francisco Jerez Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_fs.cpp | 4 ++-- src/intel/compiler/brw_fs.h| 2 -- src/intel/compiler/brw_fs_generator.cpp| 3 +-- src/intel/compiler/brw_shader.cpp

[Mesa-dev] [PATCH 18/53] intel/compiler: Add and use helpers for working with KSP indices

The pixel shader dispatch table is kind-of a confusing mess. This adds some helpers for dealing with it and for easily extracting the correct data from wm_prog_data. --- src/intel/blorp/blorp_genX_exec.h | 65 src/intel/compiler/brw_compiler.h | 85

[Mesa-dev] [PATCH 22/53] intel/fs: Disable SIMD32 dispatch on Gen4-6 with control flow

From: Francisco Jerez The hardware's control flow logic is 16-wide so we're out of luck here. We could, in theory, support SIMD32 if we know the control-flow is uniform but we don't have that information at this point. Reviewed-by: Jason Ekstrand

[Mesa-dev] [PATCH 13/53] intel/fs: Fix fs_inst::flags_written() for Gen4-5 FB writes.

From: Francisco Jerez Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_fs.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 600d901..069959e 100644 ---

[Mesa-dev] [PATCH 14/53] intel/fs: Fix implied_mrf_writes() for headerless FB writes.

From: Francisco Jerez Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_fs.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 069959e..3e9ccc4 100644 ---

[Mesa-dev] [PATCH 15/53] intel/fs: Set up FB write message headers in the visitor

Doing instruction header setup in the generator is aweful for a number of reasons. For one, we can't schedule the header setup at all. For another, it means lots of implied writes which the instruction scheduler and other passes can't properly read about. The second isn't a huge problem for FB

[Mesa-dev] [PATCH 12/53] intel/eu: Return new instruction to caller from brw_fb_WRITE().

From: Francisco Jerez Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_eu.h | 20 ++-- src/intel/compiler/brw_eu_emit.c | 24 +--- 2 files changed, 23 insertions(+), 21 deletions(-) diff --git

[Mesa-dev] [PATCH 49/53] intel/fs: Add fields to wm_prog_data for SIMD32 dispatch

--- src/intel/blorp/blorp_genX_exec.h | 3 +++ src/intel/compiler/brw_compiler.h | 7 +++ src/intel/compiler/brw_fs_visitor.cpp | 1 + src/intel/vulkan/genX_pipeline.c | 2 +- src/mesa/drivers/dri/i965/gen4_blorp_exec.h | 1 +

[Mesa-dev] [PATCH 44/53] intel/fs: Emit MOV_DISPATCH_TO_FLAGS once for the centroid workaround

There's no reason for us to emit it a pile of times and then have a whole pass to clean it up. Just emit it once like we really want. --- src/intel/compiler/brw_fs.cpp | 39 --- src/intel/compiler/brw_fs_visitor.cpp | 27 ++-- 2 files

[Mesa-dev] [PATCH 53/53] intel/fs: Build 32-wide FS shaders.

From: Francisco Jerez Co-authored-by: Jason Ekstrand --- src/intel/compiler/brw_fs.cpp | 54 ++- 1 file changed, 43 insertions(+), 11 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp

[Mesa-dev] [PATCH 46/53] intel/fs: Fix Gen6+ interpolation setup for SIMD32

From: Francisco Jerez Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_fs_visitor.cpp | 116 ++ 1 file changed, 60 insertions(+), 56 deletions(-) diff --git a/src/intel/compiler/brw_fs_visitor.cpp

[Mesa-dev] [PATCH 52/53] intel/fs: Support SIMD32 repclear shaders

--- src/intel/compiler/brw_fs.cpp | 83 ++--- src/intel/compiler/brw_fs_generator.cpp | 2 +- 2 files changed, 57 insertions(+), 28 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 7e532af..c821a11 100644 ---

[Mesa-dev] [PATCH 51/53] intel/fs: Remove support push constants in repclear shaders

--- src/intel/compiler/brw_fs.cpp | 25 ++--- 1 file changed, 6 insertions(+), 19 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 1f87f06..7e532af 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@

[Mesa-dev] [PATCH 45/53] intel/fs: Get rid of MOV_DISPATCH_TO_FLAGS

We can just emit the MOV in the two places where we use this. --- src/intel/compiler/brw_eu_defines.h | 1 - src/intel/compiler/brw_fs.cpp | 8 +--- src/intel/compiler/brw_fs_generator.cpp | 28 src/intel/compiler/brw_fs_visitor.cpp | 4 +++-

[Mesa-dev] [PATCH 47/53] intel/fs: Fix fs_builder::sample_mask_reg() for 32-wide FS dispatch.

From: Francisco Jerez Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_fs_builder.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/intel/compiler/brw_fs_builder.h b/src/intel/compiler/brw_fs_builder.h index

[Mesa-dev] [PATCH 48/53] intel/fs: Fix nir_intrinsic_load_helper_invocation for SIMD32.

From: Francisco Jerez Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_fs_nir.cpp | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index

[Mesa-dev] [PATCH 50/53] intel/anv, blorp, i965: Implement the SKL 16x MSAA SIMD32 workaround

--- src/intel/blorp/blorp_genX_exec.h | 14 ++ src/intel/vulkan/genX_pipeline.c | 20 ++-- src/mesa/drivers/dri/i965/genX_state_upload.c | 16 3 files changed, 48 insertions(+), 2 deletions(-) diff --git

Re: [Mesa-dev] [PATCH 0/8] GL compatibility: Basic GS and tessellation enablement

On 05/23/2018 01:58 PM, Marek Olšák wrote: > Hi, > > This advances GL compatibility support a little bit. Geometry and > tessellation shaders should work if you don't combine them with > non-GLSL stages. All GLSL legacy variables should work. What is the plan for mixing geometry shaders with

Re: [Mesa-dev] [PATCH] radv: run the EarlyCSEMemSSA LLVM pass

Reviewed-by: Bas Nieuwenhuizen On Thu, May 24, 2018 at 10:55 PM, Samuel Pitoiset wrote: > It's recommended by the instruction combining pass, and > RadeonSI also runs it. > > This pass used to segfault with one shader of F12017 but it > has

[Mesa-dev] [PATCH] i965/fs: Split instructions low to high in lower_simd_width

Commit 0d905597f fixed an issue with the placement of the zip and unzip instructions. However, as a side-effect, it reversed the order in which we were emitting the split instructions so that they went from high group to low instead of low to high. This is fine for most things like texture

[Mesa-dev] [PATCH 29/53] intel/fs: Fix FB read header setup for SIMD32.

From: Francisco Jerez Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_fs.cpp | 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index

[Mesa-dev] [PATCH 25/53] intel/fs: Fix codegen of FS_OPCODE_SET_SAMPLE_ID for SIMD32.

From: Francisco Jerez Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_fs_generator.cpp | 24 +--- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/src/intel/compiler/brw_fs_generator.cpp

[Mesa-dev] [PATCH 20/53] intel/fs: Split instructions low to high in lower_simd_width

Commit 0d905597f fixed an issue with the placement of the zip and unzip instructions. However, as a side-effect, it reversed the order in which we were emitting the split instructions so that they went from high group to low instead of low to high. This is fine for most things like texture

[Mesa-dev] [PATCH 24/53] intel/eu: Fix pixel interpolator queries for SIMD32.

From: Francisco Jerez Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_eu_emit.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index 294bea0..fc39d94

[Mesa-dev] [PATCH 23/53] intel/fs: Disable SIMD32 dispatch for fragment shaders with discard.

From: Francisco Jerez Current discard handling requires dedicating the second flag register to discard. However, control-flow in SIMD32 requires both flag registers so it's incompatible with the current discard handling. Just don't support SIMD32+discard for now.

[Mesa-dev] [PATCH 26/53] intel/fs: Don't enable dual source blend if no outputs are written

From: Francisco Jerez This prevents a crash in some arb_enhanced_layouts tests that would be caused by the next commit. Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_fs_visitor.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)

[Mesa-dev] [PATCH 28/53] intel/fs: Fix logical FB write lowering for SIMD32

From: Francisco Jerez --- src/intel/compiler/brw_fs.cpp | 25 - 1 file changed, 20 insertions(+), 5 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 5804591..9d90d11 100644 ---

[Mesa-dev] [PATCH 27/53] intel/fs: Fix FB write message control codegen for SIMD32.

From: Francisco Jerez Reviewed-by: Jason Ekstrand --- src/intel/compiler/brw_fs_generator.cpp | 52 + 1 file changed, 34 insertions(+), 18 deletions(-) diff --git a/src/intel/compiler/brw_fs_generator.cpp

[Mesa-dev] [PATCH 19/53] intel/fs: Rework KSP data to be SIMD width-based

--- src/intel/compiler/brw_compiler.h | 53 +-- src/intel/compiler/brw_fs.cpp | 35 +++ src/intel/compiler/brw_fs_visitor.cpp | 2 +- 3 files changed, 43 insertions(+), 47 deletions(-) diff --git a/src/intel/compiler/brw_compiler.h

[Mesa-dev] [PATCH 21/53] intel/fs: Properly copy default flag reg for 3src instrucitons

Prior to gen8, the flag reg and subreg numbers are in different locations on 3src instructions than on smaller instructions. In order for brw_set_default_flag_reg to work properly, we need to copy the value out of the 2src location and write it into the 3src location as part of brw_alu3. Cc:

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