[Mesa-dev] [Bug 95322] [HSW] GL33-CTS.transform_feedback.capture_special_interleaved_test fails

https://bugs.freedesktop.org/show_bug.cgi?id=95322 Matt Turner changed: What|Removed |Added Summary|GL33-CTS.transform_feedback |[HSW]

[Mesa-dev] [Bug 95324] [HSW] GL33-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels_pbo fails in one case

https://bugs.freedesktop.org/show_bug.cgi?id=95324 Matt Turner changed: What|Removed |Added Resolution|--- |FIXED

Re: [Mesa-dev] [PATCH] amd/addrlib: limit fastcall/regparm to GCC i386

On Wed, Nov 2, 2016 at 10:32 AM, Emil Velikov wrote: > From: Emil Velikov > > The use of regparm causes an error on arm/arm64 builds with clang. > fastcall is allowed, but still throws a warning. As both options only > have effect on 32-bit

[Mesa-dev] [PATCH 2/3] nir: add conditional discard optimisation

From: Dave Airlie This is ported from GLSL and converts if (cond) discard; into discard_if(cond); This removes a block, but also is needed by radv to workaround a bug in the LLVM backend. v2: handle if (a) discard_if(b) (nha) cleanup and drop pointless loop (Matt)

[Mesa-dev] [PATCH 3/3] radv: enable conditional discard optimisation on radv.

From: Dave Airlie This fixes a bunch of GPU hangs introduced in some CTS tests like dEQP-VK.memory.pipeline_barrier.host_write_uniform_buffer.65536 It works around an issue seen in the LLVM backend, but also makes the radv code work more like the radeonsi stack.

[Mesa-dev] [PATCH 1/3] ac/nir: add support for discard_if intrinsic (v2)

From: Dave Airlie We are going to start lowering to this in NIR code, so prepare radv for it. v2: handle conversion to kilp properly (nha) Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 21 + 1 file changed, 21

[Mesa-dev] nir discard_if optimisation (v2)

This is a repost of the patches I posted yesterday, The main differences are I've fixed the kill emission for llvm to be correct, and I've fixed the nir opt pass to be cleaner, check for dependent phis and handle if (a) discard_if(b) cases. Dave. ___

Re: [Mesa-dev] [ANNOUNCE] mesa 13.0.0-rc3 / CC'ing Mesa-devel

Am 31.10.2016 22:49, schrieb Dieter Nützel: Am 31.10.2016 22:41, schrieb Dieter Nützel: Am 31.10.2016 21:22, schrieb Marek Olšák: Hi, Hello Marek! Can you try to replace: if (!(surf_ws->flags & RADEON_SURF_IMPORTED)) { with: if (!(surf_ws->flags & (RADEON_SURF_IMPORTED |

Re: [Mesa-dev] [PATCH 0.5/3] anv/blorp: Don't create linear ASTC surfaces for buffers

Reviewed-by: Jason Ekstrand Wouldn't be a bad idea to do this for all compressed formats. It doesn't really matter though since blorp will nuke the format the moment it cones into blorp_copy anyway. On Nov 2, 2016 4:56 PM, "Nanley Chery" wrote: >

Re: [Mesa-dev] [PATCH 3/4] gallium/radeon: Use flags parameter in radeon_winsys_surface_init

Am 02.11.2016 12:11, schrieb Michel Dänzer: From: Michel Dänzer Fixes valgrind warnings about surf_ws->flags being uninitialized while starting X. Signed-off-by: Michel Dänzer --- src/gallium/winsys/radeon/drm/radeon_drm_surface.c | 2 +- 1

[Mesa-dev] [Bug 98471] [TRACKER] Mesa 13.0 release tracker

https://bugs.freedesktop.org/show_bug.cgi?id=98471 Bug 98471 depends on bug 98335, which changed state. Bug 98335 Summary: [TRACKER] Intel release tracker for Mesa 13.0 https://bugs.freedesktop.org/show_bug.cgi?id=98335 What|Removed |Added

[Mesa-dev] [Bug 97532] Regression: GLB 2.7 & Glmark-2 GLES versions segfault due to linker precision error (259fc505) on dead variable

https://bugs.freedesktop.org/show_bug.cgi?id=97532 Matt Turner changed: What|Removed |Added Assignee|i...@freedesktop.org

[Mesa-dev] [Bug 98563] Xorg segfaults with displaylink attached and mesa version >= 13.0

https://bugs.freedesktop.org/show_bug.cgi?id=98563 Bug ID: 98563 Summary: Xorg segfaults with displaylink attached and mesa version >= 13.0 Product: Mesa Version: 13.0 Hardware: x86-64 (AMD64) OS: Linux

[Mesa-dev] [PATCH 1/2] draw: fix undefined input handling some more...

From: Roland Scheidegger Previous fixes were incomplete - some code still iterated through the number of elements provided by velem layout instead of the number stored in the key (which is the same as the number defined by the vs). And also actually accessed the elements from

[Mesa-dev] [PATCH 2/2] draw: use vectorized calculations for fetch

From: Roland Scheidegger Instead of doing all the math with scalars, use vectors. This means the overflow math needs to be done manually, albeit that's only really problematic for the stride/index mul, the rest has been pretty much moved outside the shader loop (albeit the

Re: [Mesa-dev] [PATCH] mesa/glsl: delete previously linked shaders earlier when linking

On Wed, 2016-11-02 at 14:47 +, Emil Velikov wrote: > On 1 November 2016 at 23:47, Timothy Arceri > wrote: > > > > This move the delete linked shaders call to > > _mesa_clear_shader_program_data() which makes sure we delete them > > before returning due to any

Re: [Mesa-dev] [PATCH] glsl: Update deref types when resizing implicitly sized arrays.

On Wed, 2016-11-02 at 14:28 -0700, Kenneth Graunke wrote: > At link time, we resolve the size of implicitly sized arrays. > When doing so, we update the type of the ir_variables.  However, > we neglected to update the type of ir_dereference nodes which > reference those variables. > > It turns

[Mesa-dev] [PATCH 3/3] anv: Rework fences

Our previous fence implementation was very simple. Fences had two states: signaled and unsignaled. However, this didn't properly handle all of the edge-cases that we need to handle. In order to handle the case where the client calls vkGetFenceStatus on a fence that has not yet been submitted

[Mesa-dev] [PATCH 2/3] anv/wsi: Set the fence to signaled in AcquireNextImageKHR

--- src/intel/vulkan/anv_wsi.c | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/src/intel/vulkan/anv_wsi.c b/src/intel/vulkan/anv_wsi.c index 064581d..72f79f1 100644 --- a/src/intel/vulkan/anv_wsi.c +++ b/src/intel/vulkan/anv_wsi.c @@ -323,13 +323,19 @@ VkResult

[Mesa-dev] [PATCH 1/3] anv/gen8: Stall when needed in Cmd(Set|Reset)Event

--- src/intel/vulkan/gen8_cmd_buffer.c | 29 + 1 file changed, 29 insertions(+) diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c index 0548a5e..5df2e50 100644 --- a/src/intel/vulkan/gen8_cmd_buffer.c +++

[Mesa-dev] [PATCH 0.5/3] anv/blorp: Don't create linear ASTC surfaces for buffers

Such a surface is not possible on our hardware. Without this change, ISL surface creation would fail with the next patch. Signed-off-by: Nanley Chery --- This series requires the following extra patch, seemingly due to the recent changes with blorp.

Re: [Mesa-dev] [PATCH 1/3] st/mesa/r200/i915/i965: use rzalloc() to create gl_program

On Wed, 2016-11-02 at 16:27 -0700, Eric Anholt wrote: > Timothy Arceri writes: > > > > > This will allow us to move some fields from gl_linked_shader to > > gl_program, which will allow us to do some clean-ups like storing > > gl_program directly in the

Re: [Mesa-dev] [PATCH 3/7] glsl/lower_if: don't lower branches touching tess control outputs

On Thu, Nov 3, 2016 at 12:01 AM, Ilia Mirkin wrote: > On Wed, Nov 2, 2016 at 6:55 PM, Marek Olšák wrote: >> On Wed, Nov 2, 2016 at 2:55 PM, Nicolai Hähnle wrote: >>> On 29.10.2016 01:13, Marek Olšák wrote: From: Marek Olšák

Re: [Mesa-dev] [PATCH 1/3] st/mesa/r200/i915/i965: use rzalloc() to create gl_program

Timothy Arceri writes: > This will allow us to move some fields from gl_linked_shader to > gl_program, which will allow us to do some clean-ups like storing > gl_program directly in the CurrentProgram array in gl_pipeline_object > enabling some small validation

Re: [Mesa-dev] [PATCH 3/7] glsl/lower_if: don't lower branches touching tess control outputs

On Wed, Nov 2, 2016 at 6:55 PM, Marek Olšák wrote: > On Wed, Nov 2, 2016 at 2:55 PM, Nicolai Hähnle wrote: >> On 29.10.2016 01:13, Marek Olšák wrote: >>> >>> From: Marek Olšák >>> >>> --- >>> src/compiler/glsl/ir_optimization.h

Re: [Mesa-dev] [PATCH 3/7] glsl/lower_if: don't lower branches touching tess control outputs

On Wed, Nov 2, 2016 at 2:55 PM, Nicolai Hähnle wrote: > On 29.10.2016 01:13, Marek Olšák wrote: >> >> From: Marek Olšák >> >> --- >> src/compiler/glsl/ir_optimization.h | 3 ++- >> src/compiler/glsl/lower_if_to_cond_assign.cpp | 23 >>

Re: [Mesa-dev] [PATCH] gallium/hud: call fflush() after printing error messages

Reviewed-by: Charmaine Lee From: Brian Paul Sent: Wednesday, November 2, 2016 3:08 PM To: mesa-dev@lists.freedesktop.org Cc: Charmaine Lee Subject: [PATCH] gallium/hud: call fflush() after printing error

Re: [Mesa-dev] [PATCH 0/6] nvc0: some more performance metrics changes

Series is Reviewed-by: Ilia Mirkin On Wed, Nov 2, 2016 at 7:12 PM, Samuel Pitoiset wrote: > Hi, > > Spotted when working on SM50 performance counters implementation (which is > almost ready). More performance metrics could be actually added but

[Mesa-dev] [PATCH 2/3] mesa: move shader_info to the start of gl_program

This will allow use to use ralloc_parent() on the info field and fix a regression in nir_sweep() caused by e1af20f18a8. This is intended to be a temporary requirement that will be removed when we finish separating shader_info from nir_shader. Cc: Eric Anholt ---

[Mesa-dev] [PATCH 1/3] st/mesa/r200/i915/i965: use rzalloc() to create gl_program

This will allow us to move some fields from gl_linked_shader to gl_program, which will allow us to do some clean-ups like storing gl_program directly in the CurrentProgram array in gl_pipeline_object enabling some small validation optimisations at draw time. Also it is error prone to depend on

[Mesa-dev] [PATCH 3/3] nir: fix nir_shader_clone() and nir_sweep()

These were broken in e1af20f18a8 when the info field in nir_shader was turned into a pointer. Clone was copying the pointer rather than the data and nir_sweep was cleaning up shader_info rather than claiming it. Cc: Eric Anholt --- src/compiler/nir/nir_clone.c | 2 +-

[Mesa-dev] [PATCH 4/6] nvc0: do not expose metric-inst_issued twice on SM35

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c index

[Mesa-dev] [PATCH 2/6] nvc0: respect 80-chars for perf metrics descriptions

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c

[Mesa-dev] [PATCH 6/6] nvc0: add new warp_nonpred_execution_efficiency metric on SM35

Event not_predicated_off_thread_inst_executed is SM35+. Signed-off-by: Samuel Pitoiset --- .../drivers/nouveau/nvc0/nvc0_query_hw_metric.c| 37 +- .../drivers/nouveau/nvc0/nvc0_query_hw_metric.h| 1 + 2 files changed, 37 insertions(+), 1

[Mesa-dev] [PATCH 3/6] nvc0: add new warp_execution_efficiency metric on SM30+

Signed-off-by: Samuel Pitoiset --- .../drivers/nouveau/nvc0/nvc0_query_hw_metric.c| 23 ++ .../drivers/nouveau/nvc0/nvc0_query_hw_metric.h| 1 + 2 files changed, 24 insertions(+) diff --git

[Mesa-dev] [PATCH 5/6] nvc0: add missing metric-issue_slot on SM35

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c index

[Mesa-dev] [PATCH 0/6] nvc0: some more performance metrics changes

Hi, Spotted when working on SM50 performance counters implementation (which is almost ready). More performance metrics could be actually added but this will require investigation because blob tries to obfuscate some signals which makes the process harder than it seems. Please review, Thanks!

[Mesa-dev] [PATCH 1/6] nvc0: sort performance metrics alphabetically

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c

[Mesa-dev] [PATCH] gallium/hud: call fflush() after printing error messages

For Windows. Otherwise, we don't see the message until the program exits. --- src/gallium/auxiliary/hud/hud_context.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/gallium/auxiliary/hud/hud_context.c b/src/gallium/auxiliary/hud/hud_context.c index

Re: [Mesa-dev] [Mesa-stable] [PATCH] nir: Flip gl_SamplePosition in nir_lower_wpos_ytransform().

On Tue, Nov 1, 2016 at 2:25 PM, Francisco Jerez wrote: > Assuming the hardware is set-up to use a screen coordinate system > flipped vertically with respect to the GL's window coordinate system, > the SYSTEM_VALUE_SAMPLE_POS vector will also be flipped vertically > with

Re: [Mesa-dev] [PATCH 0/7] GLSL: Lowering small conditional branches

On Wed, Nov 2, 2016 at 3:02 PM, Nicolai Hähnle wrote: > Patches 1, 2, 4 - 6: > > Reviewed-by: Nicolai Hähnle Thanks. > > I have one pending LLVM patch related to indirect addressing. Not sure if > that's related to the regressions, but it may be.

[Mesa-dev] [PATCH] glsl: Update deref types when resizing implicitly sized arrays.

At link time, we resolve the size of implicitly sized arrays. When doing so, we update the type of the ir_variables. However, we neglected to update the type of ir_dereference nodes which reference those variables. It turns out array_resize_visitor (for GS/TCS/TES interface array handling)

Re: [Mesa-dev] [RFC PATCH] st/mesa/r200/i915/i965: move ARB program fields into a union

On Wed, 2016-11-02 at 12:08 +0100, Marek Olšák wrote: > On Wed, Nov 2, 2016 at 2:38 AM, Timothy Arceri > wrote: > > > > I'm about to do some refactoring that will move a bunch of glsl > > only > > fields from gl_linked_program into gl_program. > > > > If we wan't

Re: [Mesa-dev] [PATCH] amd/addrlib: limit fastcall/regparm to GCC i386

Reviewed-by: Marek Olšák Marek On Wed, Nov 2, 2016 at 4:32 PM, Emil Velikov wrote: > From: Emil Velikov > > The use of regparm causes an error on arm/arm64 builds with clang. > fastcall is allowed, but still throws a

Re: [Mesa-dev] [RFC PATCH] st/mesa/r200/i915/i965: move ARB program fields into a union

On Wed, 2016-11-02 at 09:07 -0700, Eric Anholt wrote: > Timothy Arceri writes: > > > > > I'm about to do some refactoring that will move a bunch of glsl > > only > > fields from gl_linked_program into gl_program. > > > > If we wan't to share memory it makes sense

Re: [Mesa-dev] [PATCH 31/31] radeonsi: generate GS prolog to (partially) fix triangle strip adjacency rotation

On Mon, Oct 31, 2016 at 11:11 PM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > Fixes GL45-CTS.geometry_shader.adjacency.adjacency_indiced_triangle_strip and > others. > > This leaves the case of triangle strips with adjacency and primitive

[Mesa-dev] [PATCH v3 7/8] anv/batch_chain: Improve write_reloc

The old version wasn't properly handling large addresses where we have to sign-extend to get it into the "canonical form" expected by the hardware. Also, the new version is capable of doing a clflush of the newly written reloc if requested. Signed-off-by: Jason Ekstrand ---

[Mesa-dev] [PATCH v3 8/8] anv: Do relocations in userspace before execbuf ioctl

From: Kristian Høgsberg Kristensen Since our surface state buffer is shared by all batches, the kernel does a full stall and sync with the CPU between batches every time we call execbuf2 because it refuses to do relocations on an active buffer. Doing them in

[Mesa-dev] [PATCH v3 6/8] anv: Initialize anv_bo::offset to -1

Since -1 is an invalid GPU address, this lets us know whether or not we have a valid address for a buffer. We don't get a valid address until the first time that buffer is used in an execbuf2 ioctl. Signed-off-by: Jason Ekstrand --- src/intel/vulkan/anv_private.h | 2 +-

[Mesa-dev] [PATCH v3 1/8] anv/device: Add an execbuf wrapper

This wrapper ensures that we always update all anv_bo::offset fields based on the offsets returned by the kernel. Signed-off-by: Jason Ekstrand --- src/intel/vulkan/anv_device.c | 51 +- src/intel/vulkan/anv_private.h | 4 2

[Mesa-dev] [PATCH v3 5/8] anv/allocator: Simplify anv_scratch_pool

The previous implementation was being overly clever and using the anv_bo::size field as its mutex. Scratch pool allocations don't happen often, will happen at most a fixed number of times, and never happen in the critical path (they only happen in shader compilation). We can make this much

[Mesa-dev] [PATCH v3 4/8] anv: Add a new bo_pool_init helper

This ensures that we're always setting all of the fields in anv_bo Signed-off-by: Jason Ekstrand --- src/intel/vulkan/anv_allocator.c | 9 ++--- src/intel/vulkan/anv_device.c| 10 +++--- src/intel/vulkan/anv_intel.c | 11 +--

[Mesa-dev] [PATCH v3 2/8] anv: Add a cmd_buffer_execbuf helper

This puts the actual execbuf2 call in anv_batch_chain.c along with the other relocation stuff. --- src/intel/vulkan/anv_batch_chain.c | 8 src/intel/vulkan/anv_device.c | 3 +-- src/intel/vulkan/anv_private.h | 2 ++ 3 files changed, 11 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [PATCH v3 3/8] anv: Don't presume to know what address is in a surface relocation

Because our relocation processing happens at EndCommandBuffer time and because RENDER_SURFACE_STATE objects may be shared by batches, we really have no clue whatsoever what address is actually written to the relocation offset in the BO. We need to stop making such claims to the kernel and just

[Mesa-dev] [PATCH v3 0/8] anv: Do relocations in userspace

This is primarily a re-send of the previous series. In responding to some of Chris Wilson's comments, I found more bugs in the existing relocation code which required some fixing. One major change from the previous series is that I put all of the new relocation handling code in anv_batch_chain.c

Re: [Mesa-dev] [PATCH 0/3] anv: Prevent creation of invalid compressed textures

On Wed, Nov 02, 2016 at 01:37:07PM -0700, Jason Ekstrand wrote: > Series is > > Reviewed-by: Jason Ekstrand > Thanks! > On Thu, Sep 22, 2016 at 5:19 PM, Nanley Chery wrote: > > > This series prevents invalid compressed textures from being created

Re: [Mesa-dev] [PATCH 0/3] anv: Prevent creation of invalid compressed textures

Series is Reviewed-by: Jason Ekstrand On Thu, Sep 22, 2016 at 5:19 PM, Nanley Chery wrote: > This series prevents invalid compressed textures from being created in > the Vulkan driver. There aren't any Vulkan CTS tests for 1D compressed > textures,

Re: [Mesa-dev] [v2 22.1/26] i965: Apply non-msrt mcs array/mipmap horizontal alignment rules

On Wed, Nov 2, 2016 at 12:45 PM, Topi Pohjolainen < topi.pohjolai...@gmail.com> wrote: > Signed-off-by: Topi Pohjolainen > CC: Jason Ekstrand > --- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 35 > --- > 1 file

[Mesa-dev] [v2 22.1/26] i965: Apply non-msrt mcs array/mipmap horizontal alignment rules

Signed-off-by: Topi Pohjolainen CC: Jason Ekstrand --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 35 --- 1 file changed, 32 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] [v2 22/26] i965: Apply non-msrt mcs array/mipmap vertical alignment rules

There are actually two contradicting pieces in the bspec: From the BSpec: 3D-Media-GPGPU Engine - 3D Pipeline Stages - Pixel - Pixel Backend [IVB+] - MCS Buffer for Render Target(s) BDW: Mip-mapped and arrayed surfaces are supported with MCS buffer layout with these alignments in the RT

[Mesa-dev] [Bug 97879] [amdgpu] Rocket League: long hangs (several seconds) when loading assets (models/textures/shaders?)

https://bugs.freedesktop.org/show_bug.cgi?id=97879 --- Comment #42 from Evan Black --- Can't really contribute much in terms of any of the tracing stuff; just dropping my specs here as I have similar issues. Core i5 4690k R9 285 8 GB Memory I've tried it both on my SSD and

Re: [Mesa-dev] [PATCH 3/3] glx: make interop ABI visible again

On Wed, Nov 2, 2016 at 2:07 PM, Marek Olšák wrote: > From: Marek Olšák > > This was broken when the GLAPI use was removed from mesa_glinterop.h. > > Cc: 12.0 13.0 Series is: Acked-by: Alex Deucher

Re: [Mesa-dev] [PATCH 6/6] anv: Do relocations in userspace before execbuf ioctl

On Wed, Nov 2, 2016 at 9:43 AM, Chris Wilson wrote: > On Tue, Nov 01, 2016 at 03:35:13PM -0700, Jason Ekstrand wrote: > > +static void > > +write_reloc(const struct anv_device *device, void *p, uint64_t v) > > +{ > > + unsigned reloc_size = 0; > > + if

Re: [Mesa-dev] [PATCH 2/3] nir: add conditional discard optimisation

On Tue, Nov 1, 2016 at 6:26 PM, Dave Airlie wrote: > From: Dave Airlie > > This is ported from GLSL and converts > > if (cond) > discard; > > into > discard_if(cond); > > This removes a block, but also is needed by radv > to workaround a bug in the

[Mesa-dev] [PATCH 3/3] glx: make interop ABI visible again

From: Marek Olšák This was broken when the GLAPI use was removed from mesa_glinterop.h. Cc: 12.0 13.0 --- src/glx/glxcmds.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/glx/glxcmds.c b/src/glx/glxcmds.c

[Mesa-dev] [PATCH 2/3] egl: make interop ABI visible again

From: Marek Olšák This was broken when the GLAPI use was removed from mesa_glinterop.h. Cc: 12.0 13.0 --- src/egl/main/eglapi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/egl/main/eglapi.c

[Mesa-dev] [PATCH 1/3] egl: use util/macros.h

From: Marek Olšák I need the definition of PUBLIC. Cc: 12.0 13.0 --- src/egl/drivers/dri2/egl_dri2.h | 2 -- src/egl/main/egldefines.h | 5 ++--- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git

Re: [Mesa-dev] [PATCH v4] clover: Pass unquoted compiler arguments to Clang

On 10/30/2016 08:16 PM, Francisco Jerez wrote: > Vedran Miletić writes: > >> OpenCL apps can quote arguments they pass to the OpenCL compiler, most >> commonly include paths containing spaces. >> >> If the Clang OpenCL compiler was called via a shell, the shell would >> split

Re: [Mesa-dev] [PATCH 1/3] vl/dri3: use external texture as back buffers

Regarding to xcb_present_pixmap client call, you might have to check xserver present/present.c on how xserver deal with it. Regards, Leo On 11/02/2016 10:55 AM, Nayan Deshmukh wrote: Hi Leo, To support clipping of the output texture I was trying to send a xcb_xfixes_region as the fifth

Re: [Mesa-dev] [PATCH 1/2] gm107/ir: adjust jump offsets to avoid sched info

Good idea, will put a v2 together. On Wed, Nov 2, 2016 at 1:20 PM, Samuel Pitoiset wrote: > This seems like redundant, and because the GM107 emitter already has a bunch > of emitXXX() helpers, how about adding emitTARG()? Like: > > void > CodeEmitterGM107::emitTARG() >

Re: [Mesa-dev] [PATCH 1/2] gm107/ir: adjust jump offsets to avoid sched info

This seems like redundant, and because the GM107 emitter already has a bunch of emitXXX() helpers, how about adding emitTARG()? Like: void CodeEmitterGM107::emitTARG() { int32_t pos = insn->target.bb->binPos; if (writeIssueDelays && !(pos & 0x1f)) pos += 8; emitField(0x14, 24, pos -

Re: [Mesa-dev] [PATCH 2/2] nv50/ir: generalize sched block sizes and remove duplicated logic

This is a nice refactoring. Reviewed-by: Samuel Pitoiset On 11/02/2016 05:38 AM, Ilia Mirkin wrote: The GM107 had a bunch of prepareEmission needlessly duplicated because the sched block size is different. Move that knowledge into the target, and generalize the

Re: [Mesa-dev] [PATCH 6/6] anv: Do relocations in userspace before execbuf ioctl

On Tue, Nov 01, 2016 at 03:35:13PM -0700, Jason Ekstrand wrote: > +static void > +write_reloc(const struct anv_device *device, void *p, uint64_t v) > +{ > + unsigned reloc_size = 0; > + if (device->info.gen >= 8) { > + /* From the Broadwell PRM Vol. 2a,

Re: [Mesa-dev] [PATCH 1/3] vulkan/wsi/x11: Better handle wsi_x11_connection_create failure

Thanks to both of you. Pushed. On Wed, Nov 2, 2016 at 3:11 AM, Eric Engestrom wrote: > On Tuesday, 2016-11-01 17:56:05 -0700, Jason Ekstrand wrote: > > Without this fix, the function would still end up returning NULL but it > > would put that NULL connection in the

Re: [Mesa-dev] [PATCH 4/4] gallium/radeon: Multiply bpe by nsamples in surf_winsys_to_drm

For the series: Reviewed-by: Nicolai Hähnle On 02.11.2016 12:11, Michel Dänzer wrote: From: Michel Dänzer For symmetry with surf_drm_to_winsys. Signed-off-by: Michel Dänzer ---

Re: [Mesa-dev] [RFC PATCH] st/mesa/r200/i915/i965: move ARB program fields into a union

Timothy Arceri writes: > I'm about to do some refactoring that will move a bunch of glsl only > fields from gl_linked_program into gl_program. > > If we wan't to share memory it makes sense to do it while I move > things. I just wanted to see what people think about

Re: [Mesa-dev] [PATCH] amd/addrlib: limit fastcall/regparm to GCC i386

On 02.11.2016 16:32, Emil Velikov wrote: From: Emil Velikov The use of regparm causes an error on arm/arm64 builds with clang. fastcall is allowed, but still throws a warning. As both options only have effect on 32-bit x86 builds, limit them to that case. v2: keep

Re: [Mesa-dev] Ramifications of software development with respect to climate change

Nicolai Hähnle writes: > On 02.11.2016 08:59, Edward O'Callaghan wrote: >> This maybe somewhat of a striking topic however it is one that has not >> really had enough attention, I feel, in a way that warrants the gravity >> of if ramifications. Thus, I really would like to

Re: [Mesa-dev] [PATCH 2/3] nir: add conditional discard optimisation

Dave Airlie writes: > From: Dave Airlie > > This is ported from GLSL and converts > > if (cond) > discard; > > into > discard_if(cond); > > This removes a block, but also is needed by radv > to workaround a bug in the LLVM backend. I think this is

Re: [Mesa-dev] [PATCH] android: avoid using libdrm with host modules

On 28 October 2016 at 10:54, Chih-Wei Huang wrote: > Note LOCAL_CFLAGS and LOCAL_SHARED_LIBRARIES in Android.common.mk > are used by both host and target modules. However, commit 112e988 > moved libdrm related flags to common. It causes the errors like: > > error: >

[Mesa-dev] [PATCH] amd/addrlib: limit fastcall/regparm to GCC i386

From: Emil Velikov The use of regparm causes an error on arm/arm64 builds with clang. fastcall is allowed, but still throws a warning. As both options only have effect on 32-bit x86 builds, limit them to that case. v2: keep the __i386__ within GCC (Nicolai) Cc: 13.0

Re: [Mesa-dev] [PATCH] glsl: fix lowering of UBO references of named blocks

On 02.11.2016 15:46, Iago Toral wrote: On Mon, 2016-10-31 at 22:19 +0100, Nicolai Hähnle wrote: From: Nicolai Hähnle When a UBO reference has the form block_name.foo where block_name refers to a block where the first member has a non-zero offset, the base offset was

Re: [Mesa-dev] [PATCH 2/3] nir: add conditional discard optimisation

On 02.11.2016 02:26, Dave Airlie wrote: From: Dave Airlie This is ported from GLSL and converts if (cond) discard; into discard_if(cond); This removes a block, but also is needed by radv to workaround a bug in the LLVM backend. FYI, the GLSL pass also converts

[Mesa-dev] [PATCH 2/2] i965/vec4: fix indentation in lower_attributes_to_hw_regs()

--- src/mesa/drivers/dri/i965/brw_vec4.cpp | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 1fb65f3..03c83af 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++

[Mesa-dev] [PATCH 1/2] i965/vec4: Fail compilation if we run out of registers during payload setup

Right now, if this happens we trigger an assertion when we try to create a GRF register > 128. Let the backend compiler fail the compilation in this case. For things like geometry shaders, this can trigger a compilation using interleaved attribute setup which might even help get the shader to

Re: [Mesa-dev] nir/radv: workaround broken kilp support

On Wed, Nov 02, 2016 at 11:26:08AM +1000, Dave Airlie wrote: > So it appears at least the LLVM 3.9 backend can get confused > when it gets hit with if (cond) discard type constructs, and we > have a GLSL optimisation to convert this to discard_if, so I've > ported that to NIR, and enabled it for

Re: [Mesa-dev] [PATCH 1/3] vl/dri3: use external texture as back buffers

Hi Leo, To support clipping of the output texture I was trying to send a xcb_xfixes_region as the fifth argument (i.e valid-area) to xcb_present_pixmap but it still displays the entire surface. Am I missing something? Regards, Nayan ___ mesa-dev

Re: [Mesa-dev] [PATCH 2/3] dri3: Flush and wait for X rendering upon glXWaitX()

On Tue, 2016-11-01 at 20:48 +, Chris Wilson wrote: > The fence_fd is closed by xcb_dri3_fence_from_fd() as > xcb_send_request_with_fds() always calls close(). > -Chris D'oh! You are correct. Objection withdrawn. - ajax ___ mesa-dev mailing list

Re: [Mesa-dev] [PATCH] glsl: fix lowering of UBO references of named blocks

On Mon, 2016-10-31 at 22:19 +0100, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > When a UBO reference has the form block_name.foo where block_name > refers > to a block where the first member has a non-zero offset, the base > offset > was incorrectly added to the

Re: [Mesa-dev] [PATCH] mesa/glsl: delete previously linked shaders earlier when linking

On 1 November 2016 at 23:47, Timothy Arceri wrote: > This move the delete linked shaders call to > _mesa_clear_shader_program_data() which makes sure we delete them > before returning due to any validation problems. > > It also reduces some code duplication. > > Cc:

Re: [Mesa-dev] [PATCH 1/3] dri2: Serialize with all X rendering on glXWaitX()

Hi Chris, On 22 October 2016 at 11:00, Chris Wilson wrote: > Xorg may implement fine grained per-drawable serialisation. If the > client is reading from shared pixmap sources, flushing rendering to the > current drawable is not enough (even if the current code did that,

[Mesa-dev] [Bug 98263] [radv] The Talos Principle fails to launch with "Fatal error: Cannot set display mode."

https://bugs.freedesktop.org/show_bug.cgi?id=98263 Vedran Miletić changed: What|Removed |Added CC||ved...@miletic.net

Re: [Mesa-dev] [PATCH 0/7] GLSL: Lowering small conditional branches

Patches 1, 2, 4 - 6: Reviewed-by: Nicolai Hähnle I have one pending LLVM patch related to indirect addressing. Not sure if that's related to the regressions, but it may be. Cheers, Nicolai On 29.10.2016 01:13, Marek Olšák wrote: Hi, this series enables lowering

Re: [Mesa-dev] [PATCH 3/7] glsl/lower_if: don't lower branches touching tess control outputs

On 29.10.2016 01:13, Marek Olšák wrote: From: Marek Olšák --- src/compiler/glsl/ir_optimization.h | 3 ++- src/compiler/glsl/lower_if_to_cond_assign.cpp | 23 --- src/compiler/glsl/test_optpass.cpp| 2 +-

Re: [Mesa-dev] Ramifications of software development with respect to climate change

On 02.11.2016 08:59, Edward O'Callaghan wrote: This maybe somewhat of a striking topic however it is one that has not really had enough attention, I feel, in a way that warrants the gravity of if ramifications. Thus, I really would like to kick this discussion into hopefully something serious

Re: [Mesa-dev] [PATCH] glx/windows: Add wgl.h to the sources list

On 02/11/2016 11:13, Andreas Boll wrote: Otherwise it won't be picked in the tarball and the build will fail. Thanks, my bad. Reviewed-by: Jon Turney Fixes: 533b3530c12 ("direct-to-native-GL for GLX clients on Cygwin ("Windows-DRI")") Cc: "13.0"

[Mesa-dev] [PATCH] glx/windows: Add wgl.h to the sources list

Otherwise it won't be picked in the tarball and the build will fail. Fixes: 533b3530c12 ("direct-to-native-GL for GLX clients on Cygwin ("Windows-DRI")") Cc: "13.0" Signed-off-by: Andreas Boll --- src/glx/windows/Makefile.am | 3

[Mesa-dev] [PATCH 4/4] gallium/radeon: Multiply bpe by nsamples in surf_winsys_to_drm

From: Michel Dänzer For symmetry with surf_drm_to_winsys. Signed-off-by: Michel Dänzer --- src/gallium/winsys/radeon/drm/radeon_drm_surface.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [PATCH 2/4] gallium/radeon: Only convert stencil info if RADEON_SURF_SBUFFER is set

From: Michel Dänzer Fixes valgrind warnings about using uninitialized memory when starting X. Signed-off-by: Michel Dänzer --- src/gallium/winsys/radeon/drm/radeon_drm_surface.c | 31 +++--- 1 file changed, 21 insertions(+), 10

[Mesa-dev] [PATCH 1/4] gallium/radeon: Only loop up to last_level for drm<->winsys conversion

From: Michel Dänzer Fixes spurious assertion failure in surf_level_drm_to_winsys when starting X, due to processing a miplevel which was never initialized. Fixes: e9c76eeeaa67 ("gallium/radeon: remove radeon_surf_level::pitch_bytes") Signed-off-by: Michel Dänzer

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