[Mesa-dev] [PATCH] radv/meta: don't need vertex info for resolve shader.

[Dave Airlie]

From: Dave Airlie 

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_meta_resolve_fs.c | 20 ++--
 1 file changed, 2 insertions(+), 18 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_resolve_fs.c 
b/src/amd/vulkan/radv_meta_resolve_fs.c
index a405f80..43d964f 100644
--- a/src/amd/vulkan/radv_meta_resolve_fs.c
+++ b/src/amd/vulkan/radv_meta_resolve_fs.c
@@ -152,24 +152,8 @@ fail:
 
 static const VkPipelineVertexInputStateCreateInfo normal_vi_create_info = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
-   .vertexBindingDescriptionCount = 1,
-   .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
-   {
-   .binding = 0,
-   .stride = 2 * sizeof(float),
-   .inputRate = VK_VERTEX_INPUT_RATE_VERTEX
-   },
-   },
-   .vertexAttributeDescriptionCount = 1,
-   .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
-   {
-   /* Texture Coordinate */
-   .location = 0,
-   .binding = 0,
-   .format = VK_FORMAT_R32G32_SFLOAT,
-   .offset = 0
-   },
-   },
+   .vertexBindingDescriptionCount = 0,
+   .vertexAttributeDescriptionCount = 0,
 };
 
 static VkFormat pipeline_formats[] = {
-- 
2.9.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/8] mesa: add KHR_no_error support for glClipControl()

[Timothy Arceri]

On 23/06/17 00:36, Samuel Pitoiset wrote:

---
  src/mapi/glapi/gen/ARB_clip_control.xml | 2 +-
  src/mesa/main/viewport.c| 9 +
  src/mesa/main/viewport.h| 3 +++
  3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/src/mapi/glapi/gen/ARB_clip_control.xml 
b/src/mapi/glapi/gen/ARB_clip_control.xml
index ecce133bb99..051a648081f 100644
--- a/src/mapi/glapi/gen/ARB_clip_control.xml
+++ b/src/mapi/glapi/gen/ARB_clip_control.xml
@@ -14,7 +14,7 @@
  
  
  
-

+
  
  
  
diff --git a/src/mesa/main/viewport.c b/src/mesa/main/viewport.c
index cf91dd284cb..2fbb16d6227 100644
--- a/src/mesa/main/viewport.c
+++ b/src/mesa/main/viewport.c
@@ -444,6 +444,15 @@ clip_control(struct gl_context *ctx, GLenum origin, GLenum 
depth)
  
  
  void GLAPIENTRY

+_mesa_ClipControl_no_error(GLenum origin, GLenum depth)
+{
+   GET_CURRENT_CONTEXT(ctx);
+   clip_control(ctx, origin, depth);
+


Please remove the extra space above. Otherwise, series:

Reviewed-by: Timothy Arceri 


+}
+
+
+void GLAPIENTRY
  _mesa_ClipControl(GLenum origin, GLenum depth)
  {
 GET_CURRENT_CONTEXT(ctx);
diff --git a/src/mesa/main/viewport.h b/src/mesa/main/viewport.h
index 395131982cf..88757f0291e 100644
--- a/src/mesa/main/viewport.h
+++ b/src/mesa/main/viewport.h
@@ -74,6 +74,9 @@ extern void
  _mesa_init_viewport(struct gl_context *ctx);
  
  
+void GLAPIENTRY

+_mesa_ClipControl_no_error(GLenum origin, GLenum depth);
+
  extern void GLAPIENTRY
  _mesa_ClipControl(GLenum origin, GLenum depth);
  


___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] st/dri: Add support for PIPE_FORMAT_RGBX8888_UNORM

[Lepton Wu]

Hi All,

So it turns out someone else have a much complete fix for this issue and I
think I can wait that CL to land in mesa.

Feel free to drop this CL. Thanks all for your review.

On Tue, Jun 20, 2017 at 2:06 AM, Emil Velikov 
wrote:

> Hi Lepton,
>
> On 19 June 2017 at 18:51, Lepton Wu  wrote:
> > The original dri2_format_to_pipe_format function just misses case branch
> > for __DRI_IMAGE_FORMAT_XBGR. I discovered this when debugging one
> google
> > map crash inside emulator.
> >
> > Signed-off-by: Lepton Wu 
> > ---
> >  src/gallium/state_trackers/dri/dri2.c | 3 +++
> >  1 file changed, 3 insertions(+)
> >
> > diff --git a/src/gallium/state_trackers/dri/dri2.c
> b/src/gallium/state_trackers/dri/dri2.c
> > index c5e69d639b..f02ef30dd7 100644
> > --- a/src/gallium/state_trackers/dri/dri2.c
> > +++ b/src/gallium/state_trackers/dri/dri2.c
> > @@ -186,6 +186,9 @@ static enum pipe_format dri2_format_to_pipe_format
> (int format)
> > case __DRI_IMAGE_FORMAT_ARGB:
> >pf = PIPE_FORMAT_BGRA_UNORM;
> >break;
> > +   case __DRI_IMAGE_FORMAT_XBGR:
> > +  pf = PIPE_FORMAT_RGBX_UNORM;
> > +  break;
>
> Can you provide some additional information here:
>  - How did you get here - a backtrace will be appreciated.
>  - Do you have additional patches that you apply on top of Mesa - can
> you share a link to them.
>
> I'm asking all this information since the commit looks deceptively
> close to an earlier one ccdcf91104a, which caused issues and had to be
> reverted see c0c6ca40a25.
>
> Thanks
> Emil
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [Mesa-stable] [PATCH 1/3] amd/common: fix off-by-one in sid_tables.py

[Andres Gomez]

On Mon, 2017-06-19 at 12:36 +0100, Emil Velikov wrote:
> Hi Nicolai,
> 
> On 12 June 2017 at 20:33, Nicolai Hähnle  wrote:
> > From: Nicolai Hähnle 
> > 
> > The very last entry in the sid_strings_offsets table ended up missing,
> > leading to out-of-bounds reads and potential crashes.
> 
> Should we have this and " [PATCH 2/3] r600: fix off-by-one in
> egd_tables.py" for -stable?
> Seems like a worthy material IMHO.

Thanks for spotting this, Emil, but egd_tables.py didn't make it for
-stable so I suppose we will still leave those 2 out too.

-- 
Br,

Andres
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/2] i965/cnl: Don't write to Cache Mode Register 1 on gen10+

[Kenneth Graunke]

On Thursday, June 22, 2017 10:54:43 AM PDT Anuj Phogat wrote:
> With below optimizations gone in gen10+ we have nothing left out to
> write to CACHE_MODE_1:
> Float Blend Optimization Enable: This bit have been removed in gen10+
> Partial Resolve Disable in VC: Recommendation is to always set this
> field to 0 in gen10+ and that's the default value of the bit.
> 
> Signed-off-by: Anuj Phogat 
> ---
>  src/mesa/drivers/dri/i965/brw_state_upload.c | 6 --
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c 
> b/src/mesa/drivers/dri/i965/brw_state_upload.c
> index 926597b..5e82c1b 100644
> --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
> @@ -60,8 +60,10 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
>  
> brw_upload_invariant_state(brw);
>  
> -   /* Recommended optimization for Victim Cache eviction in pixel backend. */
> -   if (brw->gen >= 9) {
> +   if (brw->gen == 9) {
> +  /* Recommended optimizations for Victim Cache eviction and floating
> +   * point blending.
> +   */
>BEGIN_BATCH(3);
>OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));
>OUT_BATCH(GEN7_CACHE_MODE_1);
> 

Both patches are:
Reviewed-by: Kenneth Graunke 


signature.asc
Description: This is a digitally signed message part.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] i965: Drop index buffer re-alignment code.

[Kenneth Graunke]

On Thursday, June 22, 2017 4:10:39 PM PDT Ian Romanick wrote:
> That's weird... I wonder why this code was ever added.  Regardless,
> 
> Reviewed-by: Ian Romanick 

https://bugs.freedesktop.org/show_bug.cgi?id=11910


signature.asc
Description: This is a digitally signed message part.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 0/6] i965/vec4: Implement partial DF register spilling

[Francisco Jerez]

Samuel Iglesias Gonsálvez  writes:

> Hello,
>
> As mentioned in the patch series that implemented Ivybridge support
> ARB_gpu_shader_fp64 [0], the only missing feature in that series was
> register spilling of 64-bit data and, because of that, about ~39 fp64
> piglit tests failed to spill registers.
>
> This new patch series implement register spilling of 64-bit data for
> IVB and splitted DF instructions on vec4 backend in general.
> Unfortunately, this doesn't make the previous failed tests to pass :-(
>

I think the reason why the tests keep failing to register allocate on
you is because you aren't setting up the vec4_instruction::size_written
fields correctly throughout this series.  It's in *byte* units but you
seem to be providing the number in GRF units.  For that reason the
liveness analysis pass will think most of the unspilled data you read is
not fully initialized by the scratch reads, and incorrectly extend their
live ranges all the way up to the program entry point, so spilling of DF
variables will hugely *increase* register pressure instead of reducing
it...

> Nevertheless, I think this is still useful to have it in place. The
> implementation uses 1-OWord block write/read messages by reusing the
> existing implementation. Thanks to that, we can write/read valid dvecN
> data to/from scratch memory even under non-uniform control flow.
>
> If you want to test the branch:
>
> $ git clone -b fp64-ivb-vec4-spilling \
> https://github.com/Igalia/mesa.git
>
> Thanks,
>
> Sam
>
> [0] https://lists.freedesktop.org/archives/mesa-dev/2017-March/148646.html
>
> Samuel Iglesias Gonsálvez (6):
>   i965/eu: add support for 1-OWord Block Read/Write messages
>   i965/vec4/generator: use 1-Oword Block Read/Write messages for DF
> scratch writes/reads
>   i965/generator: use MRF when sending 1-OWord read messages for DF
> scratch reads on IVB
>   i965/vec4: add support for doing DF register spilling on IVB
>   i965/vec4: fix resolve reladdr case on DF scratch read/write on IVB
>   i965/vec4: allow partial DF register spilling
>
>  src/intel/compiler/brw_eu.h  |  18 ++--
>  src/intel/compiler/brw_eu_defines.h  |   2 +
>  src/intel/compiler/brw_eu_emit.c |  42 +++--
>  src/intel/compiler/brw_fs_generator.cpp  |   5 +-
>  src/intel/compiler/brw_shader.cpp|   5 +
>  src/intel/compiler/brw_vec4.cpp  |  10 ++
>  src/intel/compiler/brw_vec4.h|  17 +++-
>  src/intel/compiler/brw_vec4_generator.cpp| 136 
> +++
>  src/intel/compiler/brw_vec4_reg_allocate.cpp |  42 +++--
>  src/intel/compiler/brw_vec4_visitor.cpp  | 125 ++--
>  10 files changed, 361 insertions(+), 41 deletions(-)
>
> -- 
> 2.11.0


signature.asc
Description: PGP signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/6] i965/vec4/generator: use 1-Oword Block Read/Write messages for DF scratch writes/reads

[Francisco Jerez]

Samuel Iglesias Gonsálvez  writes:

> Signed-off-by: Samuel Iglesias Gonsálvez 
> ---
>  src/intel/compiler/brw_eu_defines.h  |   2 +
>  src/intel/compiler/brw_shader.cpp|   5 +
>  src/intel/compiler/brw_vec4.cpp  |   7 ++
>  src/intel/compiler/brw_vec4.h|   8 ++
>  src/intel/compiler/brw_vec4_generator.cpp| 136 
> +++
>  src/intel/compiler/brw_vec4_reg_allocate.cpp |   6 +-
>  src/intel/compiler/brw_vec4_visitor.cpp  |  49 ++
>  7 files changed, 212 insertions(+), 1 deletion(-)
>
> diff --git a/src/intel/compiler/brw_eu_defines.h 
> b/src/intel/compiler/brw_eu_defines.h
> index 1af835d47e..3c148de0fa 100644
> --- a/src/intel/compiler/brw_eu_defines.h
> +++ b/src/intel/compiler/brw_eu_defines.h
> @@ -436,6 +436,8 @@ enum opcode {
> VEC4_OPCODE_PICK_HIGH_32BIT,
> VEC4_OPCODE_SET_LOW_32BIT,
> VEC4_OPCODE_SET_HIGH_32BIT,
> +   VEC4_OPCODE_GEN4_SCRATCH_READ_1OWORD_LOW,
> +   VEC4_OPCODE_GEN4_SCRATCH_READ_1OWORD_HIGH,
>  

What's the point of introducing two different opcodes with essentially
the same semantics (read 32B worth of data) as the current
SHADER_OPCODE_GEN4_SCRATCH_READ?  Is there any downside from using the
current opcode with force_writemask_all?  If anything it would give you
better performance because you'd only have to set up one header (which
stalls the EU pipeline twice), send down one message to the dataport,
and avoid stalling to shuffle the data around in the return payload
(which prevents your two 1OWORD messages from being pipelined at all).

> FS_OPCODE_DDX_COARSE,
> FS_OPCODE_DDX_FINE,
> diff --git a/src/intel/compiler/brw_shader.cpp 
> b/src/intel/compiler/brw_shader.cpp
> index 53d0742d2e..248feacbd2 100644
> --- a/src/intel/compiler/brw_shader.cpp
> +++ b/src/intel/compiler/brw_shader.cpp
> @@ -296,6 +296,11 @@ brw_instruction_name(const struct gen_device_info 
> *devinfo, enum opcode op)
> case FS_OPCODE_PACK:
>return "pack";
>  
> +
> +   case VEC4_OPCODE_GEN4_SCRATCH_READ_1OWORD_LOW:
> +  return "gen4_scratch_read_1word_low";
> +   case VEC4_OPCODE_GEN4_SCRATCH_READ_1OWORD_HIGH:
> +  return "gen4_scratch_read_1word_high";
> case SHADER_OPCODE_GEN4_SCRATCH_READ:
>return "gen4_scratch_read";
> case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
> diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp
> index b443effca9..b6d409eea2 100644
> --- a/src/intel/compiler/brw_vec4.cpp
> +++ b/src/intel/compiler/brw_vec4.cpp
> @@ -259,6 +259,8 @@ bool
>  vec4_instruction::can_do_writemask(const struct gen_device_info *devinfo)
>  {
> switch (opcode) {
> +   case VEC4_OPCODE_GEN4_SCRATCH_READ_1OWORD_LOW:
> +   case VEC4_OPCODE_GEN4_SCRATCH_READ_1OWORD_HIGH:
> case SHADER_OPCODE_GEN4_SCRATCH_READ:
> case VEC4_OPCODE_DOUBLE_TO_F32:
> case VEC4_OPCODE_DOUBLE_TO_D32:
> @@ -335,6 +337,9 @@ vec4_visitor::implied_mrf_writes(vec4_instruction *inst)
>return 1;
> case VS_OPCODE_PULL_CONSTANT_LOAD:
>return 2;
> +   case VEC4_OPCODE_GEN4_SCRATCH_READ_1OWORD_LOW:
> +   case VEC4_OPCODE_GEN4_SCRATCH_READ_1OWORD_HIGH:
> +  return 1;
> case SHADER_OPCODE_GEN4_SCRATCH_READ:
>return 2;
> case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
> @@ -2091,6 +2096,8 @@ get_lowered_simd_width(const struct gen_device_info 
> *devinfo,
>  {
> /* Do not split some instructions that require special handling */
> switch (inst->opcode) {
> +   case VEC4_OPCODE_GEN4_SCRATCH_READ_1OWORD_LOW:
> +   case VEC4_OPCODE_GEN4_SCRATCH_READ_1OWORD_HIGH:
> case SHADER_OPCODE_GEN4_SCRATCH_READ:
> case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
>return inst->exec_size;
> diff --git a/src/intel/compiler/brw_vec4.h b/src/intel/compiler/brw_vec4.h
> index d828da02ea..a5b45aca21 100644
> --- a/src/intel/compiler/brw_vec4.h
> +++ b/src/intel/compiler/brw_vec4.h
> @@ -214,6 +214,9 @@ public:
>  enum brw_conditional_mod condition);
> vec4_instruction *IF(enum brw_predicate predicate);
> EMIT1(SCRATCH_READ)
> +   vec4_instruction *DF_IVB_SCRATCH_READ(const dst_reg , const src_reg 
> ,
> + bool low);
> +
> EMIT2(SCRATCH_WRITE)
> EMIT3(LRP)
> EMIT1(BFREV)
> @@ -294,6 +297,11 @@ public:
> dst_reg dst,
> src_reg orig_src,
> int base_offset);
> +   void emit_1grf_df_ivb_scratch_read(bblock_t *block,
> +  vec4_instruction *inst,
> +  dst_reg temp, src_reg orig_src,
> +  int base_offset, bool first_grf);
> +
> void emit_scratch_write(bblock_t *block, vec4_instruction *inst,
>  int base_offset);
> void emit_pull_constant_load(bblock_t *block, vec4_instruction *inst,
> diff --git 

Re: [Mesa-dev] [Mesa-stable] [PATCH] st/glsl_to_tgsi: use correct writemask when converting generic intrinsics

[Andres Gomez]

Nicolai, this depends on:
https://cgit.freedesktop.org/mesa/mesa/commit/src/mesa?id=944455217b67cb524efef9e628baf09416db5524

Which didn't make it for -stable. Should we cherry-pick that too?


On Mon, 2017-06-12 at 21:45 +0200, Nicolai Hähnle wrote:
> From: Nicolai Hähnle 
> 
> This fixes a bug when lowering ballotARB: previously, using writemask 0xf,
> emit_asm would create TGSI_OPCODE_BALLOT instructions that span two registers
> to cover 4 64-bit channels. This could trample over other a neighbouring
> temporary.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101360
> Cc: 17.1 
> ---
>  src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp 
> b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> index c5d2e0f..cb86392 100644
> --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> @@ -3906,20 +3906,22 @@ glsl_to_tgsi_visitor::visit_image_intrinsic(ir_call 
> *ir)
> if (imgvar->data.memory_volatile)
>inst->buffer_access |= TGSI_MEMORY_VOLATILE;
>  }
>  
>  void
>  glsl_to_tgsi_visitor::visit_generic_intrinsic(ir_call *ir, unsigned op)
>  {
> ir->return_deref->accept(this);
> st_dst_reg dst = st_dst_reg(this->result);
>  
> +   dst.writemask = u_bit_consecutive(0, 
> ir->return_deref->var->type->vector_elements);
> +
> st_src_reg src[4] = { undef_src, undef_src, undef_src, undef_src };
> unsigned num_src = 0;
> foreach_in_list(ir_rvalue, param, >actual_parameters) {
>assert(num_src < ARRAY_SIZE(src));
>  
>this->result.file = PROGRAM_UNDEFINED;
>param->accept(this);
>assert(this->result.file != PROGRAM_UNDEFINED);
>  
>src[num_src] = this->result;
-- 
Br,

Andres
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] glmark2 segfault on imx6

[Fabio Estevam]

Hi Eric,

On Thu, Jun 22, 2017 at 8:08 PM, Eric Anholt  wrote:

> I asked afrantzis today, and hopefully I'll get added as a co-maintainer
> so we can get maintenance patches like this in.  Also, apparently
> something has been broken with his mail filters, so PRs weren't being
> seen at all.

Excellent, thanks for the update!
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] i965: Drop index buffer re-alignment code.

[Ian Romanick]

That's weird... I wonder why this code was ever added.  Regardless,

Reviewed-by: Ian Romanick 

On 06/22/2017 11:16 AM, Kenneth Graunke wrote:
> This shouldn't ever happen - GL requires it to be aligned:
> 
>"Clients must align data elements consistent with the requirements
> of the client platform, with an additional base-level requirement
> that an offset within a buffer to a datum comprising N basic
> machine units be a multiple of N."
> 
> Mesa should reject unaligned index buffers for us - we shouldn't have
> to handle them in the driver.
> 
> Note that Gallium already makes this assumption.
> ---
>  src/mesa/drivers/dri/i965/brw_draw_upload.c | 38 
> ++---
>  1 file changed, 8 insertions(+), 30 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c 
> b/src/mesa/drivers/dri/i965/brw_draw_upload.c
> index 05b6b1a50f1..baa1de353b4 100644
> --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
> +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
> @@ -711,7 +711,6 @@ brw_prepare_shader_draw_parameters(struct brw_context 
> *brw)
>  static void
>  brw_upload_indices(struct brw_context *brw)
>  {
> -   struct gl_context *ctx = >ctx;
> const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
> GLuint ib_size;
> struct brw_bo *old_bo = brw->ib.bo;
> @@ -738,35 +737,14 @@ brw_upload_indices(struct brw_context *brw)
> } else {
>offset = (GLuint) (unsigned long) index_buffer->ptr;
>  
> -  /* If the index buffer isn't aligned to its element size, we have to
> -   * rebase it into a temporary.
> -   */
> -  if ((ib_type_size - 1) & offset) {
> - perf_debug("copying index buffer to a temporary to work around "
> -"misaligned offset %d\n", offset);
> -
> - GLubyte *map = ctx->Driver.MapBufferRange(ctx,
> -   offset,
> -   ib_size,
> -   GL_MAP_READ_BIT,
> -   bufferobj,
> -   MAP_INTERNAL);
> -
> - intel_upload_data(brw, map, ib_size, ib_type_size,
> -   >ib.bo, );
> - brw->ib.size = brw->ib.bo->size;
> -
> - ctx->Driver.UnmapBuffer(ctx, bufferobj, MAP_INTERNAL);
> -  } else {
> - struct brw_bo *bo =
> -intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
> -   offset, ib_size);
> - if (bo != brw->ib.bo) {
> -brw_bo_unreference(brw->ib.bo);
> -brw->ib.bo = bo;
> -brw->ib.size = bufferobj->Size;
> -brw_bo_reference(bo);
> - }
> +  struct brw_bo *bo =
> + intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
> +offset, ib_size);
> +  if (bo != brw->ib.bo) {
> + brw_bo_unreference(brw->ib.bo);
> + brw->ib.bo = bo;
> + brw->ib.size = bufferobj->Size;
> + brw_bo_reference(bo);
>}
> }
>  
> 

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] glmark2 segfault on imx6

[Eric Anholt]

Fabio Estevam  writes:

> Hi Lucas,
>
> On Tue, Jun 13, 2017 at 7:10 PM, Lucas Stach  wrote:
>> Hi Fabio,
>>
>> the attached patch should fix the issue. I should really try to get
>> this upstream, as some people complained about this already...
>
> It seems that Eric has already sent a fix for this segfault issue in
> this pull request:
> https://github.com/glmark2/glmark2/pull/32
>
> There is also this pull request from Gary back in February that adds
> imx drm support:
> https://github.com/glmark2/glmark2/pull/29
>
> ,which was not applied.
>
> Looks like that glmark2 project is not getting fixes/updates on a regular 
> basis.
>
> Would it help to move glmark2 into cgit.freedesktop.org so that more
> people could contribute, review patches, etc?

I asked afrantzis today, and hopefully I'll get added as a co-maintainer
so we can get maintenance patches like this in.  Also, apparently
something has been broken with his mail filters, so PRs weren't being
seen at all.


signature.asc
Description: PGP signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [Mesa-stable] [PATCH 1/3] amd/common: fix off-by-one in sid_tables.py

[Andres Gomez]

On Mon, 2017-06-19 at 12:36 +0100, Emil Velikov wrote:
> Hi Nicolai,
> 
> On 12 June 2017 at 20:33, Nicolai Hähnle  wrote:
> > From: Nicolai Hähnle 
> > 
> > The very last entry in the sid_strings_offsets table ended up missing,
> > leading to out-of-bounds reads and potential crashes.
> 
> Should we have this and " [PATCH 2/3] r600: fix off-by-one in
> egd_tables.py" for -stable?
> Seems like a worthy material IMHO.

Thanks for spotting this, Emil, but egd_tables.py didn't make it for
-stable so I suppose we will still leave those 2 out too.

-- 
Br,

Andres
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] mesa: skip FLUSH_VERTICES() if no samplers were changed

[Timothy Arceri]

---
 src/mesa/main/uniform_query.cpp | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/mesa/main/uniform_query.cpp b/src/mesa/main/uniform_query.cpp
index 1570770..9683fa8 100644
--- a/src/mesa/main/uniform_query.cpp
+++ b/src/mesa/main/uniform_query.cpp
@@ -1071,21 +1071,26 @@ _mesa_uniform(GLint location, GLsizei count, const 
GLvoid *values,
 * element that exceeds the highest array element index used, as
 * reported by GetActiveUniform, will be ignored by the GL."
 *
 * Clamp 'count' to a valid value.  Note that for non-arrays a count > 1
 * will have already generated an error.
 */
if (uni->array_elements != 0) {
   count = MIN2(count, (int) (uni->array_elements - offset));
}
 
-   _mesa_flush_vertices_for_uniforms(ctx, uni);
+   /* We check samplers for changes and flush if needed in the sampler
+* handling code further down, so just skip them here.
+*/
+   if (!uni->type->is_sampler()) {
+   _mesa_flush_vertices_for_uniforms(ctx, uni);
+   }
 
/* Store the data in the "actual type" backing storage for the uniform.
 */
if (!uni->type->is_boolean() && !uni->is_bindless) {
   memcpy(>storage[size_mul * components * offset], values,
  sizeof(uni->storage[0]) * components * count * size_mul);
} else if (uni->is_bindless) {
   const union gl_constant_value *src =
  (const union gl_constant_value *) values;
   GLuint64 *dst = (GLuint64 *)>storage[components * offset].i;
-- 
2.9.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] wgl: Add wglUseFontOutlines sample.

[Brian Paul]

Reviewed-by: Brian Paul 

On 06/22/2017 04:35 PM, Jose Fonseca wrote:

From: Jose Fonseca 

---
  src/wgl/CMakeLists.txt  |   6 +-
  src/wgl/{wglfont.c => wglfontbitmaps.c} |   0
  src/wgl/wglfontoutlines.c   | 147 
  3 files changed, 151 insertions(+), 2 deletions(-)
  rename src/wgl/{wglfont.c => wglfontbitmaps.c} (100%)
  create mode 100644 src/wgl/wglfontoutlines.c

diff --git a/src/wgl/CMakeLists.txt b/src/wgl/CMakeLists.txt
index e4a72c14..4c6e75e3 100644
--- a/src/wgl/CMakeLists.txt
+++ b/src/wgl/CMakeLists.txt
@@ -16,7 +16,8 @@ set_target_properties (wgl_sharedtex_mt PROPERTIES 
OUTPUT_NAME sharedtex_mt)
  add_executable (wglinfo wglinfo.c 
${CMAKE_SOURCE_DIR}/src/xdemos/glinfo_common.c)
  add_executable (wglcontext wglcontext.c)
  add_executable (wincopy WIN32 wincopy.c wglutil.c)
-add_executable (wglfont wglfont.c)
+add_executable (wglfontbitmaps wglfontbitmaps.c)
+add_executable (wglfontoutlines wglfontoutlines.c)
  add_executable (wglgears wglgears.c)

  install (
@@ -25,7 +26,8 @@ install (
wgl_sharedtex_mt
wglinfo
wglcontext
-   wglfont
+   wglfontbitmaps
+   wglfontoutlines
wglgears
wincopy
DESTINATION wgl)
diff --git a/src/wgl/wglfont.c b/src/wgl/wglfontbitmaps.c
similarity index 100%
rename from src/wgl/wglfont.c
rename to src/wgl/wglfontbitmaps.c
diff --git a/src/wgl/wglfontoutlines.c b/src/wgl/wglfontoutlines.c
new file mode 100644
index ..bfc24b4b
--- /dev/null
+++ b/src/wgl/wglfontoutlines.c
@@ -0,0 +1,147 @@
+/*
+ * Copyright (C) 2016, VMware, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
+ * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+
+int
+main(int argc, char *argv[])
+{
+   WNDCLASS wc;
+   HWND hwnd;
+   HDC hdc;
+   PIXELFORMATDESCRIPTOR pfd;
+   int iPixelFormat;
+   HGLRC hglrc;
+
+   ZeroMemory(, sizeof wc);
+   wc.style = CS_OWNDC | CS_HREDRAW | CS_VREDRAW;
+   wc.lpfnWndProc = DefWindowProc;
+   wc.hIcon = LoadIcon(NULL, IDI_APPLICATION);
+   wc.hCursor = LoadCursor(NULL, IDC_ARROW);
+   wc.hbrBackground = (HBRUSH) (COLOR_BTNFACE + 1);
+   wc.lpszClassName = "wglfont";
+
+   if (!RegisterClass()) {
+  abort();
+   }
+
+   hwnd = CreateWindowEx(0,
+ wc.lpszClassName,
+ "wglfont",
+ WS_VISIBLE | WS_CLIPSIBLINGS | WS_CLIPCHILDREN | 
WS_TILEDWINDOW,
+ CW_USEDEFAULT, CW_USEDEFAULT, 512, 512,
+ NULL, NULL,
+ wc.hInstance,
+ NULL);
+   if (!hwnd) {
+  abort();
+   }
+
+   hdc = GetDC(hwnd);
+   if (!hdc) {
+  abort();
+   }
+
+   ZeroMemory(, sizeof pfd);
+   pfd.nSize = sizeof pfd;
+   pfd.nVersion = 1;
+   pfd.dwFlags = PFD_DOUBLEBUFFER | PFD_DRAW_TO_WINDOW | PFD_SUPPORT_OPENGL;
+   pfd.iPixelType = PFD_TYPE_RGBA;
+   pfd.cColorBits = 24;
+   pfd.cDepthBits = 0;
+   pfd.iLayerType = PFD_MAIN_PLANE;
+
+   iPixelFormat = ChoosePixelFormat(hdc, );
+   if (!iPixelFormat) {
+  abort();
+   }
+
+   if (!SetPixelFormat(hdc, iPixelFormat, )) {
+  abort();
+   }
+
+   hglrc = wglCreateContext(hdc);
+   if (!hglrc) {
+  abort();
+   }
+
+   wglMakeCurrent(hdc, hglrc);
+
+   glClearColor(0.0, 0.0, 0.0, 1.0);
+   glClear(GL_COLOR_BUFFER_BIT);
+
+   HFONT hFont;
+   hFont = CreateFont(72,  // Height Of Font
+  0,   // Width Of Font
+  0,   // Angle Of Escapement
+  0,   // Orientation Angle
+  FW_NORMAL,   // Font Weight
+  FALSE,   // Italic
+  FALSE,   // Underline
+  FALSE,   // Strikeout

[Mesa-dev] [PATCH] mesa: don't set _NEW_PROGRAM_CONSTANTS for non-bindless opaque uniforms

[Timothy Arceri]

v2: rebase on new _mesa_flush_vertices_for_uniforms() helper
---
 src/mesa/main/uniform_query.cpp | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/src/mesa/main/uniform_query.cpp b/src/mesa/main/uniform_query.cpp
index 5eb0efc..5fe63e0 100644
--- a/src/mesa/main/uniform_query.cpp
+++ b/src/mesa/main/uniform_query.cpp
@@ -999,20 +999,26 @@ validate_uniform(GLint location, GLsizei count, const 
GLvoid *values,
   }
}
 
return uni;
 }
 
 void
 _mesa_flush_vertices_for_uniforms(struct gl_context *ctx,
   const struct gl_uniform_storage *uni)
 {
+
+   if (!uni->is_bindless && uni->type->contains_opaque()) {
+  FLUSH_VERTICES(ctx, 0);
+  return;
+   }
+
uint64_t new_driver_state = 0;
unsigned mask = uni->active_shader_mask;
 
while (mask) {
   unsigned index = u_bit_scan();
 
   assert(index < MESA_SHADER_STAGES);
   new_driver_state |= ctx->DriverFlags.NewShaderConstants[index];
}
 
-- 
2.9.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] wgl: Add wglUseFontOutlines sample.

[Jose Fonseca]

From: Jose Fonseca 

---
 src/wgl/CMakeLists.txt  |   6 +-
 src/wgl/{wglfont.c => wglfontbitmaps.c} |   0
 src/wgl/wglfontoutlines.c   | 147 
 3 files changed, 151 insertions(+), 2 deletions(-)
 rename src/wgl/{wglfont.c => wglfontbitmaps.c} (100%)
 create mode 100644 src/wgl/wglfontoutlines.c

diff --git a/src/wgl/CMakeLists.txt b/src/wgl/CMakeLists.txt
index e4a72c14..4c6e75e3 100644
--- a/src/wgl/CMakeLists.txt
+++ b/src/wgl/CMakeLists.txt
@@ -16,7 +16,8 @@ set_target_properties (wgl_sharedtex_mt PROPERTIES 
OUTPUT_NAME sharedtex_mt)
 add_executable (wglinfo wglinfo.c 
${CMAKE_SOURCE_DIR}/src/xdemos/glinfo_common.c)
 add_executable (wglcontext wglcontext.c)
 add_executable (wincopy WIN32 wincopy.c wglutil.c)
-add_executable (wglfont wglfont.c)
+add_executable (wglfontbitmaps wglfontbitmaps.c)
+add_executable (wglfontoutlines wglfontoutlines.c)
 add_executable (wglgears wglgears.c)
 
 install (
@@ -25,7 +26,8 @@ install (
wgl_sharedtex_mt
wglinfo
wglcontext
-   wglfont
+   wglfontbitmaps
+   wglfontoutlines
wglgears
wincopy
DESTINATION wgl)
diff --git a/src/wgl/wglfont.c b/src/wgl/wglfontbitmaps.c
similarity index 100%
rename from src/wgl/wglfont.c
rename to src/wgl/wglfontbitmaps.c
diff --git a/src/wgl/wglfontoutlines.c b/src/wgl/wglfontoutlines.c
new file mode 100644
index ..bfc24b4b
--- /dev/null
+++ b/src/wgl/wglfontoutlines.c
@@ -0,0 +1,147 @@
+/*
+ * Copyright (C) 2016, VMware, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
+ * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+
+int
+main(int argc, char *argv[])
+{
+   WNDCLASS wc;
+   HWND hwnd;
+   HDC hdc;
+   PIXELFORMATDESCRIPTOR pfd;
+   int iPixelFormat;
+   HGLRC hglrc;
+
+   ZeroMemory(, sizeof wc);
+   wc.style = CS_OWNDC | CS_HREDRAW | CS_VREDRAW;
+   wc.lpfnWndProc = DefWindowProc;
+   wc.hIcon = LoadIcon(NULL, IDI_APPLICATION);
+   wc.hCursor = LoadCursor(NULL, IDC_ARROW);
+   wc.hbrBackground = (HBRUSH) (COLOR_BTNFACE + 1);
+   wc.lpszClassName = "wglfont";
+
+   if (!RegisterClass()) {
+  abort();
+   }
+
+   hwnd = CreateWindowEx(0,
+ wc.lpszClassName,
+ "wglfont",
+ WS_VISIBLE | WS_CLIPSIBLINGS | WS_CLIPCHILDREN | 
WS_TILEDWINDOW,
+ CW_USEDEFAULT, CW_USEDEFAULT, 512, 512,
+ NULL, NULL,
+ wc.hInstance,
+ NULL);
+   if (!hwnd) {
+  abort();
+   }
+
+   hdc = GetDC(hwnd);
+   if (!hdc) {
+  abort();
+   }
+
+   ZeroMemory(, sizeof pfd);
+   pfd.nSize = sizeof pfd;
+   pfd.nVersion = 1;
+   pfd.dwFlags = PFD_DOUBLEBUFFER | PFD_DRAW_TO_WINDOW | PFD_SUPPORT_OPENGL;
+   pfd.iPixelType = PFD_TYPE_RGBA;
+   pfd.cColorBits = 24;
+   pfd.cDepthBits = 0;
+   pfd.iLayerType = PFD_MAIN_PLANE;
+
+   iPixelFormat = ChoosePixelFormat(hdc, );
+   if (!iPixelFormat) {
+  abort();
+   }
+
+   if (!SetPixelFormat(hdc, iPixelFormat, )) {
+  abort();
+   }
+
+   hglrc = wglCreateContext(hdc);
+   if (!hglrc) {
+  abort();
+   }
+
+   wglMakeCurrent(hdc, hglrc);
+
+   glClearColor(0.0, 0.0, 0.0, 1.0);
+   glClear(GL_COLOR_BUFFER_BIT);
+
+   HFONT hFont;
+   hFont = CreateFont(72,  // Height Of Font
+  0,   // Width Of Font
+  0,   // Angle Of Escapement
+  0,   // Orientation Angle
+  FW_NORMAL,   // Font Weight
+  FALSE,   // Italic
+  FALSE,   // Underline
+  FALSE,   // Strikeout
+  ANSI_CHARSET,// Character Set Identifier
+  

Re: [Mesa-dev] [PATCH] anv: Fix -Wswitch in anv_layout_to_aux_usage()

[Chad Versace]

On Thu 22 Jun 2017, Jason Ekstrand wrote:
> ACK

Pushed.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v3] glsl: do not call link_xfb_stride_layout_qualifiers() for fragment shaders

[Timothy Arceri]

Thanks!

Reviewed-by: Timothy Arceri 

On 23/06/17 01:13, Juan A. Suarez Romero wrote:

xfb only applies to the latest stage before the fragment shader, so
there is no need to invoke it in the fragment shader.

Fixes:
KHR-GL45.enhanced_layouts.xfb_stride_of_empty_list
KHR-GL45.enhanced_layouts.xfb_stride_of_empty_list_and_api

v2: do reset only if shaders provide an explicit stride

v3: do not call link_xfb_stride_layout_qualifiers() for fragment shaders
(Timothy)

Signed-off-by: Juan A. Suarez Romero 
---
  src/compiler/glsl/linker.cpp | 7 +--
  1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index adfa3b7..73ab8ff 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -2251,8 +2251,11 @@ link_intrastage_shaders(void *mem_ctx,
 link_tes_in_layout_qualifiers(prog, gl_prog, shader_list, num_shaders);
 link_gs_inout_layout_qualifiers(prog, gl_prog, shader_list, num_shaders);
 link_cs_input_layout_qualifiers(prog, gl_prog, shader_list, num_shaders);
-   link_xfb_stride_layout_qualifiers(ctx, prog, linked, shader_list,
- num_shaders);
+
+   if (linked->Stage != MESA_SHADER_FRAGMENT)
+  link_xfb_stride_layout_qualifiers(ctx, prog, linked, shader_list,
+num_shaders);
+
 link_bindless_layout_qualifiers(prog, gl_prog, shader_list, num_shaders);
  
 populate_symbol_table(linked);



___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] glapi: Fix -Wduplicate-decl-specifier due to double-const

[Chad Versace]

Fix all lines in src/mesa/main/marshal_generated.c that declare
double-const variables. Below is all such lines, with duplicates
removed:

   $ grep 'const const' marshal_generated.c | sort -u
   const const GLboolean * pointer = cmd->pointer;
   const const GLvoid * indices = cmd->indices;
   const const GLvoid * pointer = cmd->pointer;

Cc: Ian Romanick 
---
 src/mapi/glapi/gen/gl_marshal.py | 16 
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/src/mapi/glapi/gen/gl_marshal.py b/src/mapi/glapi/gen/gl_marshal.py
index f52b9b7b810..38196c461ea 100644
--- a/src/mapi/glapi/gen/gl_marshal.py
+++ b/src/mapi/glapi/gen/gl_marshal.py
@@ -176,11 +176,19 @@ class PrintCode(gl_XML.gl_print_base):
 with indent():
 for p in func.fixed_params:
 if p.count:
-out('const {0} * {1} = cmd->{1};'.format(
-p.get_base_type_string(), p.name))
+p_decl = '{0} * {1} = cmd->{1};'.format(
+p.get_base_type_string(), p.name)
 else:
-out('const {0} {1} = cmd->{1};'.format(
-p.type_string(), p.name))
+p_decl = '{0} {1} = cmd->{1};'.format(
+p.type_string(), p.name)
+
+if not p_decl.startswith('const '):
+# Declare all local function variables as const, even if
+# the original parameter is not const.
+p_decl = 'const ' + p_decl
+
+out(p_decl)
+
 if func.variable_params:
 for p in func.variable_params:
 out('const {0} * {1};'.format(
-- 
2.13.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] anv: Fix -Wswitch in anv_layout_to_aux_usage()

[Jason Ekstrand]

ACK

On Thu, Jun 22, 2017 at 2:46 PM, Chad Versace 
wrote:

> anv_layout_to_aux_usage() lacked a case for
> VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR. Add an unreachable case, because we
> don't support the extension.
> ---
>  src/intel/vulkan/anv_image.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
> index 9405a8c0f93..c84fc8ddeab 100644
> --- a/src/intel/vulkan/anv_image.c
> +++ b/src/intel/vulkan/anv_image.c
> @@ -520,6 +520,9 @@ anv_layout_to_aux_usage(const struct gen_device_info *
> const devinfo,
> case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
>assert(!color_aspect);
>return ISL_AUX_USAGE_HIZ;
> +
> +   case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:
> +  unreachable("VK_KHR_shared_presentable_image is unsupported");
> }
>
> /* If the layout isn't recognized in the exhaustive switch above, the
> --
> 2.13.0
>
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] anv: Fix -Wswitch in anv_layout_to_aux_usage()

[Chad Versace]

anv_layout_to_aux_usage() lacked a case for
VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR. Add an unreachable case, because we
don't support the extension.
---
 src/intel/vulkan/anv_image.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 9405a8c0f93..c84fc8ddeab 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -520,6 +520,9 @@ anv_layout_to_aux_usage(const struct gen_device_info * 
const devinfo,
case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
   assert(!color_aspect);
   return ISL_AUX_USAGE_HIZ;
+
+   case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:
+  unreachable("VK_KHR_shared_presentable_image is unsupported");
}
 
/* If the layout isn't recognized in the exhaustive switch above, the
-- 
2.13.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 6/8] swr/rast: Fix missing setup of psContext.pColorBuffer

[Tim Rowley]

Fixes render target read access from pixel shaders.
---
 .../drivers/swr/rasterizer/core/backend_sample.cpp| 15 +++
 .../drivers/swr/rasterizer/core/backend_singlesample.cpp  | 15 +++
 2 files changed, 14 insertions(+), 16 deletions(-)

diff --git a/src/gallium/drivers/swr/rasterizer/core/backend_sample.cpp 
b/src/gallium/drivers/swr/rasterizer/core/backend_sample.cpp
index 0f75ec2..2dca5d8 100644
--- a/src/gallium/drivers/swr/rasterizer/core/backend_sample.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/backend_sample.cpp
@@ -50,13 +50,13 @@ void BackendSampleRate(DRAW_CONTEXT *pDC, uint32_t 
workerId, uint32_t x, uint32_
 BarycentricCoeffs coeffs;
 SetupBarycentricCoeffs(, work);
 
-uint8_t *pColorBuffer[SWR_NUM_RENDERTARGETS], *pDepthBuffer, 
*pStencilBuffer;
-SetupRenderBuffers(pColorBuffer, , , 
state.psState.numRenderTargets, renderBuffers);
-
 SWR_PS_CONTEXT psContext;
 const SWR_MULTISAMPLE_POS& samplePos = state.rastState.samplePositions;
 SetupPixelShaderContext(, samplePos, work);
 
+uint8_t *pDepthBuffer, *pStencilBuffer;
+SetupRenderBuffers(psContext.pColorBuffer, , , 
state.psState.numRenderTargets, renderBuffers);
+
 AR_END(BESetup, 0);
 
 psContext.vY.UL = _simd_add_ps(vULOffsetsY, 
_simd_set1_ps(static_cast(y)));
@@ -75,7 +75,6 @@ void BackendSampleRate(DRAW_CONTEXT *pDC, uint32_t workerId, 
uint32_t x, uint32_
 {
 #if USE_8x2_TILE_BACKEND
 const bool useAlternateOffset = ((xx & SIMD_TILE_X_DIM) != 0);
-
 #endif
 if (T::InputCoverage != SWR_INPUT_COVERAGE_NONE)
 {
@@ -199,9 +198,9 @@ void BackendSampleRate(DRAW_CONTEXT *pDC, uint32_t 
workerId, uint32_t x, uint32_
 // output merger
 AR_BEGIN(BEOutputMerger, pDC->drawId);
 #if USE_8x2_TILE_BACKEND
-OutputMerger8x2(psContext, pColorBuffer, sample, 
, state.pfnBlendFunc, vCoverageMask, depthPassMask, 
state.psState.numRenderTargets, state.colorHottileEnable, useAlternateOffset);
+OutputMerger8x2(psContext, psContext.pColorBuffer, sample, 
, state.pfnBlendFunc, vCoverageMask, depthPassMask, 
state.psState.numRenderTargets, state.colorHottileEnable, useAlternateOffset);
 #else
-OutputMerger4x2(psContext, pColorBuffer, sample, 
, state.pfnBlendFunc, vCoverageMask, depthPassMask, 
state.psState.numRenderTargets);
+OutputMerger4x2(psContext, psContext.pColorBuffer, sample, 
, state.pfnBlendFunc, vCoverageMask, depthPassMask, 
state.psState.numRenderTargets);
 #endif
 
 // do final depth write after all pixel kills
@@ -230,13 +229,13 @@ void BackendSampleRate(DRAW_CONTEXT *pDC, uint32_t 
workerId, uint32_t x, uint32_
 {
 for (uint32_t rt = 0; rt < state.psState.numRenderTargets; 
++rt)
 {
-pColorBuffer[rt] += (2 * KNOB_SIMD_WIDTH * 
FormatTraits::bpp) / 8;
+psContext.pColorBuffer[rt] += (2 * KNOB_SIMD_WIDTH * 
FormatTraits::bpp) / 8;
 }
 }
 #else
 for (uint32_t rt = 0; rt < state.psState.numRenderTargets; ++rt)
 {
-pColorBuffer[rt] += (KNOB_SIMD_WIDTH * 
FormatTraits::bpp) / 8;
+psContext.pColorBuffer[rt] += (KNOB_SIMD_WIDTH * 
FormatTraits::bpp) / 8;
 }
 #endif
 pDepthBuffer += (KNOB_SIMD_WIDTH * 
FormatTraits::bpp) / 8;
diff --git a/src/gallium/drivers/swr/rasterizer/core/backend_singlesample.cpp 
b/src/gallium/drivers/swr/rasterizer/core/backend_singlesample.cpp
index 0eecc25..8ae2cf4 100644
--- a/src/gallium/drivers/swr/rasterizer/core/backend_singlesample.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/backend_singlesample.cpp
@@ -50,13 +50,13 @@ void BackendSingleSample(DRAW_CONTEXT *pDC, uint32_t 
workerId, uint32_t x, uint3
 BarycentricCoeffs coeffs;
 SetupBarycentricCoeffs(, work);
 
-uint8_t *pColorBuffer[SWR_NUM_RENDERTARGETS], *pDepthBuffer, 
*pStencilBuffer;
-SetupRenderBuffers(pColorBuffer, , , 
state.psState.numRenderTargets, renderBuffers);
-
 SWR_PS_CONTEXT psContext;
 const SWR_MULTISAMPLE_POS& samplePos = state.rastState.samplePositions;
 SetupPixelShaderContext(, samplePos, work);
 
+uint8_t *pDepthBuffer, *pStencilBuffer;
+SetupRenderBuffers(psContext.pColorBuffer, , , 
state.psState.numRenderTargets, renderBuffers);
+
 AR_END(BESetup, 1);
 
 psContext.vY.UL = _simd_add_ps(vULOffsetsY, 
_simd_set1_ps(static_cast(y)));
@@ -75,7 +75,6 @@ void BackendSingleSample(DRAW_CONTEXT *pDC, uint32_t 
workerId, uint32_t x, uint3
 {
 #if USE_8x2_TILE_BACKEND
 const bool useAlternateOffset = ((xx & SIMD_TILE_X_DIM) != 0);
-
 #endif
 simdmask coverageMask = work.coverageMask[0] & MASK;
 
@@ -184,9 +183,9 @@ void BackendSingleSample(DRAW_CONTEXT *pDC, uint32_t 
workerId, uint32_t x, uint3
 // 

[Mesa-dev] [PATCH 8/8] swr/rast: increase number of possible draws in flight

[Tim Rowley]

Increases performance of some large workloads on KNL by ~30%.
---
 src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py 
b/src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py
index c8eb2a3..09e3124 100644
--- a/src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py
+++ b/src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py
@@ -130,7 +130,7 @@ KNOBS = [
 
 ['MAX_DRAWS_IN_FLIGHT', {
 'type'  : 'uint32_t',
-'default'   : '128',
+'default'   : '256',
 'desc'  : ['Maximum number of draws outstanding before API thread 
blocks.',
'This value MUST be evenly divisible into 2^32'],
 'category'  : 'perf',
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 7/8] swr/rast: move default split size from driver to rasterizer

[Tim Rowley]

---
 src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py | 2 +-
 src/gallium/drivers/swr/swr_screen.cpp  | 4 
 2 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py 
b/src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py
index 02436f2..c8eb2a3 100644
--- a/src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py
+++ b/src/gallium/drivers/swr/rasterizer/codegen/knob_defs.py
@@ -138,7 +138,7 @@ KNOBS = [
 
 ['MAX_PRIMS_PER_DRAW', {
 'type'  : 'uint32_t',
-'default'   : '2040',
+'default'   : '49152',
 'desc'  : ['Maximum primitives in a single Draw().',
'Larger primitives are split into smaller Draw calls.',
'Should be a multiple of (3 * vectorWidth).'],
diff --git a/src/gallium/drivers/swr/swr_screen.cpp 
b/src/gallium/drivers/swr/swr_screen.cpp
index a80ec2a..b7f06c0 100644
--- a/src/gallium/drivers/swr/swr_screen.cpp
+++ b/src/gallium/drivers/swr/swr_screen.cpp
@@ -1065,10 +1065,6 @@ swr_create_screen_internal(struct sw_winsys *winsys)
if (!screen)
   return NULL;
 
-   if (!getenv("KNOB_MAX_PRIMS_PER_DRAW")) {
-  g_GlobalKnobs.MAX_PRIMS_PER_DRAW.Value(49152);
-   }
-
if (!lp_build_init()) {
   FREE(screen);
   return NULL;
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/8] swr/rast: Support dynamically sized vertex layout

[Tim Rowley]

Each shader stage state (VS, TS, GS, SO, BE/CLIP) now has a
vertexAttribOffset to specify the offset to the start of the
general attribute section of the incoming verts for that stage.
It is up to the driver to set this up correctly based on the
active stages. All the shader stages use this value instead of
VERTEX_ATTRIB_START_SLOT to offset to the incoming attributes.

Only the vertex shader stage supports dynamic layout output
currently. The other stages continue to expect the output to be
the fixed layout slots as before. Will be enabling GS next.
---
 src/gallium/drivers/swr/rasterizer/core/binner.cpp |  4 +--
 src/gallium/drivers/swr/rasterizer/core/clip.h | 40 ++
 .../drivers/swr/rasterizer/core/frontend.cpp   | 10 +++---
 src/gallium/drivers/swr/rasterizer/core/state.h| 12 +++
 src/gallium/drivers/swr/swr_shader.cpp |  2 ++
 src/gallium/drivers/swr/swr_state.cpp  |  2 ++
 6 files changed, 49 insertions(+), 21 deletions(-)

diff --git a/src/gallium/drivers/swr/rasterizer/core/binner.cpp 
b/src/gallium/drivers/swr/rasterizer/core/binner.cpp
index 036d8b1..19eef9b 100644
--- a/src/gallium/drivers/swr/rasterizer/core/binner.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/binner.cpp
@@ -80,12 +80,12 @@ INLINE void ProcessAttributes(
 if (IsSwizzledT::value)
 {
 SWR_ATTRIB_SWIZZLE attribSwizzle = backendState.swizzleMap[i];
-inputSlot = VERTEX_ATTRIB_START_SLOT + attribSwizzle.sourceAttrib;
+inputSlot = backendState.vertexAttribOffset + 
attribSwizzle.sourceAttrib;
 
 }
 else
 {
-inputSlot = VERTEX_ATTRIB_START_SLOT + i;
+inputSlot = backendState.vertexAttribOffset + i;
 }
 
 __m128 attrib[3];// triangle attribs (always 4 wide)
diff --git a/src/gallium/drivers/swr/rasterizer/core/clip.h 
b/src/gallium/drivers/swr/rasterizer/core/clip.h
index 12b52c5..4f940d9 100644
--- a/src/gallium/drivers/swr/rasterizer/core/clip.h
+++ b/src/gallium/drivers/swr/rasterizer/core/clip.h
@@ -489,7 +489,7 @@ public:
 // Compute absolute attrib slot in vertex array
 uint32_t mapSlot = backendState.swizzleEnable ? 
backendState.swizzleMap[slot].sourceAttrib : slot;
 maxSlot = std::max(maxSlot, mapSlot);
-uint32_t inputSlot = VERTEX_ATTRIB_START_SLOT + mapSlot;
+uint32_t inputSlot = backendState.vertexAttribOffset + mapSlot;
 
 pa.Assemble(inputSlot, tmpVector);
 
@@ -625,10 +625,10 @@ public:
 }
 
 // transpose attribs
-pBase = (uint8_t*)([0].attrib[VERTEX_ATTRIB_START_SLOT]) 
+ sizeof(float) * inputPrim;
+pBase = 
(uint8_t*)([0].attrib[backendState.vertexAttribOffset]) + 
sizeof(float) * inputPrim;
 for (uint32_t attrib = 0; attrib < numAttribs; ++attrib)
 {
-uint32_t attribSlot = VERTEX_ATTRIB_START_SLOT + attrib;
+uint32_t attribSlot = backendState.vertexAttribOffset + attrib;
 for (uint32_t c = 0; c < 4; ++c)
 {
 #if USE_SIMD16_FRONTEND
@@ -746,7 +746,7 @@ public:
 // Compute absolute attrib slot in vertex array
 uint32_t mapSlot = backendState.swizzleEnable ? 
backendState.swizzleMap[slot].sourceAttrib : slot;
 maxSlot = std::max(maxSlot, mapSlot);
-uint32_t inputSlot = VERTEX_ATTRIB_START_SLOT + mapSlot;
+uint32_t inputSlot = backendState.vertexAttribOffset + mapSlot;
 
 pa.Assemble_simd16(inputSlot, tmpVector);
 
@@ -877,10 +877,10 @@ public:
 }
 
 // transpose attribs
-pBase = (uint8_t*)([0].attrib[VERTEX_ATTRIB_START_SLOT]) 
+ sizeof(float) * inputPrim;
+pBase = 
(uint8_t*)([0].attrib[backendState.vertexAttribOffset]) + 
sizeof(float) * inputPrim;
 for (uint32_t attrib = 0; attrib < numAttribs; ++attrib)
 {
-uint32_t attribSlot = VERTEX_ATTRIB_START_SLOT + attrib;
+uint32_t attribSlot = backendState.vertexAttribOffset + attrib;
 for (uint32_t c = 0; c < 4; ++c)
 {
 simdscalar temp = 
_simd_mask_i32gather_ps(_simd_setzero_ps(), (const float *)pBase, vOffsets, 
vMask, 1);
@@ -1230,6 +1230,8 @@ private:
 uint32_t numInAttribs,  // number of attributes per vertex.
 float *pOutVerts)   // array of output positions. We'll 
write our new intersection point at i*4.
 {
+uint32_t vertexAttribOffset = 
this->state.backendState.vertexAttribOffset;
+
 // compute interpolation factor
 simdscalar t;
 switch (ClippingPlane)
@@ -1263,7 +1265,7 @@ private:
 // interpolate attributes and store
 for (uint32_t a = 0; a < numInAttribs; ++a)
 {
-uint32_t attribSlot = VERTEX_ATTRIB_START_SLOT + a;
+uint32_t 

[Mesa-dev] [PATCH 0/8] swr: update rasterizer

[Tim Rowley]

Highlights include splitting the heavily templated files into multiple
chunks to speed compile (2x for a large machine), and switching the
simd intrinsic usage from a macro-based header to a more c++ feeling
library.

No regressions on piglit or vtk tests, passes "make dist"/compile.

Tim Rowley (8):
  swr/rast: Split backend.cpp to improve compile time
  swr/rast: Support dynamically sized vertex layout
  swr/rast: Split rasterizer.cpp to improve compile times
  swr/rast: Fix unused variable warnings
  swr/rast: Switch intrinsic usage to SIMDLib
  swr/rast: Fix missing setup of psContext.pColorBuffer
  swr/rast: move default split size from driver to rasterizer
  swr/rast: increase number of possible draws in flight

 src/gallium/drivers/swr/Makefile.am|   60 +-
 src/gallium/drivers/swr/Makefile.sources   |   19 +-
 src/gallium/drivers/swr/SConscript |   41 +-
 .../drivers/swr/rasterizer/codegen/gen_backends.py |   53 +-
 .../drivers/swr/rasterizer/codegen/gen_common.py   |7 +
 .../drivers/swr/rasterizer/codegen/knob_defs.py|4 +-
 .../rasterizer/codegen/templates/gen_backend.cpp   |1 +
 .../codegen/templates/gen_header_init.hpp  |   43 +
 .../codegen/templates/gen_rasterizer.cpp   |   42 +
 src/gallium/drivers/swr/rasterizer/common/intrin.h |  102 +-
 .../drivers/swr/rasterizer/common/simd16intrin.h   | 1223 ++---
 .../drivers/swr/rasterizer/common/simdintrin.h | 1257 +++---
 .../drivers/swr/rasterizer/common/simdlib.hpp  |  550 ++
 .../swr/rasterizer/common/simdlib_128_avx.inl  |  545 ++
 .../swr/rasterizer/common/simdlib_128_avx2.inl |   68 +
 .../swr/rasterizer/common/simdlib_128_avx512.inl   |  408 +
 .../swr/rasterizer/common/simdlib_256_avx.inl  |  757 +
 .../swr/rasterizer/common/simdlib_256_avx2.inl |  234 +++
 .../swr/rasterizer/common/simdlib_256_avx512.inl   |  409 +
 .../swr/rasterizer/common/simdlib_512_avx512.inl   |  682 
 .../rasterizer/common/simdlib_512_avx512_masks.inl |   27 +
 .../swr/rasterizer/common/simdlib_512_emu.inl  |  842 +
 .../rasterizer/common/simdlib_512_emu_masks.inl|   28 +
 .../swr/rasterizer/common/simdlib_interface.hpp|  428 +
 .../swr/rasterizer/common/simdlib_types.hpp|  377 +
 src/gallium/drivers/swr/rasterizer/core/api.cpp|8 +-
 .../drivers/swr/rasterizer/core/backend.cpp|  809 +
 src/gallium/drivers/swr/rasterizer/core/backend.h  | 1033 +--
 .../drivers/swr/rasterizer/core/backend_clear.cpp  |  281 +++
 .../drivers/swr/rasterizer/core/backend_impl.h | 1067 
 .../drivers/swr/rasterizer/core/backend_sample.cpp |  344 
 .../swr/rasterizer/core/backend_singlesample.cpp   |  320 
 src/gallium/drivers/swr/rasterizer/core/binner.cpp |  293 ++--
 src/gallium/drivers/swr/rasterizer/core/clip.cpp   |6 +-
 src/gallium/drivers/swr/rasterizer/core/clip.h |   50 +-
 src/gallium/drivers/swr/rasterizer/core/context.h  |2 +-
 .../swr/rasterizer/core/format_conversion.h|8 +-
 .../drivers/swr/rasterizer/core/format_types.h |   30 +-
 .../drivers/swr/rasterizer/core/format_utils.h |  268 +--
 .../drivers/swr/rasterizer/core/frontend.cpp   |   16 +-
 src/gallium/drivers/swr/rasterizer/core/frontend.h |4 +-
 .../drivers/swr/rasterizer/core/multisample.cpp|   48 -
 src/gallium/drivers/swr/rasterizer/core/pa.h   |   16 +-
 src/gallium/drivers/swr/rasterizer/core/pa_avx.cpp |  106 +-
 .../drivers/swr/rasterizer/core/rasterizer.cpp | 1788 +++-
 .../drivers/swr/rasterizer/core/rasterizer.h   |   31 +-
 .../drivers/swr/rasterizer/core/rasterizer_impl.h  | 1376 +++
 src/gallium/drivers/swr/rasterizer/core/state.h|   12 +
 .../drivers/swr/rasterizer/memory/StoreTile.h  |  156 +-
 src/gallium/drivers/swr/swr_screen.cpp |4 -
 src/gallium/drivers/swr/swr_shader.cpp |2 +
 src/gallium/drivers/swr/swr_state.cpp  |2 +
 52 files changed, 10139 insertions(+), 6148 deletions(-)
 create mode 100644 
src/gallium/drivers/swr/rasterizer/codegen/templates/gen_header_init.hpp
 create mode 100644 
src/gallium/drivers/swr/rasterizer/codegen/templates/gen_rasterizer.cpp
 create mode 100644 src/gallium/drivers/swr/rasterizer/common/simdlib.hpp
 create mode 100644 
src/gallium/drivers/swr/rasterizer/common/simdlib_128_avx.inl
 create mode 100644 
src/gallium/drivers/swr/rasterizer/common/simdlib_128_avx2.inl
 create mode 100644 
src/gallium/drivers/swr/rasterizer/common/simdlib_128_avx512.inl
 create mode 100644 
src/gallium/drivers/swr/rasterizer/common/simdlib_256_avx.inl
 create mode 100644 
src/gallium/drivers/swr/rasterizer/common/simdlib_256_avx2.inl
 create mode 100644 
src/gallium/drivers/swr/rasterizer/common/simdlib_256_avx512.inl
 create mode 100644 
src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512.inl
 create mode 

[Mesa-dev] [PATCH 4/8] swr/rast: Fix unused variable warnings

[Tim Rowley]

---
 src/gallium/drivers/swr/rasterizer/core/binner.cpp | 6 --
 1 file changed, 6 deletions(-)

diff --git a/src/gallium/drivers/swr/rasterizer/core/binner.cpp 
b/src/gallium/drivers/swr/rasterizer/core/binner.cpp
index 19eef9b..29d2f1c 100644
--- a/src/gallium/drivers/swr/rasterizer/core/binner.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/binner.cpp
@@ -443,7 +443,6 @@ void BinTriangles(
 const API_STATE& state = GetApiState(pDC);
 const SWR_RASTSTATE& rastState = state.rastState;
 const SWR_FRONTEND_STATE& feState = state.frontendState;
-const SWR_GS_STATE& gsState = state.gsState;
 MacroTileMgr *pTileMgr = pDC->pTileMgr;
 
 simdscalar vRecipW0 = _simd_set1_ps(1.0f);
@@ -886,7 +885,6 @@ void SIMDAPI BinTriangles_simd16(
 const API_STATE& state = GetApiState(pDC);
 const SWR_RASTSTATE& rastState = state.rastState;
 const SWR_FRONTEND_STATE& feState = state.frontendState;
-const SWR_GS_STATE& gsState = state.gsState;
 
 MacroTileMgr *pTileMgr = pDC->pTileMgr;
 
@@ -1393,7 +1391,6 @@ void BinPostSetupPoints(
 simdvector& primVerts = prim[0];
 
 const API_STATE& state = GetApiState(pDC);
-const SWR_GS_STATE& gsState = state.gsState;
 const SWR_RASTSTATE& rastState = state.rastState;
 const uint32_t *pViewportIndex = (uint32_t *)
 
@@ -1773,7 +1770,6 @@ void BinPostSetupPoints_simd16(
 simd16vector& primVerts = prim[0];
 
 const API_STATE& state = GetApiState(pDC);
-const SWR_GS_STATE& gsState = state.gsState;
 const SWR_RASTSTATE& rastState = state.rastState;
 const uint32_t *pViewportIndex = (uint32_t *)
 
@@ -2164,7 +2160,6 @@ void BinPostSetupLines(
 
 const API_STATE& state = GetApiState(pDC);
 const SWR_RASTSTATE& rastState = state.rastState;
-const SWR_GS_STATE& gsState = state.gsState;
 
 // Select attribute processor
 PFN_PROCESS_ATTRIBUTES pfnProcessAttribs = GetProcessAttributesFunc(2,
@@ -2367,7 +2362,6 @@ void BinPostSetupLines_simd16(
 
 const API_STATE& state = GetApiState(pDC);
 const SWR_RASTSTATE& rastState = state.rastState;
-const SWR_GS_STATE& gsState = state.gsState;
 
 // Select attribute processor
 PFN_PROCESS_ATTRIBUTES pfnProcessAttribs = GetProcessAttributesFunc(2,
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] nv50/ir: improve POW lowering

[Karol Herbst]

On Thu, Jun 22, 2017 at 9:44 PM, Roland Scheidegger  wrote:
> Am 22.06.2017 um 21:28 schrieb Karol Herbst:
>> If the exponent is a small integer immediate value, we can lower POW to
>> MULs instead to save a few instructions. Also MUL instructions execute
>> faster than what we lower POW in the default case to.
>>
>> score change for GpuTest /test=pixmark_piano /benchmark /no_scorebox
>> /msaa=0 /benchmark_duration_ms=6 /width=1024 /height=640:
>> 1045 -> 1060
>>
>> changes in shader-db:
>> total instructions in shared programs : 4350261 -> 4349451 (-0.02%)
>> total gprs used in shared programs: 525853 -> 525861 (0.00%)
>> total local used in shared programs   : 30081 -> 30081 (0.00%)
>> total bytes used in shared programs   : 39865176 -> 39857712 (-0.02%)
>>
>> localgpr   inst  bytes
>> helped   0   4 313 313
>>   hurt   0  12   1   1
>>
>> Signed-off-by: Karol Herbst 
>> ---
>>  .../drivers/nouveau/codegen/nv50_ir_build_util.cpp | 49 
>> ++
>>  1 file changed, 49 insertions(+)
>>
>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp 
>> b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
>> index 5756e1b4d4..b31dcec1ab 100644
>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
>> @@ -640,6 +640,55 @@ bool
>>  BuildUtil::lowerPOW(Instruction *i)
>>  {
>> LValue *val = getScratch();
>> +   ImmediateValue imm;
>> +
>> +   if (i->src(1).getImmediate(imm)) {
>> +  Value *src = i->getSrc(0);
>> +  if (imm.isInteger(0)) {
>> + i->op = OP_MOV;
>> + i->setSrc(0, loadImm(NULL, 1));
>> + i->setSrc(1, NULL);
>> + return true;
>> +  } else
>> +  if (imm.isInteger(1)) {
>> + i->op = OP_MOV;
>> + i->setSrc(1, NULL);
>> + return true;
>> +  } else
>> +  if (imm.isInteger(2)) {
>> + i->op = OP_MUL;
>> + i->setSrc(1, src);
>> + return true;
>> +  } else
>> +  if (imm.isInteger(3)) {
>> + mkOp2(OP_MUL, i->dType, val, src, src);
>> + i->op = OP_MUL;
>> + i->setSrc(1, val);
>> + return true;
>> +  } else
>> +  if (imm.isInteger(4)) {
>> + mkOp2(OP_MUL, i->dType, val, src, src);
>> + i->op = OP_MUL;
>> + i->setSrc(0, val);
>> + i->setSrc(1, val);
>> + return true;
>> +  } else
>> +  if (imm.isInteger(5)) {
>> + mkOp2(OP_MUL, i->dType, val, src, src);
>> + mkOp2(OP_MUL, i->dType, val, val, val);
>> + i->op = OP_MUL;
>> + i->setSrc(1, val);
>> + return true;
>> +  } else
>> +  if (imm.isInteger(8)) {
>> + mkOp2(OP_MUL, i->dType, val, src, src);
>> + mkOp2(OP_MUL, i->dType, val, val, val);
>> + i->op = OP_MUL;
>> + i->setSrc(0, val);
>> + i->setSrc(1, val);
>> + return true;
>> +  }
>> +   }
>>
>> mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0));
>> mkOp2(OP_MUL, TYPE_F32, val, i->getSrc(1), val)->dnz = 1;
>>
>
> You could do integer 6 with just 3 muls too :-).
> But more in general, this looks like it would be useful outside of
> nouveau too.
>
> Roland
>

yeah I know, but the shader-db changes didn't convince me. I think
with proper instruction scheduling it's worth to take another look,
but until now I want to play it safe.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH shader-db] Drop Orbital Explorer shader.

[Chad Versace]

On Thu 22 Jun 2017, Chad Versace wrote:
> On Thu 22 Jun 2017, Kenneth Graunke wrote:
> > The author eventually emailed me and said that he considers it a
> > "finished experiment" and said the rendering method (geometry shader
> > based approach) is inefficient, and he intends to fully rewrite it
> > someday.
> 
> A total tangent... The author and I had lunch last week, where he
> introduced me to a great mathy Android puzzle game. The game's puzzles
> require you to make geometric constructions with a straight-edge and
> compass in the minimum number of moves, à la Euclid.
> 
> Euclidea 
> 

Oh yeah, I almost forgot.
Reviewed-by: Chad Versace 

This geometry shader of doom doesn't belong in shader-db.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH shader-db] Drop Orbital Explorer shader.

[Chad Versace]

On Thu 22 Jun 2017, Kenneth Graunke wrote:
> The author eventually emailed me and said that he considers it a
> "finished experiment" and said the rendering method (geometry shader
> based approach) is inefficient, and he intends to fully rewrite it
> someday.

A total tangent... The author and I had lunch last week, where he
introduced me to a great mathy Android puzzle game. The game's puzzles
require you to make geometric constructions with a straight-edge and
compass in the minimum number of moves, à la Euclid.

Euclidea 

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 11/30] i965/miptree: Add a return for updating of winsys

[Chad Versace]

On Wed 21 Jun 2017, Pohjolainen, Topi wrote:
> On Fri, Jun 16, 2017 at 03:41:33PM -0700, Jason Ekstrand wrote:
> > From: Ben Widawsky 
> > 
> > There is nothing particularly useful to do currently if the update
> > fails, but there is no point carrying on either. As a result, this has a
> > behavior change.
> > 
> > v2: Make the return type a bool (Topi)
> > 
> > v3: Don't leak the bo if update_winsys_renderbuffer fails. (Jason)
> > 
> > Signed-off-by: Ben Widawsky 
> > Acked-by: Daniel Stone 
> > Reviewed-by: Topi Pohjolainen  (v2)

Reviewed-by: Chad Versace 

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] nv50/ir: improve POW lowering

[Roland Scheidegger]

Am 22.06.2017 um 21:28 schrieb Karol Herbst:
> If the exponent is a small integer immediate value, we can lower POW to
> MULs instead to save a few instructions. Also MUL instructions execute
> faster than what we lower POW in the default case to.
> 
> score change for GpuTest /test=pixmark_piano /benchmark /no_scorebox
> /msaa=0 /benchmark_duration_ms=6 /width=1024 /height=640:
> 1045 -> 1060
> 
> changes in shader-db:
> total instructions in shared programs : 4350261 -> 4349451 (-0.02%)
> total gprs used in shared programs: 525853 -> 525861 (0.00%)
> total local used in shared programs   : 30081 -> 30081 (0.00%)
> total bytes used in shared programs   : 39865176 -> 39857712 (-0.02%)
> 
> localgpr   inst  bytes
> helped   0   4 313 313
>   hurt   0  12   1   1
> 
> Signed-off-by: Karol Herbst 
> ---
>  .../drivers/nouveau/codegen/nv50_ir_build_util.cpp | 49 
> ++
>  1 file changed, 49 insertions(+)
> 
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
> index 5756e1b4d4..b31dcec1ab 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
> @@ -640,6 +640,55 @@ bool
>  BuildUtil::lowerPOW(Instruction *i)
>  {
> LValue *val = getScratch();
> +   ImmediateValue imm;
> +
> +   if (i->src(1).getImmediate(imm)) {
> +  Value *src = i->getSrc(0);
> +  if (imm.isInteger(0)) {
> + i->op = OP_MOV;
> + i->setSrc(0, loadImm(NULL, 1));
> + i->setSrc(1, NULL);
> + return true;
> +  } else
> +  if (imm.isInteger(1)) {
> + i->op = OP_MOV;
> + i->setSrc(1, NULL);
> + return true;
> +  } else
> +  if (imm.isInteger(2)) {
> + i->op = OP_MUL;
> + i->setSrc(1, src);
> + return true;
> +  } else
> +  if (imm.isInteger(3)) {
> + mkOp2(OP_MUL, i->dType, val, src, src);
> + i->op = OP_MUL;
> + i->setSrc(1, val);
> + return true;
> +  } else
> +  if (imm.isInteger(4)) {
> + mkOp2(OP_MUL, i->dType, val, src, src);
> + i->op = OP_MUL;
> + i->setSrc(0, val);
> + i->setSrc(1, val);
> + return true;
> +  } else
> +  if (imm.isInteger(5)) {
> + mkOp2(OP_MUL, i->dType, val, src, src);
> + mkOp2(OP_MUL, i->dType, val, val, val);
> + i->op = OP_MUL;
> + i->setSrc(1, val);
> + return true;
> +  } else
> +  if (imm.isInteger(8)) {
> + mkOp2(OP_MUL, i->dType, val, src, src);
> + mkOp2(OP_MUL, i->dType, val, val, val);
> + i->op = OP_MUL;
> + i->setSrc(0, val);
> + i->setSrc(1, val);
> + return true;
> +  }
> +   }
>  
> mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0));
> mkOp2(OP_MUL, TYPE_F32, val, i->getSrc(1), val)->dnz = 1;
> 

You could do integer 6 with just 3 muls too :-).
But more in general, this looks like it would be useful outside of
nouveau too.

Roland

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] egl_dri2: swrastGetDrawableInfo: set *x, *y

[Ben Crocker]

Hi Emil et al.,

- Original Message -
> From: "Emil Velikov" 
> To: "Ben Crocker" 
> Cc: "ML mesa-dev" , "Eric Engestrom" 
> 
> Sent: Thursday, June 22, 2017 11:11:32 AM
> Subject: Re: [PATCH] egl_dri2: swrastGetDrawableInfo: set *x, *y
> 
> Hi Ben,
> 
> On 21 June 2017 at 16:55, Ben Crocker  wrote:
> > In swrastGetDrawableInfo, set *x and *y, not just *w and *h;
> > this fixes a crash later in drisw_update_tex_buffer when the
> > (formerly) uninitialized x and y values are used to construct
> > an address in a call to llvmpipe_transfer_map.
> >
> > Fixes crash in Piglit test
> > "spec@egl 1.4@eglcreatepbuffersurface and then glclear"
> > (/bin/egl-create-pbuffer-surface -auto)
> > that occurred intermittently, e.g. when the uninitialized x and y in
> > drisw_update_tex_buffer just happened to contain absurd non-zero values.
> >
> Good catch. Can you please include the Cc: mesa-stable... tag in the
> commit message.

Revised patch forthcoming.

> 
> > Signed-off-by: Ben Crocker 
> > ---
> >  src/egl/drivers/dri2/platform_x11.c | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/src/egl/drivers/dri2/platform_x11.c
> > b/src/egl/drivers/dri2/platform_x11.c
> > index 74d3a16..c64ac64 100644
> > --- a/src/egl/drivers/dri2/platform_x11.c
> > +++ b/src/egl/drivers/dri2/platform_x11.c
> > @@ -121,6 +121,8 @@ swrastGetDrawableInfo(__DRIdrawable * draw,
> >_eglLog(_EGL_WARNING, "error in xcb_get_geometry");
> >free(error);
> > } else {
> > +  *x = reply->x;
> > +  *y = reply->y;
> I think we should set x/y to zero - a few lines further up, right next to
> w/h.
> 
> -Emil
> 

Good catch yourself!  As I said above, revised patch forthcoming.

-- Ben
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 00/10] egl: Little cleanups

[Chad Versace]

On Thu 22 Jun 2017, Eric Engestrom wrote:
> On 22 June 2017 19:10:46 BST, Chad Versace  wrote:
> > No behavioral change.
> > 
> > Chad Versace (10):
> >   egl/android: Declare loop vars inside their loops (v2)
> >   egl/drm: Move loop vars inside the loop
> >   egl/x11: Declare loop vars inside the loop
> >   egl/surfaceless: Move loop vars inside the loop
> >   egl/wayland: Declare loop vars inside the loop
> >   egl/dri2: Declare loop vars inside the loop
> >   egl/android: Declare EGLConfig attrib array inside loop (v2)
> 
> >   egl/drm: Declare EGLConfig attrib array inside loop
> >   egl/drm: Declare EGLConfig attrib array inside loop
> 
> With the two comments on the above two patches addressed,
> the series is:

> Reviewed-by: Eric Engestrom 

Thanks. I'll push soon.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 08/10] egl/drm: Declare EGLConfig attrib array inside loop

[Chad Versace]

On Thu 22 Jun 2017, Eric Engestrom wrote:
> On 22 June 2017 19:10:54 BST, Chad Versace  wrote:
> > No behavioral change. Just a readability cleanup.
> > 
> > Instead of modifying this small array on each loop iteration, we now
> > initialize it in-place with the values it needs.
> > 
> > Cc: Eric Engestrom 
> > Cc: Emil Velikov 
> > ---
> >  src/egl/drivers/dri2/platform_drm.c | 14 +++---
> >  1 file changed, 7 insertions(+), 7 deletions(-)
> > 
> > diff --git a/src/egl/drivers/dri2/platform_drm.c
> > b/src/egl/drivers/dri2/platform_drm.c
> > index 7f907aff6c9..c88d48827b3 100644
> > --- a/src/egl/drivers/dri2/platform_drm.c
> > +++ b/src/egl/drivers/dri2/platform_drm.c
> > @@ -598,10 +598,7 @@ drm_add_configs_for_visuals(_EGLDriver *drv,
> > _EGLDisplay *disp)
> >{ GBM_FORMAT_ARGB,0x00ff, 0xff00 },
> >{ GBM_FORMAT_RGB565,  0xf800, 0x },
> > };
> > -   EGLint attr_list[] = {
> > -  EGL_NATIVE_VISUAL_ID, 0,
> > -  EGL_NONE,
> > -   };
> > +
> > unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
> > unsigned int count = 0;
> >  
> > @@ -614,12 +611,15 @@ drm_add_configs_for_visuals(_EGLDriver *drv,
> > _EGLDisplay *disp)
> >  __DRI_ATTRIB_ALPHA_MASK, );
> >  
> >for (unsigned j = 0; j < ARRAY_SIZE(visuals); j++) {
> > - struct dri2_egl_config *dri2_conf;
> 
> I think this line should stay here.

I put it back.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH shader-db] Drop Orbital Explorer shader.

[Kenneth Graunke]

The upstream version of Orbital Explorer doesn't run on Mesa drivers,
as it (unnecessarily) requests a compatibility profile on non-Apple
OSes, and suffers from GLEW bugs.  I sent a pull request two years ago
to port it to libepoxy and get it running on Mesa drivers, but it was
never accepted.

The author eventually emailed me and said that he considers it a
"finished experiment" and said the rendering method (geometry shader
based approach) is inefficient, and he intends to fully rewrite it
someday.

Since this is not representative of typical geometry shaders, and
the project is effectively dead, we may as well remove it.
---
 shaders/orbital_explorer.shader_test | 619 ---
 1 file changed, 619 deletions(-)
 delete mode 100644 shaders/orbital_explorer.shader_test

diff --git a/shaders/orbital_explorer.shader_test 
b/shaders/orbital_explorer.shader_test
deleted file mode 100644
index 4faa30b..000
--- a/shaders/orbital_explorer.shader_test
+++ /dev/null
@@ -1,619 +0,0 @@
-# Shader_runner test illustrating slow compilation of geometry shaders
-# in mesa/i965.
-#
-# I've made the following changes from the original shaders:
-# - Change shaderDepth from a texture to a uniform float
-#
-# The shaders in this test come from
-# https://github.com/bjthinks/orbital-explorer, which contains this
-# copyright notice:
-#
-# This file is part of the Electron Orbital Explorer. The Electron
-# Orbital Explorer is distributed under the Simplified BSD License
-# (also called the "BSD 2-Clause License"), in hopes that these
-# rendering techniques might be used by other programmers in
-# applications such as scientific visualization, video gaming, and so
-# on. If you find value in this software and use its technologies for
-# another purpose, I would love to hear back from you at bjthinks (at)
-# gmail (dot) com. If you improve this software and agree to release
-# your modifications under the below license, I encourage you to fork
-# the development tree on github and push your modifications. The
-# Electron Orbital Explorer's development URL is:
-# https://github.com/bjthinks/orbital-explorer
-# (This paragraph is not part of the software license and may be
-# removed.)
-#
-# Copyright (c) 2013, Brian W. Johnson
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# + Redistributions of source code must retain the above copyright
-#   notice, this list of conditions and the following disclaimer.
-#
-# + Redistributions in binary form must reproduce the above copyright
-#   notice, this list of conditions and the following disclaimer in
-#   the documentation and/or other materials provided with the
-#   distribution.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-
-[require]
-GLSL >= 1.50
-
-[vertex shader]
-#version 150
-
-uniform mat4 modelViewProjMatrix;
-
-in vec4 position;
-in vec3 rim;
-out vec4 inverted_position;
-out vec3 integrand;
-
-// Note sure what this transform is called, but since doing it twice
-// gives back the original vector, we'll call it a "vector inverse"
-// for now.
-// (x, y, z, w) --> (x/w, y/w, z/w, 1/w)
-vec4 vector_inverse(vec4 a)
-{
-  float w = a.w;
-  a.w = 1.0;
-  a /= w;
-  return a;
-}
-
-// Calculate the position and inverted position of the vertex, setting
-// the output varyings "gl_Position" and "inverted_position".
-void calculate_position()
-{
-  vec4 pos = modelViewProjMatrix * position;
-  gl_Position = pos;
-  inverted_position = vector_inverse(pos);
-}
-
-// Apply brightness adjustment and color rotation to the input color,
-// setting the output varying "integrand" to transformed color
-// coordinates that are sensible to integrate.
-void calculate_color()
-{
-  integrand = rim;
-}
-
-void main(void)
-{
-  calculate_position();
-  calculate_color();
-}
-
-
-[geometry shader]
-#version 150
-
-layout(lines_adjacency) in;
-layout(triangle_strip,max_vertices=21) out;
-
-uniform vec2 nearfar;
-
-in vec4 inverted_position[4];
-in vec3 integrand[4];
-
-noperspective out float one_over_w_front;
-noperspective out float one_over_w_back;
-noperspective out vec3 integrand_over_w_front;

Re: [Mesa-dev] [PATCH 09/10] egl/drm: Declare EGLConfig attrib array inside loop

[Chad Versace]

On Thu 22 Jun 2017, Eric Engestrom wrote:
> On 22 June 2017 19:10:55 BST, Chad Versace  wrote:
> > No behavioral change. Just a readability cleanup.
> > 
> > Instead of modifying this small array on each loop iteration, we now
> > initialize it in-place with the values it needs.
> > 
> > Cc: Eric Engestrom 
> > Cc: Emil Velikov 
> > ---
> >  src/egl/drivers/dri2/platform_x11.c | 24 
> >  1 file changed, 12 insertions(+), 12 deletions(-)


> s/drm/x11/ in the subject

Thanks and fixed.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 10/30] i965: Use miptree_create_for_dri_image in image_target_renderbuffer_storage

[Chad Versace]

On Fri 16 Jun 2017, Jason Ekstrand wrote:
> ---
>  src/mesa/drivers/dri/i965/intel_fbo.c | 23 +--
>  1 file changed, 1 insertion(+), 22 deletions(-)

Please note in the commit message that this does introduce a functional
change. intel_image_target_renderbuffer_storage() now fails if
!brw->format_supported_as_render_target || !ctx->TextureFormatSupported,
while before it only checked !brw->format_supported_as_render_target.

I believe that ctx->TextureFormatSupported is a superset of
brw->format_supported_as_render_target, so this shouldn't cause any
problems. But it's nice to record in the git log just in case a bug
bisects to here.

Reviewed-by: Chad Versace 
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/2] nv50/ir: improve POW lowering

[Karol Herbst]

If the exponent is a small integer immediate value, we can lower POW to
MULs instead to save a few instructions. Also MUL instructions execute
faster than what we lower POW in the default case to.

score change for GpuTest /test=pixmark_piano /benchmark /no_scorebox
/msaa=0 /benchmark_duration_ms=6 /width=1024 /height=640:
1045 -> 1060

changes in shader-db:
total instructions in shared programs : 4350261 -> 4349451 (-0.02%)
total gprs used in shared programs: 525853 -> 525861 (0.00%)
total local used in shared programs   : 30081 -> 30081 (0.00%)
total bytes used in shared programs   : 39865176 -> 39857712 (-0.02%)

localgpr   inst  bytes
helped   0   4 313 313
  hurt   0  12   1   1

Signed-off-by: Karol Herbst 
---
 .../drivers/nouveau/codegen/nv50_ir_build_util.cpp | 49 ++
 1 file changed, 49 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
index 5756e1b4d4..b31dcec1ab 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
@@ -640,6 +640,55 @@ bool
 BuildUtil::lowerPOW(Instruction *i)
 {
LValue *val = getScratch();
+   ImmediateValue imm;
+
+   if (i->src(1).getImmediate(imm)) {
+  Value *src = i->getSrc(0);
+  if (imm.isInteger(0)) {
+ i->op = OP_MOV;
+ i->setSrc(0, loadImm(NULL, 1));
+ i->setSrc(1, NULL);
+ return true;
+  } else
+  if (imm.isInteger(1)) {
+ i->op = OP_MOV;
+ i->setSrc(1, NULL);
+ return true;
+  } else
+  if (imm.isInteger(2)) {
+ i->op = OP_MUL;
+ i->setSrc(1, src);
+ return true;
+  } else
+  if (imm.isInteger(3)) {
+ mkOp2(OP_MUL, i->dType, val, src, src);
+ i->op = OP_MUL;
+ i->setSrc(1, val);
+ return true;
+  } else
+  if (imm.isInteger(4)) {
+ mkOp2(OP_MUL, i->dType, val, src, src);
+ i->op = OP_MUL;
+ i->setSrc(0, val);
+ i->setSrc(1, val);
+ return true;
+  } else
+  if (imm.isInteger(5)) {
+ mkOp2(OP_MUL, i->dType, val, src, src);
+ mkOp2(OP_MUL, i->dType, val, val, val);
+ i->op = OP_MUL;
+ i->setSrc(1, val);
+ return true;
+  } else
+  if (imm.isInteger(8)) {
+ mkOp2(OP_MUL, i->dType, val, src, src);
+ mkOp2(OP_MUL, i->dType, val, val, val);
+ i->op = OP_MUL;
+ i->setSrc(0, val);
+ i->setSrc(1, val);
+ return true;
+  }
+   }
 
mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0));
mkOp2(OP_MUL, TYPE_F32, val, i->getSrc(1), val)->dnz = 1;
-- 
2.13.1

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] egl_dri2: swrastGetDrawableInfo: set *x, *y [v2]

[Ben Crocker]

In swrastGetDrawableInfo, set *x and *y, not just *w and *h;
this fixes a crash later in drisw_update_tex_buffer when the
(formerly) uninitialized x and y values are used to construct
an address in a call to llvmpipe_transfer_map.

Fixes crash in Piglit test
"spec@egl 1.4@eglcreatepbuffersurface and then glclear"
(/bin/egl-create-pbuffer-surface -auto)
that occurred intermittently, e.g. when the uninitialized x and y in
drisw_update_tex_buffer just happened to contain absurd non-zero values.

Signed-off-by: Ben Crocker 
---
 src/egl/drivers/dri2/platform_x11.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/egl/drivers/dri2/platform_x11.c 
b/src/egl/drivers/dri2/platform_x11.c
index 74d3a16..efb218c 100644
--- a/src/egl/drivers/dri2/platform_x11.c
+++ b/src/egl/drivers/dri2/platform_x11.c
@@ -111,7 +111,7 @@ swrastGetDrawableInfo(__DRIdrawable * draw,
xcb_get_geometry_reply_t *reply;
xcb_generic_error_t *error;
 
-   *w = *h = 0;
+   *x = *y = *w = *h = 0;
cookie = xcb_get_geometry (dri2_dpy->conn, dri2_surf->drawable);
reply = xcb_get_geometry_reply (dri2_dpy->conn, cookie, );
if (reply == NULL)
@@ -121,6 +121,8 @@ swrastGetDrawableInfo(__DRIdrawable * draw,
   _eglLog(_EGL_WARNING, "error in xcb_get_geometry");
   free(error);
} else {
+  *x = reply->x;
+  *y = reply->y;
   *w = reply->width;
   *h = reply->height;
}
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/2] nv50/ir: move POW lowering into BuildUtil

[Karol Herbst]

It's the same for all supported chipsets.

Signed-off-by: Karol Herbst 
---
 .../drivers/nouveau/codegen/nv50_ir_build_util.cpp| 16 
 .../drivers/nouveau/codegen/nv50_ir_build_util.h  |  2 ++
 .../drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp | 19 +--
 .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 18 +-
 .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h   |  1 -
 5 files changed, 20 insertions(+), 36 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
index 84ebfdb1cb..5756e1b4d4 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
@@ -636,4 +636,20 @@ BuildUtil::split64BitOpPostRA(Function *fn, Instruction *i,
return hi;
 }
 
+bool
+BuildUtil::lowerPOW(Instruction *i)
+{
+   LValue *val = getScratch();
+
+   mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0));
+   mkOp2(OP_MUL, TYPE_F32, val, i->getSrc(1), val)->dnz = 1;
+   mkOp1(OP_PREEX2, TYPE_F32, val, val);
+
+   i->op = OP_EX2;
+   i->setSrc(0, val);
+   i->setSrc(1, NULL);
+
+   return true;
+}
+
 } // namespace nv50_ir
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h
index d171f64d9a..aac5b609e2 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h
@@ -103,6 +103,8 @@ public:
 
Value *loadImm(Value *dst, int i) { return loadImm(dst, (uint32_t)i); }
 
+   bool lowerPOW(Instruction *);
+
// returns high part of the operation
static Instruction *split64BitOpPostRA(Function *, Instruction *,
   Value *zero, Value *carry);
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
index 36ab837f6e..2b187086cf 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
@@ -626,7 +626,6 @@ private:
 
bool handleDIV(Instruction *);
bool handleSQRT(Instruction *);
-   bool handlePOW(Instruction *);
 
bool handleSET(Instruction *);
bool handleSLCT(CmpInstruction *);
@@ -1245,22 +1244,6 @@ NV50LoweringPreSSA::handleSQRT(Instruction *i)
 }
 
 bool
-NV50LoweringPreSSA::handlePOW(Instruction *i)
-{
-   LValue *val = bld.getScratch();
-
-   bld.mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0));
-   bld.mkOp2(OP_MUL, TYPE_F32, val, i->getSrc(1), val)->dnz = 1;
-   bld.mkOp1(OP_PREEX2, TYPE_F32, val, val);
-
-   i->op = OP_EX2;
-   i->setSrc(0, val);
-   i->setSrc(1, NULL);
-
-   return true;
-}
-
-bool
 NV50LoweringPreSSA::handleEXPORT(Instruction *i)
 {
if (prog->getType() == Program::TYPE_FRAGMENT) {
@@ -1416,7 +1399,7 @@ NV50LoweringPreSSA::visit(Instruction *i)
case OP_SELP:
   return handleSELP(i);
case OP_POW:
-  return handlePOW(i);
+  return bld.lowerPOW(i);
case OP_DIV:
   return handleDIV(i);
case OP_SQRT:
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 64d743708a..bb9ef7a468 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -2700,22 +2700,6 @@ NVC0LoweringPass::handleSQRT(Instruction *i)
 }
 
 bool
-NVC0LoweringPass::handlePOW(Instruction *i)
-{
-   LValue *val = bld.getScratch();
-
-   bld.mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0));
-   bld.mkOp2(OP_MUL, TYPE_F32, val, i->getSrc(1), val)->dnz = 1;
-   bld.mkOp1(OP_PREEX2, TYPE_F32, val, val);
-
-   i->op = OP_EX2;
-   i->setSrc(0, val);
-   i->setSrc(1, NULL);
-
-   return true;
-}
-
-bool
 NVC0LoweringPass::handleEXPORT(Instruction *i)
 {
if (prog->getType() == Program::TYPE_FRAGMENT) {
@@ -2813,7 +2797,7 @@ NVC0LoweringPass::visit(Instruction *i)
   i->setSrc(0, i->getDef(0));
   break;
case OP_POW:
-  return handlePOW(i);
+  return bld.lowerPOW(i);
case OP_DIV:
   return handleDIV(i);
case OP_MOD:
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h
index 7fae7e24b9..4e75fd6f33 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h
@@ -100,7 +100,6 @@ protected:
bool handleDIV(Instruction *);
bool handleMOD(Instruction *);
bool handleSQRT(Instruction *);
-   bool handlePOW(Instruction *);
bool handleTEX(TexInstruction *);
bool handleTXD(TexInstruction *);
bool handleTXQ(TexInstruction *);
-- 
2.13.1

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org

Re: [Mesa-dev] [PATCH 09/30] i965/miptree: Set level_x/h in create_for_dri_image

[Chad Versace]

On Fri 16 Jun 2017, Jason Ekstrand wrote:
> ---
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Chad Versace 
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 0/5] Gallium: Passing drirc options to create_screen() and fixing Rocket League

[Ilia Mirkin]

On Thu, Jun 22, 2017 at 2:53 PM, Roland Scheidegger  wrote:
> Am 22.06.2017 um 19:35 schrieb Ilia Mirkin:
>> On Wed, Jun 21, 2017 at 9:58 AM, Ilia Mirkin  wrote:
>>> On Tue, Jun 20, 2017 at 6:54 PM, Marek Olšák  wrote:
 The first pipe_screen flag is a drirc option to fix incorrect grass
 rendering in Rocket League for radeonsi. Rocket League expects DirectX
 behavior for partial derivative computations after discard/kill, but
 radeonsi implements the more efficient but stricter OpenGL behavior
 and that will remain our default behavior. The new screen flag forces
 radeonsi to use the DX behavior for that game.
>>>
>>> For those of us following along at home... can you provide a brief
>>> reminder of what the DX behavior is, and how does it differ from GL
>>> behavior? In case one might want to fix this for nouveau (if a fix is
>>> needed at all)...
>>
>> From what I gather, this is the difference between discard exiting
>> immediately in that thread and keeping going.
>>
>> Does this make sense to be surfaced in gallium via a tgsi program
>> property? That way, e.g. a GL extension could be written to expose
>> that program property.
>
> I suppose it would make sense, that way this could be exposed cleanly.
> But of course the apps would have to use the extension, otherwise the
> override is just in a different place (and in theory not just glsl,
> vulkan works the same too).

Right... I was thinking Wine. Or some porting company.

  -ilia
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 08/30] i965/miptree: Add tile_x/y to total_width/height

[Chad Versace]

On Fri 16 Jun 2017, Jason Ekstrand wrote:
> This is what we do in intel_image_target_renderbuffer_storage and it
> makes more sense than stomping them.  Because the image gets created as
> a 2D image with one miplevel, they should already be equal to the
> provided width/height.  Adding the tile offset makes some sense
> depending on how you interpret the fields.  Also, they're never used for
> any sort of state setup so I don't think it really matters anyway.
> ---

mt->total_height *is* used for state setup, for calculating qpitch in
brw_miptree_get_vertical_slice_pitch(), which is transitively called
from brw_upload_image_surfaces().

mt->total_width is never used for miptrees created for DRIimage's, as
far as I can tell.

Regardless, I believe that all code that accesses
DRIimage::offset,tile_x,tile_y is horribly broken, and this patch
accordingly does not alter the entropy.

For consistency with intel_image_target_renderbuffer_storage(), and no
other reason, this patch is
Reviewed-by: Chad Versace 

Please update the commit message to mention that at least
mt->total_width is used.

>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c 
> b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index 3bc6827..a1be37e 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -922,10 +922,10 @@ intel_miptree_create_for_dri_image(struct brw_context 
> *brw,
>return NULL;
>  
> mt->target = target;
> -   mt->total_width = image->width;
> -   mt->total_height = image->height;
> mt->level[0].slice[0].x_offset = image->tile_x;
> mt->level[0].slice[0].y_offset = image->tile_y;
> +   mt->total_width += image->tile_x;
> +   mt->total_height += image->tile_y;
>  
> /* From "OES_EGL_image" error reporting. We report GL_INVALID_OPERATION
>  * for EGL images from non-tile aligned sufaces in gen4 hw and earlier 
> which has
> -- 
> 2.5.0.400.gff86faf
> 
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/2] SQUASH: intel/fs/bank_conflicts: Roll back to the nineties.

[Francisco Jerez]

---
 src/intel/compiler/brw_fs_bank_conflicts.cpp | 274 ++-
 1 file changed, 188 insertions(+), 86 deletions(-)

diff --git a/src/intel/compiler/brw_fs_bank_conflicts.cpp 
b/src/intel/compiler/brw_fs_bank_conflicts.cpp
index 0225c70..dc88cac 100644
--- a/src/intel/compiler/brw_fs_bank_conflicts.cpp
+++ b/src/intel/compiler/brw_fs_bank_conflicts.cpp
@@ -51,9 +51,6 @@
 #include "brw_fs.h"
 #include "brw_cfg.h"
 
-#include 
-#include 
-
 #ifdef __SSE2__
 
 #include 
@@ -72,7 +69,9 @@ namespace {
/**
 * SIMD integer vector data type.
 */
-   typedef std::array<__m128i, 2> vector_type;
+   struct vector_type {
+  __m128i v[2];
+   };
 
/**
 * Scalar data type matching the representation of a single component of \p
@@ -88,8 +87,7 @@ namespace {
/**
 * Number of components of a \p vector_type.
 */
-   const unsigned vector_width = 2 * sizeof(vector_type::value_type) /
- sizeof(scalar_type);
+   const unsigned vector_width = 2 * sizeof(__m128i) / sizeof(scalar_type);
 
/**
 * Set the i-th component of vector \p v to \p x.
@@ -98,7 +96,7 @@ namespace {
set(vector_type , unsigned i, scalar_type x)
{
   assert(i < vector_width);
-  memcpy((char *)v.data() + i * sizeof(x), , sizeof(x));
+  memcpy((char *)v.v + i * sizeof(x), , sizeof(x));
}
 
/**
@@ -109,7 +107,7 @@ namespace {
{
   assert(i < vector_width);
   scalar_type x;
-  memcpy(, (char *)v.data() + i * sizeof(x), sizeof(x));
+  memcpy(, (char *)v.v + i * sizeof(x), sizeof(x));
   return x;
}
 
@@ -119,10 +117,10 @@ namespace {
vector_type
adds(const vector_type , const vector_type )
{
-  const vector_type u = {
- _mm_adds_epi16(v[0], w[0]),
- _mm_adds_epi16(v[1], w[1])
-  };
+  const vector_type u = {{
+_mm_adds_epi16(v.v[0], w.v[0]),
+_mm_adds_epi16(v.v[1], w.v[1])
+ }};
   return u;
}
 
@@ -132,10 +130,10 @@ namespace {
vector_type
subs(const vector_type , const vector_type )
{
-  const vector_type u = {
- _mm_subs_epi16(v[0], w[0]),
- _mm_subs_epi16(v[1], w[1])
-  };
+  const vector_type u = {{
+_mm_subs_epi16(v.v[0], w.v[0]),
+_mm_subs_epi16(v.v[1], w.v[1])
+ }};
   return u;
}
 
@@ -145,10 +143,10 @@ namespace {
vector_type
mask(const vector_type , const vector_type )
{
-  const vector_type u = {
- _mm_and_si128(v[0], w[0]),
- _mm_and_si128(v[1], w[1])
-  };
+  const vector_type u = {{
+_mm_and_si128(v.v[0], w.v[0]),
+_mm_and_si128(v.v[1], w.v[1])
+ }};
   return u;
}
 
@@ -158,7 +156,7 @@ namespace {
scalar_type
sums(const vector_type )
{
-  const __m128i v8 = _mm_adds_epi16(v[0], v[1]);
+  const __m128i v8 = _mm_adds_epi16(v.v[0], v.v[1]);
   const __m128i v4 = _mm_adds_epi16(v8, _mm_shuffle_epi32(v8, 0x4e));
   const __m128i v2 = _mm_adds_epi16(v4, _mm_shuffle_epi32(v4, 0xb1));
   const __m128i v1 = _mm_adds_epi16(v2, _mm_shufflelo_epi16(v2, 0xb1));
@@ -225,7 +223,7 @@ namespace {
vector_type
adds(vector_type v, vector_type w)
{
-  return std::max(INT16_MIN, std::min(INT16_MAX, int(v) + w));
+  return MAX2(INT16_MIN, MIN2(INT16_MAX, int(v) + w));
}
 
/**
@@ -234,7 +232,7 @@ namespace {
vector_type
subs(vector_type v, vector_type w)
{
-  return std::max(INT16_MIN, std::min(INT16_MAX, int(v) - w));
+  return MAX2(INT16_MIN, MIN2(INT16_MAX, int(v) - w));
}
 
/**
@@ -258,6 +256,15 @@ namespace {
 
 #endif
 
+/**
+ * Swap \p x and \p y.
+ */
+#define SWAP(x, y) do {  \
+  __typeof(y) _swap_tmp = y; \
+  y = x; \
+  x = _swap_tmp; \
+   } while (0)
+
 namespace {
/**
 * Variable-length vector type intended to represent cycle-count costs for
@@ -267,7 +274,37 @@ namespace {
 * atoms are assigned the same bank b or opposite-parity banks b and b^1).
 * \sa shader_conflict_weight_matrix()
 */
-   typedef std::vector weight_vector_type;
+   struct weight_vector_type {
+  weight_vector_type() : v(NULL), size(0) {}
+
+  weight_vector_type(unsigned n) :
+ v(new vector_type[DIV_ROUND_UP(n, vector_width)]()),
+ size(n) {}
+
+  weight_vector_type(const weight_vector_type ) :
+ v(new vector_type[DIV_ROUND_UP(u.size, vector_width)]()),
+ size(u.size)
+  {
+ memcpy(v, u.v,
+DIV_ROUND_UP(u.size, vector_width) * sizeof(vector_type));
+  }
+
+  ~weight_vector_type()
+  {
+ delete[] v;
+  }
+
+  weight_vector_type &
+  operator=(weight_vector_type u)
+  {
+ SWAP(v, u.v);
+ SWAP(size, u.size);
+ return *this;
+  }
+
+  

[Mesa-dev] [PATCH 1/2] intel/fs: Implement GRF bank conflict mitigation pass.

[Francisco Jerez]

Unnecessary GRF bank conflicts increase the issue time of ternary
instructions (the overwhelmingly most common of which is MAD) by
roughly 50%, leading to reduced ALU throughput.  This pass attempts to
minimize the number of bank conflicts by rearranging the layout of the
GRF space post-register allocation.  It's in general not possible to
eliminate all of them without introducing extra copies, which are
typically more expensive than the bank conflict itself.

In a shader-db run on SKL this helps roughly 46k shaders:

   total conflicts in shared programs: 1008981 -> 600461 (-40.49%)
   conflicts in affected programs: 816222 -> 407702 (-50.05%)
   helped: 46234
   HURT: 72

The running time of shader-db itself on SKL seems to be increased by
roughly 2.52%±1.13% with n=20 due to the additional work done by the
compiler back-end.

On earlier generations the pass is somewhat less effective in relative
terms because the hardware incurs a bank conflict anytime the last two
sources of the instruction are duplicate (e.g. while trying to square
a value using MAD), which is impossible to avoid without introducing
copies.  E.g. for a shader-db run on SNB:

   total conflicts in shared programs: 944636 -> 623185 (-34.03%)
   conflicts in affected programs: 853258 -> 531807 (-37.67%)
   helped: 31052
   HURT: 19

And on BDW:

   total conflicts in shared programs: 1418393 -> 987539 (-30.38%)
   conflicts in affected programs: 1179787 -> 748933 (-36.52%)
   helped: 47592
   HURT: 70

On SKL GT4e this improves performance of GpuTest Volplosion by 3.64%
±0.33% with n=16.

NOTE: This patch intentionally disregards some i965 coding conventions
  for the sake of reviewability.  This is addressed by the next
  squash patch which introduces an amount of (for the most part
  boring) boilerplate that might distract reviewers from the
  non-trivial algorithmic details of the pass.
---
 src/intel/Makefile.sources   |   1 +
 src/intel/compiler/brw_fs.cpp|   2 +
 src/intel/compiler/brw_fs.h  |   1 +
 src/intel/compiler/brw_fs_bank_conflicts.cpp | 791 +++
 4 files changed, 795 insertions(+)
 create mode 100644 src/intel/compiler/brw_fs_bank_conflicts.cpp

diff --git a/src/intel/Makefile.sources b/src/intel/Makefile.sources
index a877ff2..1b9799a 100644
--- a/src/intel/Makefile.sources
+++ b/src/intel/Makefile.sources
@@ -44,6 +44,7 @@ COMPILER_FILES = \
compiler/brw_eu_util.c \
compiler/brw_eu_validate.c \
compiler/brw_fs_builder.h \
+compiler/brw_fs_bank_conflicts.cpp \
compiler/brw_fs_cmod_propagation.cpp \
compiler/brw_fs_combine_constants.cpp \
compiler/brw_fs_copy_propagation.cpp \
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 43b6e34..0a85c0c 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -5858,6 +5858,8 @@ fs_visitor::allocate_registers(bool allow_spilling)
if (failed)
   return;
 
+   opt_bank_conflicts();
+
schedule_instructions(SCHEDULE_POST);
 
if (last_scratch > 0) {
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index 6c8c027..b1fc7b3 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -141,6 +141,7 @@ public:
exec_list *acp);
bool opt_drop_redundant_mov_to_flags();
bool opt_register_renaming();
+   bool opt_bank_conflicts();
bool register_coalesce();
bool compute_to_mrf();
bool eliminate_find_live_channel();
diff --git a/src/intel/compiler/brw_fs_bank_conflicts.cpp 
b/src/intel/compiler/brw_fs_bank_conflicts.cpp
new file mode 100644
index 000..0225c70
--- /dev/null
+++ b/src/intel/compiler/brw_fs_bank_conflicts.cpp
@@ -0,0 +1,791 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ 

Re: [Mesa-dev] [PATCH 1/6] i965/eu: add support for 1-OWord Block Read/Write messages

[Francisco Jerez]

Samuel Iglesias Gonsálvez  writes:

> Signed-off-by: Samuel Iglesias Gonsálvez 
> ---
>  src/intel/compiler/brw_eu.h | 18 ++--
>  src/intel/compiler/brw_eu_emit.c| 38 
> +
>  src/intel/compiler/brw_fs_generator.cpp |  5 +++--
>  3 files changed, 43 insertions(+), 18 deletions(-)
>
> diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h
> index a3a9c63239..723fe2e1b2 100644
> --- a/src/intel/compiler/brw_eu.h
> +++ b/src/intel/compiler/brw_eu.h
> @@ -342,15 +342,19 @@ void brw_oword_block_read(struct brw_codegen *p,
>  unsigned brw_scratch_surface_idx(const struct brw_codegen *p);
>  
>  void brw_oword_block_read_scratch(struct brw_codegen *p,
> -   struct brw_reg dest,
> -   struct brw_reg mrf,
> -   int num_regs,
> -   unsigned offset);
> +  struct brw_reg dest,
> +  struct brw_reg mrf,
> +  int num_regs,
> +  unsigned offset,
> +  bool oword1_low,
> +  bool oword_high);
>  
>  void brw_oword_block_write_scratch(struct brw_codegen *p,
> -struct brw_reg mrf,
> -int num_regs,
> -unsigned offset);
> +   struct brw_reg mrf,
> +   int num_regs,
> +   unsigned offset,
> +   bool oword1_low,
> +   bool oword1_high);
>  

This seems like a rather sketchy interface to wrap single-oword scratch
reads and writes, because the num_regs, oword1_low and oword(1?)_high
arguments and the qtr/nib controls specified via p->default all need to
be in close agreement for things not to explode horribly.  Also because
the boolean arguments are highly undescriptive at the call point.

I think a substantially more robust and easy to use interface would be:

|  void brw_oword_block_write_scratch(struct brw_codegen *p,
| struct brw_reg mrf,
| unsigned num_owords,
| unsigned offset);

Where the high/low group controls are specified via p->default,
consistently with other instructions.

>  void gen7_block_read_scratch(struct brw_codegen *p,
>   struct brw_reg dest,
> diff --git a/src/intel/compiler/brw_eu_emit.c 
> b/src/intel/compiler/brw_eu_emit.c
> index 231d6fdaec..bd6f46c776 100644
> --- a/src/intel/compiler/brw_eu_emit.c
> +++ b/src/intel/compiler/brw_eu_emit.c
> @@ -2133,9 +2133,11 @@ brw_scratch_surface_idx(const struct brw_codegen *p)
>   * register spilling.
>   */
>  void brw_oword_block_write_scratch(struct brw_codegen *p,
> -struct brw_reg mrf,
> -int num_regs,
> -unsigned offset)
> +   struct brw_reg mrf,
> +   int num_regs,
> +   unsigned offset,
> +   bool oword1_low,
> +   bool oword1_high)
>  {
> const struct gen_device_info *devinfo = p->devinfo;
> const unsigned target_cache =
> @@ -2180,6 +2182,14 @@ void brw_oword_block_write_scratch(struct brw_codegen 
> *p,
>int send_commit_msg;
>struct brw_reg src_header = retype(brw_vec8_grf(0, 0),
>BRW_REGISTER_TYPE_UW);
> +  int msg_control = BRW_DATAPORT_OWORD_BLOCK_DWORDS(num_regs * 8);
> +
> +  if (num_regs == 1 && (oword1_low || oword1_high)) {
> + /* Only one of them can be true */
> + assert(oword1_low ^ oword1_high);
> + msg_control = oword1_high ?
> +BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH : 
> BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW;
> +  }
>  
>brw_inst_set_compression(devinfo, insn, false);
>  
> @@ -2223,7 +2233,7 @@ void brw_oword_block_write_scratch(struct brw_codegen 
> *p,
>brw_set_dp_write_message(p,
>  insn,
> brw_scratch_surface_idx(p),
> -BRW_DATAPORT_OWORD_BLOCK_DWORDS(num_regs * 8),
> +msg_control,
>  msg_type,
> target_cache,
>  mlen,
> @@ -2245,10 +2255,12 @@ void brw_oword_block_write_scratch(struct brw_codegen 
> *p,
>   */
>  void
>  brw_oword_block_read_scratch(struct brw_codegen *p,
> -  struct brw_reg dest,
> -  struct 

Re: [Mesa-dev] [PATCH 0/5] Gallium: Passing drirc options to create_screen() and fixing Rocket League

[Roland Scheidegger]

Am 22.06.2017 um 19:35 schrieb Ilia Mirkin:
> On Wed, Jun 21, 2017 at 9:58 AM, Ilia Mirkin  wrote:
>> On Tue, Jun 20, 2017 at 6:54 PM, Marek Olšák  wrote:
>>> The first pipe_screen flag is a drirc option to fix incorrect grass
>>> rendering in Rocket League for radeonsi. Rocket League expects DirectX
>>> behavior for partial derivative computations after discard/kill, but
>>> radeonsi implements the more efficient but stricter OpenGL behavior
>>> and that will remain our default behavior. The new screen flag forces
>>> radeonsi to use the DX behavior for that game.
>>
>> For those of us following along at home... can you provide a brief
>> reminder of what the DX behavior is, and how does it differ from GL
>> behavior? In case one might want to fix this for nouveau (if a fix is
>> needed at all)...
> 
> From what I gather, this is the difference between discard exiting
> immediately in that thread and keeping going.
> 
> Does this make sense to be surfaced in gallium via a tgsi program
> property? That way, e.g. a GL extension could be written to expose
> that program property.

I suppose it would make sense, that way this could be exposed cleanly.
But of course the apps would have to use the extension, otherwise the
override is just in a different place (and in theory not just glsl,
vulkan works the same too).

Roland



>   -ilia
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://urldefense.proofpoint.com/v2/url?u=https-3A__lists.freedesktop.org_mailman_listinfo_mesa-2Ddev=DwIGaQ=uilaK90D4TOVoH58JNXRgQ=_QIjpv-UJ77xEQY8fIYoQtr5qv8wKrPJc7v7_-CYAb0=DtcJeXTTZaceLSUoEtaDPZx10-oO7zRC9aAB6JCRK4s=ziGPeqqnGOWrPY08hnA0n14mdaI0AGGGThU2PsrBR7I=
>  
> 

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] mesa: do not trigger _NEW_TEXTURE_STATE in glActiveTexture()

[Samuel Pitoiset]

On 06/22/2017 04:57 PM, Samuel Pitoiset wrote:



On 06/22/2017 04:48 PM, Brian Paul wrote:

On 06/22/2017 06:49 AM, Samuel Pitoiset wrote:

This looks like useless because gl_context::Texture::CurrentUnit
is not used by _mesa_update_texture_state() and friends.

Signed-off-by: Samuel Pitoiset 
---
  src/mesa/main/texstate.c | 2 --
  1 file changed, 2 deletions(-)

diff --git a/src/mesa/main/texstate.c b/src/mesa/main/texstate.c
index 0a2883fcc69..caad77a1cc2 100644
--- a/src/mesa/main/texstate.c
+++ b/src/mesa/main/texstate.c
@@ -307,8 +307,6 @@ active_texture(GLenum texture, bool no_error)
}
 }

-   FLUSH_VERTICES(ctx, _NEW_TEXTURE_STATE);
-
 ctx->Texture.CurrentUnit = texUnit;
 if (ctx->Transform.MatrixMode == GL_TEXTURE) {
/* update current stack pointer */



I believe you're correct.  Did you do a piglit run just to be sure?
If so,
Reviewed-by: Brian Paul 


I did on RadeonSI and I will double-check with the Intel CI system.


Confirmed, the Intel CI system doesn't report any failures with this patch.



Samuel.




___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 00/10] egl: Little cleanups

[Eric Engestrom]

On 22 June 2017 19:10:46 BST, Chad Versace  wrote:
> No behavioral change.
> 
> Chad Versace (10):
>   egl/android: Declare loop vars inside their loops (v2)
>   egl/drm: Move loop vars inside the loop
>   egl/x11: Declare loop vars inside the loop
>   egl/surfaceless: Move loop vars inside the loop
>   egl/wayland: Declare loop vars inside the loop
>   egl/dri2: Declare loop vars inside the loop
>   egl/android: Declare EGLConfig attrib array inside loop (v2)

>   egl/drm: Declare EGLConfig attrib array inside loop
>   egl/drm: Declare EGLConfig attrib array inside loop

With the two comments on the above two patches addressed,
the series is:
Reviewed-by: Eric Engestrom 

>   egl: Rename 'count' in ${platform}_add_configs_for_visuals (v2)
> 
>  src/egl/drivers/dri2/egl_dri2.c | 43 +---
> src/egl/drivers/dri2/platform_android.c | 60
> +---
> src/egl/drivers/dri2/platform_drm.c | 59
> 
>  src/egl/drivers/dri2/platform_surfaceless.c | 21 +-
> src/egl/drivers/dri2/platform_wayland.c | 44 -
> src/egl/drivers/dri2/platform_x11.c | 61
> +++--
>  6 files changed, 130 insertions(+), 158 deletions(-)

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] i965/CFL: Add PCI Ids for Coffee Lake.

[Srivatsa, Anusha]

>-Original Message-
>From: Anuj Phogat [mailto:anuj.pho...@gmail.com]
>Sent: Thursday, June 22, 2017 10:54 AM
>To: Srivatsa, Anusha 
>Cc: mesa-dev@lists.freedesktop.org; Vivi, Rodrigo ;
>Phogat, Anuj ; Widawsky, Benjamin
>
>Subject: Re: [Mesa-dev] [PATCH] i965/CFL: Add PCI Ids for Coffee Lake.
>
>On Thu, Jun 22, 2017 at 10:42 AM, Anusha Srivatsa 
>wrote:
>> Coffee Lake has a gen9 graphics following KBL.
>> From 3D perspective, CFL is a clone of KBL/SKL features.
>>
>> v2: Change commit message, correct alignment 
>> v3: Update IDs.
>> v4: Initialize l3_banks, correct nomenclature 
>>
>> Cc: Benjamin Widawsky 
>> Cc: Anuj Phogat 
>> Cc: Rodrigo Vivi 
>> Signed-off-by: Anusha Srivatsa 
>> ---
>>  include/pci_ids/i965_pci_ids.h | 11 +++
>>  src/intel/common/gen_device_info.c | 26 ++
>> src/intel/common/gen_device_info.h |  1 +
>>  3 files changed, 38 insertions(+)
>>
>> diff --git a/include/pci_ids/i965_pci_ids.h
>> b/include/pci_ids/i965_pci_ids.h index b296359..57e70b7 100644
>> --- a/include/pci_ids/i965_pci_ids.h
>> +++ b/include/pci_ids/i965_pci_ids.h
>> @@ -165,6 +165,17 @@ CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus
>> Graphics 650 (Kaby Lake GT3)")  CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake
>GT4")
>>  CHIPSET(0x3184, glk, "Intel(R) HD Graphics (Geminilake)")
>>  CHIPSET(0x3185, glk_2x6, "Intel(R) HD Graphics (Geminilake 2x6)")
>> +CHIPSET(0x3E90, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
>> +CHIPSET(0x3E93, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
>> +CHIPSET(0x3E91, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
>> +CHIPSET(0x3E92, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
>> +CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
>> +CHIPSET(0x3E9B, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
>> +CHIPSET(0x3E94, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
>> +CHIPSET(0x3EA6, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
>> +CHIPSET(0x3EA7, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
>> +CHIPSET(0x3EA8, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
>> +CHIPSET(0x3EA5, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
>>  CHIPSET(0x5A49, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8
>> GT0.5)")  CHIPSET(0x5A4A, cnl_2x8, "Intel(R) HD Graphics (Cannonlake
>> 2x8 GT0.5)")  CHIPSET(0x5A41, cnl_3x8, "Intel(R) HD Graphics
>> (Cannonlake 3x8 GT1)") diff --git a/src/intel/common/gen_device_info.c
>> b/src/intel/common/gen_device_info.c
>> index 423748e..a1541ed 100644
>> --- a/src/intel/common/gen_device_info.c
>> +++ b/src/intel/common/gen_device_info.c
>> @@ -607,6 +607,32 @@ static const struct gen_device_info
>gen_device_info_glk_2x6 = {
>> .is_geminilake = true,
>>  };
>>
>> +static const struct gen_device_info gen_device_info_cfl_gt1 = {
>> +   GEN9_FEATURES,
>> +   .is_coffeelake = true,
>> +   .gt = 1,
>> +   .l3_banks = 2,
>> +
>> +   .num_slices = 1,
>I'll omit the blank line and move l3_banks after num_slices just for 
>consistency.
>You need not send out another version for this.

Thanks Anuj.

Anusha 
>> +};
>> +static const struct gen_device_info gen_device_info_cfl_gt2 = {
>> +   GEN9_FEATURES,
>> +   .is_coffeelake = true,
>> +   .gt = 2,
>> +   .l3_banks = 4,
>> +
>> +   .num_slices = 1,
>> +};
>> +
>> +static const struct gen_device_info gen_device_info_cfl_gt3 = {
>> +   GEN9_FEATURES,
>> +   .is_coffeelake = true,
>> +   .gt = 3,
>> +   .l3_banks = 8,
>> +
>> +   .num_slices = 2,
>> +};
>> +
>>  #define GEN10_HW_INFO   \
>> .gen = 10,   \
>> .num_thread_per_eu = 7,  \
>> diff --git a/src/intel/common/gen_device_info.h
>> b/src/intel/common/gen_device_info.h
>> index cc83857..a83251c 100644
>> --- a/src/intel/common/gen_device_info.h
>> +++ b/src/intel/common/gen_device_info.h
>> @@ -46,6 +46,7 @@ struct gen_device_info
>> bool is_broxton;
>> bool is_kabylake;
>> bool is_geminilake;
>> +   bool is_coffeelake;
>> bool is_cannonlake;
>>
>> bool has_hiz_and_separate_stencil;
>> --
>> 2.7.4
>>
>> ___
>> mesa-dev mailing list
>> mesa-dev@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
>Reviewed-by: Anuj Phogat 
>
>I'll push the patch upstream for you. Thanks.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 09/10] egl/drm: Declare EGLConfig attrib array inside loop

[Eric Engestrom]

On 22 June 2017 19:10:55 BST, Chad Versace  wrote:
> No behavioral change. Just a readability cleanup.
> 
> Instead of modifying this small array on each loop iteration, we now
> initialize it in-place with the values it needs.
> 
> Cc: Eric Engestrom 
> Cc: Emil Velikov 
> ---
>  src/egl/drivers/dri2/platform_x11.c | 24 
>  1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/src/egl/drivers/dri2/platform_x11.c
> b/src/egl/drivers/dri2/platform_x11.c
> index 2a19cdcc746..16cc31340e0 100644
> --- a/src/egl/drivers/dri2/platform_x11.c
> +++ b/src/egl/drivers/dri2/platform_x11.c
> @@ -730,13 +730,7 @@ dri2_x11_add_configs_for_visuals(struct
> dri2_egl_display *dri2_dpy,
> xcb_depth_iterator_t d;
> xcb_visualtype_t *visuals;
> int count = 0;
> -   unsigned int rgba_masks[4];
> EGLint surface_type;
> -   EGLint config_attrs[] = {
> -EGL_NATIVE_VISUAL_ID,   0,
> -EGL_NATIVE_VISUAL_TYPE, 0,
> -EGL_NONE
> -   };
>  
> d = xcb_screen_allowed_depths_iterator(dri2_dpy->screen);
>  
> @@ -763,13 +757,19 @@ dri2_x11_add_configs_for_visuals(struct
> dri2_egl_display *dri2_dpy,
>  struct dri2_egl_config *dri2_conf;
>  const __DRIconfig *config = dri2_dpy->driver_configs[j];
>  
> -config_attrs[1] = visuals[i].visual_id;
> -config_attrs[3] = visuals[i]._class;
> +const EGLint config_attrs[] = {
> +EGL_NATIVE_VISUAL_ID,visuals[i].visual_id,
> +EGL_NATIVE_VISUAL_TYPE,  visuals[i]._class,
> +EGL_NONE
> +};
> +
> +unsigned int rgba_masks[4] = {
> +   visuals[i].red_mask,
> +   visuals[i].green_mask,
> +   visuals[i].blue_mask,
> +   0,
> +};
>  
> -rgba_masks[0] = visuals[i].red_mask;
> -rgba_masks[1] = visuals[i].green_mask;
> -rgba_masks[2] = visuals[i].blue_mask;
> -rgba_masks[3] = 0;
> dri2_conf = dri2_add_config(disp, config, count + 1, surface_type,
>  config_attrs, rgba_masks);
>  if (dri2_conf)

s/drm/x11/ in the subject
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 07/30] i965/miptree: Pass the offset into create_for_bo in create_for_dri_image

[Chad Versace]

On Fri 16 Jun 2017, Jason Ekstrand wrote:
> ---
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)

Reviewed-by: Chad Versace 

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 06/30] i965: Move the DRIimage -> miptree code to intel_mipmap_tree.c

[Chad Versace]

On Fri 16 Jun 2017, Jason Ekstrand wrote:
> This is mostly a direct port.  The only bit of refactoring that was done
> was to make creating a planar miptree be an early return from the
> non-planar case.  Alternatively, we could have three functions: two
> helpers and a main function to just call the right helper.  Making the
> planar case an early return seemed cleaner.
> ---
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 91 +
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  5 ++
>  src/mesa/drivers/dri/i965/intel_tex_image.c   | 97 
> +--
>  3 files changed, 97 insertions(+), 96 deletions(-)

Reviewed-by: Chad Versace 

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 08/10] egl/drm: Declare EGLConfig attrib array inside loop

[Eric Engestrom]

On 22 June 2017 19:10:54 BST, Chad Versace  wrote:
> No behavioral change. Just a readability cleanup.
> 
> Instead of modifying this small array on each loop iteration, we now
> initialize it in-place with the values it needs.
> 
> Cc: Eric Engestrom 
> Cc: Emil Velikov 
> ---
>  src/egl/drivers/dri2/platform_drm.c | 14 +++---
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/src/egl/drivers/dri2/platform_drm.c
> b/src/egl/drivers/dri2/platform_drm.c
> index 7f907aff6c9..c88d48827b3 100644
> --- a/src/egl/drivers/dri2/platform_drm.c
> +++ b/src/egl/drivers/dri2/platform_drm.c
> @@ -598,10 +598,7 @@ drm_add_configs_for_visuals(_EGLDriver *drv,
> _EGLDisplay *disp)
>{ GBM_FORMAT_ARGB,0x00ff, 0xff00 },
>{ GBM_FORMAT_RGB565,  0xf800, 0x },
> };
> -   EGLint attr_list[] = {
> -  EGL_NATIVE_VISUAL_ID, 0,
> -  EGL_NONE,
> -   };
> +
> unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
> unsigned int count = 0;
>  
> @@ -614,12 +611,15 @@ drm_add_configs_for_visuals(_EGLDriver *drv,
> _EGLDisplay *disp)
>  __DRI_ATTRIB_ALPHA_MASK, );
>  
>for (unsigned j = 0; j < ARRAY_SIZE(visuals); j++) {
> - struct dri2_egl_config *dri2_conf;

I think this line should stay here.

> -
>  if (visuals[j].red_mask != red || visuals[j].alpha_mask != alpha)
>  continue;
>  
> - attr_list[1] = visuals[j].format;
> + struct dri2_egl_config *dri2_conf;
> +
> + const EGLint attr_list[] = {
> +EGL_NATIVE_VISUAL_ID,  visuals[j].format,
> +EGL_NONE,
> + };
>  
> dri2_conf = dri2_add_config(disp, dri2_dpy->driver_configs[i],
> count + 1, EGL_WINDOW_BIT, attr_list, NULL);

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] i965: Drop index buffer re-alignment code.

[Kenneth Graunke]

This shouldn't ever happen - GL requires it to be aligned:

   "Clients must align data elements consistent with the requirements
of the client platform, with an additional base-level requirement
that an offset within a buffer to a datum comprising N basic
machine units be a multiple of N."

Mesa should reject unaligned index buffers for us - we shouldn't have
to handle them in the driver.

Note that Gallium already makes this assumption.
---
 src/mesa/drivers/dri/i965/brw_draw_upload.c | 38 ++---
 1 file changed, 8 insertions(+), 30 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c 
b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index 05b6b1a50f1..baa1de353b4 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -711,7 +711,6 @@ brw_prepare_shader_draw_parameters(struct brw_context *brw)
 static void
 brw_upload_indices(struct brw_context *brw)
 {
-   struct gl_context *ctx = >ctx;
const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
GLuint ib_size;
struct brw_bo *old_bo = brw->ib.bo;
@@ -738,35 +737,14 @@ brw_upload_indices(struct brw_context *brw)
} else {
   offset = (GLuint) (unsigned long) index_buffer->ptr;
 
-  /* If the index buffer isn't aligned to its element size, we have to
-   * rebase it into a temporary.
-   */
-  if ((ib_type_size - 1) & offset) {
- perf_debug("copying index buffer to a temporary to work around "
-"misaligned offset %d\n", offset);
-
- GLubyte *map = ctx->Driver.MapBufferRange(ctx,
-   offset,
-   ib_size,
-   GL_MAP_READ_BIT,
-   bufferobj,
-   MAP_INTERNAL);
-
- intel_upload_data(brw, map, ib_size, ib_type_size,
-   >ib.bo, );
- brw->ib.size = brw->ib.bo->size;
-
- ctx->Driver.UnmapBuffer(ctx, bufferobj, MAP_INTERNAL);
-  } else {
- struct brw_bo *bo =
-intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
-   offset, ib_size);
- if (bo != brw->ib.bo) {
-brw_bo_unreference(brw->ib.bo);
-brw->ib.bo = bo;
-brw->ib.size = bufferobj->Size;
-brw_bo_reference(bo);
- }
+  struct brw_bo *bo =
+ intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
+offset, ib_size);
+  if (bo != brw->ib.bo) {
+ brw_bo_unreference(brw->ib.bo);
+ brw->ib.bo = bo;
+ brw->ib.size = bufferobj->Size;
+ brw_bo_reference(bo);
   }
}
 
-- 
2.13.1

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [RFC mesa] travis: add couple missing proto+lib

[Eric Engestrom]

On Thursday, 2017-06-22 16:47:29 +0100, Emil Velikov wrote:
> On 22 June 2017 at 00:29, Eric Engestrom  wrote:
> >> configure: error: Package requirements (x11 xext xdamage >= 1.1 xfixes
> >> x11-xcb xcb xcb-glx >= 1.8.1 xcb-dri2 >= 1.8) were not met:
> >> No package 'xdamage' found
> >> No package 'xfixes' found
> >
> Any ideas why I cannot see either of these on my runs?

I don't really know much about travis, but I'm guessing there might be
some caching involved? Is there any way to purge the caches?

> 
> Having a quick look at the Trusty packages [1] [2]
> - x11proto-fixes-dev - 5.0
> - libxfixes3 - 5.0.1
> - x11proto-damage - 1.2.1
> - libxdamage1 -  1.1.4
> 
> So if anything, we can pull them via apt-get?

libx{damage,fixes}-dev are the ones I needed.
Waiting for the build [1] to finish to make sure, but it looks like that
fixed it.

BTW, about a week ago the SWR builds started failing (and I see the same
failure on your travis [2] [3]); do you know if anyone's on it?

[1] https://travis-ci.org/1ace/mesa/builds/245894228
[2] https://travis-ci.org/evelikov/Mesa/jobs/244817060
[3] https://travis-ci.org/evelikov/Mesa/jobs/244817067
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 02/10] egl/drm: Move loop vars inside the loop

[Chad Versace]

That is, consistently do this:

for (int i = 0; ...)

No behavioral change.

Cc: Eric Engestrom 
Cc: Emil Velikov 
---
 src/egl/drivers/dri2/platform_drm.c | 37 +++--
 1 file changed, 15 insertions(+), 22 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_drm.c 
b/src/egl/drivers/dri2/platform_drm.c
index 869f599df57..7f907aff6c9 100644
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl/drivers/dri2/platform_drm.c
@@ -68,9 +68,8 @@ release_buffer(struct gbm_surface *_surf, struct gbm_bo *bo)
 {
struct gbm_dri_surface *surf = (struct gbm_dri_surface *) _surf;
struct dri2_egl_surface *dri2_surf = surf->dri_private;
-   unsigned i;
 
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+   for (unsigned i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
   if (dri2_surf->color_buffers[i].bo == bo) {
 dri2_surf->color_buffers[i].locked = false;
   }
@@ -82,9 +81,8 @@ has_free_buffers(struct gbm_surface *_surf)
 {
struct gbm_dri_surface *surf = (struct gbm_dri_surface *) _surf;
struct dri2_egl_surface *dri2_surf = surf->dri_private;
-   unsigned i;
 
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++)
+   for (unsigned i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++)
   if (!dri2_surf->color_buffers[i].locked)
 return 1;
 
@@ -189,16 +187,15 @@ dri2_drm_destroy_surface(_EGLDriver *drv, _EGLDisplay 
*disp, _EGLSurface *surf)
 {
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf);
-   unsigned i;
 
dri2_dpy->core->destroyDrawable(dri2_surf->dri_drawable);
 
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+   for (unsigned i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
   if (dri2_surf->color_buffers[i].bo)
 gbm_bo_destroy(dri2_surf->color_buffers[i].bo);
}
 
-   for (i = 0; i < __DRI_BUFFER_COUNT; i++) {
+   for (unsigned i = 0; i < __DRI_BUFFER_COUNT; i++) {
   if (dri2_surf->dri_buffers[i])
  dri2_dpy->dri2->releaseBuffer(dri2_dpy->dri_screen,
dri2_surf->dri_buffers[i]);
@@ -216,10 +213,9 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
   dri2_egl_display(dri2_surf->base.Resource.Display);
struct gbm_dri_surface *surf = dri2_surf->gbm_surf;
int age = 0;
-   unsigned i;
 
if (dri2_surf->back == NULL) {
-  for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+  for (unsigned i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
 if (!dri2_surf->color_buffers[i].locked &&
  dri2_surf->color_buffers[i].age >= age) {
dri2_surf->back = _surf->color_buffers[i];
@@ -367,7 +363,6 @@ dri2_drm_get_buffers(__DRIdrawable * driDrawable,
unsigned int *attachments_with_format;
__DRIbuffer *buffer;
const unsigned int format = 32;
-   int i;
 
attachments_with_format = calloc(count, 2 * sizeof(unsigned int));
if (!attachments_with_format) {
@@ -375,7 +370,7 @@ dri2_drm_get_buffers(__DRIdrawable * driDrawable,
   return NULL;
}
 
-   for (i = 0; i < count; ++i) {
+   for (int i = 0; i < count; ++i) {
   attachments_with_format[2*i] = attachments[i];
   attachments_with_format[2*i + 1] = format;
}
@@ -424,7 +419,6 @@ dri2_drm_swap_buffers(_EGLDriver *drv, _EGLDisplay *disp, 
_EGLSurface *draw)
 {
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_surface *dri2_surf = dri2_egl_surface(draw);
-   unsigned i;
 
if (!dri2_dpy->flush) {
   dri2_dpy->core->swapBuffers(dri2_surf->dri_drawable);
@@ -434,7 +428,7 @@ dri2_drm_swap_buffers(_EGLDriver *drv, _EGLDisplay *disp, 
_EGLSurface *draw)
if (dri2_surf->base.Type == EGL_WINDOW_BIT) {
   if (dri2_surf->current)
  _eglError(EGL_BAD_SURFACE, "dri2_swap_buffers");
-  for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++)
+  for (unsigned i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++)
  if (dri2_surf->color_buffers[i].age > 0)
 dri2_surf->color_buffers[i].age++;
 
@@ -534,7 +528,7 @@ swrast_put_image2(__DRIdrawable *driDrawable,
   void  *loaderPrivate)
 {
struct dri2_egl_surface *dri2_surf = loaderPrivate;
-   int internal_stride, i;
+   int internal_stride;
struct gbm_dri_bo *bo;
 
if (op != __DRI_SWRAST_IMAGE_OP_DRAW &&
@@ -550,7 +544,7 @@ swrast_put_image2(__DRIdrawable *driDrawable,
 
internal_stride = bo->base.stride;
 
-   for (i = 0; i < height; i++) {
+   for (int i = 0; i < height; i++) {
   memcpy(bo->map + (x + i) * internal_stride + y,
  data + i * stride, stride);
}
@@ -568,7 +562,7 @@ swrast_get_image(__DRIdrawable *driDrawable,
  void  *loaderPrivate)
 {
struct dri2_egl_surface *dri2_surf = loaderPrivate;
-   int internal_stride, stride, i;
+   int 

[Mesa-dev] [PATCH 08/10] egl/drm: Declare EGLConfig attrib array inside loop

[Chad Versace]

No behavioral change. Just a readability cleanup.

Instead of modifying this small array on each loop iteration, we now
initialize it in-place with the values it needs.

Cc: Eric Engestrom 
Cc: Emil Velikov 
---
 src/egl/drivers/dri2/platform_drm.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_drm.c 
b/src/egl/drivers/dri2/platform_drm.c
index 7f907aff6c9..c88d48827b3 100644
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl/drivers/dri2/platform_drm.c
@@ -598,10 +598,7 @@ drm_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay 
*disp)
   { GBM_FORMAT_ARGB,0x00ff, 0xff00 },
   { GBM_FORMAT_RGB565,  0xf800, 0x },
};
-   EGLint attr_list[] = {
-  EGL_NATIVE_VISUAL_ID, 0,
-  EGL_NONE,
-   };
+
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
unsigned int count = 0;
 
@@ -614,12 +611,15 @@ drm_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay 
*disp)
   __DRI_ATTRIB_ALPHA_MASK, );
 
   for (unsigned j = 0; j < ARRAY_SIZE(visuals); j++) {
- struct dri2_egl_config *dri2_conf;
-
  if (visuals[j].red_mask != red || visuals[j].alpha_mask != alpha)
 continue;
 
- attr_list[1] = visuals[j].format;
+ struct dri2_egl_config *dri2_conf;
+
+ const EGLint attr_list[] = {
+EGL_NATIVE_VISUAL_ID,  visuals[j].format,
+EGL_NONE,
+ };
 
  dri2_conf = dri2_add_config(disp, dri2_dpy->driver_configs[i],
count + 1, EGL_WINDOW_BIT, attr_list, NULL);
-- 
2.12.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 07/10] egl/android: Declare EGLConfig attrib array inside loop (v2)

[Chad Versace]

No behavioral change. Just a readability cleanup.

Instead of modifying this small array on each loop iteration, we now
initialize it in-place with the values it needs.

v2: Rebase.

Reviewed-by: Eric Engestrom  (v1)
Cc: Emil Velikov 
---
 src/egl/drivers/dri2/platform_android.c | 16 +++-
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_android.c 
b/src/egl/drivers/dri2/platform_android.c
index 705f92dffa2..320ae25f46c 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -1034,13 +1034,6 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   { HAL_PIXEL_FORMAT_RGB_565,   { 0xf800, 0x07e0, 0x001f, 
0x } },
   { HAL_PIXEL_FORMAT_BGRA_, { 0x00ff, 0xff00, 0x00ff, 
0xff00 } },
};
-   EGLint config_attrs[] = {
- EGL_NATIVE_VISUAL_ID,   0,
- EGL_NATIVE_VISUAL_TYPE, 0,
- EGL_FRAMEBUFFER_TARGET_ANDROID, EGL_TRUE,
- EGL_RECORDABLE_ANDROID, EGL_TRUE,
- EGL_NONE
-   };
 
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
int count = 0;
@@ -1067,8 +1060,13 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   for (int j = 0; dri2_dpy->driver_configs[j]; j++) {
  const EGLint surface_type = EGL_WINDOW_BIT | EGL_PBUFFER_BIT;
 
- config_attrs[1] = visuals[i].format;
- config_attrs[3] = visuals[i].format;
+ const EGLint config_attrs[] = {
+   EGL_NATIVE_VISUAL_ID,   visuals[i].format,
+   EGL_NATIVE_VISUAL_TYPE, visuals[i].format,
+   EGL_FRAMEBUFFER_TARGET_ANDROID, EGL_TRUE,
+   EGL_RECORDABLE_ANDROID, EGL_TRUE,
+   EGL_NONE
+ };
 
  struct dri2_egl_config *dri2_conf =
 dri2_add_config(dpy, dri2_dpy->driver_configs[j],
-- 
2.12.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 09/10] egl/drm: Declare EGLConfig attrib array inside loop

[Chad Versace]

No behavioral change. Just a readability cleanup.

Instead of modifying this small array on each loop iteration, we now
initialize it in-place with the values it needs.

Cc: Eric Engestrom 
Cc: Emil Velikov 
---
 src/egl/drivers/dri2/platform_x11.c | 24 
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_x11.c 
b/src/egl/drivers/dri2/platform_x11.c
index 2a19cdcc746..16cc31340e0 100644
--- a/src/egl/drivers/dri2/platform_x11.c
+++ b/src/egl/drivers/dri2/platform_x11.c
@@ -730,13 +730,7 @@ dri2_x11_add_configs_for_visuals(struct dri2_egl_display 
*dri2_dpy,
xcb_depth_iterator_t d;
xcb_visualtype_t *visuals;
int count = 0;
-   unsigned int rgba_masks[4];
EGLint surface_type;
-   EGLint config_attrs[] = {
-  EGL_NATIVE_VISUAL_ID,   0,
-  EGL_NATIVE_VISUAL_TYPE, 0,
-  EGL_NONE
-   };
 
d = xcb_screen_allowed_depths_iterator(dri2_dpy->screen);
 
@@ -763,13 +757,19 @@ dri2_x11_add_configs_for_visuals(struct dri2_egl_display 
*dri2_dpy,
 struct dri2_egl_config *dri2_conf;
 const __DRIconfig *config = dri2_dpy->driver_configs[j];
 
-config_attrs[1] = visuals[i].visual_id;
-config_attrs[3] = visuals[i]._class;
+const EGLint config_attrs[] = {
+EGL_NATIVE_VISUAL_ID,visuals[i].visual_id,
+EGL_NATIVE_VISUAL_TYPE,  visuals[i]._class,
+EGL_NONE
+};
+
+unsigned int rgba_masks[4] = {
+   visuals[i].red_mask,
+   visuals[i].green_mask,
+   visuals[i].blue_mask,
+   0,
+};
 
-rgba_masks[0] = visuals[i].red_mask;
-rgba_masks[1] = visuals[i].green_mask;
-rgba_masks[2] = visuals[i].blue_mask;
-rgba_masks[3] = 0;
 dri2_conf = dri2_add_config(disp, config, count + 1, surface_type,
 config_attrs, rgba_masks);
 if (dri2_conf)
-- 
2.12.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 10/10] egl: Rename 'count' in ${platform}_add_configs_for_visuals (v2)

[Chad Versace]

Rename 'count' to 'config_count'. I didn't understand what the variable
did until I untangled the for-loops. Now the next person won't have that
problem.

v2: Rebase. Fix typo. Apply to all platforms (for emil).

Reviewed-by: Eric Engestrom   (v1)
Cc: Emil Velikov 
---
 src/egl/drivers/dri2/platform_android.c | 10 +-
 src/egl/drivers/dri2/platform_drm.c | 10 +-
 src/egl/drivers/dri2/platform_surfaceless.c | 11 ++-
 src/egl/drivers/dri2/platform_x11.c | 22 --
 4 files changed, 28 insertions(+), 25 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_android.c 
b/src/egl/drivers/dri2/platform_android.c
index 320ae25f46c..acd45dab4d7 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -1036,7 +1036,7 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
};
 
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
-   int count = 0;
+   int config_count = 0;
 
/* The nesting of loops is significant here. Also significant is the order
 * of the HAL pixel formats. Many Android apps (such as Google's official
@@ -1070,11 +1070,11 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
 
  struct dri2_egl_config *dri2_conf =
 dri2_add_config(dpy, dri2_dpy->driver_configs[j],
-count + 1, surface_type, config_attrs,
+config_count + 1, surface_type, config_attrs,
 visuals[i].rgba_masks);
  if (dri2_conf) {
-if (dri2_conf->base.ConfigID == count + 1)
-   count++;
+if (dri2_conf->base.ConfigID == config_count + 1)
+   config_count++;
 format_count[i]++;
  }
   }
@@ -1087,7 +1087,7 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   }
}
 
-   return (count != 0);
+   return (config_count != 0);
 }
 
 static int
diff --git a/src/egl/drivers/dri2/platform_drm.c 
b/src/egl/drivers/dri2/platform_drm.c
index c88d48827b3..a0d7f533478 100644
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl/drivers/dri2/platform_drm.c
@@ -600,7 +600,7 @@ drm_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay 
*disp)
};
 
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
-   unsigned int count = 0;
+   unsigned int config_count = 0;
 
for (unsigned i = 0; dri2_dpy->driver_configs[i]; i++) {
   unsigned int red, alpha;
@@ -622,10 +622,10 @@ drm_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay 
*disp)
  };
 
  dri2_conf = dri2_add_config(disp, dri2_dpy->driver_configs[i],
-   count + 1, EGL_WINDOW_BIT, attr_list, NULL);
+   config_count + 1, EGL_WINDOW_BIT, attr_list, NULL);
  if (dri2_conf) {
-if (dri2_conf->base.ConfigID == count + 1)
-   count++;
+if (dri2_conf->base.ConfigID == config_count + 1)
+   config_count++;
 format_count[j]++;
  }
   }
@@ -638,7 +638,7 @@ drm_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay 
*disp)
   }
}
 
-   return (count != 0);
+   return (config_count != 0);
 }
 
 static const struct dri2_egl_display_vtbl dri2_drm_display_vtbl = {
diff --git a/src/egl/drivers/dri2/platform_surfaceless.c 
b/src/egl/drivers/dri2/platform_surfaceless.c
index d780ce4955c..1091b4febdb 100644
--- a/src/egl/drivers/dri2/platform_surfaceless.c
+++ b/src/egl/drivers/dri2/platform_surfaceless.c
@@ -201,18 +201,19 @@ surfaceless_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   { "RGB565",   { 0x00f800, 0x07e0, 0x1f, 0x0 } },
};
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
-   unsigned int count = 0;
+   unsigned int config_count = 0;
 
for (unsigned i = 0; dri2_dpy->driver_configs[i] != NULL; i++) {
   for (unsigned j = 0; j < ARRAY_SIZE(visuals); j++) {
  struct dri2_egl_config *dri2_conf;
 
  dri2_conf = dri2_add_config(dpy, dri2_dpy->driver_configs[i],
-   count + 1, EGL_PBUFFER_BIT, NULL, visuals[j].rgba_masks);
+   config_count + 1, EGL_PBUFFER_BIT, NULL,
+   visuals[j].rgba_masks);
 
  if (dri2_conf) {
-if (dri2_conf->base.ConfigID == count + 1)
-   count++;
+if (dri2_conf->base.ConfigID == config_count + 1)
+   config_count++;
 format_count[j]++;
  }
   }
@@ -225,7 +226,7 @@ surfaceless_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   }
}
 
-   return (count != 0);
+   return (config_count != 0);
 }
 
 static const struct dri2_egl_display_vtbl dri2_surfaceless_display_vtbl = {
diff --git a/src/egl/drivers/dri2/platform_x11.c 
b/src/egl/drivers/dri2/platform_x11.c
index 16cc31340e0..35612300768 100644
--- a/src/egl/drivers/dri2/platform_x11.c
+++ 

[Mesa-dev] [PATCH 06/10] egl/dri2: Declare loop vars inside the loop

[Chad Versace]

That is, consistently do this:

for (int i = 0; ...)

No behavioral change.
This patch touches only egl_dri2.c.

Cc: Eric Engestrom 
Cc: Emil Velikov 
---
 src/egl/drivers/dri2/egl_dri2.c | 43 ++---
 1 file changed, 19 insertions(+), 24 deletions(-)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 763e6d6952b..c6af57fbc53 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -195,16 +195,15 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig 
*dri_config, int id,
_EGLConfig *matching_config;
EGLint num_configs = 0;
EGLint config_id;
-   int i;
 
_eglInitConfig(, disp, id);
 
-   i = 0;
double_buffer = 0;
bind_to_texture_rgb = 0;
bind_to_texture_rgba = 0;
 
-   while (dri2_dpy->core->indexConfigAttrib(dri_config, i++, , )) 
{
+   for (int i = 0; dri2_dpy->core->indexConfigAttrib(dri_config, i, ,
+ ); ++i) {
   switch (attrib) {
   case __DRI_ATTRIB_RENDER_TYPE:
  if (value & __DRI_ATTRIB_RGBA_BIT)
@@ -287,7 +286,7 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig 
*dri_config, int id,
}
 
if (attr_list)
-  for (i = 0; attr_list[i] != EGL_NONE; i += 2)
+  for (int i = 0; attr_list[i] != EGL_NONE; i += 2)
  _eglSetConfigKey(, attr_list[i], attr_list[i+1]);
 
if (rgba_masks && memcmp(rgba_masks, dri_masks, sizeof(dri_masks)))
@@ -442,12 +441,12 @@ dri2_bind_extensions(struct dri2_egl_display *dri2_dpy,
  const __DRIextension **extensions,
  bool optional)
 {
-   int i, j, ret = EGL_TRUE;
+   int ret = EGL_TRUE;
void *field;
 
-   for (i = 0; extensions[i]; i++) {
+   for (int i = 0; extensions[i]; i++) {
   _eglLog(_EGL_DEBUG, "found extension `%s'", extensions[i]->name);
-  for (j = 0; matches[j].name; j++) {
+  for (int j = 0; matches[j].name; j++) {
  if (strcmp(extensions[i]->name, matches[j].name) == 0 &&
  extensions[i]->version >= matches[j].version) {
 field = ((char *) dri2_dpy + matches[j].offset);
@@ -459,7 +458,7 @@ dri2_bind_extensions(struct dri2_egl_display *dri2_dpy,
   }
}
 
-   for (j = 0; matches[j].name; j++) {
+   for (int j = 0; matches[j].name; j++) {
   field = ((char *) dri2_dpy + matches[j].offset);
   if (*(const __DRIextension **) field == NULL) {
  if (optional) {
@@ -481,7 +480,7 @@ dri2_open_driver(_EGLDisplay *disp)
 {
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
const __DRIextension **extensions = NULL;
-   char path[PATH_MAX], *search_paths, *p, *next, *end;
+   char path[PATH_MAX], *search_paths, *next, *end;
char *get_extensions_name;
const __DRIextension **(*get_extensions)(void);
 
@@ -495,7 +494,7 @@ dri2_open_driver(_EGLDisplay *disp)
 
dri2_dpy->driver = NULL;
end = search_paths + strlen(search_paths);
-   for (p = search_paths; p < end; p = next + 1) {
+   for (char *p = search_paths; p < end; p = next + 1) {
   int len;
   next = strchr(p, ':');
   if (next == NULL)
@@ -911,7 +910,6 @@ void
 dri2_display_destroy(_EGLDisplay *disp)
 {
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
-   unsigned i;
 
if (dri2_dpy->own_dri_screen)
   dri2_dpy->core->destroyScreen(dri2_dpy->dri_screen);
@@ -963,7 +961,7 @@ dri2_display_destroy(_EGLDisplay *disp)
 * for the cleanup.
 */
if (disp->Platform != _EGL_PLATFORM_DRM && dri2_dpy->driver_configs) {
-  for (i = 0; dri2_dpy->driver_configs[i]; i++)
+  for (unsigned i = 0; dri2_dpy->driver_configs[i]; i++)
  free((__DRIconfig *) dri2_dpy->driver_configs[i]);
   free(dri2_dpy->driver_configs);
}
@@ -1961,8 +1959,6 @@ dri2_create_image_mesa_drm_buffer(_EGLDisplay *disp, 
_EGLContext *ctx,
 static EGLBoolean
 dri2_check_dma_buf_attribs(const _EGLImageAttribs *attrs)
 {
-   unsigned i;
-
/**
  * The spec says:
  *
@@ -1992,7 +1988,7 @@ dri2_check_dma_buf_attribs(const _EGLImageAttribs *attrs)
 *  specified for a plane's pitch or offset isn't supported by EGL,
 *  EGL_BAD_ACCESS is generated."
 */
-   for (i = 0; i < ARRAY_SIZE(attrs->DMABufPlanePitches); ++i) {
+   for (unsigned i = 0; i < ARRAY_SIZE(attrs->DMABufPlanePitches); ++i) {
   if (attrs->DMABufPlanePitches[i].IsPresent &&
   attrs->DMABufPlanePitches[i].Value <= 0) {
  _eglError(EGL_BAD_ACCESS, "invalid pitch");
@@ -2007,7 +2003,7 @@ dri2_check_dma_buf_attribs(const _EGLImageAttribs *attrs)
 * This is referring to EGL_DMA_BUF_PLANE0_MODIFIER_LO_EXT and
 * EGL_DMA_BUF_PLANE0_MODIFIER_HI_EXT, and the same for other planes.
 */
-   for (i = 0; i < DMA_BUF_MAX_PLANES; ++i) {
+   for (unsigned i = 0; i < DMA_BUF_MAX_PLANES; ++i) {
   if (attrs->DMABufPlaneModifiersLo[i].IsPresent !=
   

[Mesa-dev] [PATCH 05/10] egl/wayland: Declare loop vars inside the loop

[Chad Versace]

That is, consistently do this:

for (int i = 0; ...)

No behavioral change.

Cc: Eric Engestrom 
Cc: Emil Velikov 
---
 src/egl/drivers/dri2/platform_wayland.c | 44 +
 1 file changed, 17 insertions(+), 27 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_wayland.c 
b/src/egl/drivers/dri2/platform_wayland.c
index 128ef75105d..a50b7636437 100644
--- a/src/egl/drivers/dri2/platform_wayland.c
+++ b/src/egl/drivers/dri2/platform_wayland.c
@@ -245,13 +245,12 @@ dri2_wl_destroy_surface(_EGLDriver *drv, _EGLDisplay 
*disp, _EGLSurface *surf)
 {
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf);
-   int i;
 
(void) drv;
 
dri2_dpy->core->destroyDrawable(dri2_surf->dri_drawable);
 
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+   for (int i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
   if (dri2_surf->color_buffers[i].wl_buffer)
  wl_buffer_destroy(dri2_surf->color_buffers[i].wl_buffer);
   if (dri2_surf->color_buffers[i].dri_image)
@@ -264,7 +263,7 @@ dri2_wl_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, 
_EGLSurface *surf)
}
 
if (dri2_dpy->dri2) {
-  for (i = 0; i < __DRI_BUFFER_COUNT; i++)
+  for (int i = 0; i < __DRI_BUFFER_COUNT; i++)
  if (dri2_surf->dri_buffers[i] &&
  dri2_surf->dri_buffers[i]->attachment != __DRI_BUFFER_BACK_LEFT)
 dri2_dpy->dri2->releaseBuffer(dri2_dpy->dri_screen,
@@ -296,9 +295,8 @@ dri2_wl_release_buffers(struct dri2_egl_surface *dri2_surf)
 {
struct dri2_egl_display *dri2_dpy =
   dri2_egl_display(dri2_surf->base.Resource.Display);
-   int i;
 
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+   for (int i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
   if (dri2_surf->color_buffers[i].wl_buffer &&
   !dri2_surf->color_buffers[i].locked)
  wl_buffer_destroy(dri2_surf->color_buffers[i].wl_buffer);
@@ -318,7 +316,7 @@ dri2_wl_release_buffers(struct dri2_egl_surface *dri2_surf)
}
 
if (dri2_dpy->dri2) {
-  for (i = 0; i < __DRI_BUFFER_COUNT; i++)
+  for (int i = 0; i < __DRI_BUFFER_COUNT; i++)
  if (dri2_surf->dri_buffers[i] &&
  dri2_surf->dri_buffers[i]->attachment != __DRI_BUFFER_BACK_LEFT)
 dri2_dpy->dri2->releaseBuffer(dri2_dpy->dri_screen,
@@ -331,7 +329,7 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
 {
struct dri2_egl_display *dri2_dpy =
   dri2_egl_display(dri2_surf->base.Resource.Display);
-   int i, use_flags;
+   int use_flags;
unsigned int dri_image_format;
 
/* currently supports three WL DRM formats,
@@ -357,7 +355,7 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_surf->wl_queue);
 
while (dri2_surf->back == NULL) {
-  for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+  for (int i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
  /* Get an unlocked buffer, preferrably one with a dri_buffer
   * already allocated. */
  if (dri2_surf->color_buffers[i].locked)
@@ -464,7 +462,6 @@ update_buffers(struct dri2_egl_surface *dri2_surf)
 {
struct dri2_egl_display *dri2_dpy =
   dri2_egl_display(dri2_surf->base.Resource.Display);
-   int i;
 
if (dri2_surf->base.Width != dri2_surf->wl_win->width ||
dri2_surf->base.Height != dri2_surf->wl_win->height) {
@@ -485,7 +482,7 @@ update_buffers(struct dri2_egl_surface *dri2_surf)
/* If we have an extra unlocked buffer at this point, we had to do triple
 * buffering for a while, but now can go back to just double buffering.
 * That means we can free any unlocked buffer now. */
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+   for (int i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
   if (!dri2_surf->color_buffers[i].locked &&
   dri2_surf->color_buffers[i].wl_buffer) {
  wl_buffer_destroy(dri2_surf->color_buffers[i].wl_buffer);
@@ -549,8 +546,6 @@ dri2_wl_get_buffers(__DRIdrawable * driDrawable,
__DRIbuffer *buffer;
unsigned int bpp;
 
-   int i;
-
switch (dri2_surf->format) {
case WL_DRM_FORMAT_ARGB:
case WL_DRM_FORMAT_XRGB:
@@ -570,7 +565,7 @@ dri2_wl_get_buffers(__DRIdrawable * driDrawable,
   return NULL;
}
 
-   for (i = 0; i < count; ++i) {
+   for (int i = 0; i < count; ++i) {
   attachments_with_format[2*i] = attachments[i];
   attachments_with_format[2*i + 1] = bpp;
}
@@ -694,13 +689,11 @@ try_damage_buffer(struct dri2_egl_surface *dri2_surf,
   const EGLint *rects,
   EGLint n_rects)
 {
-   int i;
-
if (wl_proxy_get_version((struct wl_proxy *) dri2_surf->wl_surface_wrapper)
< WL_SURFACE_DAMAGE_BUFFER_SINCE_VERSION)
   return EGL_FALSE;
 
-   for (i = 0; 

[Mesa-dev] [PATCH 01/10] egl/android: Declare loop vars inside their loops (v2)

[Chad Versace]

That is, consistently do this:

for (int i = 0; ...)

No behavioral change.

v2: Rebase.

Reviewed-by: Eric Engestrom  (v1)
Cc: Emil Velikov 
---
 src/egl/drivers/dri2/platform_android.c | 34 +++--
 1 file changed, 15 insertions(+), 19 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_android.c 
b/src/egl/drivers/dri2/platform_android.c
index dba5ad6d551..705f92dffa2 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -64,9 +64,7 @@ static const struct droid_yuv_format droid_yuv_formats[] = {
 static int
 get_fourcc_yuv(int native, int is_ycrcb, int chroma_step)
 {
-   int i;
-
-   for (i = 0; i < ARRAY_SIZE(droid_yuv_formats); ++i)
+   for (int i = 0; i < ARRAY_SIZE(droid_yuv_formats); ++i)
   if (droid_yuv_formats[i].native == native &&
   droid_yuv_formats[i].is_ycrcb == is_ycrcb &&
   droid_yuv_formats[i].chroma_step == chroma_step)
@@ -78,9 +76,7 @@ get_fourcc_yuv(int native, int is_ycrcb, int chroma_step)
 static bool
 is_yuv(int native)
 {
-   int i;
-
-   for (i = 0; i < ARRAY_SIZE(droid_yuv_formats); ++i)
+   for (int i = 0; i < ARRAY_SIZE(droid_yuv_formats); ++i)
   if (droid_yuv_formats[i].native == native)
  return true;
 
@@ -299,9 +295,8 @@ droid_free_local_buffers(struct dri2_egl_surface *dri2_surf)
 {
struct dri2_egl_display *dri2_dpy =
   dri2_egl_display(dri2_surf->base.Resource.Display);
-   int i;
 
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->local_buffers); i++) {
+   for (int i = 0; i < ARRAY_SIZE(dri2_surf->local_buffers); i++) {
   if (dri2_surf->local_buffers[i]) {
  dri2_dpy->dri2->releaseBuffer(dri2_dpy->dri_screen,
dri2_surf->local_buffers[i]);
@@ -951,10 +946,10 @@ static int
 droid_get_buffers_parse_attachments(struct dri2_egl_surface *dri2_surf,
 unsigned int *attachments, int count)
 {
-   int num_buffers = 0, i;
+   int num_buffers = 0;
 
/* fill dri2_surf->buffers */
-   for (i = 0; i < count * 2; i += 2) {
+   for (int i = 0; i < count * 2; i += 2) {
   __DRIbuffer *buf, *local;
 
   assert(num_buffers < ARRAY_SIZE(dri2_surf->buffers));
@@ -1046,8 +1041,9 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
  EGL_RECORDABLE_ANDROID, EGL_TRUE,
  EGL_NONE
};
+
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
-   int count, i, j;
+   int count = 0;
 
/* The nesting of loops is significant here. Also significant is the order
 * of the HAL pixel formats. Many Android apps (such as Google's official
@@ -1067,17 +1063,17 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
 * (chadversary) testing on Android Nougat, this was good enough to pacify
 * the buggy clients.
 */
-   count = 0;
-   for (i = 0; i < ARRAY_SIZE(visuals); i++) {
-  const EGLint surface_type = EGL_WINDOW_BIT | EGL_PBUFFER_BIT;
-  struct dri2_egl_config *dri2_conf;
+   for (int i = 0; i < ARRAY_SIZE(visuals); i++) {
+  for (int j = 0; dri2_dpy->driver_configs[j]; j++) {
+ const EGLint surface_type = EGL_WINDOW_BIT | EGL_PBUFFER_BIT;
 
-  for (j = 0; dri2_dpy->driver_configs[j]; j++) {
  config_attrs[1] = visuals[i].format;
  config_attrs[3] = visuals[i].format;
 
- dri2_conf = dri2_add_config(dpy, dri2_dpy->driver_configs[j],
-   count + 1, surface_type, config_attrs, visuals[i].rgba_masks);
+ struct dri2_egl_config *dri2_conf =
+dri2_add_config(dpy, dri2_dpy->driver_configs[j],
+count + 1, surface_type, config_attrs,
+visuals[i].rgba_masks);
  if (dri2_conf) {
 if (dri2_conf->base.ConfigID == count + 1)
count++;
@@ -1086,7 +1082,7 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   }
}
 
-   for (i = 0; i < ARRAY_SIZE(format_count); i++) {
+   for (int i = 0; i < ARRAY_SIZE(format_count); i++) {
   if (!format_count[i]) {
  _eglLog(_EGL_DEBUG, "No DRI config supports native format 0x%x",
  visuals[i].format);
-- 
2.12.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 03/10] egl/x11: Declare loop vars inside the loop

[Chad Versace]

That is, consistently do this:

for (int i = 0; ...)

No behavioral change.

Cc: Eric Engestrom 
Cc: Emil Velikov 
---
 src/egl/drivers/dri2/platform_x11.c | 15 +++
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_x11.c 
b/src/egl/drivers/dri2/platform_x11.c
index f91ad67d5f9..2a19cdcc746 100644
--- a/src/egl/drivers/dri2/platform_x11.c
+++ b/src/egl/drivers/dri2/platform_x11.c
@@ -442,14 +442,13 @@ dri2_x11_process_buffers(struct dri2_egl_surface 
*dri2_surf,
struct dri2_egl_display *dri2_dpy =
   dri2_egl_display(dri2_surf->base.Resource.Display);
xcb_rectangle_t rectangle;
-   unsigned i;
 
dri2_surf->buffer_count = count;
dri2_surf->have_fake_front = false;
 
/* This assumes the DRI2 buffer attachment tokens matches the
 * __DRIbuffer tokens. */
-   for (i = 0; i < count; i++) {
+   for (unsigned i = 0; i < count; i++) {
   dri2_surf->buffers[i].attachment = buffers[i].attachment;
   dri2_surf->buffers[i].name = buffers[i].name;
   dri2_surf->buffers[i].pitch = buffers[i].pitch;
@@ -730,7 +729,7 @@ dri2_x11_add_configs_for_visuals(struct dri2_egl_display 
*dri2_dpy,
 {
xcb_depth_iterator_t d;
xcb_visualtype_t *visuals;
-   int i, j, count;
+   int count = 0;
unsigned int rgba_masks[4];
EGLint surface_type;
EGLint config_attrs[] = {
@@ -740,7 +739,6 @@ dri2_x11_add_configs_for_visuals(struct dri2_egl_display 
*dri2_dpy,
};
 
d = xcb_screen_allowed_depths_iterator(dri2_dpy->screen);
-   count = 0;
 
surface_type =
   EGL_WINDOW_BIT |
@@ -754,12 +752,14 @@ dri2_x11_add_configs_for_visuals(struct dri2_egl_display 
*dri2_dpy,
   EGLBoolean class_added[6] = { 0, };
 
   visuals = xcb_depth_visuals(d.data);
-  for (i = 0; i < xcb_depth_visuals_length(d.data); i++) {
+
+  for (int i = 0; i < xcb_depth_visuals_length(d.data); i++) {
 if (class_added[visuals[i]._class])
continue;
 
 class_added[visuals[i]._class] = EGL_TRUE;
-for (j = 0; dri2_dpy->driver_configs[j]; j++) {
+
+for (int j = 0; dri2_dpy->driver_configs[j]; j++) {
 struct dri2_egl_config *dri2_conf;
 const __DRIconfig *config = dri2_dpy->driver_configs[j];
 
@@ -916,12 +916,11 @@ dri2_x11_swap_buffers_region(_EGLDriver *drv, _EGLDisplay 
*disp,
EGLBoolean ret;
xcb_xfixes_region_t region;
xcb_rectangle_t rectangles[16];
-   int i;
 
if (numRects > (int)ARRAY_SIZE(rectangles))
   return dri2_copy_region(drv, disp, draw, dri2_surf->region);
 
-   for (i = 0; i < numRects; i++) {
+   for (int i = 0; i < numRects; i++) {
   rectangles[i].x = rects[i * 4];
   rectangles[i].y = dri2_surf->base.Height - rects[i * 4 + 1] - rects[i * 
4 + 3];
   rectangles[i].width = rects[i * 4 + 2];
-- 
2.12.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 04/10] egl/surfaceless: Move loop vars inside the loop

[Chad Versace]

That is, consistently do this:

for (int i = 0; ...)

No behavioral change.

Cc: Eric Engestrom 
Cc: Emil Velikov 
---
 src/egl/drivers/dri2/platform_surfaceless.c | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_surfaceless.c 
b/src/egl/drivers/dri2/platform_surfaceless.c
index f292f2b3fe3..d780ce4955c 100644
--- a/src/egl/drivers/dri2/platform_surfaceless.c
+++ b/src/egl/drivers/dri2/platform_surfaceless.c
@@ -201,11 +201,10 @@ surfaceless_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   { "RGB565",   { 0x00f800, 0x07e0, 0x1f, 0x0 } },
};
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
-   unsigned int count, i, j;
+   unsigned int count = 0;
 
-   count = 0;
-   for (i = 0; dri2_dpy->driver_configs[i] != NULL; i++) {
-  for (j = 0; j < ARRAY_SIZE(visuals); j++) {
+   for (unsigned i = 0; dri2_dpy->driver_configs[i] != NULL; i++) {
+  for (unsigned j = 0; j < ARRAY_SIZE(visuals); j++) {
  struct dri2_egl_config *dri2_conf;
 
  dri2_conf = dri2_add_config(dpy, dri2_dpy->driver_configs[i],
@@ -219,7 +218,7 @@ surfaceless_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   }
}
 
-   for (i = 0; i < ARRAY_SIZE(format_count); i++) {
+   for (unsigned i = 0; i < ARRAY_SIZE(format_count); i++) {
   if (!format_count[i]) {
  _eglLog(_EGL_DEBUG, "No DRI config supports native format %s",
visuals[i].format_name);
@@ -272,7 +271,6 @@ dri2_initialize_surfaceless(_EGLDriver *drv, _EGLDisplay 
*disp)
 {
struct dri2_egl_display *dri2_dpy;
const char* err;
-   int i;
int driver_loaded = 0;
 
loader_set_logger(_eglLog);
@@ -286,7 +284,7 @@ dri2_initialize_surfaceless(_EGLDriver *drv, _EGLDisplay 
*disp)
 
const int limit = 64;
const int base = 128;
-   for (i = 0; i < limit; ++i) {
+   for (int i = 0; i < limit; ++i) {
   char *card_path;
   if (asprintf(_path, DRM_RENDER_DEV_NAME, DRM_DIR_NAME, base + i) < 
0)
  continue;
-- 
2.12.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 00/10] egl: Little cleanups

[Chad Versace]

No behavioral change.

Chad Versace (10):
  egl/android: Declare loop vars inside their loops (v2)
  egl/drm: Move loop vars inside the loop
  egl/x11: Declare loop vars inside the loop
  egl/surfaceless: Move loop vars inside the loop
  egl/wayland: Declare loop vars inside the loop
  egl/dri2: Declare loop vars inside the loop
  egl/android: Declare EGLConfig attrib array inside loop (v2)
  egl/drm: Declare EGLConfig attrib array inside loop
  egl/drm: Declare EGLConfig attrib array inside loop
  egl: Rename 'count' in ${platform}_add_configs_for_visuals (v2)

 src/egl/drivers/dri2/egl_dri2.c | 43 +---
 src/egl/drivers/dri2/platform_android.c | 60 +---
 src/egl/drivers/dri2/platform_drm.c | 59 
 src/egl/drivers/dri2/platform_surfaceless.c | 21 +-
 src/egl/drivers/dri2/platform_wayland.c | 44 -
 src/egl/drivers/dri2/platform_x11.c | 61 +++--
 6 files changed, 130 insertions(+), 158 deletions(-)

-- 
2.12.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/2] anv/cnl: Don't write to Cache Mode Register 1 on gen10+

[Anuj Phogat]

For PartialResolveDisableInVC field recommendation is to
always set this to 0 and that's the default value of the bit.
So, we have nothing left to write to CACHE_MODE_1.

Signed-off-by: Anuj Phogat 
---
 src/intel/vulkan/genX_state.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c
index 7a16ec0..3e65832 100644
--- a/src/intel/vulkan/genX_state.c
+++ b/src/intel/vulkan/genX_state.c
@@ -52,13 +52,11 @@ genX(init_device_state)(struct anv_device *device)
   ps.PipelineSelection = _3D;
}
 
-#if GEN_GEN >= 9
+#if GEN_GEN == 9
uint32_t cache_mode_1;
anv_pack_struct(_mode_1, GENX(CACHE_MODE_1),
-#if GEN_GEN == 9
.FloatBlendOptimizationEnable = true,
.FloatBlendOptimizationEnableMask = true,
-#endif
.PartialResolveDisableInVC = true,
.PartialResolveDisableInVCMask = true);
 
-- 
2.9.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/2] i965/cnl: Don't write to Cache Mode Register 1 on gen10+

[Anuj Phogat]

With below optimizations gone in gen10+ we have nothing left out to
write to CACHE_MODE_1:
Float Blend Optimization Enable: This bit have been removed in gen10+
Partial Resolve Disable in VC: Recommendation is to always set this
field to 0 in gen10+ and that's the default value of the bit.

Signed-off-by: Anuj Phogat 
---
 src/mesa/drivers/dri/i965/brw_state_upload.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c 
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 926597b..5e82c1b 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -60,8 +60,10 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
 
brw_upload_invariant_state(brw);
 
-   /* Recommended optimization for Victim Cache eviction in pixel backend. */
-   if (brw->gen >= 9) {
+   if (brw->gen == 9) {
+  /* Recommended optimizations for Victim Cache eviction and floating
+   * point blending.
+   */
   BEGIN_BATCH(3);
   OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));
   OUT_BATCH(GEN7_CACHE_MODE_1);
-- 
2.9.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] i965/CFL: Add PCI Ids for Coffee Lake.

[Anuj Phogat]

On Thu, Jun 22, 2017 at 10:42 AM, Anusha Srivatsa
 wrote:
> Coffee Lake has a gen9 graphics following KBL.
> From 3D perspective, CFL is a clone of KBL/SKL features.
>
> v2: Change commit message, correct alignment 
> v3: Update IDs.
> v4: Initialize l3_banks, correct nomenclature 
>
> Cc: Benjamin Widawsky 
> Cc: Anuj Phogat 
> Cc: Rodrigo Vivi 
> Signed-off-by: Anusha Srivatsa 
> ---
>  include/pci_ids/i965_pci_ids.h | 11 +++
>  src/intel/common/gen_device_info.c | 26 ++
>  src/intel/common/gen_device_info.h |  1 +
>  3 files changed, 38 insertions(+)
>
> diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
> index b296359..57e70b7 100644
> --- a/include/pci_ids/i965_pci_ids.h
> +++ b/include/pci_ids/i965_pci_ids.h
> @@ -165,6 +165,17 @@ CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus Graphics 
> 650 (Kaby Lake GT3)")
>  CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4")
>  CHIPSET(0x3184, glk, "Intel(R) HD Graphics (Geminilake)")
>  CHIPSET(0x3185, glk_2x6, "Intel(R) HD Graphics (Geminilake 2x6)")
> +CHIPSET(0x3E90, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
> +CHIPSET(0x3E93, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
> +CHIPSET(0x3E91, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
> +CHIPSET(0x3E92, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
> +CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
> +CHIPSET(0x3E9B, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
> +CHIPSET(0x3E94, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
> +CHIPSET(0x3EA6, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
> +CHIPSET(0x3EA7, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
> +CHIPSET(0x3EA8, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
> +CHIPSET(0x3EA5, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
>  CHIPSET(0x5A49, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
>  CHIPSET(0x5A4A, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
>  CHIPSET(0x5A41, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
> diff --git a/src/intel/common/gen_device_info.c 
> b/src/intel/common/gen_device_info.c
> index 423748e..a1541ed 100644
> --- a/src/intel/common/gen_device_info.c
> +++ b/src/intel/common/gen_device_info.c
> @@ -607,6 +607,32 @@ static const struct gen_device_info 
> gen_device_info_glk_2x6 = {
> .is_geminilake = true,
>  };
>
> +static const struct gen_device_info gen_device_info_cfl_gt1 = {
> +   GEN9_FEATURES,
> +   .is_coffeelake = true,
> +   .gt = 1,
> +   .l3_banks = 2,
> +
> +   .num_slices = 1,
I'll omit the blank line and move l3_banks after num_slices just for
consistency.
You need not send out another version for this.

> +};
> +static const struct gen_device_info gen_device_info_cfl_gt2 = {
> +   GEN9_FEATURES,
> +   .is_coffeelake = true,
> +   .gt = 2,
> +   .l3_banks = 4,
> +
> +   .num_slices = 1,
> +};
> +
> +static const struct gen_device_info gen_device_info_cfl_gt3 = {
> +   GEN9_FEATURES,
> +   .is_coffeelake = true,
> +   .gt = 3,
> +   .l3_banks = 8,
> +
> +   .num_slices = 2,
> +};
> +
>  #define GEN10_HW_INFO   \
> .gen = 10,   \
> .num_thread_per_eu = 7,  \
> diff --git a/src/intel/common/gen_device_info.h 
> b/src/intel/common/gen_device_info.h
> index cc83857..a83251c 100644
> --- a/src/intel/common/gen_device_info.h
> +++ b/src/intel/common/gen_device_info.h
> @@ -46,6 +46,7 @@ struct gen_device_info
> bool is_broxton;
> bool is_kabylake;
> bool is_geminilake;
> +   bool is_coffeelake;
> bool is_cannonlake;
>
> bool has_hiz_and_separate_stencil;
> --
> 2.7.4
>
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Reviewed-by: Anuj Phogat 

I'll push the patch upstream for you. Thanks.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] i965/CFL: Add PCI Ids for Coffee Lake.

[Anusha Srivatsa]

Coffee Lake has a gen9 graphics following KBL.
From 3D perspective, CFL is a clone of KBL/SKL features.

v2: Change commit message, correct alignment 
v3: Update IDs.
v4: Initialize l3_banks, correct nomenclature 

Cc: Benjamin Widawsky 
Cc: Anuj Phogat 
Cc: Rodrigo Vivi 
Signed-off-by: Anusha Srivatsa 
---
 include/pci_ids/i965_pci_ids.h | 11 +++
 src/intel/common/gen_device_info.c | 26 ++
 src/intel/common/gen_device_info.h |  1 +
 3 files changed, 38 insertions(+)

diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index b296359..57e70b7 100644
--- a/include/pci_ids/i965_pci_ids.h
+++ b/include/pci_ids/i965_pci_ids.h
@@ -165,6 +165,17 @@ CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus Graphics 650 
(Kaby Lake GT3)")
 CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4")
 CHIPSET(0x3184, glk, "Intel(R) HD Graphics (Geminilake)")
 CHIPSET(0x3185, glk_2x6, "Intel(R) HD Graphics (Geminilake 2x6)")
+CHIPSET(0x3E90, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
+CHIPSET(0x3E93, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
+CHIPSET(0x3E91, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
+CHIPSET(0x3E92, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
+CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
+CHIPSET(0x3E9B, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
+CHIPSET(0x3E94, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
+CHIPSET(0x3EA6, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
+CHIPSET(0x3EA7, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
+CHIPSET(0x3EA8, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
+CHIPSET(0x3EA5, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
 CHIPSET(0x5A49, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
 CHIPSET(0x5A4A, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
 CHIPSET(0x5A41, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
diff --git a/src/intel/common/gen_device_info.c 
b/src/intel/common/gen_device_info.c
index 423748e..a1541ed 100644
--- a/src/intel/common/gen_device_info.c
+++ b/src/intel/common/gen_device_info.c
@@ -607,6 +607,32 @@ static const struct gen_device_info 
gen_device_info_glk_2x6 = {
.is_geminilake = true,
 };
 
+static const struct gen_device_info gen_device_info_cfl_gt1 = {
+   GEN9_FEATURES,
+   .is_coffeelake = true,
+   .gt = 1,
+   .l3_banks = 2,
+
+   .num_slices = 1,
+};
+static const struct gen_device_info gen_device_info_cfl_gt2 = {
+   GEN9_FEATURES,
+   .is_coffeelake = true,
+   .gt = 2,
+   .l3_banks = 4,
+
+   .num_slices = 1,
+};
+
+static const struct gen_device_info gen_device_info_cfl_gt3 = {
+   GEN9_FEATURES,
+   .is_coffeelake = true,
+   .gt = 3,
+   .l3_banks = 8,
+
+   .num_slices = 2,
+};
+
 #define GEN10_HW_INFO   \
.gen = 10,   \
.num_thread_per_eu = 7,  \
diff --git a/src/intel/common/gen_device_info.h 
b/src/intel/common/gen_device_info.h
index cc83857..a83251c 100644
--- a/src/intel/common/gen_device_info.h
+++ b/src/intel/common/gen_device_info.h
@@ -46,6 +46,7 @@ struct gen_device_info
bool is_broxton;
bool is_kabylake;
bool is_geminilake;
+   bool is_coffeelake;
bool is_cannonlake;
 
bool has_hiz_and_separate_stencil;
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 0/5] Gallium: Passing drirc options to create_screen() and fixing Rocket League

[Ilia Mirkin]

On Wed, Jun 21, 2017 at 9:58 AM, Ilia Mirkin  wrote:
> On Tue, Jun 20, 2017 at 6:54 PM, Marek Olšák  wrote:
>> The first pipe_screen flag is a drirc option to fix incorrect grass
>> rendering in Rocket League for radeonsi. Rocket League expects DirectX
>> behavior for partial derivative computations after discard/kill, but
>> radeonsi implements the more efficient but stricter OpenGL behavior
>> and that will remain our default behavior. The new screen flag forces
>> radeonsi to use the DX behavior for that game.
>
> For those of us following along at home... can you provide a brief
> reminder of what the DX behavior is, and how does it differ from GL
> behavior? In case one might want to fix this for nouveau (if a fix is
> needed at all)...

From what I gather, this is the difference between discard exiting
immediately in that thread and keeping going.

Does this make sense to be surfaced in gallium via a tgsi program
property? That way, e.g. a GL extension could be written to expose
that program property.

  -ilia
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2 01/13] intel/blorp: Assert levels and layers are in range

[Jason Ekstrand]

On Thu, Jun 22, 2017 at 10:02 AM, Nanley Chery 
wrote:

> On Thu, Jun 22, 2017 at 09:59:44AM -0700, Nanley Chery wrote:
> > On Thu, Jun 22, 2017 at 09:55:50AM -0700, Nanley Chery wrote:
> > > On Wed, Jun 21, 2017 at 06:07:29PM -0700, Jason Ekstrand wrote:
> > > > On Wed, Jun 21, 2017 at 5:15 PM, Nanley Chery 
> wrote:
> > > >
> > > > > v2 (Jason Ekstrand):
> > > > > - Update commit title
> > > > > - Check aux level and layer as well
> > > > >
> > > > > Signed-off-by: Nanley Chery 
> > > > > Reviewed-by: Iago Toral Quiroga  (v1)
> > > > > ---
> > > > >  src/intel/blorp/blorp.c   | 7 +++
> > > > >  src/intel/blorp/blorp_clear.c | 4 
> > > > >  2 files changed, 7 insertions(+), 4 deletions(-)
> > > > >
> > > > > diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
> > > > > index 9c88658e8a..7e30e20a59 100644
> > > > > --- a/src/intel/blorp/blorp.c
> > > > > +++ b/src/intel/blorp/blorp.c
> > > > > @@ -66,6 +66,8 @@ brw_blorp_surface_info_init(struct
> blorp_context *blorp,
> > > > >  unsigned int level, unsigned int
> layer,
> > > > >  enum isl_format format, bool
> is_render_target)
> > > > >  {
> > > > > +   assert(level < surf->surf->levels);
> > > > > +
> > > > > info->enabled = true;
> > > > >
> > > > > if (format == ISL_FORMAT_UNSUPPORTED)
> > > > > @@ -90,6 +92,9 @@ brw_blorp_surface_info_init(struct
> blorp_context *blorp,
> > > > > if (info->aux_usage != ISL_AUX_USAGE_NONE) {
> > > > >info->aux_surf = *surf->aux_surf;
> > > > >info->aux_addr = surf->aux_addr;
> > > > > +  assert(level < info->aux_surf.levels);
> > > > > +  assert(layer < MAX2(info->aux_surf.logical_level0_px.depth
> >>
> > > > > level,
> > > > > +  info->aux_surf.logical_level0_
> px.array_len));
> > > > > }
> > > > >
> > > > > info->clear_color = surf->clear_color;
> > > > > @@ -106,6 +111,8 @@ brw_blorp_surface_info_init(struct
> blorp_context
> > > > > *blorp,
> > > > > info->view.array_len = MAX2(info->surf.logical_
> level0_px.depth,
> > > > > info->surf.logical_level0_px.
> array_len);
> > > > >
> > > > > +   assert(layer < info->view.array_len);
> > > > >
> > > >
> > > > Might be more straightforward to move this assert to the top and
> make it
> > > > look like the aux assert.  I don't care too much though.
> > > >
> > > >
> > >
> > > I agree. Could I apply your rb if I instead put this under the first
> > > assert in the function?
> > >
> > >assert(layer < MAX2(info->surf.logical_level0_px.depth >> level,
> > >info->surf.logical_level0_px.array_len));
> > >
> >
> > Whoops, info->surf is not yet defined there. It should be:
> >  assert(layer < MAX2(surf->surf.logical_level0_px.depth >> level,
> >  surf->surf.logical_level0_px.array_len));
>
> ... and I forgot that surf->surf is a pointer. Sorry,
>
> surf->surf->logical[...]
>

No worries.  Yes, you can put my RB on it with that assuming you get it to
compile. :-)

--Jason


> > > > > +
> > > > > if (!is_render_target &&
> > > > > (info->surf.dim == ISL_SURF_DIM_3D ||
> > > > >  info->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY)) {
> > > > > diff --git a/src/intel/blorp/blorp_clear.c
> b/src/intel/blorp/blorp_clear.c
> > > > > index efacadfebe..369e18726f 100644
> > > > > --- a/src/intel/blorp/blorp_clear.c
> > > > > +++ b/src/intel/blorp/blorp_clear.c
> > > > > @@ -707,10 +707,6 @@ blorp_ccs_resolve(struct blorp_batch *batch,
> > > > > struct blorp_params params;
> > > > > blorp_params_init();
> > > > >
> > > > > -   /* Layered and mipmapped fast clear is only available from Gen8
> > > > > onwards. */
> > > > > -   assert(ISL_DEV_GEN(batch->blorp->isl_dev) >= 8 ||
> > > > > -  (level == 0 && layer == 0));
> > > > > -
> > > > > brw_blorp_surface_info_init(batch->blorp, , surf,
> > > > > level, layer, format, true);
> > > > >
> > > > > --
> > > > > 2.13.1
> > > > >
> > > > > ___
> > > > > mesa-dev mailing list
> > > > > mesa-dev@lists.freedesktop.org
> > > > > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> > > > >
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] egl/android: Change order of EGLConfig generation (v2)

[Chad Versace]

On Thu 22 Jun 2017, Rob Herring wrote:
> On Tue, Jun 20, 2017 at 5:03 PM, Chad Versace  
> wrote:
> > Many Android apps (such as Google's official NDK GLES2 example app), and
> > even portions the core framework code (such as SystemServiceManager in
> > Nougat), incorrectly choose their EGLConfig.  They neglect to match the
> > EGLConfig's EGL_NATIVE_VISUAL_ID against the window's native format, and
> > instead choose the first EGLConfig whose channel sizes match those of
> > the native window format while ignoring the channel *ordering*.
> >
> > We can detect such buggy clients in logcat when they call
> > eglCreateSurface, by detecting the mismatch between the EGLConfig's
> > format and the window's format.
> >
> > As a workaround, this patch changes the order of EGLConfig generation
> > such that all EGLConfigs for HAL pixel format i precede those for HAL
> > pixel format i+1. In my (chadversary) testing on Android Nougat, this
> > was good enough to pacify the buggy clients.
> >
> > v2: Rebase to make patch cherry-pickable to stable.
> >
> > Cc: mesa-sta...@lists.freedesktop.org
> > Cc: Tomasz Figa 
> > Cc: Rob Herring 
> > Cc: Tapani Pälli 
> > Cc: Emil Velikov 
> 
> Tested-by: Rob Herring 

Already pushed...

> > ---
> >  src/egl/drivers/dri2/platform_android.c | 32 
> > +---
> >  1 file changed, 25 insertions(+), 7 deletions(-)
> >
> > diff --git a/src/egl/drivers/dri2/platform_android.c 
> > b/src/egl/drivers/dri2/platform_android.c
> > index 5550f580a80..eaaeff4641c 100644
> > --- a/src/egl/drivers/dri2/platform_android.c
> > +++ b/src/egl/drivers/dri2/platform_android.c
> > @@ -1049,20 +1049,38 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
> > _EGLDisplay *dpy)
> > unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
> > int count, i, j;
> >
> > +   /* The nesting of loops is significant here. Also significant is the 
> > order
> > +* of the HAL pixel formats. Many Android apps (such as Google's 
> > official
> > +* NDK GLES2 example app), and even portions the core framework code 
> > (such
> > +* as SystemServiceManager in Nougat), incorrectly choose their 
> > EGLConfig.
> > +* They neglect to match the EGLConfig's EGL_NATIVE_VISUAL_ID against 
> > the
> > +* window's native format, and instead choose the first EGLConfig whose
> > +* channel sizes match those of the native window format while ignoring 
> > the
> > +* channel *ordering*.
> > +*
> > +* We can detect such buggy clients in logcat when they call
> > +* eglCreateSurface, by detecting the mismatch between the EGLConfig's
> > +* format and the window's format.
> 
> How do we find the buggy clients with this patch applied other than reverting?

It's possible to detect most buggy client behavior within Mesa, but it would
require sniffing the EGL calls. In the simplest case,

if (((the client calls eglChooseConfig without filtering on 
EGL_NATIVE_VISUAL_ID) ||
 (the client calls eglGetConfigs)) &&
(the client never calls eglGetConfigAttrib(EGL_NATIVE_VISUAL_ID)) &&
(the client calls eglCreateWindowSurface))
{
the client is buggy;
}

If you wanted to get fancier, so as to detect more buggy clients, you
could trace the above conditions per-EGLDisplay, per-EGLConfig.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 06/11] intel/genxml: Add Gen10 CACHE_MODE_1 definitions

[Anuj Phogat]

On Thu, Jun 22, 2017 at 9:18 AM, Rafael Antognolli
 wrote:
> On Tue, Jun 13, 2017 at 11:28:25AM -0700, Anuj Phogat wrote:
>> Few of the fields in this register are changed as compared
>> to gen9.xml.
>>
>> Signed-off-by: Anuj Phogat 
>> ---
>>  src/intel/genxml/gen10.xml | 22 ++
>>  1 file changed, 22 insertions(+)
>>
>> diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml
>> index d2bb130..e8776c7 100644
>> --- a/src/intel/genxml/gen10.xml
>> +++ b/src/intel/genxml/gen10.xml
>> @@ -3734,4 +3734,26 @@
>>  
>>
>>
>> +  
>> +> type="bool"/>
>> +
>> +
>> +> type="bool"/>
>> +> type="uint"/>
>> +> type="bool"/>
>> +
>> +> type="bool"/>
>> +> type="bool"/>
>> +
>> +> type="bool"/>
>> +
>> +
>> +> end="22" type="bool"/>
>> +> type="uint"/>
>> +> type="bool"/>
>> +> type="bool"/>
>> +> type="bool"/>
>> +> type="bool"/>
>> +  
>
> Bit 14 and 1 changed name. Bits 8-6, and 4 seem to have been removed. And I
> believe the respective masks should be updated accordingly, right?
>
Bit 14 and 1 remains same on CNL. They are changed for future platforms.
I've removed bits 8-6 and 4. Thanks for the review.

> With that,
> Reviewed-by: Rafael Antognolli 
>
>>  
>> --
>> 2.9.3
>>
>> ___
>> mesa-dev mailing list
>> mesa-dev@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2 13/13] anv/gpu_memcpy: Rename the gpu_memcpy function

[Nanley Chery]

On Wed, Jun 21, 2017 at 06:21:54PM -0700, Jason Ekstrand wrote:
> I never liked the gpu_memcpy name anyway because I knew something like this
> would come up.  I left you one trivial comment on patch 1.  Other than
> that, the series is
> 
> Reviewied-by: Jason Ekstrand 
> 
> Given that you're changing core blorp, please make sure you run this
> through Jenkins on GL. :-)
> 
> --Jason
> 

Thanks! I made the modification to patch 1 and I'll re-run jenkins for GL.

-Nanley

> On Wed, Jun 21, 2017 at 5:15 PM, Nanley Chery  wrote:
> 
> > A GPU memcpy function could alternatively be implemented using MI_*
> > commands. Provide more detail into how this one operates in case another
> > memcpy function is created.
> >
> > v2:
> > - Update the commit message.
> > v3:
> > - Use 'memcpy' instead of 'cpy' (Jason Ekstrand)
> > - Shorten 'streamout' to 'so'
> >
> > Suggested-by: Jason Ekstrand 
> > Signed-off-by: Nanley Chery 
> > Reviewed-by: Iago Toral Quiroga  (v2)
> > ---
> >  src/intel/vulkan/anv_genX.h| 8 
> >  src/intel/vulkan/genX_cmd_buffer.c | 6 +++---
> >  src/intel/vulkan/genX_gpu_memcpy.c | 8 
> >  3 files changed, 11 insertions(+), 11 deletions(-)
> >
> > diff --git a/src/intel/vulkan/anv_genX.h b/src/intel/vulkan/anv_genX.h
> > index 67147b0e92..8da5e075dc 100644
> > --- a/src/intel/vulkan/anv_genX.h
> > +++ b/src/intel/vulkan/anv_genX.h
> > @@ -64,10 +64,10 @@ genX(emit_urb_setup)(struct anv_device *device, struct
> > anv_batch *batch,
> >   VkShaderStageFlags active_stages,
> >   const unsigned entry_size[4]);
> >
> > -void genX(cmd_buffer_gpu_memcpy)(struct anv_cmd_buffer *cmd_buffer,
> > - struct anv_bo *dst, uint32_t dst_offset,
> > - struct anv_bo *src, uint32_t src_offset,
> > - uint32_t size);
> > +void genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
> > +struct anv_bo *dst, uint32_t dst_offset,
> > +struct anv_bo *src, uint32_t src_offset,
> > +uint32_t size);
> >
> >  void genX(blorp_exec)(struct blorp_batch *batch,
> >const struct blorp_params *params);
> > diff --git a/src/intel/vulkan/genX_cmd_buffer.c
> > b/src/intel/vulkan/genX_cmd_buffer.c
> > index 6a3e525eb3..53c58ca5b3 100644
> > --- a/src/intel/vulkan/genX_cmd_buffer.c
> > +++ b/src/intel/vulkan/genX_cmd_buffer.c
> > @@ -710,9 +710,9 @@ genX(CmdExecuteCommands)(
> >   struct anv_state dst_state = secondary->state.render_pass_
> > states;
> >   assert(src_state.alloc_size == dst_state.alloc_size);
> >
> > - genX(cmd_buffer_gpu_memcpy)(primary, ss_bo, dst_state.offset,
> > - ss_bo, src_state.offset,
> > - src_state.alloc_size);
> > + genX(cmd_buffer_so_memcpy)(primary, ss_bo, dst_state.offset,
> > +ss_bo, src_state.offset,
> > +src_state.alloc_size);
> >}
> >
> >anv_cmd_buffer_add_secondary(primary, secondary);
> > diff --git a/src/intel/vulkan/genX_gpu_memcpy.c
> > b/src/intel/vulkan/genX_gpu_memcpy.c
> > index 3cbc7235cf..5ef35e6283 100644
> > --- a/src/intel/vulkan/genX_gpu_memcpy.c
> > +++ b/src/intel/vulkan/genX_gpu_memcpy.c
> > @@ -52,10 +52,10 @@ gcd_pow2_u64(uint64_t a, uint64_t b)
> >  }
> >
> >  void
> > -genX(cmd_buffer_gpu_memcpy)(struct anv_cmd_buffer *cmd_buffer,
> > -struct anv_bo *dst, uint32_t dst_offset,
> > -struct anv_bo *src, uint32_t src_offset,
> > -uint32_t size)
> > +genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
> > +   struct anv_bo *dst, uint32_t dst_offset,
> > +   struct anv_bo *src, uint32_t src_offset,
> > +   uint32_t size)
> >  {
> > if (size == 0)
> >return;
> > --
> > 2.13.1
> >
> > ___
> > mesa-dev mailing list
> > mesa-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> >
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2 01/13] intel/blorp: Assert levels and layers are in range

[Nanley Chery]

On Thu, Jun 22, 2017 at 09:59:44AM -0700, Nanley Chery wrote:
> On Thu, Jun 22, 2017 at 09:55:50AM -0700, Nanley Chery wrote:
> > On Wed, Jun 21, 2017 at 06:07:29PM -0700, Jason Ekstrand wrote:
> > > On Wed, Jun 21, 2017 at 5:15 PM, Nanley Chery  
> > > wrote:
> > > 
> > > > v2 (Jason Ekstrand):
> > > > - Update commit title
> > > > - Check aux level and layer as well
> > > >
> > > > Signed-off-by: Nanley Chery 
> > > > Reviewed-by: Iago Toral Quiroga  (v1)
> > > > ---
> > > >  src/intel/blorp/blorp.c   | 7 +++
> > > >  src/intel/blorp/blorp_clear.c | 4 
> > > >  2 files changed, 7 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
> > > > index 9c88658e8a..7e30e20a59 100644
> > > > --- a/src/intel/blorp/blorp.c
> > > > +++ b/src/intel/blorp/blorp.c
> > > > @@ -66,6 +66,8 @@ brw_blorp_surface_info_init(struct blorp_context 
> > > > *blorp,
> > > >  unsigned int level, unsigned int layer,
> > > >  enum isl_format format, bool 
> > > > is_render_target)
> > > >  {
> > > > +   assert(level < surf->surf->levels);
> > > > +
> > > > info->enabled = true;
> > > >
> > > > if (format == ISL_FORMAT_UNSUPPORTED)
> > > > @@ -90,6 +92,9 @@ brw_blorp_surface_info_init(struct blorp_context 
> > > > *blorp,
> > > > if (info->aux_usage != ISL_AUX_USAGE_NONE) {
> > > >info->aux_surf = *surf->aux_surf;
> > > >info->aux_addr = surf->aux_addr;
> > > > +  assert(level < info->aux_surf.levels);
> > > > +  assert(layer < MAX2(info->aux_surf.logical_level0_px.depth >>
> > > > level,
> > > > +  info->aux_surf.logical_level0_px.array_len));
> > > > }
> > > >
> > > > info->clear_color = surf->clear_color;
> > > > @@ -106,6 +111,8 @@ brw_blorp_surface_info_init(struct blorp_context
> > > > *blorp,
> > > > info->view.array_len = MAX2(info->surf.logical_level0_px.depth,
> > > > info->surf.logical_level0_px.array_len);
> > > >
> > > > +   assert(layer < info->view.array_len);
> > > >
> > > 
> > > Might be more straightforward to move this assert to the top and make it
> > > look like the aux assert.  I don't care too much though.
> > > 
> > > 
> > 
> > I agree. Could I apply your rb if I instead put this under the first
> > assert in the function?
> > 
> >assert(layer < MAX2(info->surf.logical_level0_px.depth >> level,
> >info->surf.logical_level0_px.array_len));
> > 
> 
> Whoops, info->surf is not yet defined there. It should be:
>  assert(layer < MAX2(surf->surf.logical_level0_px.depth >> level,
>  surf->surf.logical_level0_px.array_len));

... and I forgot that surf->surf is a pointer. Sorry,

surf->surf->logical[...]

> > > > +
> > > > if (!is_render_target &&
> > > > (info->surf.dim == ISL_SURF_DIM_3D ||
> > > >  info->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY)) {
> > > > diff --git a/src/intel/blorp/blorp_clear.c 
> > > > b/src/intel/blorp/blorp_clear.c
> > > > index efacadfebe..369e18726f 100644
> > > > --- a/src/intel/blorp/blorp_clear.c
> > > > +++ b/src/intel/blorp/blorp_clear.c
> > > > @@ -707,10 +707,6 @@ blorp_ccs_resolve(struct blorp_batch *batch,
> > > > struct blorp_params params;
> > > > blorp_params_init();
> > > >
> > > > -   /* Layered and mipmapped fast clear is only available from Gen8
> > > > onwards. */
> > > > -   assert(ISL_DEV_GEN(batch->blorp->isl_dev) >= 8 ||
> > > > -  (level == 0 && layer == 0));
> > > > -
> > > > brw_blorp_surface_info_init(batch->blorp, , surf,
> > > > level, layer, format, true);
> > > >
> > > > --
> > > > 2.13.1
> > > >
> > > > ___
> > > > mesa-dev mailing list
> > > > mesa-dev@lists.freedesktop.org
> > > > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> > > >
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2 01/13] intel/blorp: Assert levels and layers are in range

[Nanley Chery]

On Thu, Jun 22, 2017 at 09:55:50AM -0700, Nanley Chery wrote:
> On Wed, Jun 21, 2017 at 06:07:29PM -0700, Jason Ekstrand wrote:
> > On Wed, Jun 21, 2017 at 5:15 PM, Nanley Chery  wrote:
> > 
> > > v2 (Jason Ekstrand):
> > > - Update commit title
> > > - Check aux level and layer as well
> > >
> > > Signed-off-by: Nanley Chery 
> > > Reviewed-by: Iago Toral Quiroga  (v1)
> > > ---
> > >  src/intel/blorp/blorp.c   | 7 +++
> > >  src/intel/blorp/blorp_clear.c | 4 
> > >  2 files changed, 7 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
> > > index 9c88658e8a..7e30e20a59 100644
> > > --- a/src/intel/blorp/blorp.c
> > > +++ b/src/intel/blorp/blorp.c
> > > @@ -66,6 +66,8 @@ brw_blorp_surface_info_init(struct blorp_context *blorp,
> > >  unsigned int level, unsigned int layer,
> > >  enum isl_format format, bool 
> > > is_render_target)
> > >  {
> > > +   assert(level < surf->surf->levels);
> > > +
> > > info->enabled = true;
> > >
> > > if (format == ISL_FORMAT_UNSUPPORTED)
> > > @@ -90,6 +92,9 @@ brw_blorp_surface_info_init(struct blorp_context *blorp,
> > > if (info->aux_usage != ISL_AUX_USAGE_NONE) {
> > >info->aux_surf = *surf->aux_surf;
> > >info->aux_addr = surf->aux_addr;
> > > +  assert(level < info->aux_surf.levels);
> > > +  assert(layer < MAX2(info->aux_surf.logical_level0_px.depth >>
> > > level,
> > > +  info->aux_surf.logical_level0_px.array_len));
> > > }
> > >
> > > info->clear_color = surf->clear_color;
> > > @@ -106,6 +111,8 @@ brw_blorp_surface_info_init(struct blorp_context
> > > *blorp,
> > > info->view.array_len = MAX2(info->surf.logical_level0_px.depth,
> > > info->surf.logical_level0_px.array_len);
> > >
> > > +   assert(layer < info->view.array_len);
> > >
> > 
> > Might be more straightforward to move this assert to the top and make it
> > look like the aux assert.  I don't care too much though.
> > 
> > 
> 
> I agree. Could I apply your rb if I instead put this under the first
> assert in the function?
> 
>assert(layer < MAX2(info->surf.logical_level0_px.depth >> level,
>info->surf.logical_level0_px.array_len));
> 

Whoops, info->surf is not yet defined there. It should be:
 assert(layer < MAX2(surf->surf.logical_level0_px.depth >> level,
 surf->surf.logical_level0_px.array_len));
> > > +
> > > if (!is_render_target &&
> > > (info->surf.dim == ISL_SURF_DIM_3D ||
> > >  info->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY)) {
> > > diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
> > > index efacadfebe..369e18726f 100644
> > > --- a/src/intel/blorp/blorp_clear.c
> > > +++ b/src/intel/blorp/blorp_clear.c
> > > @@ -707,10 +707,6 @@ blorp_ccs_resolve(struct blorp_batch *batch,
> > > struct blorp_params params;
> > > blorp_params_init();
> > >
> > > -   /* Layered and mipmapped fast clear is only available from Gen8
> > > onwards. */
> > > -   assert(ISL_DEV_GEN(batch->blorp->isl_dev) >= 8 ||
> > > -  (level == 0 && layer == 0));
> > > -
> > > brw_blorp_surface_info_init(batch->blorp, , surf,
> > > level, layer, format, true);
> > >
> > > --
> > > 2.13.1
> > >
> > > ___
> > > mesa-dev mailing list
> > > mesa-dev@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> > >
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] egl/android: Change order of EGLConfig generation (v2)

[Rob Herring]

On Tue, Jun 20, 2017 at 5:03 PM, Chad Versace  wrote:
> Many Android apps (such as Google's official NDK GLES2 example app), and
> even portions the core framework code (such as SystemServiceManager in
> Nougat), incorrectly choose their EGLConfig.  They neglect to match the
> EGLConfig's EGL_NATIVE_VISUAL_ID against the window's native format, and
> instead choose the first EGLConfig whose channel sizes match those of
> the native window format while ignoring the channel *ordering*.
>
> We can detect such buggy clients in logcat when they call
> eglCreateSurface, by detecting the mismatch between the EGLConfig's
> format and the window's format.
>
> As a workaround, this patch changes the order of EGLConfig generation
> such that all EGLConfigs for HAL pixel format i precede those for HAL
> pixel format i+1. In my (chadversary) testing on Android Nougat, this
> was good enough to pacify the buggy clients.
>
> v2: Rebase to make patch cherry-pickable to stable.
>
> Cc: mesa-sta...@lists.freedesktop.org
> Cc: Tomasz Figa 
> Cc: Rob Herring 
> Cc: Tapani Pälli 
> Cc: Emil Velikov 

Tested-by: Rob Herring 

One question though...

>
> ---
>  src/egl/drivers/dri2/platform_android.c | 32 +---
>  1 file changed, 25 insertions(+), 7 deletions(-)
>
> diff --git a/src/egl/drivers/dri2/platform_android.c 
> b/src/egl/drivers/dri2/platform_android.c
> index 5550f580a80..eaaeff4641c 100644
> --- a/src/egl/drivers/dri2/platform_android.c
> +++ b/src/egl/drivers/dri2/platform_android.c
> @@ -1049,20 +1049,38 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
> _EGLDisplay *dpy)
> unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
> int count, i, j;
>
> +   /* The nesting of loops is significant here. Also significant is the order
> +* of the HAL pixel formats. Many Android apps (such as Google's official
> +* NDK GLES2 example app), and even portions the core framework code (such
> +* as SystemServiceManager in Nougat), incorrectly choose their EGLConfig.
> +* They neglect to match the EGLConfig's EGL_NATIVE_VISUAL_ID against the
> +* window's native format, and instead choose the first EGLConfig whose
> +* channel sizes match those of the native window format while ignoring 
> the
> +* channel *ordering*.
> +*
> +* We can detect such buggy clients in logcat when they call
> +* eglCreateSurface, by detecting the mismatch between the EGLConfig's
> +* format and the window's format.

How do we find the buggy clients with this patch applied other than reverting?

Rob
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2 01/13] intel/blorp: Assert levels and layers are in range

[Nanley Chery]

On Wed, Jun 21, 2017 at 06:07:29PM -0700, Jason Ekstrand wrote:
> On Wed, Jun 21, 2017 at 5:15 PM, Nanley Chery  wrote:
> 
> > v2 (Jason Ekstrand):
> > - Update commit title
> > - Check aux level and layer as well
> >
> > Signed-off-by: Nanley Chery 
> > Reviewed-by: Iago Toral Quiroga  (v1)
> > ---
> >  src/intel/blorp/blorp.c   | 7 +++
> >  src/intel/blorp/blorp_clear.c | 4 
> >  2 files changed, 7 insertions(+), 4 deletions(-)
> >
> > diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
> > index 9c88658e8a..7e30e20a59 100644
> > --- a/src/intel/blorp/blorp.c
> > +++ b/src/intel/blorp/blorp.c
> > @@ -66,6 +66,8 @@ brw_blorp_surface_info_init(struct blorp_context *blorp,
> >  unsigned int level, unsigned int layer,
> >  enum isl_format format, bool is_render_target)
> >  {
> > +   assert(level < surf->surf->levels);
> > +
> > info->enabled = true;
> >
> > if (format == ISL_FORMAT_UNSUPPORTED)
> > @@ -90,6 +92,9 @@ brw_blorp_surface_info_init(struct blorp_context *blorp,
> > if (info->aux_usage != ISL_AUX_USAGE_NONE) {
> >info->aux_surf = *surf->aux_surf;
> >info->aux_addr = surf->aux_addr;
> > +  assert(level < info->aux_surf.levels);
> > +  assert(layer < MAX2(info->aux_surf.logical_level0_px.depth >>
> > level,
> > +  info->aux_surf.logical_level0_px.array_len));
> > }
> >
> > info->clear_color = surf->clear_color;
> > @@ -106,6 +111,8 @@ brw_blorp_surface_info_init(struct blorp_context
> > *blorp,
> > info->view.array_len = MAX2(info->surf.logical_level0_px.depth,
> > info->surf.logical_level0_px.array_len);
> >
> > +   assert(layer < info->view.array_len);
> >
> 
> Might be more straightforward to move this assert to the top and make it
> look like the aux assert.  I don't care too much though.
> 
> 

I agree. Could I apply your rb if I instead put this under the first
assert in the function?

   assert(layer < MAX2(info->surf.logical_level0_px.depth >> level,
   info->surf.logical_level0_px.array_len));

> > +
> > if (!is_render_target &&
> > (info->surf.dim == ISL_SURF_DIM_3D ||
> >  info->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY)) {
> > diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
> > index efacadfebe..369e18726f 100644
> > --- a/src/intel/blorp/blorp_clear.c
> > +++ b/src/intel/blorp/blorp_clear.c
> > @@ -707,10 +707,6 @@ blorp_ccs_resolve(struct blorp_batch *batch,
> > struct blorp_params params;
> > blorp_params_init();
> >
> > -   /* Layered and mipmapped fast clear is only available from Gen8
> > onwards. */
> > -   assert(ISL_DEV_GEN(batch->blorp->isl_dev) >= 8 ||
> > -  (level == 0 && layer == 0));
> > -
> > brw_blorp_surface_info_init(batch->blorp, , surf,
> > level, layer, format, true);
> >
> > --
> > 2.13.1
> >
> > ___
> > mesa-dev mailing list
> > mesa-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> >
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 11/11] egl/wayland: Use linux-dmabuf interface for buffers

[Lucas Stach]

Am Freitag, den 16.06.2017, 18:14 +0100 schrieb Daniel Stone:
> When available, use the zwp_linux_dambuf_v1 interface to create buffers,
> which allows multiple planes and buffer modifiers to be used.
> 
> Signed-off-by: Daniel Stone 
> ---
>  configure.ac|   5 +-
>  src/egl/Makefile.am |  22 +++-
>  src/egl/drivers/dri2/.gitignore |   2 +
>  src/egl/drivers/dri2/egl_dri2.c |   7 ++
>  src/egl/drivers/dri2/egl_dri2.h |  10 ++
>  src/egl/drivers/dri2/platform_wayland.c | 189 
> +---
>  6 files changed, 214 insertions(+), 21 deletions(-)
>  create mode 100644 src/egl/drivers/dri2/.gitignore

This patch is missing the following hunk to fix out of tree builds:

--- a/src/egl/Makefile.am
+++ b/src/egl/Makefile.am
@@ -104,6 +104,7 @@ endif
 AM_CFLAGS += \
-I$(top_srcdir)/src/loader \
-I$(top_srcdir)/src/egl/drivers/dri2 \
+   -I$(top_builddir)/src/egl/drivers/dri2 \
-I$(top_srcdir)/src/gbm/backends/dri \
-I$(top_srcdir)/src/egl/wayland/wayland-egl \
-I$(top_builddir)/src/egl/wayland/wayland-drm \

Regards,
Lucas

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2 12/13] anv/blorp: Provide surface states for CCS resolves

[Nanley Chery]

On Wed, Jun 21, 2017 at 06:19:57PM -0700, Jason Ekstrand wrote:
> On Wed, Jun 21, 2017 at 5:15 PM, Nanley Chery  wrote:
> 
> > In the future, we plan on using this method to resolve images whose
> > surface state fast-clear value is dynamically updated during command
> > buffer execution. Start using it now for testing and to reduce churn
> > later on.
> >
> > Signed-off-by: Nanley Chery 
> > Reviewed-by: Iago Toral Quiroga 
> > ---
> >  src/intel/vulkan/anv_blorp.c | 29 ++---
> >  1 file changed, 10 insertions(+), 19 deletions(-)
> >
> > diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
> > index c4c744868c..7f6ed0efe4 100644
> > --- a/src/intel/vulkan/anv_blorp.c
> > +++ b/src/intel/vulkan/anv_blorp.c
> > @@ -1493,7 +1493,6 @@ anv_image_ccs_clear(struct anv_cmd_buffer
> > *cmd_buffer,
> >
> >  static void
> >  ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer,
> > -   struct blorp_batch *batch,
> > uint32_t att)
> >  {
> > struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
> > @@ -1589,12 +1588,6 @@ ccs_resolve_attachment(struct anv_cmd_buffer
> > *cmd_buffer,
> > if (resolve_op == BLORP_FAST_CLEAR_OP_NONE)
> >return;
> >
> > -   struct blorp_surf surf;
> > -   get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_COLOR_BIT,
> > -att_state->aux_usage, );
> > -   if (att_state->fast_clear)
> > -  surf.clear_color = vk_to_isl_color(att_state->clear_value.color);
> > -
> > /* From the Sky Lake PRM Vol. 7, "Render Target Resolve":
> >  *
> >  *"When performing a render target resolve, PIPE_CONTROL with end
> > of
> > @@ -1610,12 +1603,8 @@ ccs_resolve_attachment(struct anv_cmd_buffer
> > *cmd_buffer,
> > cmd_buffer->state.pending_pipe_bits |=
> >ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT;
> >
> > -   for (uint32_t layer = 0; layer < fb->layers; layer++) {
> > -  blorp_ccs_resolve(batch, ,
> > -iview->isl.base_level,
> > -iview->isl.base_array_layer + layer,
> > -iview->isl.format, resolve_op);
> > -   }
> > +   anv_ccs_resolve(cmd_buffer, att_state->color_rt_state, image,
> > +   iview->isl.base_level, fb->layers, resolve_op);
> >
> > cmd_buffer->state.pending_pipe_bits |=
> >ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT;
> > @@ -1633,16 +1622,13 @@ anv_cmd_buffer_resolve_subpass(struct
> > anv_cmd_buffer *cmd_buffer)
> > struct anv_subpass *subpass = cmd_buffer->state.subpass;
> >
> >
> > -   struct blorp_batch batch;
> > -   blorp_batch_init(_buffer->device->blorp, , cmd_buffer, 0);
> > -
> > for (uint32_t i = 0; i < subpass->color_count; ++i) {
> >const uint32_t att = subpass->color_attachments[i].attachment;
> >if (att == VK_ATTACHMENT_UNUSED)
> >   continue;
> >
> >assert(att < cmd_buffer->state.pass->attachment_count);
> > -  ccs_resolve_attachment(cmd_buffer, , att);
> > +  ccs_resolve_attachment(cmd_buffer, att);
> > }
> >
> > if (subpass->has_resolve) {
> > @@ -1681,6 +1667,10 @@ anv_cmd_buffer_resolve_subpass(struct
> > anv_cmd_buffer *cmd_buffer)
> >   const VkRect2D render_area = cmd_buffer->state.render_area;
> >
> >   assert(src_iview->aspect_mask == dst_iview->aspect_mask);
> > +
> > + struct blorp_batch batch;
> > + blorp_batch_init(_buffer->device->blorp, ,
> > cmd_buffer, 0);
> > +
> >   resolve_image(, src_iview->image,
> > src_iview->isl.base_level,
> > src_iview->isl.base_array_layer,
> > @@ -1692,11 +1682,12 @@ anv_cmd_buffer_resolve_subpass(struct
> > anv_cmd_buffer *cmd_buffer)
> > render_area.offset.x, render_area.offset.y,
> > render_area.extent.width,
> > render_area.extent.height);
> >
> > - ccs_resolve_attachment(cmd_buffer, , dst_att);
> > + blorp_batch_finish();
> >
> 
> At some point, I'd like to make blorp smarter so that it can avoid
> re-emitting all of the state on every blorp op.  When that happens, we'll
> want to figure out how to move blorp_batch_init/finish back out so that
> they happen outside of the loop.  Not a big deal today though.
> 
> 

Thankfully, we can remove the loop when we eventually make the resolves
happen only on layout transitions.

> > +
> > + ccs_resolve_attachment(cmd_buffer, dst_att);
> >}
> > }
> >
> > -   blorp_batch_finish();
> >  }
> >
> >  void
> > --
> > 2.13.1
> >
> > ___
> > mesa-dev mailing list
> > mesa-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> >
___
mesa-dev mailing list

Re: [Mesa-dev] glmark2 segfault on imx6

[Fabio Estevam]

Hi Lucas,

On Tue, Jun 13, 2017 at 7:10 PM, Lucas Stach  wrote:
> Hi Fabio,
>
> the attached patch should fix the issue. I should really try to get
> this upstream, as some people complained about this already...

It seems that Eric has already sent a fix for this segfault issue in
this pull request:
https://github.com/glmark2/glmark2/pull/32

There is also this pull request from Gary back in February that adds
imx drm support:
https://github.com/glmark2/glmark2/pull/29

,which was not applied.

Looks like that glmark2 project is not getting fixes/updates on a regular basis.

Would it help to move glmark2 into cgit.freedesktop.org so that more
people could contribute, review patches, etc?
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v3] Revert "getteximage: Return correct error value when texure object is not found"

[Samuel Pitoiset]

Yeah, looks better.

Reviewed-by: Samuel Pitoiset 

On 06/22/2017 06:19 PM, Juan A. Suarez Romero wrote:

 From OpenGL 4.5 spec PDF, section '8.11. Texture Queries', page 236:
   "An INVALID_VALUE error is generated if texture is not the name of
an existing texture object."

Same wording applies to the compressed version.

But turns out this is a spec bug, and Khronos is fixing it for the next
revisions.

The proposal is to return INVALID_OPERATION in these cases.

This reverts commit 633c959faeae5099fd095f27da7b954e4a36254b.

v2:
- Use _mesa_lookup_texture_err (Samuel Pitoiset)

v3:
- _mesa_lookup_texture_err() already handles texture > 0 (Samuel
Pitoiset)
- Just revert 633c959fae (Juan A. Suarez)

Signed-off-by: Juan A. Suarez Romero 
---
  src/mesa/main/texgetimage.c | 12 +++-
  1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
index 658b0e5..715bc24 100644
--- a/src/mesa/main/texgetimage.c
+++ b/src/mesa/main/texgetimage.c
@@ -1458,13 +1458,10 @@ _mesa_GetTextureSubImage(GLuint texture, GLint level,
  {
 GET_CURRENT_CONTEXT(ctx);
 static const char *caller = "glGetTextureSubImage";
-   struct gl_texture_object *texObj = NULL;
-
-   if (texture > 0)
-  texObj = _mesa_lookup_texture(ctx, texture);
+   struct gl_texture_object *texObj =
+  _mesa_lookup_texture_err(ctx, texture, caller);
  
 if (!texObj) {

-  _mesa_error(ctx, GL_INVALID_VALUE, "%s(texture)", caller);
return;
 }
  
@@ -1778,11 +1775,8 @@ _mesa_GetCompressedTextureSubImage(GLuint texture, GLint level,

 static const char *caller = "glGetCompressedTextureImage";
 struct gl_texture_object *texObj = NULL;
  
-   if (texture > 0)

-  texObj = _mesa_lookup_texture(ctx, texture);
-
+   texObj = _mesa_lookup_texture_err(ctx, texture, caller);
 if (!texObj) {
-  _mesa_error(ctx, GL_INVALID_VALUE, "%s(texture)", caller);
return;
 }
  


___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v4 2/6] mesa/st: glsl_to_tgsi: implement new temporary register lifetime tracker

[Gert Wollny]

Thanks for the comments, 

I've fixed these little issues locally, but I think in order to not to
spam the list, I'll send the changes later. I kind of suspect that
Nicolai might have one or the other additional comment :)

best, 
Gert 

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 3/5] st/dri: add a drirc workaround for Rocket League

[Emil Velikov]

On 22 June 2017 at 16:14, Marek Olšák  wrote:
> On Thu, Jun 22, 2017 at 3:46 PM, Emil Velikov  
> wrote:
>> Hi Marek,
>>
>> Adding Timothee Besset, who I believe did the Linux port.
>>
>> Is this something that can be addressed within the game itself?
>> If the dev. team can roll a quick update it might be better to have that one 
>> in?
>
> We have talked about it with Timothee and he agreed that the
> workaround in Mesa would be better.
>
> We also need the same workaround for Witcher 2.
>
Right, I've noticed the Bugzilla ticket & Witches 2 patch only afterwords :-\

Please add a bit of info in the commit message - the following
bugzilla quote seems perfect. Although feel free to swap with
something else.

"No game fix is planned at this time.

Marek's addition of glsl_correct_derivatives_after_discard is
generally a good thing for mesa compatibility with the broader GL
driver ecosystem."

Thanks
-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 0/5] Gallium: Passing drirc options to create_screen() and fixing Rocket League

[Roland Scheidegger]

Am 22.06.2017 um 18:22 schrieb Marek Olšák:
> On Thu, Jun 22, 2017 at 6:13 PM, Alex Smith  
> wrote:
>> On 22 June 2017 at 15:52, Roland Scheidegger  wrote:
>>> Am 22.06.2017 um 13:09 schrieb Nicolai Hähnle:
 On 22.06.2017 10:14, Michel Dänzer wrote:
> On 22/06/17 04:34 PM, Nicolai Hähnle wrote:
>> On 22.06.2017 03:38, Rob Clark wrote:
>>> On Wed, Jun 21, 2017 at 8:15 PM, Marek Olšák  wrote:
 On Wed, Jun 21, 2017 at 10:37 PM, Rob Clark 
 wrote:
> On Tue, Jun 20, 2017 at 6:54 PM, Marek Olšák 
> wrote:
>> Hi,
>>
>> This series updates pipe loaders so that flags such as drirc options
>> can be passed to create_screen(). I have compile-tested everything
>> except clover.
>>
>> The first pipe_screen flag is a drirc option to fix incorrect grass
>> rendering in Rocket League for radeonsi. Rocket League expects
>> DirectX
>> behavior for partial derivative computations after discard/kill, but
>> radeonsi implements the more efficient but stricter OpenGL behavior
>> and that will remain our default behavior. The new screen flag
>> forces
>> radeonsi to use the DX behavior for that game.
>>
>
> do we really want this to be a *global* option for the screen?

 Yes. Shaders are pipe_screen (global) objects in radeonsi, so a
 compiler option also has to be global. We can't look at the context
 during the TGSI->LLVM translation.
>>>
>>> well, I didn't really mean per-screen vs per-context, as much as
>>> per-screen vs per-shader (or maybe more per-screen vs
>>> per-instruction?)
>>
>> I honestly don't think it's worth the trouble. Applications that are
>> properly coded against GLSL can benefit from the relaxed semantics, and
>> applications that get it wrong in one shader are rather likely to get it
>> wrong everywhere.
>>
>> Since GLSL simply says derivatives are undefined after non-uniform
>> discard, and this option makes it defined instead, setting this flag can
>> never break the behavior of a correctly written shader.
>
> BTW, how expensive is the radeonsi workaround when it isn't needed?
>
> I'm starting to wonder if we shouldn't just make it always safe and call
> it a day, saving the trouble of identifying broken apps and plumbing the
> info through the API layers...

 As-is, the workaround can be *very* expensive in the worst case. A large
 number of pixels could be disabled by a discard early in the shader, and
 we're now moving the discard down, which means a lot of unnecessary
 texture fetches may be happening.

 Also, I think I spoke too soon about this flag not having negative
 effects: if a shader has an image/buffer write after a discard, that
 write is now no longer disabled.

 A more efficient workaround can be done at the LLVM level by doing the
 discard early, but then re-enabling WQM "relative to" the new set of
 active pixels. It's a bit involved, especially when the discard itself
 happens in a branch, and still a little more expensive, but it's an option.

>>>
>>> I'm wondering what your driver for the other OS does (afaik dx10 is
>>> really the odd man out, all of glsl, spir-v, even metal have undefined
>>> derivatives after non-uniform discards). Thinking surely there must be
>>> something clever you could do...
>>
>> I'm wondering the same.
>>
>> This is an issue we come across from time to time, where a game's
>> shaders are expecting the D3D behaviour of derivatives remaining
>> defined post-discard. For this we usually do essentially what this
>> workaround is doing, just postpone the discard until the very end of
>> the shader.
>>
>> However it seems like doing this is less performant than the original
>> shaders running on D3D. One case I've seen had a big performance loss
>> against D3D when doing a delayed discard (which was being used early
>> in a complex shader to cull a lot of unneeded pixels), on both AMD and
>> NVIDIA.
>>
>> Given that, I've wondered whether there's something clever that the
>> D3D drivers are doing to optimise this. Maybe, for example, discarding
>> immediately if all pixels in a quad used for derivative calculations
>> get discarded? Is something like that possible on AMD hardware?
> 
> Yes, it's possible but not implemented in LLVM yet.
> 

Albeit if you'd wanted to do it correctly in the app, I'm not sure how
you could achieve that...

Roland

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 0/5] Gallium: Passing drirc options to create_screen() and fixing Rocket League

[Marek Olšák]

On Thu, Jun 22, 2017 at 6:13 PM, Alex Smith  wrote:
> On 22 June 2017 at 15:52, Roland Scheidegger  wrote:
>> Am 22.06.2017 um 13:09 schrieb Nicolai Hähnle:
>>> On 22.06.2017 10:14, Michel Dänzer wrote:
 On 22/06/17 04:34 PM, Nicolai Hähnle wrote:
> On 22.06.2017 03:38, Rob Clark wrote:
>> On Wed, Jun 21, 2017 at 8:15 PM, Marek Olšák  wrote:
>>> On Wed, Jun 21, 2017 at 10:37 PM, Rob Clark 
>>> wrote:
 On Tue, Jun 20, 2017 at 6:54 PM, Marek Olšák 
 wrote:
> Hi,
>
> This series updates pipe loaders so that flags such as drirc options
> can be passed to create_screen(). I have compile-tested everything
> except clover.
>
> The first pipe_screen flag is a drirc option to fix incorrect grass
> rendering in Rocket League for radeonsi. Rocket League expects
> DirectX
> behavior for partial derivative computations after discard/kill, but
> radeonsi implements the more efficient but stricter OpenGL behavior
> and that will remain our default behavior. The new screen flag
> forces
> radeonsi to use the DX behavior for that game.
>

 do we really want this to be a *global* option for the screen?
>>>
>>> Yes. Shaders are pipe_screen (global) objects in radeonsi, so a
>>> compiler option also has to be global. We can't look at the context
>>> during the TGSI->LLVM translation.
>>
>> well, I didn't really mean per-screen vs per-context, as much as
>> per-screen vs per-shader (or maybe more per-screen vs
>> per-instruction?)
>
> I honestly don't think it's worth the trouble. Applications that are
> properly coded against GLSL can benefit from the relaxed semantics, and
> applications that get it wrong in one shader are rather likely to get it
> wrong everywhere.
>
> Since GLSL simply says derivatives are undefined after non-uniform
> discard, and this option makes it defined instead, setting this flag can
> never break the behavior of a correctly written shader.

 BTW, how expensive is the radeonsi workaround when it isn't needed?

 I'm starting to wonder if we shouldn't just make it always safe and call
 it a day, saving the trouble of identifying broken apps and plumbing the
 info through the API layers...
>>>
>>> As-is, the workaround can be *very* expensive in the worst case. A large
>>> number of pixels could be disabled by a discard early in the shader, and
>>> we're now moving the discard down, which means a lot of unnecessary
>>> texture fetches may be happening.
>>>
>>> Also, I think I spoke too soon about this flag not having negative
>>> effects: if a shader has an image/buffer write after a discard, that
>>> write is now no longer disabled.
>>>
>>> A more efficient workaround can be done at the LLVM level by doing the
>>> discard early, but then re-enabling WQM "relative to" the new set of
>>> active pixels. It's a bit involved, especially when the discard itself
>>> happens in a branch, and still a little more expensive, but it's an option.
>>>
>>
>> I'm wondering what your driver for the other OS does (afaik dx10 is
>> really the odd man out, all of glsl, spir-v, even metal have undefined
>> derivatives after non-uniform discards). Thinking surely there must be
>> something clever you could do...
>
> I'm wondering the same.
>
> This is an issue we come across from time to time, where a game's
> shaders are expecting the D3D behaviour of derivatives remaining
> defined post-discard. For this we usually do essentially what this
> workaround is doing, just postpone the discard until the very end of
> the shader.
>
> However it seems like doing this is less performant than the original
> shaders running on D3D. One case I've seen had a big performance loss
> against D3D when doing a delayed discard (which was being used early
> in a complex shader to cull a lot of unneeded pixels), on both AMD and
> NVIDIA.
>
> Given that, I've wondered whether there's something clever that the
> D3D drivers are doing to optimise this. Maybe, for example, discarding
> immediately if all pixels in a quad used for derivative calculations
> get discarded? Is something like that possible on AMD hardware?

Yes, it's possible but not implemented in LLVM yet.

Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH v3] Revert "getteximage: Return correct error value when texure object is not found"

[Juan A. Suarez Romero]

From OpenGL 4.5 spec PDF, section '8.11. Texture Queries', page 236:
  "An INVALID_VALUE error is generated if texture is not the name of
   an existing texture object."

Same wording applies to the compressed version.

But turns out this is a spec bug, and Khronos is fixing it for the next
revisions.

The proposal is to return INVALID_OPERATION in these cases.

This reverts commit 633c959faeae5099fd095f27da7b954e4a36254b.

v2:
- Use _mesa_lookup_texture_err (Samuel Pitoiset)

v3:
- _mesa_lookup_texture_err() already handles texture > 0 (Samuel
Pitoiset)
- Just revert 633c959fae (Juan A. Suarez)

Signed-off-by: Juan A. Suarez Romero 
---
 src/mesa/main/texgetimage.c | 12 +++-
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
index 658b0e5..715bc24 100644
--- a/src/mesa/main/texgetimage.c
+++ b/src/mesa/main/texgetimage.c
@@ -1458,13 +1458,10 @@ _mesa_GetTextureSubImage(GLuint texture, GLint level,
 {
GET_CURRENT_CONTEXT(ctx);
static const char *caller = "glGetTextureSubImage";
-   struct gl_texture_object *texObj = NULL;
-
-   if (texture > 0)
-  texObj = _mesa_lookup_texture(ctx, texture);
+   struct gl_texture_object *texObj =
+  _mesa_lookup_texture_err(ctx, texture, caller);
 
if (!texObj) {
-  _mesa_error(ctx, GL_INVALID_VALUE, "%s(texture)", caller);
   return;
}
 
@@ -1778,11 +1775,8 @@ _mesa_GetCompressedTextureSubImage(GLuint texture, GLint 
level,
static const char *caller = "glGetCompressedTextureImage";
struct gl_texture_object *texObj = NULL;
 
-   if (texture > 0)
-  texObj = _mesa_lookup_texture(ctx, texture);
-
+   texObj = _mesa_lookup_texture_err(ctx, texture, caller);
if (!texObj) {
-  _mesa_error(ctx, GL_INVALID_VALUE, "%s(texture)", caller);
   return;
}
 
-- 
2.9.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2] getteximage: fix returned error value when texture object is not found

[Juan A. Suarez Romero]

On Thu, 2017-06-22 at 18:13 +0200, Juan A. Suarez Romero wrote:
> On Thu, 2017-06-22 at 17:48 +0200, Samuel Pitoiset wrote:
> > 
> > On 06/22/2017 05:46 PM, Juan A. Suarez Romero wrote:
> > >  From OpenGL 4.5 spec PDF, section '8.11. Texture Queries', page 236:
> > >"An INVALID_VALUE error is generated if texture is not the name of
> > > an existing texture object."
> > > 
> > > Same wording applies to the compressed version.
> > > 
> > > But turns out this is a spec bug, and Khronos is fixing it for the next
> > > revisions.
> > > 
> > > The proposal is to return INVALID_OPERATION in these cases.
> > > 
> > > v2: Use _mesa_lookup_texture_err (Samuel Pitoiset)
> > > 
> > > Fixes: GL45-CTS.get_texture_sub_image.errors_test
> > > Fixes: 633c959fa (getteximage: Return correct error value when texure
> > > object is not found)
> > > 
> > > Signed-off-by: Juan A. Suarez Romero 
> > > ---
> > >   src/mesa/main/texgetimage.c | 6 ++
> > >   1 file changed, 2 insertions(+), 4 deletions(-)
> > > 
> > > diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
> > > index 658b0e5..4937d89 100644
> > > --- a/src/mesa/main/texgetimage.c
> > > +++ b/src/mesa/main/texgetimage.c
> > > @@ -1461,10 +1461,9 @@ _mesa_GetTextureSubImage(GLuint texture, GLint 
> > > level,
> > >  struct gl_texture_object *texObj = NULL;
> > >   
> > >  if (texture > 0)
> > > -  texObj = _mesa_lookup_texture(ctx, texture);
> > > +  texObj = _mesa_lookup_texture_err(ctx, texture, caller);
> > 
> > _mesa_lookup_texture_err() already handles the case where texture > 0, 
> > you can get rid of that check (same below). Thanks.
> > 
> 
> Thanks! Didn't know.
> 
> 


I'm realizing that easiest way is just to revert 633c959fa.

>   J.A.
> 
> > >   
> > >  if (!texObj) {
> > > -  _mesa_error(ctx, GL_INVALID_VALUE, "%s(texture)", caller);
> > > return;
> > >  }
> > >   
> > > @@ -1779,10 +1778,9 @@ _mesa_GetCompressedTextureSubImage(GLuint texture, 
> > > GLint level,
> > >  struct gl_texture_object *texObj = NULL;
> > >   
> > >  if (texture > 0)
> > > -  texObj = _mesa_lookup_texture(ctx, texture);
> > > +  texObj = _mesa_lookup_texture_err(ctx, texture, caller);
> > >   
> > >  if (!texObj) {
> > > -  _mesa_error(ctx, GL_INVALID_VALUE, "%s(texture)", caller);
> > > return;
> > >  }
> > >   
> > > 
> > 
> > 
> 
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 06/11] intel/genxml: Add Gen10 CACHE_MODE_1 definitions

[Rafael Antognolli]

On Tue, Jun 13, 2017 at 11:28:25AM -0700, Anuj Phogat wrote:
> Few of the fields in this register are changed as compared
> to gen9.xml.
> 
> Signed-off-by: Anuj Phogat 
> ---
>  src/intel/genxml/gen10.xml | 22 ++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml
> index d2bb130..e8776c7 100644
> --- a/src/intel/genxml/gen10.xml
> +++ b/src/intel/genxml/gen10.xml
> @@ -3734,4 +3734,26 @@
>  
>
>  
> +  
> + type="bool"/>
> +
> +
> + type="bool"/>
> + type="uint"/>
> + type="bool"/>
> +
> + type="bool"/>
> +
> +
> + type="bool"/>
> +
> +
> + end="22" type="bool"/>
> + type="uint"/>
> + type="bool"/>
> + type="bool"/>
> + type="bool"/>
> + type="bool"/>
> +  

Bit 14 and 1 changed name. Bits 8-6, and 4 seem to have been removed. And I
believe the respective masks should be updated accordingly, right?

With that,
Reviewed-by: Rafael Antognolli 

>  
> -- 
> 2.9.3
> 
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [st/va] Fix leak in VAAPI subpictures

[Emil Velikov]

On 22 June 2017 at 10:25, Namburu, Chandu-babu  wrote:
> From: Chandu Babu N 
> Subject: [PATCH] [st/va] Fix leak in VAAPI subpictures
>
> sampler view allocated in vaAssociateSubpicture is not cleared
> in vaiDeassociateSubpicture.
>
> Reviewed-by: Christian König 

Please familiarise yourself with the patch submission process [1].

The current git format-patch(?), open patch, copy/paste is also slower
than a plain git send-email ...
For even more see the "Git tips" section.

Thanks
Emil
[1] https://www.mesa3d.org/submittingpatches.html
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 0/5] Gallium: Passing drirc options to create_screen() and fixing Rocket League

[Alex Smith]

On 22 June 2017 at 15:52, Roland Scheidegger  wrote:
> Am 22.06.2017 um 13:09 schrieb Nicolai Hähnle:
>> On 22.06.2017 10:14, Michel Dänzer wrote:
>>> On 22/06/17 04:34 PM, Nicolai Hähnle wrote:
 On 22.06.2017 03:38, Rob Clark wrote:
> On Wed, Jun 21, 2017 at 8:15 PM, Marek Olšák  wrote:
>> On Wed, Jun 21, 2017 at 10:37 PM, Rob Clark 
>> wrote:
>>> On Tue, Jun 20, 2017 at 6:54 PM, Marek Olšák 
>>> wrote:
 Hi,

 This series updates pipe loaders so that flags such as drirc options
 can be passed to create_screen(). I have compile-tested everything
 except clover.

 The first pipe_screen flag is a drirc option to fix incorrect grass
 rendering in Rocket League for radeonsi. Rocket League expects
 DirectX
 behavior for partial derivative computations after discard/kill, but
 radeonsi implements the more efficient but stricter OpenGL behavior
 and that will remain our default behavior. The new screen flag
 forces
 radeonsi to use the DX behavior for that game.

>>>
>>> do we really want this to be a *global* option for the screen?
>>
>> Yes. Shaders are pipe_screen (global) objects in radeonsi, so a
>> compiler option also has to be global. We can't look at the context
>> during the TGSI->LLVM translation.
>
> well, I didn't really mean per-screen vs per-context, as much as
> per-screen vs per-shader (or maybe more per-screen vs
> per-instruction?)

 I honestly don't think it's worth the trouble. Applications that are
 properly coded against GLSL can benefit from the relaxed semantics, and
 applications that get it wrong in one shader are rather likely to get it
 wrong everywhere.

 Since GLSL simply says derivatives are undefined after non-uniform
 discard, and this option makes it defined instead, setting this flag can
 never break the behavior of a correctly written shader.
>>>
>>> BTW, how expensive is the radeonsi workaround when it isn't needed?
>>>
>>> I'm starting to wonder if we shouldn't just make it always safe and call
>>> it a day, saving the trouble of identifying broken apps and plumbing the
>>> info through the API layers...
>>
>> As-is, the workaround can be *very* expensive in the worst case. A large
>> number of pixels could be disabled by a discard early in the shader, and
>> we're now moving the discard down, which means a lot of unnecessary
>> texture fetches may be happening.
>>
>> Also, I think I spoke too soon about this flag not having negative
>> effects: if a shader has an image/buffer write after a discard, that
>> write is now no longer disabled.
>>
>> A more efficient workaround can be done at the LLVM level by doing the
>> discard early, but then re-enabling WQM "relative to" the new set of
>> active pixels. It's a bit involved, especially when the discard itself
>> happens in a branch, and still a little more expensive, but it's an option.
>>
>
> I'm wondering what your driver for the other OS does (afaik dx10 is
> really the odd man out, all of glsl, spir-v, even metal have undefined
> derivatives after non-uniform discards). Thinking surely there must be
> something clever you could do...

I'm wondering the same.

This is an issue we come across from time to time, where a game's
shaders are expecting the D3D behaviour of derivatives remaining
defined post-discard. For this we usually do essentially what this
workaround is doing, just postpone the discard until the very end of
the shader.

However it seems like doing this is less performant than the original
shaders running on D3D. One case I've seen had a big performance loss
against D3D when doing a delayed discard (which was being used early
in a complex shader to cull a lot of unneeded pixels), on both AMD and
NVIDIA.

Given that, I've wondered whether there's something clever that the
D3D drivers are doing to optimise this. Maybe, for example, discarding
immediately if all pixels in a quad used for derivative calculations
get discarded? Is something like that possible on AMD hardware?

Alex

>
> Roland
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2] getteximage: fix returned error value when texture object is not found

[Juan A. Suarez Romero]

On Thu, 2017-06-22 at 17:48 +0200, Samuel Pitoiset wrote:
> 
> On 06/22/2017 05:46 PM, Juan A. Suarez Romero wrote:
> >  From OpenGL 4.5 spec PDF, section '8.11. Texture Queries', page 236:
> >"An INVALID_VALUE error is generated if texture is not the name of
> > an existing texture object."
> > 
> > Same wording applies to the compressed version.
> > 
> > But turns out this is a spec bug, and Khronos is fixing it for the next
> > revisions.
> > 
> > The proposal is to return INVALID_OPERATION in these cases.
> > 
> > v2: Use _mesa_lookup_texture_err (Samuel Pitoiset)
> > 
> > Fixes: GL45-CTS.get_texture_sub_image.errors_test
> > Fixes: 633c959fa (getteximage: Return correct error value when texure
> > object is not found)
> > 
> > Signed-off-by: Juan A. Suarez Romero 
> > ---
> >   src/mesa/main/texgetimage.c | 6 ++
> >   1 file changed, 2 insertions(+), 4 deletions(-)
> > 
> > diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
> > index 658b0e5..4937d89 100644
> > --- a/src/mesa/main/texgetimage.c
> > +++ b/src/mesa/main/texgetimage.c
> > @@ -1461,10 +1461,9 @@ _mesa_GetTextureSubImage(GLuint texture, GLint level,
> >  struct gl_texture_object *texObj = NULL;
> >   
> >  if (texture > 0)
> > -  texObj = _mesa_lookup_texture(ctx, texture);
> > +  texObj = _mesa_lookup_texture_err(ctx, texture, caller);
> 
> _mesa_lookup_texture_err() already handles the case where texture > 0, 
> you can get rid of that check (same below). Thanks.
> 

Thanks! Didn't know.


J.A.

> >   
> >  if (!texObj) {
> > -  _mesa_error(ctx, GL_INVALID_VALUE, "%s(texture)", caller);
> > return;
> >  }
> >   
> > @@ -1779,10 +1778,9 @@ _mesa_GetCompressedTextureSubImage(GLuint texture, 
> > GLint level,
> >  struct gl_texture_object *texObj = NULL;
> >   
> >  if (texture > 0)
> > -  texObj = _mesa_lookup_texture(ctx, texture);
> > +  texObj = _mesa_lookup_texture_err(ctx, texture, caller);
> >   
> >  if (!texObj) {
> > -  _mesa_error(ctx, GL_INVALID_VALUE, "%s(texture)", caller);
> > return;
> >  }
> >   
> > 
> 
> 
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 100259] [EGL] [GBM] undefined reference to `gbm_bo_create_with_modifiers'

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100259

--- Comment #20 from Eric Engestrom  ---
kusayu: You're having a different issue, with different symptoms. Can you
please open a new ticket?
When doing so, please indicate the libdrm version used.
Your error is weird though, as this symbol was introduced in libdrm 2.4.75,
which has always been required on the 17.1 branch, so if your libdrm is too old
it should fail way before that, during the configure stage.
I just tested that pkgbuild and it works for me btw, with libdrm 2.4.81.

-- 
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 02/11] intel/genxml: Add INSTDONE registers in gen10

[Rafael Antognolli]

There are a few fields missing but they don't seem to be used anyway, so:

Reviewed-by: Rafael Antognolli 

On Tue, Jun 13, 2017 at 11:28:21AM -0700, Anuj Phogat wrote:
> Signed-off-by: Anuj Phogat 
> ---
>  src/intel/genxml/gen10.xml | 115 
> +
>  1 file changed, 115 insertions(+)
> 
> diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml
> index 26dba22..04d89cb 100644
> --- a/src/intel/genxml/gen10.xml
> +++ b/src/intel/genxml/gen10.xml
> @@ -3568,6 +3568,121 @@
>   type="offset"/>
>
>  
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +  
> +
> +
> +
> +
> +  
> +
> +  
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +  
> +
> +  
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +
> +  
> +
> +  
> +
> +
> +
> +  
> +
>
>  
>  
> -- 
> 2.9.3
> 
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 3/3] radeonsi: use #pragma pack to pack si_shader_key

[Emil Velikov]

Hi Marek,

On 20 June 2017 at 19:00, Marek Olšák  wrote:
> From: Marek Olšák 
>
> sizeof(struct si_shader_key):
>   Before reverting the 2 commits: 120 bytes
>   After reverting the 2 commits: 128 bytes
>   With #pragma pack: 107 bytes
>
> I'm not sure if memcmp with a byte-aligned size is a good idea.

If you guys decide to go with this, please consider annotating the
individual structs.
Otherwise it's likely that one will add/remove a struct between the
pragma push/pop, causing some interesting and annoying to debug
issues.

-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2] getteximage: fix returned error value when texture object is not found

[Samuel Pitoiset]

On 06/22/2017 05:46 PM, Juan A. Suarez Romero wrote:

 From OpenGL 4.5 spec PDF, section '8.11. Texture Queries', page 236:
   "An INVALID_VALUE error is generated if texture is not the name of
an existing texture object."

Same wording applies to the compressed version.

But turns out this is a spec bug, and Khronos is fixing it for the next
revisions.

The proposal is to return INVALID_OPERATION in these cases.

v2: Use _mesa_lookup_texture_err (Samuel Pitoiset)

Fixes: GL45-CTS.get_texture_sub_image.errors_test
Fixes: 633c959fa (getteximage: Return correct error value when texure
object is not found)

Signed-off-by: Juan A. Suarez Romero 
---
  src/mesa/main/texgetimage.c | 6 ++
  1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
index 658b0e5..4937d89 100644
--- a/src/mesa/main/texgetimage.c
+++ b/src/mesa/main/texgetimage.c
@@ -1461,10 +1461,9 @@ _mesa_GetTextureSubImage(GLuint texture, GLint level,
 struct gl_texture_object *texObj = NULL;
  
 if (texture > 0)

-  texObj = _mesa_lookup_texture(ctx, texture);
+  texObj = _mesa_lookup_texture_err(ctx, texture, caller);


_mesa_lookup_texture_err() already handles the case where texture > 0, 
you can get rid of that check (same below). Thanks.


  
 if (!texObj) {

-  _mesa_error(ctx, GL_INVALID_VALUE, "%s(texture)", caller);
return;
 }
  
@@ -1779,10 +1778,9 @@ _mesa_GetCompressedTextureSubImage(GLuint texture, GLint level,

 struct gl_texture_object *texObj = NULL;
  
 if (texture > 0)

-  texObj = _mesa_lookup_texture(ctx, texture);
+  texObj = _mesa_lookup_texture_err(ctx, texture, caller);
  
 if (!texObj) {

-  _mesa_error(ctx, GL_INVALID_VALUE, "%s(texture)", caller);
return;
 }
  


___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev