Re: [Mesa-dev] [PATCH] i965 : Performance Improvement

[Kenneth Graunke]

On Thursday, July 13, 2017 9:49:40 PM PDT Marathe, Yogesh wrote:
> Kenneth,
> 
> > -Original Message-
> > From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf
> > Of Kenneth Graunke
> > Sent: Friday, July 14, 2017 10:05 AM
> > To: mesa-dev@lists.freedesktop.org
> > Cc: Muthukumar, Aravindan 
> > Subject: Re: [Mesa-dev] [PATCH] i965 : Performance Improvement
> > 
> > On Thursday, July 13, 2017 9:09:09 PM PDT aravindan.muthuku...@intel.com
> > wrote:
> > > From: Aravindan M 
> > 
> > The commit title should be something like, "i965: Optimize atom state flag
> > checks" rather than a generic "Performance Improvement"
> > 
> > > This patch improves CPI Rate(Cycles per Instruction) and CPU time
> > > utilization for i965. The functions check_state and
> > > brw_pipeline_state_finished was found poor CPU utilization from
> > > performance analysis.
> > 
> > Need actual data here, or show assembly quality improvements.
> > 
> > > Change-Id: I17c7e719a16e222764217a0e67b4482748537b67
> > > Signed-off-by: Aravindan M 
> > > Reviewed-by: Yogesh M 
> > > Tested-by: Asish 
> > > ---
> > >  src/mesa/drivers/dri/i965/brw_defines.h  |  3 +++
> > >  src/mesa/drivers/dri/i965/brw_state_upload.c | 14 +++---
> > >  2 files changed, 14 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
> > > b/src/mesa/drivers/dri/i965/brw_defines.h
> > > index a4794c6..60f88ca 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_defines.h
> > > +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> > > @@ -1681,3 +1681,6 @@ enum brw_pixel_shader_coverage_mask_mode {
> > >  # define GEN8_L3CNTLREG_ALL_ALLOC_MASK INTEL_MASK(31, 25)
> > >
> > >  #endif
> > > +
> > > +/* Checking the state of mesa and brw before emitting atoms */
> > > +#define CHECK_BRW_STATE(a,b) ((a.mesa & b.mesa) | (a.brw & b.brw))
> > > diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
> > > b/src/mesa/drivers/dri/i965/brw_state_upload.c
> > > index 5e82c1b..434decf 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
> > > +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
> > > @@ -515,7 +515,10 @@ brw_upload_pipeline_state(struct brw_context *brw,
> > >const struct brw_tracked_state *atom = [i];
> > >struct brw_state_flags generated;
> > >
> > > - check_and_emit_atom(brw, , atom);
> > > + /* Checking the state and emitting the atoms */
> > > + if (CHECK_BRW_STATE(state, atom->dirty)) {
> > > +check_and_emit_atom(brw, , atom);
> > > + }
> > >
> > >accumulate_state(, >dirty);
> > >
> > > @@ -532,7 +535,10 @@ brw_upload_pipeline_state(struct brw_context *brw,
> > >for (i = 0; i < num_atoms; i++) {
> > >const struct brw_tracked_state *atom = [i];
> > >
> > > - check_and_emit_atom(brw, , atom);
> > > + /* Checking the state and emitting the atoms */
> > > + if (CHECK_BRW_STATE(state, atom->dirty)) {
> > > +check_and_emit_atom(brw, , atom);
> > > + }
> > 
> > This doesn't make any sense...the very first thing check_and_emit_atom() 
> > does
> > is call check_state(), which does the exact thing your CHECK_BRW_STATE macro
> > does.  So you're just needlessly checking the same thing twice.
> > 
> 
> Sorry Kenneth, This is incomplete patch. The original patch that I reviewed 
> also had 
> if check removed as below
> 
> --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
> @@ -417,10 +417,8 @@ check_and_emit_atom(struct brw_context *brw,
>  struct brw_state_flags *state,
>  const struct brw_tracked_state *atom)
>  {
> -   if (check_state(state, >dirty)) {
> atom->emit(brw);
> merge_ctx_state(brw, state);
> -   }
>  }
> 
> Aravindan will push another set. 
> 
> > The only reason I could see this helping is if check_state() wasn't 
> > inlined, but a
> > release build with -O2 definitely inlines both check_and_emit_atom() and
> > check_state().
> > 
> > Are you using GCC?  What are your CFLAGS?  -O2?  I hope you're not trying to
> > optimize a debug build...
> > 
> 
> Yes we are using O2 and its clang on android and it's not debug.

Okay.  I just built with Clang 4.0.1 and -O2 and both check_state and
check_and_emit_atom() are inlined into the atom loop in
brw_upload_pipeline_state().

So I'm still not sure how this would improve anything.

> > >}
> > > }
> > >
> > > @@ -567,7 +573,9 @@ brw_pipeline_state_finished(struct brw_context *brw,
> > >   brw->state.pipelines[i].mesa |= brw->NewGLState;
> > >   brw->state.pipelines[i].brw |= brw->ctx.NewDriverState;
> > >} else {
> > > - memset(>state.pipelines[i], 0, sizeof(struct 
> > > brw_state_flags));
> > > + /* Avoiding the memset with 

Re: [Mesa-dev] [PATCH 2/3] nv20: Fix GL_CLAMP

[Ian Romanick]

On 07/13/2017 06:50 PM, Ilia Mirkin wrote:
> According to rnndb, GL_CLAMP with value 0x5 is actually supported on
> nv10+. I'd name the function *_nv10.
> 
> I have, at various times, tried to solve some issues by using the 0x5
> clamp on my nv1x hardware (nv17 and nv18), with no positive effect.
> This is a piglit run I have around from some time back:
> 
> https://people.freedesktop.org/~imirkin/nv10-comparison/problems.html
> 
> in case you're curious. I guess this is consistent with your results -
> no change from doing this, until we get to borders.

I saw that in rnndb.  This is partially what fuels my suspicion that
GL_CLAMP on NV10 clamps with the 1-texel border.  Since this driver
doesn't provide a border, it doesn't blend with anything.

One of these days I'll figure out how to probe the closed driver to see
what it does.  The last driver that supports NV10 only works on Fedora 6
or similarly old.  That... will require quite some motivation.

> With or without that function name change, this is
> 
> Reviewed-by: Ilia Mirkin 
> 
> [apologies this took me a while to get to]
> 
> On Tue, Jun 27, 2017 at 1:09 PM, Ian Romanick  wrote:
>> From: Ian Romanick 
>>
>> v2: Force T and R wrap modes to GL_CLAMP_TO_EDGE for 1D textures.
>> This fixes a regression in tex1d-2dborder.  The test uses a 1D texture
>> but it provides S and T texture coordinates.  Since the T wrap mode
>> would (correctly) be set to GL_CLAMP, the texture would gradually
>> blend (incorrectly) with the border color.
>>
>> I also tried setting NV20_3D_TEX_FORMAT_DIMS_1D instead of
>> NV20_3D_TEX_FORMAT_DIMS_2D for 1D textures, but that did not help.
>>
>> It is possible that the same problem exists for 2D textures with the
>> R-wrap mode, but I don't think there are any piglit tests for that.
>>
>> No test changes on NV20 (10de:0201).
>>
>> Signed-off-by: Ian Romanick 
>> ---
>>  src/mesa/drivers/dri/nouveau/nouveau_gldefs.h | 19 +++
>>  src/mesa/drivers/dri/nouveau/nv20_state_tex.c | 16 +---
>>  2 files changed, 32 insertions(+), 3 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h 
>> b/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
>> index 46ec14e..7df04c1 100644
>> --- a/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
>> +++ b/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
>> @@ -239,6 +239,25 @@ nvgl_wrap_mode(unsigned wrap)
>>  }
>>
>>  static inline unsigned
>> +nvgl_wrap_mode_nv20(unsigned wrap)
>> +{
>> +   switch (wrap) {
>> +   case GL_REPEAT:
>> +   return 0x1;
>> +   case GL_MIRRORED_REPEAT:
>> +   return 0x2;
>> +   case GL_CLAMP:
>> +   return 0x5;
>> +   case GL_CLAMP_TO_EDGE:
>> +   return 0x3;
>> +   case GL_CLAMP_TO_BORDER:
>> +   return 0x4;
>> +   default:
>> +   unreachable("Bad GL texture wrap mode");
>> +   }
>> +}
>> +
>> +static inline unsigned
>>  nvgl_filter_mode(unsigned filter)
>>  {
>> switch (filter) {
>> diff --git a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c 
>> b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
>> index b0a4c9f..7972069 100644
>> --- a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
>> +++ b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
>> @@ -193,9 +193,19 @@ nv20_emit_tex_obj(struct gl_context *ctx, int emit)
>> | NV20_3D_TEX_FORMAT_NO_BORDER
>> | 1 << 16;
>>
>> -   tx_wrap = nvgl_wrap_mode(sa->WrapR) << 16
>> -   | nvgl_wrap_mode(sa->WrapT) << 8
>> -   | nvgl_wrap_mode(sa->WrapS) << 0;
>> +   switch (t->Target) {
>> +   case GL_TEXTURE_1D:
>> +   tx_wrap = NV20_3D_TEX_WRAP_R_CLAMP_TO_EDGE
>> +   | NV20_3D_TEX_WRAP_T_CLAMP_TO_EDGE
>> +   | nvgl_wrap_mode_nv20(sa->WrapS) << 0;
>> +   break;
>> +
>> +   default:
>> +   tx_wrap = nvgl_wrap_mode_nv20(sa->WrapR) << 16
>> +   | nvgl_wrap_mode_nv20(sa->WrapT) << 8
>> +   | nvgl_wrap_mode_nv20(sa->WrapS) << 0;
>> +   break;
>> +   }
>>
>> tx_filter = nvgl_filter_mode(sa->MagFilter) << 24
>> | nvgl_filter_mode(sa->MinFilter) << 16
>> --
>> 2.9.4
>>
>> ___
>> mesa-dev mailing list
>> mesa-dev@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> 

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Re: [Mesa-dev] [PATCH] i965 : Performance Improvement

[Ian Romanick]

On 07/13/2017 09:35 PM, Kenneth Graunke wrote:
> On Thursday, July 13, 2017 9:09:09 PM PDT aravindan.muthuku...@intel.com 
> wrote:
>> From: Aravindan M 
> 
> The commit title should be something like, "i965: Optimize atom state
> flag checks" rather than a generic "Performance Improvement"
> 
>> This patch improves CPI Rate(Cycles per Instruction)
>> and CPU time utilization for i965. The functions
>> check_state and brw_pipeline_state_finished was found
>> poor CPU utilization from performance analysis.
> 
> Need actual data here, or show assembly quality improvements.

I'll second this.  There need to be some actual measurements and data.
These seem like the most micro of micro optimizations, so some
supporting data is needed.  Just saying "improves CPI rate" is not
sufficient.  That should include the platform on which it was measured.

>> Change-Id: I17c7e719a16e222764217a0e67b4482748537b67
>> Signed-off-by: Aravindan M 
>> Reviewed-by: Yogesh M 
>> Tested-by: Asish 
>> ---
>>  src/mesa/drivers/dri/i965/brw_defines.h  |  3 +++
>>  src/mesa/drivers/dri/i965/brw_state_upload.c | 14 +++---
>>  2 files changed, 14 insertions(+), 3 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
>> b/src/mesa/drivers/dri/i965/brw_defines.h
>> index a4794c6..60f88ca 100644
>> --- a/src/mesa/drivers/dri/i965/brw_defines.h
>> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
>> @@ -1681,3 +1681,6 @@ enum brw_pixel_shader_coverage_mask_mode {
>>  # define GEN8_L3CNTLREG_ALL_ALLOC_MASK INTEL_MASK(31, 25)
>>  
>>  #endif
>> +
>> +/* Checking the state of mesa and brw before emitting atoms */
>> +#define CHECK_BRW_STATE(a,b) ((a.mesa & b.mesa) | (a.brw & b.brw))
>> diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c 
>> b/src/mesa/drivers/dri/i965/brw_state_upload.c
>> index 5e82c1b..434decf 100644
>> --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
>> +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
>> @@ -515,7 +515,10 @@ brw_upload_pipeline_state(struct brw_context *brw,
>>   const struct brw_tracked_state *atom = [i];
>>   struct brw_state_flags generated;
>>  
>> - check_and_emit_atom(brw, , atom);
>> + /* Checking the state and emitting the atoms */
>> + if (CHECK_BRW_STATE(state, atom->dirty)) {
>> +check_and_emit_atom(brw, , atom);
>> + }
>>  
>>   accumulate_state(, >dirty);
>>  
>> @@ -532,7 +535,10 @@ brw_upload_pipeline_state(struct brw_context *brw,
>>for (i = 0; i < num_atoms; i++) {
>>   const struct brw_tracked_state *atom = [i];
>>  
>> - check_and_emit_atom(brw, , atom);
>> + /* Checking the state and emitting the atoms */
>> + if (CHECK_BRW_STATE(state, atom->dirty)) {
>> +check_and_emit_atom(brw, , atom);
>> + }
> 
> This doesn't make any sense...the very first thing check_and_emit_atom()
> does is call check_state(), which does the exact thing your CHECK_BRW_STATE
> macro does.  So you're just needlessly checking the same thing twice.
> 
> The only reason I could see this helping is if check_state() wasn't inlined,
> but a release build with -O2 definitely inlines both check_and_emit_atom()
> and check_state().
> 
> Are you using GCC?  What are your CFLAGS?  -O2?  I hope you're not trying
> to optimize a debug build...
> 
>>}
>> }
>>  
>> @@ -567,7 +573,9 @@ brw_pipeline_state_finished(struct brw_context *brw,
>>   brw->state.pipelines[i].mesa |= brw->NewGLState;
>>   brw->state.pipelines[i].brw |= brw->ctx.NewDriverState;
>>} else {
>> - memset(>state.pipelines[i], 0, sizeof(struct 
>> brw_state_flags));
>> + /* Avoiding the memset with initialization */
>> + brw->state.pipelines[i].mesa = 0;
>> + brw->state.pipelines[i].brw = 0ull;
>>}
>> }
> 
> This is a separate change.
> 
> I'm also not seeing why it's useful:
> 
> Assembly before (GCC 7.1.1, x86_64, -O2 -fno-omit-frame-pointer):
> 
> 003e0380 :
>   3e0380:   66 0f ef c0 pxor   %xmm0,%xmm0
>   3e0384:   55  push   %rbp
>   3e0385:   8b 87 20 52 02 00   mov0x25220(%rdi),%eax
>   3e038b:   c7 87 20 52 02 00 00movl   $0x0,0x25220(%rdi)
>   3e0392:   00 00 00 
>   3e0395:   48 89 e5mov%rsp,%rbp
>   3e0398:   09 87 38 52 02 00   or %eax,0x25238(%rdi)
>   3e039e:   48 8b 87 38 4d 02 00mov0x24d38(%rdi),%rax
>   3e03a5:   5d  pop%rbp
>   3e03a6:   48 09 87 40 52 02 00or %rax,0x25240(%rdi)
>   3e03ad:   48 c7 87 38 4d 02 00movq   $0x0,0x24d38(%rdi)
>   3e03b4:   00 00 00 00 
>   3e03b8:   0f 11 87 28 52 02 00movups %xmm0,0x25228(%rdi)
>   3e03bf:   c3  retq 
> 
> Assembly after:
> 
> 003e0380 :
>   3e0380:   55 

Re: [Mesa-dev] XCOM: Enemy Unknown vs. NaN texture unit LOD bias

[Kenneth Graunke]

On Thursday, July 13, 2017 4:23:14 PM PDT Ian Romanick wrote:
> On 07/10/2017 11:25 PM, Kenneth Graunke wrote:
> > Hello,
> > 
> > Mesa master has been hitting assert failures when running "XCOM: Enemy
> > Unknown" since commit f8d69beed49c64f883bb8ffb28d4960306baf575, where we
> > started asserting that the SAMPLER_STATE LOD Bias value actually fits in
> > the correct number of bits.
> > 
> > Apparently, XCOM calls
> > 
> >glTexEnv(GL_TEXTURE_FILTER_CONTROL_EXT, GL_TEXTURE_LOD_BIAS_EXT, val);
> > 
> > to set the texture unit LOD bias...but according to gdb, the value is:
> > 
> >-nan(0x73)
> > 
> > In i965, we do CLAMP(lod bias, -16, 15)...but NaN ends up failing both
> > the < min and > max comparisons, so it slips through.  But, that raises
> > the question...what value *should* we be using?  0?  Min?  Max?
> > 
> > I couldn't find any immediately applicable GL spec text.  Anyone know of
> > any?  If not, does DirectX mandate something?
> 
> There is one place.  Section 2.3.4.1 (Floating-Point Computation) of the
> OpenGL 4.5 core profile spec says:
> 
>"The result of providing a value that is not a floating-point number
>to such a command is unspecified, but must not lead to GL
>interruption or termination. In IEEE arithmetic, for example,
>providing a negative zero or a denormalized number to a GL command
>yields predictable results, while providing a NaN or an infinity
>yields unspecified results."
> 
> Crashing is not allowed, but nearly any other behavior is.  Based on
> that, I like Roland's suggestion of changing the CLAMP() macro.  We
> should also report this to the developers.  I'd wager that some crazy
> NaN value is not what they intended.

Hi Marc,

I think I may have found a bug in "XCOM: Enemy Within" - it appears to be
setting the texture unit LOD bias to -nan(0x73) via glTexEnv.  Passing
in a NaN here can cause unspecified results...meaning you likely get an
arbitrary LOD bias.  I'm guessing this isn't what you intended.

See above for the details.  I just sent patches to work around the crash
(assertion failure) in i965 due to the NaN popping up in unexpected places,
but we'll end up setting the LOD bias to -16, which I imagine could have a
performance impact...

https://lists.freedesktop.org/archives/mesa-dev/2017-July/162921.html

The bogus glTexEnv call happens immediately after the intro videos end,
and you reach the main menu (new game, load, etc).

Any thoughts?

--Ken

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[Mesa-dev] [RFC v2 09/23] anv/image: Refactor how tiling is chosen

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

The code that chooses the image's tiling flags, extract it into a new
function, choose_isl_tiling_flags().  This reduces the diff in future
patches for the upcoming dma_buf-import extension, in which the the
tiling code will become more complex.
---
 src/intel/vulkan/anv_image.c | 30 ++
 1 file changed, 18 insertions(+), 12 deletions(-)

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 48f50d8ce8..a440dd391b 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -105,6 +105,23 @@ get_surface(struct anv_image *image, VkImageAspectFlags 
aspect)
}
 }
 
+static isl_tiling_flags_t
+choose_isl_tiling_flags(const struct anv_image_create_info *anv_info)
+{
+   isl_tiling_flags_t flags;
+
+   if (anv_info->vk_info->tiling == VK_IMAGE_TILING_LINEAR) {
+  flags = ISL_TILING_LINEAR_BIT;
+   } else {
+  flags = ISL_TILING_ANY_MASK;
+   }
+
+   if (anv_info->isl_tiling_flags)
+  flags &= anv_info->isl_tiling_flags;
+
+   return flags;
+}
+
 static void
 add_surface(struct anv_image *image, struct anv_surface *surf)
 {
@@ -136,18 +153,7 @@ make_surface(const struct anv_device *dev,
   [VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D,
};
 
-   /* Translate the Vulkan tiling to an equivalent ISL tiling, then filter the
-* result with an optionally provided ISL tiling argument.
-*/
-   isl_tiling_flags_t tiling_flags =
-  (base_info->tiling == VK_IMAGE_TILING_LINEAR) ?
-  ISL_TILING_LINEAR_BIT : ISL_TILING_ANY_MASK;
-
-   if (anv_info->isl_tiling_flags)
-  tiling_flags &= anv_info->isl_tiling_flags;
-
-   assert(tiling_flags);
-
+   const isl_tiling_flags_t tiling_flags = choose_isl_tiling_flags(anv_info);
struct anv_surface *anv_surf = get_surface(image, aspect);
 
image->extent = anv_sanitize_image_extent(base_info->imageType,
-- 
2.13.0

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[Mesa-dev] [RFC v2 21/23] RFC: anv: Drop unneeded struct anv_image_create_info

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

Now that anv_image_create() is gone, there is no need for struct
anv_image_create_info. The struct just adds an unused layer of
indirection.
---
 src/intel/vulkan/anv_image.c   | 38 +++---
 src/intel/vulkan/anv_private.h |  9 -
 2 files changed, 11 insertions(+), 36 deletions(-)

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 287f20d769..798450e1d9 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -107,7 +107,7 @@ get_surface(struct anv_image *image, VkImageAspectFlags 
aspect)
 }
 
 static isl_tiling_flags_t
-choose_isl_tiling_flags(const struct anv_image_create_info *anv_info,
+choose_isl_tiling_flags(const VkImageCreateInfo *base_info,
 const VkImportImageDmaBufInfoMESAX 
*import_dma_buf_info,
 const VkExportImageDmaBufInfoMESAX 
*export_dma_buf_info)
 {
@@ -131,15 +131,12 @@ choose_isl_tiling_flags(const struct 
anv_image_create_info *anv_info,
 flags |= 1 << t;
  }
   }
-   } else if (anv_info->vk_info->tiling == VK_IMAGE_TILING_LINEAR) {
+   } else if (base_info->tiling == VK_IMAGE_TILING_LINEAR) {
   flags = ISL_TILING_LINEAR_BIT;
} else {
   flags = ISL_TILING_ANY_MASK;
}
 
-   if (anv_info->isl_tiling_flags)
-  flags &= anv_info->isl_tiling_flags;
-
assert(flags != 0);
 
return flags;
@@ -167,22 +164,6 @@ choose_isl_format(const struct anv_device *dev,
}
 }
 
-static uint32_t
-choose_row_pitch(const struct anv_image_create_info *anv_info,
- const VkImportImageDmaBufPlaneInfoMESAX *plane_info)
-{
-   if (anv_info->stride != 0)
-  return anv_info->stride;
-
-   if (plane_info) {
-  assert(plane_info->rowPitch > 0);
-  return plane_info->rowPitch;
-   }
-
-   /* Let isl choose the pitch. */
-   return 0;
-}
-
 static void
 set_min_surface_offset(const struct anv_image *image, struct anv_surface *surf)
 {
@@ -330,14 +311,13 @@ make_aux_surface_maybe(const struct anv_device *dev,
  */
 static void
 make_main_surface(const struct anv_device *dev,
-  const struct anv_image_create_info *anv_info,
+  const VkImageCreateInfo *base_info,
   const VkImportImageDmaBufInfoMESAX *import_dma_buf_info,
   const VkExportImageDmaBufInfoMESAX *export_dma_buf_info,
   VkImageAspectFlags aspect,
   VkExternalMemoryHandleTypeFlagsKHX handle_types,
   struct anv_image *image)
 {
-   const VkImageCreateInfo *base_info = anv_info->vk_info;
bool ok UNUSED;
 
static const enum isl_surf_dim vk_to_isl_surf_dim[] = {
@@ -351,8 +331,13 @@ make_main_surface(const struct anv_device *dev,
   plane_info = _dma_buf_info->pPlanes[0];
 
const isl_tiling_flags_t tiling_flags =
-  choose_isl_tiling_flags(anv_info, import_dma_buf_info, 
export_dma_buf_info);
-   const uint32_t row_pitch = choose_row_pitch(anv_info, plane_info);
+  choose_isl_tiling_flags(base_info, import_dma_buf_info, 
export_dma_buf_info);
+
+   uint32_t row_pitch = 0;
+   if (plane_info) {
+  assert(plane_info->rowPitch > 0);
+  row_pitch = plane_info->rowPitch;
+   }
 
struct anv_surface *anv_surf = get_surface(image, aspect);
 
@@ -398,7 +383,6 @@ anv_CreateImage(VkDevice _device,
 VkImage *pImage)
 {
ANV_FROM_HANDLE(anv_device, device, _device);
-   const struct anv_image_create_info anv_info = { .vk_info = base_info };
const VkImportImageDmaBufInfoMESAX *import_dma_buf_info = NULL;
const VkExportImageDmaBufInfoMESAX *export_dma_buf_info = NULL;
VkExternalMemoryHandleTypeFlagsKHX handle_types = 0;
@@ -456,7 +440,7 @@ anv_CreateImage(VkDevice _device,
uint32_t b;
for_each_bit(b, image->aspects) {
   VkImageAspectFlagBits aspect = 1 << b;
-  make_main_surface(device, _info, import_dma_buf_info,
+  make_main_surface(device, base_info, import_dma_buf_info,
 export_dma_buf_info, aspect, handle_types, image);
   make_aux_surface_maybe(device, base_info, aspect, handle_types, image);
}
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 402daa8ab0..9bc02feab0 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -2211,15 +2211,6 @@ struct anv_image_view {
struct brw_image_param storage_image_param;
 };
 
-struct anv_image_create_info {
-   const VkImageCreateInfo *vk_info;
-
-   /** An opt-in bitmask which filters an ISL-mapping of the Vulkan tiling. */
-   isl_tiling_flags_t isl_tiling_flags;
-
-   uint32_t stride;
-};
-
 const struct anv_surface *
 anv_image_get_surface_for_aspect_mask(const struct anv_image *image,
   VkImageAspectFlags aspect_mask);
-- 
2.13.0

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[Mesa-dev] [RFC v2 17/23] RFC: anv: Implement VK_MESAX_external_image_dma_buf

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

For now, we support dma_buf images for only a single format,
VK_FORMAT_R8G8B8A8_UNORM.  And the image must be a "simple" image: 2D,
single-sample, non-mipmappped, non-array, non-cube.
---
 src/intel/vulkan/anv_device.c   |   4 +
 src/intel/vulkan/anv_entrypoints_gen.py |   1 +
 src/intel/vulkan/anv_formats.c  | 144 -
 src/intel/vulkan/anv_image.c| 182 +---
 src/intel/vulkan/anv_private.h  |   6 ++
 5 files changed, 324 insertions(+), 13 deletions(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 4dd54e9b17..7b467c2ade 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -500,6 +500,10 @@ static const VkExtensionProperties device_extensions[] = {
   .extensionName = VK_MESAX_EXTERNAL_MEMORY_DMA_BUF_EXTENSION_NAME,
   .specVersion = 0,
},
+   {
+  .extensionName = VK_MESAX_EXTERNAL_IMAGE_DMA_BUF_EXTENSION_NAME,
+  .specVersion = 0,
+   },
 };
 
 static void *
diff --git a/src/intel/vulkan/anv_entrypoints_gen.py 
b/src/intel/vulkan/anv_entrypoints_gen.py
index c62a3bed64..06bb9de5e5 100644
--- a/src/intel/vulkan/anv_entrypoints_gen.py
+++ b/src/intel/vulkan/anv_entrypoints_gen.py
@@ -54,6 +54,7 @@ SUPPORTED_EXTENSIONS = [
 'VK_KHX_external_semaphore_capabilities',
 'VK_KHX_external_semaphore_fd',
 'VK_KHX_multiview',
+'VK_MESAX_external_image_dma_buf',
 'VK_MESAX_external_memory_dma_buf',
 ]
 
diff --git a/src/intel/vulkan/anv_formats.c b/src/intel/vulkan/anv_formats.c
index 2f5b7f2518..5ab4d99451 100644
--- a/src/intel/vulkan/anv_formats.c
+++ b/src/intel/vulkan/anv_formats.c
@@ -465,16 +465,64 @@ void anv_GetPhysicalDeviceFormatProperties(
pFormatProperties);
 }
 
+static void
+get_dma_buf_format_props(struct anv_physical_device *phys_dev,
+ VkFormat vk_format,
+ VkDmaBufFormatPropertiesMESAX *props)
+{
+   struct anv_format anv_format = anv_formats[vk_format];
+   VK_OUTARRAY_MAKE(mod_props, props->pModifierProperties,
+>modifierCount);
+
+   VkFormatFeatureFlags image_features = 0;
+   if (vk_format == VK_FORMAT_R8G8B8A8_UNORM) {
+  /* FINISHME: Support more formats for dma_buf images. */
+
+  /* For dma_buf images, we must use the exact format provided by the
+   * user.  We must not adjust the format, as we do for non-external
+   * images, with swizzles and other tricks. In other words, the image's
+   * "base" format and "adjusted" format must be the same.
+   */
+  image_features = get_image_format_properties(_dev->info,
+/*base format*/ anv_format.isl_format,
+/*adjusted format*/ anv_format);
+   }
+
+   if (image_features == 0)
+  return;
+
+   /* Return DRM format modifiers in order of decreasing preference. */
+   vk_outarray_append(_props, p) {
+  p->drmFormatModifier = I915_FORMAT_MOD_Y_TILED;
+  p->imageFeatures = image_features;
+   }
+
+   vk_outarray_append(_props, p) {
+  p->drmFormatModifier = I915_FORMAT_MOD_X_TILED;
+  p->imageFeatures = image_features;
+   }
+
+   vk_outarray_append(_props, p) {
+  p->drmFormatModifier = DRM_FORMAT_MOD_LINEAR;
+  p->imageFeatures = image_features;
+   }
+}
+
 void anv_GetPhysicalDeviceFormatProperties2KHR(
 VkPhysicalDevicephysicalDevice,
 VkFormatformat,
 VkFormatProperties2KHR* pFormatProperties)
 {
+   ANV_FROM_HANDLE(anv_physical_device, phys_dev, physicalDevice);
+
anv_GetPhysicalDeviceFormatProperties(physicalDevice, format,
  >formatProperties);
 
vk_foreach_struct(ext, pFormatProperties->pNext) {
   switch (ext->sType) {
+  case VK_STRUCTURE_TYPE_DMA_BUF_FORMAT_PROPERTIES_MESAX:
+ get_dma_buf_format_props(phys_dev, format, 
(VkDmaBufFormatPropertiesMESAX *) ext);
+ break;
   default:
  anv_debug_ignored_stype(ext->sType);
  break;
@@ -679,6 +727,91 @@ static const VkExternalMemoryPropertiesKHX 
dma_buf_mem_props = {
   VK_EXTERNAL_MEMORY_HANDLE_TYPE_DMA_BUF_BIT_MESAX,
 };
 
+static VkResult
+get_dma_buf_image_format_props(struct anv_physical_device *phys_dev,
+   const VkPhysicalDeviceImageFormatInfo2KHR 
*base_info,
+   VkImageFormatProperties2KHR *base_props,
+   VkExternalImageFormatPropertiesKHX 
*external_props,
+   VkDmaBufImageFormatPropertiesMESAX 
*dma_buf_props)
+{
+   /* We reject vkGetPhysicalDeviceImageFormatProperties2KHR() on the
+* DMA_BUF_BIT unless the user adds VkDmaBufImageFormatPropertiesMESAX to
+* the output chain. The spec permits this behavior but does not require
+* it.
+*/
+   if 

[Mesa-dev] [RFC v2 19/23] RFC: anv/wsi: Use VK_MESAX_external_image_dma_buf

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

When creating a VkSurface for X11, we created the underlying VkImage by
calling anv_image_create() and passing driver-private info to it. We can
now accomplish the same thing without driver-private info, using 
VK_MESAX_external_image_dma_buf.

In anv_wsi.c, replace the combo of
  anv_image_create() + struct anv_image_create_info
with
  anv_CreateImage() + VkExportImageDmaBufInfoMESAX

No intended change in behavior.
---
 src/intel/Makefile.vulkan.am   |  3 ---
 src/intel/vulkan/anv_formats.c |  6 --
 src/intel/vulkan/anv_image.c   |  5 +++--
 src/intel/vulkan/anv_wsi.c | 19 +--
 4 files changed, 20 insertions(+), 13 deletions(-)

diff --git a/src/intel/Makefile.vulkan.am b/src/intel/Makefile.vulkan.am
index 3857a5dc62..31aba251e8 100644
--- a/src/intel/Makefile.vulkan.am
+++ b/src/intel/Makefile.vulkan.am
@@ -61,9 +61,6 @@ noinst_HEADERS += \
$(top_srcdir)/include/vulkan/vk_platform.h \
$(top_srcdir)/include/vulkan/vulkan.h
 
-vulkan_include_HEADERS = \
-   $(top_srcdir)/include/vulkan/vulkan_intel.h
-
 lib_LTLIBRARIES += vulkan/libvulkan_intel.la
 
 check_LTLIBRARIES += vulkan/libvulkan-test.la
diff --git a/src/intel/vulkan/anv_formats.c b/src/intel/vulkan/anv_formats.c
index 5ab4d99451..b23aeb35ed 100644
--- a/src/intel/vulkan/anv_formats.c
+++ b/src/intel/vulkan/anv_formats.c
@@ -475,7 +475,8 @@ get_dma_buf_format_props(struct anv_physical_device 
*phys_dev,
 >modifierCount);
 
VkFormatFeatureFlags image_features = 0;
-   if (vk_format == VK_FORMAT_R8G8B8A8_UNORM) {
+   if (vk_format == VK_FORMAT_R8G8B8A8_UNORM ||
+   vk_format == VK_FORMAT_B8G8R8A8_UNORM) {
   /* FINISHME: Support more formats for dma_buf images. */
 
   /* For dma_buf images, we must use the exact format provided by the
@@ -763,7 +764,8 @@ get_dma_buf_image_format_props(struct anv_physical_device 
*phys_dev,
"VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT");
}
 
-   if (base_info->format != VK_FORMAT_R8G8B8A8_UNORM) {
+   if (base_info->format != VK_FORMAT_R8G8B8A8_UNORM &&
+   base_info->format != VK_FORMAT_B8G8R8A8_UNORM) {
   /* FINISHME: Support more formats for dma_buf images. */
   return vk_errorf(VK_ERROR_FORMAT_NOT_SUPPORTED,
"dma_buf images do not support VkFormat 0x%x",
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 6215746117..1a61a7b554 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -569,8 +569,9 @@ get_image_dma_buf_props(const struct anv_image *image,
 _buf_props->planeCount);
bool ok UNUSED;
 
-   /* For now, we support exactly one format for dma_buf images. */
-   assert(image->vk_format == VK_FORMAT_R8G8B8A8_UNORM);
+   /* For now, we support exactly two formats for dma_buf images. */
+   assert(image->vk_format == VK_FORMAT_R8G8B8A8_UNORM ||
+  image->vk_format == VK_FORMAT_B8G8R8A8_UNORM);
 
/* For now, We don't support dma_buf images with auxiliary surfaces. */
assert(image->aux_surface.isl.size == 0);
diff --git a/src/intel/vulkan/anv_wsi.c b/src/intel/vulkan/anv_wsi.c
index 38e4af2c1a..bd60a4474a 100644
--- a/src/intel/vulkan/anv_wsi.c
+++ b/src/intel/vulkan/anv_wsi.c
@@ -185,11 +185,7 @@ anv_wsi_image_create(VkDevice device_h,
struct anv_image *image;
 
VkResult result;
-   result = anv_image_create(anv_device_to_handle(device),
-  &(struct anv_image_create_info) {
- .isl_tiling_flags = ISL_TILING_X_BIT,
- .stride = 0,
- .vk_info =
+   result = anv_CreateImage(anv_device_to_handle(device),
   &(VkImageCreateInfo) {
  .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO,
  .imageType = VK_IMAGE_TYPE_2D,
@@ -207,7 +203,18 @@ anv_wsi_image_create(VkDevice device_h,
  .usage = (pCreateInfo->imageUsage |
VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT),
  .flags = 0,
-  }},
+ .pNext =
+  &(VkExternalMemoryImageCreateInfoKHX) {
+ .sType = VK_STRUCTURE_TYPE_EXTERNAL_MEMORY_IMAGE_CREATE_INFO_KHX,
+ .handleTypes = VK_EXTERNAL_MEMORY_HANDLE_TYPE_DMA_BUF_BIT_MESAX,
+ .pNext =
+  &(VkExportImageDmaBufInfoMESAX) {
+ .sType = VK_STRUCTURE_TYPE_EXPORT_IMAGE_DMA_BUF_INFO_MESAX,
+ .drmFormatModifierCount = 1,
+ .pDrmFormatModifiers = (uint64_t[]) {
+I915_FORMAT_MOD_X_TILED,
+ },
+  }}},
   NULL,
   _h);
if (result != VK_SUCCESS)
-- 
2.13.0

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[Mesa-dev] [RFC v2 13/23] anv: Set anv_surface::offset earlier

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

Set anv_surface::offset *before* calling add_surface().

No intended change in behavior. This patch prepares for supporting
user-provided surface offsets, a feature required for
VK_MESAX_external_image_dma_buf.
---
 src/intel/vulkan/anv_image.c | 15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 73e9d55250..68e3c22ff8 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -123,12 +123,17 @@ choose_isl_tiling_flags(const struct 
anv_image_create_info *anv_info)
 }
 
 static void
-add_surface(struct anv_image *image, struct anv_surface *surf)
+set_min_surface_offset(const struct anv_image *image, struct anv_surface *surf)
 {
assert(surf->isl.size > 0); /* isl surface must be initialized */
-
surf->offset = align_u32(image->size, surf->isl.alignment);
-   image->size = surf->offset + surf->isl.size;
+}
+
+static void
+add_surface(struct anv_image *image, const struct anv_surface *surf)
+{
+   assert(surf->isl.size > 0); /* isl surface must be initialized */
+   image->size = MAX2(image->size, surf->offset + surf->isl.size);
image->alignment = MAX2(image->alignment, surf->isl.alignment);
 }
 
@@ -165,6 +170,7 @@ make_hiz_surface_maybe(const struct anv_device *dev,
   if (!ok)
  return;
 
+  set_min_surface_offset(image, >aux_surface);
   add_surface(image, >aux_surface);
   image->aux_usage = ISL_AUX_USAGE_HIZ;
}
@@ -187,6 +193,7 @@ make_ccs_surface_maybe(const struct anv_device *dev,
if (!ok)
   return;
 
+   set_min_surface_offset(image, >aux_surface);
add_surface(image, >aux_surface);
 
/* For images created without MUTABLE_FORMAT_BIT set, we know that they will
@@ -218,6 +225,7 @@ make_mcs_surface_maybe(const struct anv_device *dev,
if (!ok)
   return;
 
+   set_min_surface_offset(image, >aux_surface);
add_surface(image, >aux_surface);
image->aux_usage = ISL_AUX_USAGE_MCS;
 }
@@ -287,6 +295,7 @@ make_main_surface(const struct anv_device *dev,
 */
assert(ok);
 
+   set_min_surface_offset(image, anv_surf);
add_surface(image, anv_surf);
 }
 
-- 
2.13.0

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[Mesa-dev] [RFC v2 16/23] RFC: anv: Implement VK_MESAX_external_memory_dma_buf

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

For now, we support dma_bufs only for VkBuffers.  The
VK_MESAX_external_memory_dma_buf spec allows us to support dma_buf
VkImages, but we choose to defer that support until
VK_MESAX_external_image_dma_buf.
---
 src/intel/vulkan/anv_device.c   | 28 +++-
 src/intel/vulkan/anv_entrypoints_gen.py |  1 +
 src/intel/vulkan/anv_formats.c  | 22 +++---
 src/intel/vulkan/anv_private.h  |  4 
 4 files changed, 43 insertions(+), 12 deletions(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 3dc55dbb8d..4dd54e9b17 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -496,6 +496,10 @@ static const VkExtensionProperties device_extensions[] = {
   .extensionName = VK_KHX_MULTIVIEW_EXTENSION_NAME,
   .specVersion = 1,
},
+   {
+  .extensionName = VK_MESAX_EXTERNAL_MEMORY_DMA_BUF_EXTENSION_NAME,
+  .specVersion = 0,
+   },
 };
 
 static void *
@@ -1578,11 +1582,7 @@ VkResult anv_AllocateMemory(
 * ignored.
 */
if (fd_info && fd_info->handleType) {
-  /* At the moment, we only support the OPAQUE_FD memory type which is
-   * just a GEM buffer.
-   */
-  assert(fd_info->handleType ==
- VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT_KHX);
+  assert((fd_info->handleType & ~ANV_SUPPORTED_MEMORY_HANDLE_TYPES) == 0);
 
   result = anv_bo_cache_import(device, >bo_cache,
fd_info->fd, pAllocateInfo->allocationSize,
@@ -1623,8 +1623,7 @@ VkResult anv_GetMemoryFdKHX(
ANV_FROM_HANDLE(anv_device, dev, device_h);
ANV_FROM_HANDLE(anv_device_memory, mem, memory_h);
 
-   /* We support only one handle type. */
-   assert(handleType == VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT_KHX);
+   assert((handleType & ~ANV_SUPPORTED_MEMORY_HANDLE_TYPES) == 0);
 
return anv_bo_cache_export(dev, >bo_cache, mem->bo, pFd);
 }
@@ -1635,13 +1634,24 @@ VkResult anv_GetMemoryFdPropertiesKHX(
 int fd,
 VkMemoryFdPropertiesKHX*pMemoryFdProperties)
 {
+   ANV_FROM_HANDLE(anv_device, device, device_h);
+
+   if (fd == -1)
+  return VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX;
+
/* The valid usage section for this function says:
 *
 *"handleType must not be one of the handle types defined as opaque."
 *
-* Since we only handle opaque handles for now, there are no FD properties.
+* The only non-opaque fd type we support is dma_buf.
 */
-   return VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX;
+   if (handleType != VK_EXTERNAL_MEMORY_HANDLE_TYPE_DMA_BUF_BIT_MESAX)
+  return VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX;
+
+   /* We support exactly one memory type on LLC, two on non-LLC.  */
+   pMemoryFdProperties->memoryTypeBits = device->info.has_llc ? 1 : 3;
+
+   return VK_SUCCESS;
 }
 
 void anv_FreeMemory(
diff --git a/src/intel/vulkan/anv_entrypoints_gen.py 
b/src/intel/vulkan/anv_entrypoints_gen.py
index ecddaae818..c62a3bed64 100644
--- a/src/intel/vulkan/anv_entrypoints_gen.py
+++ b/src/intel/vulkan/anv_entrypoints_gen.py
@@ -54,6 +54,7 @@ SUPPORTED_EXTENSIONS = [
 'VK_KHX_external_semaphore_capabilities',
 'VK_KHX_external_semaphore_fd',
 'VK_KHX_multiview',
+'VK_MESAX_external_memory_dma_buf',
 ]
 
 # We generate a static hash table for entry point lookup
diff --git a/src/intel/vulkan/anv_formats.c b/src/intel/vulkan/anv_formats.c
index 813f781927..2f5b7f2518 100644
--- a/src/intel/vulkan/anv_formats.c
+++ b/src/intel/vulkan/anv_formats.c
@@ -657,7 +657,7 @@ VkResult anv_GetPhysicalDeviceImageFormatProperties(
   pImageFormatProperties);
 }
 
-static const VkExternalMemoryPropertiesKHX prime_fd_props = {
+static const VkExternalMemoryPropertiesKHX opaque_fd_props = {
/* If we can handle external, then we can both import and export it. */
.externalMemoryFeatures = VK_EXTERNAL_MEMORY_FEATURE_EXPORTABLE_BIT_KHX |
  VK_EXTERNAL_MEMORY_FEATURE_IMPORTABLE_BIT_KHX,
@@ -668,6 +668,17 @@ static const VkExternalMemoryPropertiesKHX prime_fd_props 
= {
   VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT_KHX,
 };
 
+static const VkExternalMemoryPropertiesKHX dma_buf_mem_props = {
+   /* If we can handle external, then we can both import and export it. */
+   .externalMemoryFeatures = VK_EXTERNAL_MEMORY_FEATURE_EXPORTABLE_BIT_KHX |
+ VK_EXTERNAL_MEMORY_FEATURE_IMPORTABLE_BIT_KHX,
+   /* For the moment, let's not support mixing and matching */
+   .exportFromImportedHandleTypes =
+  VK_EXTERNAL_MEMORY_HANDLE_TYPE_DMA_BUF_BIT_MESAX,
+   .compatibleHandleTypes =
+  VK_EXTERNAL_MEMORY_HANDLE_TYPE_DMA_BUF_BIT_MESAX,
+};
+
 VkResult anv_GetPhysicalDeviceImageFormatProperties2KHR(
 VkPhysicalDevicephysicalDevice,
 const 

[Mesa-dev] [RFC v2 15/23] RFC: anv: Implement VK_EXT_get_image_properties

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

---
 src/intel/vulkan/anv_entrypoints_gen.py |  1 +
 src/intel/vulkan/anv_image.c| 13 +
 2 files changed, 14 insertions(+)

diff --git a/src/intel/vulkan/anv_entrypoints_gen.py 
b/src/intel/vulkan/anv_entrypoints_gen.py
index f1b4b0c95e..ecddaae818 100644
--- a/src/intel/vulkan/anv_entrypoints_gen.py
+++ b/src/intel/vulkan/anv_entrypoints_gen.py
@@ -33,6 +33,7 @@ from mako.template import Template
 MAX_API_VERSION = 1.0
 
 SUPPORTED_EXTENSIONS = [
+'VK_EXT_get_image_properties',
 'VK_KHR_descriptor_update_template',
 'VK_KHR_get_physical_device_properties2',
 'VK_KHR_get_surface_capabilities2',
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 68e3c22ff8..0f130389bd 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -30,6 +30,7 @@
 
 #include "anv_private.h"
 #include "util/debug.h"
+#include "vk_util.h"
 
 #include "vk_format_info.h"
 
@@ -442,6 +443,18 @@ void anv_GetImageSubresourceLayout(
}
 }
 
+VkResult anv_GetImagePropertiesEXT(
+VkDevicedevice_h,
+VkImage image_h,
+VkImagePropertiesEXT*   base_props)
+{
+   vk_foreach_struct(s, base_props->pNext) {
+  anv_debug_ignored_stype(s->sType);
+   }
+
+   return VK_SUCCESS;
+}
+
 /**
  * This function determines the optimal buffer to use for a given
  * VkImageLayout and other pieces of information needed to make that
-- 
2.13.0

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[Mesa-dev] [RFC v2 22/23] RFC: vulkan/wsi: Add modifiers to WSI image creation

[Louis-Francis Ratté-Boulianne]

From: Daniel Stone 

Allow the WSI to provide a set of modifiers to be used along with the
format.

For now, no winsys provides any modifier support. Add a fallback to the
previous default (X-tiling) inside ANV.

RADV remains somewhat broken in the presence of a winsys which will
suggest modifiers, but with a Vulkan driver which is not modifier-aware.
Currently none of the AMD tiling modes have modifier tokens defined, and
forcing to linear would be an unacceptable performance penalty. For now,
just stick our head in the sand.
---
 src/amd/vulkan/radv_wsi.c   |  9 -
 src/intel/vulkan/anv_wsi.c  | 33 +++--
 src/vulkan/wsi/wsi_common.h |  5 -
 src/vulkan/wsi/wsi_common_wayland.c |  6 +-
 src/vulkan/wsi/wsi_common_x11.c | 15 ---
 5 files changed, 56 insertions(+), 12 deletions(-)

diff --git a/src/amd/vulkan/radv_wsi.c b/src/amd/vulkan/radv_wsi.c
index cdb04ca962..72d1cf06b4 100644
--- a/src/amd/vulkan/radv_wsi.c
+++ b/src/amd/vulkan/radv_wsi.c
@@ -141,13 +141,15 @@ static VkResult
 radv_wsi_image_create(VkDevice device_h,
  const VkSwapchainCreateInfoKHR *pCreateInfo,
  const VkAllocationCallbacks* pAllocator,
+ uint64_t *modifiers,
+ int num_modifiers,
  bool needs_linear_copy,
  bool linear,
  VkImage *image_p,
  VkDeviceMemory *memory_p,
  uint32_t *size,
  uint32_t *offset,
- uint32_t *row_pitch, int *fd_p)
+ uint32_t *row_pitch, int *fd_p, uint64_t *modifier)
 {
VkResult result = VK_SUCCESS;
struct radeon_surf *surface;
@@ -155,6 +157,10 @@ radv_wsi_image_create(VkDevice device_h,
struct radv_image *image;
int fd;
 
+   /* FIXME: Square the circle. */
+   assert(!modifiers ||
+  (num_modifiers == 1 && modifiers[0] == DRM_FORMAT_MOD_LINEAR));
+
result = radv_image_create(device_h,
   &(struct radv_image_create_info) {
   .vk_info =
@@ -225,6 +231,7 @@ radv_wsi_image_create(VkDevice device_h,
*size = image->size;
*offset = image->offset;
*row_pitch = surface->u.legacy.level[0].nblk_x * surface->bpe;
+   *modifier = DRM_FORMAT_MOD_INVALID;
return VK_SUCCESS;
  fail_alloc_memory:
radv_FreeMemory(device_h, memory_h, pAllocator);
diff --git a/src/intel/vulkan/anv_wsi.c b/src/intel/vulkan/anv_wsi.c
index bd60a4474a..53ad7d153e 100644
--- a/src/intel/vulkan/anv_wsi.c
+++ b/src/intel/vulkan/anv_wsi.c
@@ -172,17 +172,38 @@ static VkResult
 anv_wsi_image_create(VkDevice device_h,
  const VkSwapchainCreateInfoKHR *pCreateInfo,
  const VkAllocationCallbacks* pAllocator,
+ uint64_t *modifiers,
+ int num_modifiers,
  bool different_gpu,
  bool linear,
  VkImage *image_p,
  VkDeviceMemory *memory_p,
  uint32_t *size,
  uint32_t *offset,
- uint32_t *row_pitch, int *fd_p)
+ uint32_t *row_pitch, int *fd_p, uint64_t *modifier)
 {
struct anv_device *device = anv_device_from_handle(device_h);
VkImage image_h;
struct anv_image *image;
+   VkImageTiling vk_tiling = VK_IMAGE_TILING_LINEAR;
+   int i;
+
+   uint64_t modifiers_fallback[] = { I915_FORMAT_MOD_X_TILED };
+   if (num_modifiers == 0) {
+  modifiers = modifiers_fallback;
+  num_modifiers = ARRAY_SIZE(modifiers_fallback);
+   }
+
+   /* XXX: Retconning the VkImageTiling from modifiers is a bit hairy, because
+*  the actual ISL tiling/aux selection happens further down, which may
+*  filter the modes out and return linear even though we suggest a
+*  tiling mode. */
+   for (i = 0; i < num_modifiers; i++) {
+  enum isl_tiling t;
+  enum isl_aux_usage a;
+  if (isl_tiling_from_drm_format_mod(modifiers[i], , ))
+ vk_tiling = VK_IMAGE_TILING_OPTIMAL;
+   }
 
VkResult result;
result = anv_CreateImage(anv_device_to_handle(device),
@@ -199,7 +220,7 @@ anv_wsi_image_create(VkDevice device_h,
  .arrayLayers = 1,
  .samples = 1,
  /* FIXME: Need a way to use X tiling to allow scanout */
- .tiling = VK_IMAGE_TILING_OPTIMAL,
+ .tiling = vk_tiling,
  .usage = (pCreateInfo->imageUsage |
VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT),
  .flags = 0,
@@ -210,10 +231,8 @@ anv_wsi_image_create(VkDevice device_h,
  .pNext =
   &(VkExportImageDmaBufInfoMESAX) {
  .sType = VK_STRUCTURE_TYPE_EXPORT_IMAGE_DMA_BUF_INFO_MESAX,
- .drmFormatModifierCount = 1,
- 

[Mesa-dev] [RFC v2 23/23] RFC: vulkan/wsi: Add support for DRI3 v1.1

[Louis-Francis Ratté-Boulianne]

From: Daniel Stone 

Adds support for multiple planes and buffer modifiers.
---
 src/intel/vulkan/anv_wsi.c  |   7 +-
 src/vulkan/wsi/wsi_common_x11.c | 137 
 2 files changed, 131 insertions(+), 13 deletions(-)

diff --git a/src/intel/vulkan/anv_wsi.c b/src/intel/vulkan/anv_wsi.c
index 53ad7d153e..ca5611666e 100644
--- a/src/intel/vulkan/anv_wsi.c
+++ b/src/intel/vulkan/anv_wsi.c
@@ -201,8 +201,11 @@ anv_wsi_image_create(VkDevice device_h,
for (i = 0; i < num_modifiers; i++) {
   enum isl_tiling t;
   enum isl_aux_usage a;
-  if (isl_tiling_from_drm_format_mod(modifiers[i], , ))
+  if (modifiers[i] != DRM_FORMAT_MOD_LINEAR &&
+  isl_tiling_from_drm_format_mod(modifiers[i], , )) {
  vk_tiling = VK_IMAGE_TILING_OPTIMAL;
+break;
+  }
}
 
VkResult result;
@@ -231,7 +234,7 @@ anv_wsi_image_create(VkDevice device_h,
  .pNext =
   &(VkExportImageDmaBufInfoMESAX) {
  .sType = VK_STRUCTURE_TYPE_EXPORT_IMAGE_DMA_BUF_INFO_MESAX,
- .drmFormatModifierCount = ARRAY_SIZE(modifiers),
+ .drmFormatModifierCount = num_modifiers,
  .pDrmFormatModifiers = modifiers,
   }}},
   NULL,
diff --git a/src/vulkan/wsi/wsi_common_x11.c b/src/vulkan/wsi/wsi_common_x11.c
index f12583db13..a8201a1601 100644
--- a/src/vulkan/wsi/wsi_common_x11.c
+++ b/src/vulkan/wsi/wsi_common_x11.c
@@ -36,6 +36,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "util/hash_table.h"
 
 #include "vk_util.h"
@@ -43,6 +44,10 @@
 #include "wsi_common_x11.h"
 #include "wsi_common_queue.h"
 
+#ifndef DRM_FORMAT_MOD_INVALID
+#define DRM_FORMAT_MOD_INVALID (1ULL<<56)-1
+#endif
+
 #define typed_memcpy(dest, src, count) ({ \
STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
memcpy((dest), (src), (count) * sizeof(*(src))); \
@@ -50,6 +55,7 @@
 
 struct wsi_x11_connection {
bool has_dri3;
+   bool has_dri3_v1_1;
bool has_present;
bool is_proprietary_x11;
 };
@@ -164,6 +170,16 @@ wsi_x11_connection_create(const VkAllocationCallbacks 
*alloc,
}
 
wsi_conn->has_dri3 = dri3_reply->present != 0;
+   if (wsi_conn->has_dri3) {
+  xcb_dri3_query_version_cookie_t ver_cookie;
+  xcb_dri3_query_version_reply_t *ver_reply;
+
+  ver_cookie = xcb_dri3_query_version(conn, 1, 1);
+  ver_reply = xcb_dri3_query_version_reply(conn, ver_cookie, NULL);
+  wsi_conn->has_dri3_v1_1 = ver_reply->major_version > 1 ||
+ver_reply->minor_version >= 1;
+   }
+
wsi_conn->has_present = pres_reply->present != 0;
wsi_conn->is_proprietary_x11 = false;
if (amd_reply && amd_reply->present)
@@ -247,6 +263,22 @@ static const VkPresentModeKHR present_modes[] = {
VK_PRESENT_MODE_FIFO_KHR,
 };
 
+static uint32_t
+vk_format_to_fourcc(VkFormat vk_format, VkCompositeAlphaFlagsKHR vk_alpha)
+{
+   bool is_alpha = (vk_alpha == VK_COMPOSITE_ALPHA_PRE_MULTIPLIED_BIT_KHR);
+
+   /* XXX: Real lookup table. */
+   switch (vk_format) {
+   case VK_FORMAT_B8G8R8A8_UNORM:
+   case VK_FORMAT_B8G8R8A8_SRGB:
+  return is_alpha ? DRM_FORMAT_ARGB : DRM_FORMAT_XRGB;
+  break;
+   default:
+  unreachable("unknown format in vk_format_to_fourcc");
+   }
+}
+
 static xcb_screen_t *
 get_screen_for_root(xcb_connection_t *conn, xcb_window_t root)
 {
@@ -628,6 +660,8 @@ struct x11_image {
 struct x11_swapchain {
struct wsi_swapchainbase;
 
+   bool has_dri3_v1_1;
+
xcb_connection_t *   conn;
xcb_window_t window;
xcb_gc_t gc;
@@ -966,7 +1000,9 @@ x11_image_init(VkDevice device_h, struct x11_swapchain 
*chain,
uint32_t bpp = 32;
int fd;
uint32_t size;
-   uint64_t modifier;
+   uint32_t fourcc = vk_format_to_fourcc(pCreateInfo->imageFormat,
+ pCreateInfo->compositeAlpha);
+   uint64_t modifier = DRM_FORMAT_MOD_INVALID;
 
result = chain->base.image_fns->create_wsi_image(device_h,
 pCreateInfo,
@@ -1009,15 +1045,36 @@ x11_image_init(VkDevice device_h, struct x11_swapchain 
*chain,
 
image->pixmap = xcb_generate_id(chain->conn);
 
-   cookie =
-  xcb_dri3_pixmap_from_buffer_checked(chain->conn,
-  image->pixmap,
-  chain->window,
-  size,
-  pCreateInfo->imageExtent.width,
-  pCreateInfo->imageExtent.height,
-  row_pitch,
-  chain->depth, bpp, fd);
+#if XCB_DRI3_MAJOR_VERSION > 1 || XCB_DRI3_MINOR_VERSION >= 1
+   if (chain->has_dri3_v1_1 && modifier != DRM_FORMAT_MOD_INVALID) {
+  

[Mesa-dev] [RFC v2 20/23] RFC: anv: Drop unused anv_image_create()

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

---
 src/intel/vulkan/anv_image.c   | 26 ++
 src/intel/vulkan/anv_private.h |  5 -
 2 files changed, 6 insertions(+), 25 deletions(-)

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 1a61a7b554..287f20d769 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -392,13 +392,13 @@ make_main_surface(const struct anv_device *dev,
 }
 
 VkResult
-anv_image_create(VkDevice _device,
- const struct anv_image_create_info *anv_info,
- const VkAllocationCallbacks* alloc,
- VkImage *pImage)
+anv_CreateImage(VkDevice _device,
+const VkImageCreateInfo *base_info,
+const VkAllocationCallbacks* alloc,
+VkImage *pImage)
 {
ANV_FROM_HANDLE(anv_device, device, _device);
-   const VkImageCreateInfo *base_info = anv_info->vk_info;
+   const struct anv_image_create_info anv_info = { .vk_info = base_info };
const VkImportImageDmaBufInfoMESAX *import_dma_buf_info = NULL;
const VkExportImageDmaBufInfoMESAX *export_dma_buf_info = NULL;
VkExternalMemoryHandleTypeFlagsKHX handle_types = 0;
@@ -456,7 +456,7 @@ anv_image_create(VkDevice _device,
uint32_t b;
for_each_bit(b, image->aspects) {
   VkImageAspectFlagBits aspect = 1 << b;
-  make_main_surface(device, anv_info, import_dma_buf_info,
+  make_main_surface(device, _info, import_dma_buf_info,
 export_dma_buf_info, aspect, handle_types, image);
   make_aux_surface_maybe(device, base_info, aspect, handle_types, image);
}
@@ -466,20 +466,6 @@ anv_image_create(VkDevice _device,
return VK_SUCCESS;
 }
 
-VkResult
-anv_CreateImage(VkDevice device,
-const VkImageCreateInfo *pCreateInfo,
-const VkAllocationCallbacks *pAllocator,
-VkImage *pImage)
-{
-   return anv_image_create(device,
-  &(struct anv_image_create_info) {
- .vk_info = pCreateInfo,
-  },
-  pAllocator,
-  pImage);
-}
-
 void
 anv_DestroyImage(VkDevice _device, VkImage _image,
  const VkAllocationCallbacks *pAllocator)
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 722d9197cb..402daa8ab0 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -2220,11 +2220,6 @@ struct anv_image_create_info {
uint32_t stride;
 };
 
-VkResult anv_image_create(VkDevice _device,
-  const struct anv_image_create_info *info,
-  const VkAllocationCallbacks* alloc,
-  VkImage *pImage);
-
 const struct anv_surface *
 anv_image_get_surface_for_aspect_mask(const struct anv_image *image,
   VkImageAspectFlags aspect_mask);
-- 
2.13.0

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[Mesa-dev] [RFC v2 18/23] RFC: anv: Drop vkCreateDmaBufImageINTEL()

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

This "extension" function predates Vulkan 1.0 and Vulkan WSI. We created
it during the early days of bringing up the Vulkan driver. We used it
for testing the early driver because, in those early days, there was no
other way to import/export a tiled VkImage and examine it. No
VkSurfaceKHR existed yet in the early API.

We never created a extension for this function.

Since there is no extension, the validation layers don't understand it.
I've observed the validation layers crash when this function is called.

We now support a real dma_buf extension,
VK_MESAX_external_image_dma_buf, that can replace this function.
---
 include/vulkan/vulkan_intel.h   |  62 --
 src/intel/Makefile.sources  |   1 -
 src/intel/vulkan/Makefile.am| 210 
 src/intel/vulkan/Makefile.sources   |  84 +
 src/intel/vulkan/anv_entrypoints_gen.py |  10 --
 src/intel/vulkan/anv_intel.c|  99 ---
 src/intel/vulkan/anv_private.h  |   1 -
 7 files changed, 294 insertions(+), 173 deletions(-)
 delete mode 100644 include/vulkan/vulkan_intel.h
 create mode 100644 src/intel/vulkan/Makefile.am
 create mode 100644 src/intel/vulkan/Makefile.sources
 delete mode 100644 src/intel/vulkan/anv_intel.c

diff --git a/include/vulkan/vulkan_intel.h b/include/vulkan/vulkan_intel.h
deleted file mode 100644
index 8ede61b53d..00
--- a/include/vulkan/vulkan_intel.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright © 2015 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-
-#ifndef __VULKAN_INTEL_H__
-#define __VULKAN_INTEL_H__
-
-#include "vulkan.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif // __cplusplus
-
-#define VK_STRUCTURE_TYPE_DMA_BUF_IMAGE_CREATE_INFO_INTEL 1024
-typedef struct VkDmaBufImageCreateInfo_
-{
-VkStructureType sType;  // 
Must be VK_STRUCTURE_TYPE_DMA_BUF_IMAGE_CREATE_INFO_INTEL
-const void* pNext;  // 
Pointer to next structure.
-int fd;
-VkFormatformat;
-VkExtent3D  extent; // Depth must 
be 1
-uint32_tstrideInBytes;
-} VkDmaBufImageCreateInfo;
-
-typedef VkResult (VKAPI_PTR *PFN_vkCreateDmaBufImageINTEL)(VkDevice device, 
const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* 
pAllocator, VkDeviceMemory* pMem, VkImage* pImage);
-
-#ifndef VK_NO_PROTOTYPES
-
-VKAPI_ATTR VkResult VKAPI_CALL vkCreateDmaBufImageINTEL(
-VkDevice_device,
-const VkDmaBufImageCreateInfo*  pCreateInfo,
-const VkAllocationCallbacks*pAllocator,
-VkDeviceMemory* pMem,
-VkImage*pImage);
-
-#endif
-
-#ifdef __cplusplus
-} // extern "C"
-#endif // __cplusplus
-
-#endif // __VULKAN_INTEL_H__
diff --git a/src/intel/Makefile.sources b/src/intel/Makefile.sources
index b672e615c5..ea9496510c 100644
--- a/src/intel/Makefile.sources
+++ b/src/intel/Makefile.sources
@@ -213,7 +213,6 @@ VULKAN_FILES := \
vulkan/anv_formats.c \
vulkan/anv_genX.h \
vulkan/anv_image.c \
-   vulkan/anv_intel.c \
vulkan/anv_nir.h \
vulkan/anv_nir_apply_pipeline_layout.c \
vulkan/anv_nir_lower_input_attachments.c \
diff --git a/src/intel/vulkan/Makefile.am b/src/intel/vulkan/Makefile.am
new file mode 100644
index 00..58c81319fa
--- /dev/null
+++ b/src/intel/vulkan/Makefile.am
@@ -0,0 +1,210 @@
+# Copyright © 2015 Intel Corporation
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated 

[Mesa-dev] [RFC v2 14/23] RFC: vulkan: Update registry for MESAX dma_buf extensions

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

Update vulkan.h and vk.xml from [1]:
  git://github.com/chadversary/vulkan-spec
  refs/tags/chadv/test/2017-03-06-VK_MESAX_external

This pulls in the following extensions:
  - VK_EXT_get_image_properties
  - VK_MESAX_external_memory_dma_buf
  - VK_MESAX_external_image_dma_buf

WARNING: These extension are still drafts. Khronos has not yet merged
them into the Vulkan spec. Up-to-date extension drafts and headers are
in my work-in-progress branch [2].

Reference[1]: 
https://github.com/chadversary/vulkan-spec/commits/chadv/test/2017-03-06-VK_MESAX_external
Reference[2]: 
https://github.com/chadversary/vulkan-spec/commits/wip/1.0-VK_MESAX_external
---
 include/vulkan/vulkan.h| 104 
 src/vulkan/registry/vk.xml | 117 -
 2 files changed, 209 insertions(+), 12 deletions(-)

diff --git a/include/vulkan/vulkan.h b/include/vulkan/vulkan.h
index 51e5e9e313..dd8c8b40f6 100644
--- a/include/vulkan/vulkan.h
+++ b/include/vulkan/vulkan.h
@@ -304,6 +304,13 @@ typedef enum VkStructureType {
 VK_STRUCTURE_TYPE_SURFACE_FORMAT_2_KHR = 1000119002,
 VK_STRUCTURE_TYPE_IOS_SURFACE_CREATE_INFO_MVK = 1000122000,
 VK_STRUCTURE_TYPE_MACOS_SURFACE_CREATE_INFO_MVK = 1000123000,
+VK_STRUCTURE_TYPE_DMA_BUF_FORMAT_PROPERTIES_MESAX = 1000126000,
+VK_STRUCTURE_TYPE_DMA_BUF_IMAGE_FORMAT_PROPERTIES_MESAX = 1000126001,
+VK_STRUCTURE_TYPE_IMPORT_IMAGE_DMA_BUF_INFO_MESAX = 1000126002,
+VK_STRUCTURE_TYPE_EXPORT_IMAGE_DMA_BUF_INFO_MESAX = 1000126003,
+VK_STRUCTURE_TYPE_IMAGE_PROPERTIES_MESAX = 1000126004,
+VK_STRUCTURE_TYPE_IMAGE_DMA_BUF_PROPERTIES_MESAX = 1000126005,
+VK_STRUCTURE_TYPE_IMAGE_PROPERTIES_EXT = 1000199000,
 VK_STRUCTURE_TYPE_BEGIN_RANGE = VK_STRUCTURE_TYPE_APPLICATION_INFO,
 VK_STRUCTURE_TYPE_END_RANGE = VK_STRUCTURE_TYPE_LOADER_DEVICE_CREATE_INFO,
 VK_STRUCTURE_TYPE_RANGE_SIZE = 
(VK_STRUCTURE_TYPE_LOADER_DEVICE_CREATE_INFO - 
VK_STRUCTURE_TYPE_APPLICATION_INFO + 1),
@@ -4940,6 +4947,7 @@ typedef enum VkExternalMemoryHandleTypeFlagBitsKHX {
 VK_EXTERNAL_MEMORY_HANDLE_TYPE_D3D11_TEXTURE_KMT_BIT_KHX = 0x0010,
 VK_EXTERNAL_MEMORY_HANDLE_TYPE_D3D12_HEAP_BIT_KHX = 0x0020,
 VK_EXTERNAL_MEMORY_HANDLE_TYPE_D3D12_RESOURCE_BIT_KHX = 0x0040,
+VK_EXTERNAL_MEMORY_HANDLE_TYPE_DMA_BUF_BIT_MESAX = 0x0002,
 VK_EXTERNAL_MEMORY_HANDLE_TYPE_FLAG_BITS_MAX_ENUM_KHX = 0x7FFF
 } VkExternalMemoryHandleTypeFlagBitsKHX;
 typedef VkFlags VkExternalMemoryHandleTypeFlagsKHX;
@@ -5919,6 +5927,102 @@ VKAPI_ATTR VkResult VKAPI_CALL vkCreateMacOSSurfaceMVK(
 #endif
 #endif /* VK_USE_PLATFORM_MACOS_MVK */
 
+#define VK_MESAX_external_memory_dma_buf 1
+#define VK_MESAX_EXTERNAL_MEMORY_DMA_BUF_SPEC_VERSION 0
+#define VK_MESAX_EXTERNAL_MEMORY_DMA_BUF_EXTENSION_NAME 
"VK_MESAX_external_memory_dma_buf"
+
+
+#define VK_MESAX_external_image_dma_buf 1
+#define VK_MESAX_EXTERNAL_IMAGE_DMA_BUF_SPEC_VERSION 0
+#define VK_MESAX_EXTERNAL_IMAGE_DMA_BUF_EXTENSION_NAME 
"VK_MESAX_external_image_dma_buf"
+
+typedef struct VkDmaBufFormatModifierPropertiesMESAX {
+uint64_tdrmFormatModifier;
+VkFormatFeatureFlagsimageFeatures;
+} VkDmaBufFormatModifierPropertiesMESAX;
+
+typedef struct VkDmaBufFormatPropertiesMESAX {
+VkStructureType   sType;
+void* pNext;
+uint32_t  modifierCount;
+VkDmaBufFormatModifierPropertiesMESAX*pModifierProperties;
+} VkDmaBufFormatPropertiesMESAX;
+
+typedef struct VkDmaBufImageFormatModifierPropertiesMESAX {
+uint64_t   drmFormatModifier;
+VkDeviceSize   maxRowPitch;
+VkDeviceSize   rowPitchAlignment;
+VkImageFormatPropertiesimageFormatProperties;
+} VkDmaBufImageFormatModifierPropertiesMESAX;
+
+typedef struct VkDmaBufImageFormatPropertiesMESAX {
+VkStructureTypesType;
+void*  pNext;
+uint32_t   modifierCount;
+VkDmaBufImageFormatModifierPropertiesMESAX*pModifierProperties;
+} VkDmaBufImageFormatPropertiesMESAX;
+
+typedef struct VkImportImageDmaBufPlaneInfoMESAX {
+VkDeviceSizeoffset;
+VkDeviceSizesize;
+VkDeviceSizerowPitch;
+} VkImportImageDmaBufPlaneInfoMESAX;
+
+typedef struct VkImportImageDmaBufInfoMESAX {
+VkStructureType sType;
+const void* pNext;
+uint64_tdrmFormatModifier;
+uint32_tplaneCount;
+const VkImportImageDmaBufPlaneInfoMESAX*pPlanes;
+} VkImportImageDmaBufInfoMESAX;
+
+typedef struct VkExportImageDmaBufInfoMESAX {
+VkStructureTypesType;
+const void*pNext;
+uint32_t   

[Mesa-dev] [RFC v2 12/23] anv: Handle failure in make_hiz_surface_maybe()

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

make_ccs_surface_maybe() correctly handles failure
isl_surf_get_ccs_surf(). When it fails, the resultant VkImage is still
valid, just without a ccs surface.

Same of make_mcs_surface_maybe() and isl_surf_get_mcs_surf().

Fix make_hiz_surface_maybe() to do the same.
---
 src/intel/vulkan/anv_image.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 6399f2b394..73e9d55250 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -162,7 +162,9 @@ make_hiz_surface_maybe(const struct anv_device *dev,
} else {
   ok = isl_surf_get_hiz_surf(>isl_dev, >depth_surface.isl,
  >aux_surface.isl);
-  assert(ok);
+  if (!ok)
+ return;
+
   add_surface(image, >aux_surface);
   image->aux_usage = ISL_AUX_USAGE_HIZ;
}
-- 
2.13.0

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[Mesa-dev] [RFC v2 11/23] anv/image: Refactor creation of aux surfaces

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

Creation of hiz, ccs, and mcs surfaces was encoded by a giant 'if' tree
at the tail of make_surface(). This patch extracts that 'if' tree into
the new functions:

make_hiz_surface_maybe()
make_ccs_surface_maybe()
make_mcs_surface_maybe()

For clarity, also rename make_surface() to make_main_surface().
---
 src/intel/vulkan/anv_image.c | 178 ++-
 1 file changed, 110 insertions(+), 68 deletions(-)

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index de4f9af983..6399f2b394 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -132,6 +132,109 @@ add_surface(struct anv_image *image, struct anv_surface 
*surf)
image->alignment = MAX2(image->alignment, surf->isl.alignment);
 }
 
+static void
+make_hiz_surface_maybe(const struct anv_device *dev,
+   const VkImageCreateInfo *base_info,
+   struct anv_image *image)
+{
+   bool ok;
+
+   assert(image->aux_surface.isl.size == 0);
+   assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
+
+   if (unlikely(INTEL_DEBUG & DEBUG_NO_HIZ))
+  return;
+
+   /* Allow the user to control HiZ enabling through environment variables.
+* Disable by default on gen7 because resolves are not currently
+* implemented pre-BDW.
+*/
+   if (!(image->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) {
+  /* It will never be used as an attachment, HiZ is pointless. */
+   } else if (dev->info.gen == 7) {
+  anv_perf_warn("Implement gen7 HiZ");
+   } else if (base_info->mipLevels > 1) {
+  anv_finishme("Enable multi-LOD HiZ");
+   } else if (base_info->arrayLayers > 1) {
+  anv_finishme("Implement multi-arrayLayer HiZ clears and resolves");
+   } else if (dev->info.gen == 8 && base_info->samples > 1) {
+  anv_finishme("Test gen8 multisampled HiZ");
+   } else {
+  ok = isl_surf_get_hiz_surf(>isl_dev, >depth_surface.isl,
+ >aux_surface.isl);
+  assert(ok);
+  add_surface(image, >aux_surface);
+  image->aux_usage = ISL_AUX_USAGE_HIZ;
+   }
+}
+
+static void
+make_ccs_surface_maybe(const struct anv_device *dev,
+   const VkImageCreateInfo *base_info,
+   struct anv_image *image)
+{
+   bool ok;
+
+   assert(image->aux_surface.isl.size == 0);
+
+   if (unlikely(INTEL_DEBUG & DEBUG_NO_RBC))
+  return;
+
+   ok = isl_surf_get_ccs_surf(>isl_dev, >color_surface.isl,
+  >aux_surface.isl);
+   if (!ok)
+  return;
+
+   add_surface(image, >aux_surface);
+
+   /* For images created without MUTABLE_FORMAT_BIT set, we know that they will
+* always be used with the original format.  In particular, they will always
+* be used with a format that supports color compression.  If it's never
+* used as a storage image, then it will only be used through the sampler or
+* the as a render target.  This means that it's safe to just leave
+* compression on at all times for these formats.
+*/
+   if (!(base_info->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
+   !(base_info->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) &&
+   isl_format_supports_ccs_e(>info, image->color_surface.isl.format)) 
{
+  image->aux_usage = ISL_AUX_USAGE_CCS_E;
+   }
+}
+
+static void
+make_mcs_surface_maybe(const struct anv_device *dev,
+   const VkImageCreateInfo *base_info,
+   struct anv_image *image)
+{
+   bool ok;
+
+   assert(image->aux_surface.isl.size == 0);
+   assert(!(base_info->usage & VK_IMAGE_USAGE_STORAGE_BIT));
+
+   ok = isl_surf_get_mcs_surf(>isl_dev, >color_surface.isl,
+  >aux_surface.isl);
+   if (!ok)
+  return;
+
+   add_surface(image, >aux_surface);
+   image->aux_usage = ISL_AUX_USAGE_MCS;
+}
+
+static void
+make_aux_surface_maybe(const struct anv_device *dev,
+   const VkImageCreateInfo *base_info,
+   VkImageAspectFlags aspect,
+   struct anv_image *image)
+{
+   if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
+  make_hiz_surface_maybe(dev, base_info, image);
+   } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && base_info->samples == 1) {
+  make_ccs_surface_maybe(dev, base_info, image);
+   } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && base_info->samples > 1) {
+  make_mcs_surface_maybe(dev, base_info, image);
+   }
+}
+
 /**
  * Initialize the anv_image::*_surface selected by \a aspect. Then update the
  * image's memory requirements (that is, the image's size and alignment).
@@ -139,10 +242,10 @@ add_surface(struct anv_image *image, struct anv_surface 
*surf)
  * Exactly one bit must be set in \a aspect.
  */
 static void
-make_surface(const struct anv_device *dev,
- struct anv_image *image,
- const struct anv_image_create_info *anv_info,
- 

[Mesa-dev] [RFC v2 10/23] anv/image: Fix return type of make_surface()

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

make_surface() always returns VK_SUCCESS, so change its return type to
'void'. This simplifies the return-code handling in
anv_image_create_info() and removes a goto.
---
 src/intel/vulkan/anv_image.c | 15 ++-
 1 file changed, 2 insertions(+), 13 deletions(-)

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index a440dd391b..de4f9af983 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -138,7 +138,7 @@ add_surface(struct anv_image *image, struct anv_surface 
*surf)
  *
  * Exactly one bit must be set in \a aspect.
  */
-static VkResult
+static void
 make_surface(const struct anv_device *dev,
  struct anv_image *image,
  const struct anv_image_create_info *anv_info,
@@ -246,8 +246,6 @@ make_surface(const struct anv_device *dev,
  image->aux_usage = ISL_AUX_USAGE_MCS;
   }
}
-
-   return VK_SUCCESS;
 }
 
 VkResult
@@ -259,7 +257,6 @@ anv_image_create(VkDevice _device,
ANV_FROM_HANDLE(anv_device, device, _device);
const VkImageCreateInfo *base_info = anv_info->vk_info;
struct anv_image *image = NULL;
-   VkResult r;
 
assert(base_info->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
 
@@ -289,20 +286,12 @@ anv_image_create(VkDevice _device,
 
uint32_t b;
for_each_bit(b, image->aspects) {
-  r = make_surface(device, image, anv_info, (1 << b));
-  if (r != VK_SUCCESS)
- goto fail;
+  make_surface(device, image, anv_info, (1 << b));
}
 
*pImage = anv_image_to_handle(image);
 
return VK_SUCCESS;
-
-fail:
-   if (image)
-  vk_free2(>alloc, alloc, image);
-
-   return r;
 }
 
 VkResult
-- 
2.13.0

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[Mesa-dev] [RFC v2 04/23] intel/isl: Add ISL <-> GEM tiling conversion

[Louis-Francis Ratté-Boulianne]

From: Daniel Stone 

Add a simple conversion from ISL tiling to GEM BO tiling flags, and use
that instead of hardcoding I915_TILING_X in the ANV WSI.

Signed-off-by: Daniel Stone 
---
 src/intel/isl/isl.c| 28 
 src/intel/isl/isl.h|  8 
 src/intel/vulkan/anv_wsi.c |  6 +++---
 3 files changed, 39 insertions(+), 3 deletions(-)

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 72b20b27af..19aa2bac33 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -27,6 +27,7 @@
 
 #include "genxml/genX_bits.h"
 #include 
+#include 
 
 #include "isl.h"
 #include "isl_gen4.h"
@@ -107,6 +108,33 @@ isl_tiling_to_drm_format_mod(enum isl_tiling tiling,
unreachable("unknown tiling in isl_tiling_to_drm_format_mod");
 }
 
+bool
+isl_tiling_to_gem_tiling(enum isl_tiling isl, enum isl_aux_usage aux_usage,
+ uint32_t *gem)
+{
+   switch (isl) {
+   case ISL_TILING_LINEAR:
+  *gem = I915_TILING_NONE;
+  return true;
+   case ISL_TILING_X:
+  *gem = I915_TILING_X;
+  return true;
+   case ISL_TILING_Y0:
+  if (aux_usage != ISL_AUX_USAGE_NONE && aux_usage != ISL_AUX_USAGE_CCS_E)
+ return false;
+  *gem = I915_TILING_Y;
+  return true;
+   case ISL_TILING_Yf:
+   case ISL_TILING_Ys:
+   case ISL_TILING_W:
+   case ISL_TILING_HIZ:
+   case ISL_TILING_CCS:
+  return false;
+   }
+
+   unreachable("unknown tiling in isl_tiling_to_gem_tiling");
+}
+
 void
 isl_device_init(struct isl_device *dev,
 const struct gen_device_info *info,
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index be2b9886ac..69140c44a8 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -1498,6 +1498,14 @@ bool isl_tiling_from_drm_format_mod(uint64_t mod,
 uint64_t isl_tiling_to_drm_format_mod(enum isl_tiling tiling,
   enum isl_aux_usage aux_usage);
 
+/**
+ * Map an ISL tiling/aux pair to a GEM tiling enum. If the ISL tiling/aux mode
+ * is not exportable, return false. The output parameters are only written on
+ * success.
+ */
+bool isl_tiling_to_gem_tiling(enum isl_tiling isl, enum isl_aux_usage 
aux_usage,
+  uint32_t *gem_tiling);
+
 static inline bool
 isl_tiling_is_any_y(enum isl_tiling tiling)
 {
diff --git a/src/intel/vulkan/anv_wsi.c b/src/intel/vulkan/anv_wsi.c
index 9369f26a8f..38e4af2c1a 100644
--- a/src/intel/vulkan/anv_wsi.c
+++ b/src/intel/vulkan/anv_wsi.c
@@ -241,11 +241,11 @@ anv_wsi_image_create(VkDevice device_h,
anv_BindImageMemory(device_h, image_h, memory_h, 0);
 
struct anv_surface *surface = >color_surface;
-   assert(surface->isl.tiling == ISL_TILING_X);
-
+   uint32_t gem_tiling = I915_TILING_NONE;
+   isl_tiling_to_gem_tiling(surface->isl.tiling, image->aux_usage, 
_tiling);
*row_pitch = surface->isl.row_pitch;
int ret = anv_gem_set_tiling(device, memory->bo->gem_handle,
-surface->isl.row_pitch, I915_TILING_X);
+surface->isl.row_pitch, gem_tiling);
if (ret) {
   /* FINISHME: Choose a better error. */
   result = vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY,
-- 
2.13.0

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[Mesa-dev] [RFC v2 08/23] anv/image: Better var names in vkCreateImage

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

- Rename the anv_image_create_info vars from 'create_info' to 'anv_info'.
- Rename the VkImageCreateInfo vars from 'pCreateInfo' and 'vk_info' to
  'base_info'.

This reduces the diff and eliminates ambiguity in follow-up patches for
upcoming extensions, because the extensions define yet more "create
info" structs.
---
 src/intel/vulkan/anv_image.c | 72 ++--
 1 file changed, 36 insertions(+), 36 deletions(-)

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index c84fc8ddea..48f50d8ce8 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -127,7 +127,7 @@ make_surface(const struct anv_device *dev,
  const struct anv_image_create_info *anv_info,
  VkImageAspectFlags aspect)
 {
-   const VkImageCreateInfo *vk_info = anv_info->vk_info;
+   const VkImageCreateInfo *base_info = anv_info->vk_info;
bool ok UNUSED;
 
static const enum isl_surf_dim vk_to_isl_surf_dim[] = {
@@ -140,7 +140,7 @@ make_surface(const struct anv_device *dev,
 * result with an optionally provided ISL tiling argument.
 */
isl_tiling_flags_t tiling_flags =
-  (vk_info->tiling == VK_IMAGE_TILING_LINEAR) ?
+  (base_info->tiling == VK_IMAGE_TILING_LINEAR) ?
   ISL_TILING_LINEAR_BIT : ISL_TILING_ANY_MASK;
 
if (anv_info->isl_tiling_flags)
@@ -150,22 +150,22 @@ make_surface(const struct anv_device *dev,
 
struct anv_surface *anv_surf = get_surface(image, aspect);
 
-   image->extent = anv_sanitize_image_extent(vk_info->imageType,
- vk_info->extent);
+   image->extent = anv_sanitize_image_extent(base_info->imageType,
+ base_info->extent);
 
-   enum isl_format format = anv_get_isl_format(>info, vk_info->format,
-   aspect, vk_info->tiling);
+   enum isl_format format = anv_get_isl_format(>info, base_info->format,
+   aspect, base_info->tiling);
assert(format != ISL_FORMAT_UNSUPPORTED);
 
ok = isl_surf_init(>isl_dev, _surf->isl,
-  .dim = vk_to_isl_surf_dim[vk_info->imageType],
+  .dim = vk_to_isl_surf_dim[base_info->imageType],
   .format = format,
   .width = image->extent.width,
   .height = image->extent.height,
   .depth = image->extent.depth,
-  .levels = vk_info->mipLevels,
-  .array_len = vk_info->arrayLayers,
-  .samples = vk_info->samples,
+  .levels = base_info->mipLevels,
+  .array_len = base_info->arrayLayers,
+  .samples = base_info->samples,
   .min_alignment = 0,
   .row_pitch = anv_info->stride,
   .usage = choose_isl_surf_usage(image->usage, aspect),
@@ -193,11 +193,11 @@ make_surface(const struct anv_device *dev,
  /* It will never be used as an attachment, HiZ is pointless. */
   } else if (dev->info.gen == 7) {
  anv_perf_warn("Implement gen7 HiZ");
-  } else if (vk_info->mipLevels > 1) {
+  } else if (base_info->mipLevels > 1) {
  anv_perf_warn("Enable multi-LOD HiZ");
-  } else if (vk_info->arrayLayers > 1) {
+  } else if (base_info->arrayLayers > 1) {
  anv_perf_warn("Implement multi-arrayLayer HiZ clears and resolves");
-  } else if (dev->info.gen == 8 && vk_info->samples > 1) {
+  } else if (dev->info.gen == 8 && base_info->samples > 1) {
  anv_perf_warn("Enable gen8 multisampled HiZ");
   } else if (!unlikely(INTEL_DEBUG & DEBUG_NO_HIZ)) {
  assert(image->aux_surface.isl.size == 0);
@@ -207,7 +207,7 @@ make_surface(const struct anv_device *dev,
  add_surface(image, >aux_surface);
  image->aux_usage = ISL_AUX_USAGE_HIZ;
   }
-   } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples == 1) {
+   } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && base_info->samples == 1) {
   if (!unlikely(INTEL_DEBUG & DEBUG_NO_RBC)) {
  assert(image->aux_surface.isl.size == 0);
  ok = isl_surf_get_ccs_surf(>isl_dev, _surf->isl,
@@ -223,16 +223,16 @@ make_surface(const struct anv_device *dev,
  * a render target.  This means that it's safe to just leave
  * compression on at all times for these formats.
  */
-if (!(vk_info->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
-!(vk_info->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) &&
+if (!(base_info->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
+!(base_info->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) &&
 isl_format_supports_ccs_e(>info, format)) {
image->aux_usage = ISL_AUX_USAGE_CCS_E;
 }
  }
   }
-   } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples > 1) {
+   } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && base_info->samples > 1) {
   assert(image->aux_surface.isl.size == 

[Mesa-dev] [RFC v2 00/23] DRI3 v1.1, ANV dmabuf

[Louis-Francis Ratté-Boulianne]

Hi,

Please see the previous submission email for context:
https://lists.freedesktop.org/archives/mesa-dev/2017-June/158457.html

This version mainly fixes small issues with the DRI3 v1.1
patches as suggested by Emil Velikov and Matt Turner.

--
Louis-Francis

Chad Versace (18):
  intel/isl: Add ISL <-> DRM modifier conversion
  isl: Add isl_surf_get_drm_format_mod()
  anv: Add func anv_get_raw_format()
  anv: Annotate anv_get_*format() as pure
  anv/image: Better var names in vkCreateImage
  anv/image: Refactor how tiling is chosen
  anv/image: Fix return type of make_surface()
  anv/image: Refactor creation of aux surfaces
  anv: Handle failure in make_hiz_surface_maybe()
  anv: Set anv_surface::offset earlier
  RFC: vulkan: Update registry for MESAX dma_buf extensions
  RFC: anv: Implement VK_EXT_get_image_properties
  RFC: anv: Implement VK_MESAX_external_memory_dma_buf
  RFC: anv: Implement VK_MESAX_external_image_dma_buf
  RFC: anv: Drop vkCreateDmaBufImageINTEL()
  RFC: anv/wsi: Use VK_MESAX_external_image_dma_buf
  RFC: anv: Drop unused anv_image_create()
  RFC: anv: Drop unneeded struct anv_image_create_info

Daniel Stone (3):
  intel/isl: Add ISL <-> GEM tiling conversion
  RFC: vulkan/wsi: Add modifiers to WSI image creation
  RFC: vulkan/wsi: Add support for DRI3 v1.1

Louis-Francis Ratté-Boulianne (2):
  dri3: Move up fourcc utility function
  RFC: egl/x11: Support DRI3 v1.1

 include/vulkan/vulkan.h  | 104 +++
 include/vulkan/vulkan_intel.h|  62 -
 src/amd/vulkan/radv_wsi.c|   9 +-
 src/egl/drivers/dri2/egl_dri2.c  |   7 +
 src/egl/drivers/dri2/egl_dri2.h  |   3 +
 src/egl/drivers/dri2/platform_x11_dri3.c |  60 +++-
 src/glx/dri3_glx.c   |  10 +-
 src/intel/Makefile.isl.am|   1 +
 src/intel/Makefile.sources   |   1 -
 src/intel/Makefile.vulkan.am |   3 -
 src/intel/isl/isl.c  | 122 
 src/intel/isl/isl.h  |  39 +++
 src/intel/vulkan/Makefile.am | 210 ++
 src/intel/vulkan/Makefile.sources|  84 ++
 src/intel/vulkan/anv_device.c|  32 ++-
 src/intel/vulkan/anv_entrypoints_gen.py  |  13 +-
 src/intel/vulkan/anv_formats.c   | 173 +++-
 src/intel/vulkan/anv_image.c | 460 ++-
 src/intel/vulkan/anv_intel.c |  99 ---
 src/intel/vulkan/anv_private.h   |  37 +--
 src/intel/vulkan/anv_wsi.c   |  53 +++-
 src/loader/loader_dri3_helper.c  | 248 +
 src/loader/loader_dri3_helper.h  |  16 +-
 src/vulkan/registry/vk.xml   | 117 +++-
 src/vulkan/wsi/wsi_common.h  |   5 +-
 src/vulkan/wsi/wsi_common_wayland.c  |   6 +-
 src/vulkan/wsi/wsi_common_x11.c  | 148 +-
 27 files changed, 1695 insertions(+), 427 deletions(-)
 delete mode 100644 include/vulkan/vulkan_intel.h
 create mode 100644 src/intel/vulkan/Makefile.am
 create mode 100644 src/intel/vulkan/Makefile.sources
 delete mode 100644 src/intel/vulkan/anv_intel.c

-- 
2.13.0

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[Mesa-dev] [RFC v2 05/23] isl: Add isl_surf_get_drm_format_mod()

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

---
 src/intel/isl/isl.c | 35 +++
 src/intel/isl/isl.h | 15 +++
 2 files changed, 50 insertions(+)

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 19aa2bac33..a8a074719f 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -2399,3 +2399,38 @@ isl_surf_get_depth_format(const struct isl_device *dev,
   return 5; /* D16_UNORM */
}
 }
+
+bool
+isl_surf_get_drm_format_mod(const struct isl_surf *main_surf,
+enum isl_aux_usage aux,
+uint64_t *mod)
+{
+   if (aux != ISL_AUX_USAGE_NONE) {
+  /* There are no modifiers defined yet for auxiliary surfaces, not even
+   * for CCS.
+   */
+  return false;
+   }
+
+   switch (main_surf->tiling) {
+   case ISL_TILING_LINEAR:
+  *mod = DRM_FORMAT_MOD_LINEAR;
+  break;
+   case ISL_TILING_X:
+  *mod = I915_FORMAT_MOD_X_TILED;
+  break;
+   case ISL_TILING_Y0:
+  *mod = I915_FORMAT_MOD_Y_TILED;
+  break;
+   case ISL_TILING_Yf:
+  *mod = I915_FORMAT_MOD_Yf_TILED;
+  break;
+   case ISL_TILING_Ys:
+   case ISL_TILING_W:
+   case ISL_TILING_HIZ:
+   case ISL_TILING_CCS:
+  return false;
+   }
+
+   return true;
+}
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 69140c44a8..9c672507db 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -1862,6 +1862,21 @@ uint32_t
 isl_surf_get_depth_format(const struct isl_device *dev,
   const struct isl_surf *surf);
 
+/**
+ * The given surface must be a primary surface, not an auxiliary surface;
+ * otherwise behavior is undefined.
+ *
+ * The auxiliary usage must be compatible with the given surface; otherwise
+ * behavior is undefined.
+ *
+ * If no known DRM format modifier applies to the input, then return false.
+ * The output parameter is written only on success.
+ */
+bool ATTRIBUTE_PURE
+isl_surf_get_drm_format_mod(const struct isl_surf *main_surf,
+enum isl_aux_usage aux,
+uint64_t *mod);
+
 #ifdef __cplusplus
 }
 #endif
-- 
2.13.0

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[Mesa-dev] [RFC v2 03/23] intel/isl: Add ISL <-> DRM modifier conversion

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

It converts a DRM format modifier to and from enum isl_tiling and
aux_usage. That's all.
---
 src/intel/Makefile.isl.am |  1 +
 src/intel/isl/isl.c   | 59 +++
 src/intel/isl/isl.h   | 16 +
 3 files changed, 76 insertions(+)

diff --git a/src/intel/Makefile.isl.am b/src/intel/Makefile.isl.am
index 31273af36c..cea69ed0f1 100644
--- a/src/intel/Makefile.isl.am
+++ b/src/intel/Makefile.isl.am
@@ -34,6 +34,7 @@ noinst_LTLIBRARIES += $(ISL_GEN_LIBS) isl/libisl.la
 
 isl_libisl_la_LIBADD = $(ISL_GEN_LIBS)
 isl_libisl_la_SOURCES = $(ISL_FILES) $(ISL_GENERATED_FILES)
+isl_libisl_la_CFLAGS = $(AM_CFLAGS) $(LIBDRM_CFLAGS)
 
 isl_libisl_gen4_la_SOURCES = $(ISL_GEN4_FILES)
 isl_libisl_gen4_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=40
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index ba56d86c17..72b20b27af 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -26,6 +26,7 @@
 #include 
 
 #include "genxml/genX_bits.h"
+#include 
 
 #include "isl.h"
 #include "isl_gen4.h"
@@ -35,6 +36,10 @@
 #include "isl_gen9.h"
 #include "isl_priv.h"
 
+#ifndef DRM_FORMAT_MOD_LINEAR
+#define DRM_FORMAT_MOD_LINEAR 0 /* Linux 4.10 */
+#endif
+
 void PRINTFLIKE(3, 4) UNUSED
 __isl_finishme(const char *file, int line, const char *fmt, ...)
 {
@@ -48,6 +53,60 @@ __isl_finishme(const char *file, int line, const char *fmt, 
...)
fprintf(stderr, "%s:%d: FINISHME: %s\n", file, line, buf);
 }
 
+bool
+isl_tiling_from_drm_format_mod(uint64_t mod, enum isl_tiling *tiling,
+   enum isl_aux_usage *aux_usage)
+{
+   switch (mod) {
+   case DRM_FORMAT_MOD_LINEAR:
+  *tiling = ISL_TILING_LINEAR;
+  *aux_usage = ISL_AUX_USAGE_NONE;
+  return true;
+   case I915_FORMAT_MOD_X_TILED:
+  *tiling = ISL_TILING_X;
+  *aux_usage = ISL_AUX_USAGE_NONE;
+  return true;
+   case I915_FORMAT_MOD_Y_TILED:
+  *tiling = ISL_TILING_Y0;
+  *aux_usage = ISL_AUX_USAGE_NONE;
+  return true;
+   case I915_FORMAT_MOD_Yf_TILED:
+  *tiling = ISL_TILING_Yf;
+  *aux_usage = ISL_AUX_USAGE_NONE;
+  return true;
+   }
+
+   return false;
+}
+
+uint64_t
+isl_tiling_to_drm_format_mod(enum isl_tiling tiling,
+ enum isl_aux_usage aux_usage)
+{
+   /* XXX: Need to disambiguate aux surface usage; we can validly have a CCS
+*  aux surface attached (e.g. Y_CCS modifier), but always resolve it
+*  before usage such that sampling with no aux plane (e.g. plain Y mod)
+*  is valid. Punt for now, and revisit when we expose aux surfaces to
+*  external consumers. */
+
+   switch (tiling) {
+   case ISL_TILING_LINEAR:
+  return DRM_FORMAT_MOD_LINEAR;
+   case ISL_TILING_X:
+  return I915_FORMAT_MOD_X_TILED;
+   case ISL_TILING_Y0:
+  return I915_FORMAT_MOD_Y_TILED;
+   case ISL_TILING_Yf:
+  return I915_FORMAT_MOD_Yf_TILED;
+   case ISL_TILING_W:
+   case ISL_TILING_HIZ:
+   case ISL_TILING_CCS:
+  unreachable("non-color-buffer mode in isl_tiling_to_drm_format_mod");
+   }
+
+   unreachable("unknown tiling in isl_tiling_to_drm_format_mod");
+}
+
 void
 isl_device_init(struct isl_device *dev,
 const struct gen_device_info *info,
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 07ff01a427..be2b9886ac 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -1482,6 +1482,22 @@ bool
 isl_has_matching_typed_storage_image_format(const struct gen_device_info 
*devinfo,
 enum isl_format fmt);
 
+/**
+ * Map a DRM format modifier to tiling and aux usage. If the modifier is not
+ * known to ISL, return false. The output parameters are only written on
+ * success.
+ */
+bool isl_tiling_from_drm_format_mod(uint64_t mod,
+enum isl_tiling *tiling,
+enum isl_aux_usage *aux_usage);
+
+/**
+ * Map tiling and aux usage to a DRM format modifier to tiling and aux usage.
+ * The parameters provided must map to a valid modifier.
+ */
+uint64_t isl_tiling_to_drm_format_mod(enum isl_tiling tiling,
+  enum isl_aux_usage aux_usage);
+
 static inline bool
 isl_tiling_is_any_y(enum isl_tiling tiling)
 {
-- 
2.13.0

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[Mesa-dev] [RFC v2 06/23] anv: Add func anv_get_raw_format()

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

Like anv_get_format(), but the returned format is not adjusted, not even
for the aspect.

Add anv_get_raw_isl_format() too, to match anv_get_isl_format().
---
 src/intel/vulkan/anv_formats.c | 7 +++
 src/intel/vulkan/anv_private.h | 8 
 2 files changed, 15 insertions(+)

diff --git a/src/intel/vulkan/anv_formats.c b/src/intel/vulkan/anv_formats.c
index 0bc81d12da..813f781927 100644
--- a/src/intel/vulkan/anv_formats.c
+++ b/src/intel/vulkan/anv_formats.c
@@ -250,6 +250,13 @@ static const struct anv_format anv_formats[] = {
 
 #undef fmt
 
+/** Like anv_get_format(), except the returned format is not adjusted. */
+struct anv_format
+anv_get_raw_format(const struct gen_device_info *devinfo, VkFormat vk_format)
+{
+   return anv_formats[vk_format];
+}
+
 /**
  * Exactly one bit must be set in \a aspect.
  */
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 573778dad5..88bda9a9d6 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1987,10 +1987,18 @@ struct anv_format {
struct isl_swizzle swizzle;
 };
 
+struct anv_format ATTRIBUTE_PURE
+anv_get_raw_format(const struct gen_device_info *devinfo, VkFormat vk_format);
+
 struct anv_format
 anv_get_format(const struct gen_device_info *devinfo, VkFormat format,
VkImageAspectFlags aspect, VkImageTiling tiling);
 
+static inline enum isl_format ATTRIBUTE_PURE
+anv_get_raw_isl_format(const struct gen_device_info *devinfo, VkFormat 
vk_format) {
+   return anv_get_raw_format(devinfo, vk_format).isl_format;
+}
+
 static inline enum isl_format
 anv_get_isl_format(const struct gen_device_info *devinfo, VkFormat vk_format,
VkImageAspectFlags aspect, VkImageTiling tiling)
-- 
2.13.0

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[Mesa-dev] [RFC v2 07/23] anv: Annotate anv_get_*format() as pure

[Louis-Francis Ratté-Boulianne]

From: Chad Versace 

---
 src/intel/vulkan/anv_private.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 88bda9a9d6..0e9fd26348 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1990,7 +1990,7 @@ struct anv_format {
 struct anv_format ATTRIBUTE_PURE
 anv_get_raw_format(const struct gen_device_info *devinfo, VkFormat vk_format);
 
-struct anv_format
+struct anv_format ATTRIBUTE_PURE
 anv_get_format(const struct gen_device_info *devinfo, VkFormat format,
VkImageAspectFlags aspect, VkImageTiling tiling);
 
@@ -1999,7 +1999,7 @@ anv_get_raw_isl_format(const struct gen_device_info 
*devinfo, VkFormat vk_format
return anv_get_raw_format(devinfo, vk_format).isl_format;
 }
 
-static inline enum isl_format
+static inline enum isl_format ATTRIBUTE_PURE
 anv_get_isl_format(const struct gen_device_info *devinfo, VkFormat vk_format,
VkImageAspectFlags aspect, VkImageTiling tiling)
 {
-- 
2.13.0

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[Mesa-dev] [RFC v2 01/23] dri3: Move up fourcc utility function

[Louis-Francis Ratté-Boulianne]

It will be needed in next patches.

Signed-off-by: Louis-Francis Ratté-Boulianne 
---
 src/loader/loader_dri3_helper.c | 42 -
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/src/loader/loader_dri3_helper.c b/src/loader/loader_dri3_helper.c
index 493a7f5218..181051a7c9 100644
--- a/src/loader/loader_dri3_helper.c
+++ b/src/loader/loader_dri3_helper.c
@@ -814,6 +814,27 @@ dri3_cpp_for_format(uint32_t format) {
}
 }
 
+/* the DRIimage createImage function takes __DRI_IMAGE_FORMAT codes, while
+ * the createImageFromFds call takes __DRI_IMAGE_FOURCC codes. To avoid
+ * complete confusion, just deal in __DRI_IMAGE_FORMAT codes for now and
+ * translate to __DRI_IMAGE_FOURCC codes in the call to createImageFromFds
+ */
+static int
+image_format_to_fourcc(int format)
+{
+
+   /* Convert from __DRI_IMAGE_FORMAT to __DRI_IMAGE_FOURCC (sigh) */
+   switch (format) {
+   case __DRI_IMAGE_FORMAT_SARGB8: return __DRI_IMAGE_FOURCC_SARGB;
+   case __DRI_IMAGE_FORMAT_RGB565: return __DRI_IMAGE_FOURCC_RGB565;
+   case __DRI_IMAGE_FORMAT_XRGB: return __DRI_IMAGE_FOURCC_XRGB;
+   case __DRI_IMAGE_FORMAT_ARGB: return __DRI_IMAGE_FOURCC_ARGB;
+   case __DRI_IMAGE_FORMAT_ABGR: return __DRI_IMAGE_FOURCC_ABGR;
+   case __DRI_IMAGE_FORMAT_XBGR: return __DRI_IMAGE_FOURCC_XBGR;
+   }
+   return 0;
+}
+
 /** loader_dri3_alloc_render_buffer
  *
  * Use the driver createImage function to construct a __DRIimage, then
@@ -1037,27 +1058,6 @@ dri3_update_drawable(__DRIdrawable *driDrawable,
return true;
 }
 
-/* the DRIimage createImage function takes __DRI_IMAGE_FORMAT codes, while
- * the createImageFromFds call takes __DRI_IMAGE_FOURCC codes. To avoid
- * complete confusion, just deal in __DRI_IMAGE_FORMAT codes for now and
- * translate to __DRI_IMAGE_FOURCC codes in the call to createImageFromFds
- */
-static int
-image_format_to_fourcc(int format)
-{
-
-   /* Convert from __DRI_IMAGE_FORMAT to __DRI_IMAGE_FOURCC (sigh) */
-   switch (format) {
-   case __DRI_IMAGE_FORMAT_SARGB8: return __DRI_IMAGE_FOURCC_SARGB;
-   case __DRI_IMAGE_FORMAT_RGB565: return __DRI_IMAGE_FOURCC_RGB565;
-   case __DRI_IMAGE_FORMAT_XRGB: return __DRI_IMAGE_FOURCC_XRGB;
-   case __DRI_IMAGE_FORMAT_ARGB: return __DRI_IMAGE_FOURCC_ARGB;
-   case __DRI_IMAGE_FORMAT_ABGR: return __DRI_IMAGE_FOURCC_ABGR;
-   case __DRI_IMAGE_FORMAT_XBGR: return __DRI_IMAGE_FOURCC_XBGR;
-   }
-   return 0;
-}
-
 __DRIimage *
 loader_dri3_create_image(xcb_connection_t *c,
  xcb_dri3_buffer_from_pixmap_reply_t *bp_reply,
-- 
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[Mesa-dev] [RFC v2 02/23] RFC: egl/x11: Support DRI3 v1.1

[Louis-Francis Ratté-Boulianne]

Add support for DRI3 v1.1, which allows pixmaps to be backed by
multi-planar buffers, or those with format modifiers. This is both
for allocating render buffers, as well as EGLImage imports from a
native pixmap (EGL_NATIVE_PIXMAP_KHR).

Signed-off-by: Louis-Francis Ratté-Boulianne 
Reviewed-by: Eric Engestrom 
Reviewed-by: Emil Velikov 
---
 src/egl/drivers/dri2/egl_dri2.c  |   7 ++
 src/egl/drivers/dri2/egl_dri2.h  |   3 +
 src/egl/drivers/dri2/platform_x11_dri3.c |  60 -
 src/glx/dri3_glx.c   |  10 +-
 src/loader/loader_dri3_helper.c  | 206 +++
 src/loader/loader_dri3_helper.h  |  16 ++-
 6 files changed, 273 insertions(+), 29 deletions(-)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index cf26242702..c7f3a9e813 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -789,6 +789,13 @@ dri2_setup_extensions(_EGLDisplay *disp)
if (!dri2_bind_extensions(dri2_dpy, mandatory_core_extensions, extensions, 
false))
   return EGL_FALSE;
 
+#ifdef HAVE_DRI3
+   dri2_dpy->multibuffers_available =
+  (dri2_dpy->dri3_major_version > 1 || (dri2_dpy->dri3_major_version == 1 
&&
+dri2_dpy->dri3_minor_version >= 
1)) &&
+  (dri2_dpy->image && dri2_dpy->image->base.version >= 15);
+#endif
+
dri2_bind_extensions(dri2_dpy, optional_core_extensions, extensions, true);
return EGL_TRUE;
 }
diff --git a/src/egl/drivers/dri2/egl_dri2.h b/src/egl/drivers/dri2/egl_dri2.h
index 4a5cf8e4ef..79ddf379dd 100644
--- a/src/egl/drivers/dri2/egl_dri2.h
+++ b/src/egl/drivers/dri2/egl_dri2.h
@@ -199,6 +199,9 @@ struct dri2_egl_display
xcb_screen_t *screen;
bool swap_available;
 #ifdef HAVE_DRI3
+   bool multibuffers_available;
+   int  dri3_major_version;
+   int  dri3_minor_version;
struct loader_dri3_extensions loader_dri3_ext;
 #endif
 #endif
diff --git a/src/egl/drivers/dri2/platform_x11_dri3.c 
b/src/egl/drivers/dri2/platform_x11_dri3.c
index 515be27e20..7930a1622c 100644
--- a/src/egl/drivers/dri2/platform_x11_dri3.c
+++ b/src/egl/drivers/dri2/platform_x11_dri3.c
@@ -198,7 +198,9 @@ dri3_create_surface(_EGLDriver *drv, _EGLDisplay *disp, 
EGLint type,
 
if (loader_dri3_drawable_init(dri2_dpy->conn, drawable,
  dri2_dpy->dri_screen,
- dri2_dpy->is_different_gpu, dri_config,
+ dri2_dpy->is_different_gpu,
+ dri2_dpy->multibuffers_available,
+ dri_config,
  _dpy->loader_dri3_ext,
  _dri3_vtable,
  _surf->loader_drawable)) {
@@ -341,15 +343,68 @@ dri3_create_image_khr_pixmap(_EGLDisplay *disp, 
_EGLContext *ctx,
return _img->base;
 }
 
+#if XCB_DRI3_MAJOR_VERSION > 1 || (XCB_DRI3_MAJOR_VERSION == 1 && 
XCB_DRI3_MINOR_VERSION >= 1)
+static _EGLImage *
+dri3_create_image_khr_pixmap_from_buffers(_EGLDisplay *disp, _EGLContext *ctx,
+  EGLClientBuffer buffer,
+  const EGLint *attr_list)
+{
+   struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
+   struct dri2_egl_image *dri2_img;
+   xcb_dri3_buffers_from_pixmap_cookie_t bp_cookie;
+   xcb_dri3_buffers_from_pixmap_reply_t  *bp_reply;
+   xcb_drawable_t drawable;
+
+   drawable = (xcb_drawable_t) (uintptr_t) buffer;
+   bp_cookie = xcb_dri3_buffers_from_pixmap(dri2_dpy->conn, drawable);
+   bp_reply = xcb_dri3_buffers_from_pixmap_reply(dri2_dpy->conn,
+ bp_cookie, NULL);
+
+   if (!bp_reply) {
+  _eglError(EGL_BAD_ATTRIBUTE, "dri3_create_image_khr");
+  return EGL_NO_IMAGE_KHR;
+   }
+
+   dri2_img = malloc(sizeof *dri2_img);
+   if (!dri2_img) {
+  _eglError(EGL_BAD_ALLOC, "dri3_create_image_khr");
+  return EGL_NO_IMAGE_KHR;
+   }
+
+   _eglInitImage(_img->base, disp);
+
+   dri2_img->dri_image = loader_dri3_create_image_from_buffers(dri2_dpy->conn,
+   bp_reply,
+   
dri2_dpy->dri_screen,
+   dri2_dpy->image,
+   dri2_img);
+   free(bp_reply);
+
+   if (!dri2_img->dri_image) {
+  _eglError(EGL_BAD_ATTRIBUTE, "dri3_create_image_khr");
+  free(dri2_img);
+  return EGL_NO_IMAGE_KHR;
+   }
+
+   return _img->base;
+}
+#endif
+
 static _EGLImage *
 dri3_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp,
   _EGLContext *ctx, 

Re: [Mesa-dev] [PATCH] i965 : Performance Improvement

[Marathe, Yogesh]

Kenneth,

> -Original Message-
> From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf
> Of Kenneth Graunke
> Sent: Friday, July 14, 2017 10:05 AM
> To: mesa-dev@lists.freedesktop.org
> Cc: Muthukumar, Aravindan 
> Subject: Re: [Mesa-dev] [PATCH] i965 : Performance Improvement
> 
> On Thursday, July 13, 2017 9:09:09 PM PDT aravindan.muthuku...@intel.com
> wrote:
> > From: Aravindan M 
> 
> The commit title should be something like, "i965: Optimize atom state flag
> checks" rather than a generic "Performance Improvement"
> 
> > This patch improves CPI Rate(Cycles per Instruction) and CPU time
> > utilization for i965. The functions check_state and
> > brw_pipeline_state_finished was found poor CPU utilization from
> > performance analysis.
> 
> Need actual data here, or show assembly quality improvements.
> 
> > Change-Id: I17c7e719a16e222764217a0e67b4482748537b67
> > Signed-off-by: Aravindan M 
> > Reviewed-by: Yogesh M 
> > Tested-by: Asish 
> > ---
> >  src/mesa/drivers/dri/i965/brw_defines.h  |  3 +++
> >  src/mesa/drivers/dri/i965/brw_state_upload.c | 14 +++---
> >  2 files changed, 14 insertions(+), 3 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
> > b/src/mesa/drivers/dri/i965/brw_defines.h
> > index a4794c6..60f88ca 100644
> > --- a/src/mesa/drivers/dri/i965/brw_defines.h
> > +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> > @@ -1681,3 +1681,6 @@ enum brw_pixel_shader_coverage_mask_mode {
> >  # define GEN8_L3CNTLREG_ALL_ALLOC_MASK INTEL_MASK(31, 25)
> >
> >  #endif
> > +
> > +/* Checking the state of mesa and brw before emitting atoms */
> > +#define CHECK_BRW_STATE(a,b) ((a.mesa & b.mesa) | (a.brw & b.brw))
> > diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
> > b/src/mesa/drivers/dri/i965/brw_state_upload.c
> > index 5e82c1b..434decf 100644
> > --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
> > +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
> > @@ -515,7 +515,10 @@ brw_upload_pipeline_state(struct brw_context *brw,
> >  const struct brw_tracked_state *atom = [i];
> >  struct brw_state_flags generated;
> >
> > - check_and_emit_atom(brw, , atom);
> > + /* Checking the state and emitting the atoms */
> > + if (CHECK_BRW_STATE(state, atom->dirty)) {
> > +check_and_emit_atom(brw, , atom);
> > + }
> >
> >  accumulate_state(, >dirty);
> >
> > @@ -532,7 +535,10 @@ brw_upload_pipeline_state(struct brw_context *brw,
> >for (i = 0; i < num_atoms; i++) {
> >  const struct brw_tracked_state *atom = [i];
> >
> > - check_and_emit_atom(brw, , atom);
> > + /* Checking the state and emitting the atoms */
> > + if (CHECK_BRW_STATE(state, atom->dirty)) {
> > +check_and_emit_atom(brw, , atom);
> > + }
> 
> This doesn't make any sense...the very first thing check_and_emit_atom() does
> is call check_state(), which does the exact thing your CHECK_BRW_STATE macro
> does.  So you're just needlessly checking the same thing twice.
> 

Sorry Kenneth, This is incomplete patch. The original patch that I reviewed 
also had 
if check removed as below

--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -417,10 +417,8 @@ check_and_emit_atom(struct brw_context *brw,
 struct brw_state_flags *state,
 const struct brw_tracked_state *atom)
 {
-   if (check_state(state, >dirty)) {
atom->emit(brw);
merge_ctx_state(brw, state);
-   }
 }

Aravindan will push another set. 

> The only reason I could see this helping is if check_state() wasn't inlined, 
> but a
> release build with -O2 definitely inlines both check_and_emit_atom() and
> check_state().
> 
> Are you using GCC?  What are your CFLAGS?  -O2?  I hope you're not trying to
> optimize a debug build...
> 

Yes we are using O2 and its clang on android and it's not debug.

> >}
> > }
> >
> > @@ -567,7 +573,9 @@ brw_pipeline_state_finished(struct brw_context *brw,
> >   brw->state.pipelines[i].mesa |= brw->NewGLState;
> >   brw->state.pipelines[i].brw |= brw->ctx.NewDriverState;
> >} else {
> > - memset(>state.pipelines[i], 0, sizeof(struct 
> > brw_state_flags));
> > + /* Avoiding the memset with initialization */
> > + brw->state.pipelines[i].mesa = 0;
> > + brw->state.pipelines[i].brw = 0ull;
> >}
> > }
> 
> This is a separate change.
> 
> I'm also not seeing why it's useful:
> 
> Assembly before (GCC 7.1.1, x86_64, -O2 -fno-omit-frame-pointer):
> 
> 003e0380 :
>   3e0380:   66 0f ef c0 pxor   %xmm0,%xmm0
>   3e0384:   55  push   %rbp
>   3e0385:   8b 87 20 52 02 00   mov0x25220(%rdi),%eax
>   3e038b:   c7 

[Mesa-dev] [PATCH 2/2] util: Make CLAMP turn NaN into MIN.

[Kenneth Graunke]

The previous implementation of CLAMP() allowed NaN to pass through
unscathed, by failing both comparisons.  NaN isn't exactly a value
between MIN and MAX, which can break the assumptions of many callers.

This patch changes CLAMP to convert NaN to MIN, arbitrarily.  Callers
that need NaN to be handled in a specific manner should probably open
code something, or use a macro specifically designed to do that.

Section 2.3.4.1 of the OpenGL 4.5 spec says:

   "Any representable floating-point value is legal as input to a GL
command that requires floating-point data. The result of providing a
value that is not a floating-point number to such a command is
unspecified, but must not lead to GL interruption or termination.
In IEEE arithmetic, for example, providing a negative zero or a
denormalized number to a GL command yields predictable results,
while providing a NaN or an infinity yields unspecified results."

While CLAMP may apply to more than just GL inputs, it seems reasonable
to follow those rules, and allow MIN as an "unspecified result".

This prevents assertion failures in i965 when running the games
"XCOM: Enemy Unknown" and "XCOM: Enemy Within", which call

   glTexEnv(GL_TEXTURE_FILTER_CONTROL_EXT, GL_TEXTURE_LOD_BIAS_EXT,
-nan(0x73));

presumably unintentionally.  i965 clamps the LOD bias to be in range,
and asserts that it's in the proper range when converting to fixed
point.  NaN is not, so it crashed.  We'd like to at least avoid that.

Cc: Marek Olšák 
Cc: Roland Scheidegger 
Cc: Ian Romanick 
---
 src/gallium/auxiliary/util/u_math.h | 3 ++-
 src/util/macros.h   | 4 ++--
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_math.h 
b/src/gallium/auxiliary/util/u_math.h
index 2ab5f03a662..a441b5457b2 100644
--- a/src/gallium/auxiliary/util/u_math.h
+++ b/src/gallium/auxiliary/util/u_math.h
@@ -605,8 +605,9 @@ util_memcpy_cpu_to_le32(void * restrict dest, const void * 
restrict src, size_t
 /**
  * Clamp X to [MIN, MAX].
  * This is a macro to allow float, int, uint, etc. types.
+ * We arbitrarily turn NaN into MIN.
  */
-#define CLAMP( X, MIN, MAX )  ( (X)<(MIN) ? (MIN) : ((X)>(MAX) ? (MAX) : (X)) )
+#define CLAMP( X, MIN, MAX )  ( (X)>(MIN) ? ((X)>(MAX) ? (MAX) : (X)) : (MIN) )
 
 #define MIN2( A, B )   ( (A)<(B) ? (A) : (B) )
 #define MAX2( A, B )   ( (A)>(B) ? (A) : (B) )
diff --git a/src/util/macros.h b/src/util/macros.h
index a10f1de8145..a66f1bfed07 100644
--- a/src/util/macros.h
+++ b/src/util/macros.h
@@ -244,8 +244,8 @@ do {   \
 /** Compute ceiling of integer quotient of A divided by B. */
 #define DIV_ROUND_UP( A, B )  ( (A) % (B) == 0 ? (A)/(B) : (A)/(B)+1 )
 
-/** Clamp X to [MIN,MAX] */
-#define CLAMP( X, MIN, MAX )  ( (X)<(MIN) ? (MIN) : ((X)>(MAX) ? (MAX) : (X)) )
+/** Clamp X to [MIN,MAX].  Turn NaN into MIN, arbitrarily. */
+#define CLAMP( X, MIN, MAX )  ( (X)>(MIN) ? ((X)>(MAX) ? (MAX) : (X)) : (MIN) )
 
 /** Minimum of two values: */
 #define MIN2( A, B )   ( (A)<(B) ? (A) : (B) )
-- 
2.13.3

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[Mesa-dev] [PATCH 1/2] meta: Actually initialize ImmutableLevels to 1.

[Kenneth Graunke]

Otherwise, ImmutableLevels is 0, which is an illegal value.  Later,
_mesa_meta_setup_sampler will use _mesa_texture_parameteriv to set

   texObj->MaxLevel = CLAMP(params[0], texObj->BaseLevel,
texObj->ImmutableLevels - 1);

which turns into a completely bogus CLAMP(value, 0, -1)...where the
upper bound is smaller than the lower bound.  This ends up being -1
today due to the way CLAMP is implemented, which is a bogus MaxLevel.
---
 src/mesa/drivers/common/meta_tex_subimage.c | 1 +
 1 file changed, 1 insertion(+)

This prevents regressions in the next commit, where we change the
implementation of CLAMP, and it starts returning a different value.
Both implementations of CLAMP are valid, but when max < min, bogosity
ensues...

diff --git a/src/mesa/drivers/common/meta_tex_subimage.c 
b/src/mesa/drivers/common/meta_tex_subimage.c
index b8c422bfb72..e0284a3f07d 100644
--- a/src/mesa/drivers/common/meta_tex_subimage.c
+++ b/src/mesa/drivers/common/meta_tex_subimage.c
@@ -136,6 +136,7 @@ create_texture_for_pbo(struct gl_context *ctx,
_mesa_initialize_texture_object(ctx, tex_obj, *tmp_tex, GL_TEXTURE_2D);
/* This must be set after _mesa_initialize_texture_object, not before. */
tex_obj->Immutable = GL_TRUE;
+   tex_obj->ImmutableLevels = 1;
/* This is required for interactions with ARB_texture_view. */
tex_obj->NumLayers = 1;
 
-- 
2.13.3

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[Mesa-dev] [PATCH] i965 : Performance Improvement

[aravindan . muthukumar]

From: Aravindan M 

This patch improves CPI Rate(Cycles per Instruction)
and CPU time utilization for i965. The functions
check_state and brw_pipeline_state_finished was found
poor CPU utilization from performance analysis.

Change-Id: I17c7e719a16e222764217a0e67b4482748537b67
Signed-off-by: Aravindan M 
Reviewed-by: Yogesh M 
Tested-by: Asish 
---
 src/mesa/drivers/dri/i965/brw_defines.h  |  3 +++
 src/mesa/drivers/dri/i965/brw_state_upload.c | 14 +++---
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index a4794c6..60f88ca 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1681,3 +1681,6 @@ enum brw_pixel_shader_coverage_mask_mode {
 # define GEN8_L3CNTLREG_ALL_ALLOC_MASK INTEL_MASK(31, 25)
 
 #endif
+
+/* Checking the state of mesa and brw before emitting atoms */
+#define CHECK_BRW_STATE(a,b) ((a.mesa & b.mesa) | (a.brw & b.brw))
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c 
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 5e82c1b..434decf 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -515,7 +515,10 @@ brw_upload_pipeline_state(struct brw_context *brw,
 const struct brw_tracked_state *atom = [i];
 struct brw_state_flags generated;
 
- check_and_emit_atom(brw, , atom);
+ /* Checking the state and emitting the atoms */
+ if (CHECK_BRW_STATE(state, atom->dirty)) {
+check_and_emit_atom(brw, , atom);
+ }
 
 accumulate_state(, >dirty);
 
@@ -532,7 +535,10 @@ brw_upload_pipeline_state(struct brw_context *brw,
   for (i = 0; i < num_atoms; i++) {
 const struct brw_tracked_state *atom = [i];
 
- check_and_emit_atom(brw, , atom);
+ /* Checking the state and emitting the atoms */
+ if (CHECK_BRW_STATE(state, atom->dirty)) {
+check_and_emit_atom(brw, , atom);
+ }
   }
}
 
@@ -567,7 +573,9 @@ brw_pipeline_state_finished(struct brw_context *brw,
  brw->state.pipelines[i].mesa |= brw->NewGLState;
  brw->state.pipelines[i].brw |= brw->ctx.NewDriverState;
   } else {
- memset(>state.pipelines[i], 0, sizeof(struct brw_state_flags));
+ /* Avoiding the memset with initialization */
+ brw->state.pipelines[i].mesa = 0;
+ brw->state.pipelines[i].brw = 0ull;
   }
}
 
-- 
2.7.4

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Re: [Mesa-dev] [PATCH] i965 : Performance Improvement

[Kenneth Graunke]

On Thursday, July 13, 2017 9:09:09 PM PDT aravindan.muthuku...@intel.com wrote:
> From: Aravindan M 

The commit title should be something like, "i965: Optimize atom state
flag checks" rather than a generic "Performance Improvement"

> This patch improves CPI Rate(Cycles per Instruction)
> and CPU time utilization for i965. The functions
> check_state and brw_pipeline_state_finished was found
> poor CPU utilization from performance analysis.

Need actual data here, or show assembly quality improvements.

> Change-Id: I17c7e719a16e222764217a0e67b4482748537b67
> Signed-off-by: Aravindan M 
> Reviewed-by: Yogesh M 
> Tested-by: Asish 
> ---
>  src/mesa/drivers/dri/i965/brw_defines.h  |  3 +++
>  src/mesa/drivers/dri/i965/brw_state_upload.c | 14 +++---
>  2 files changed, 14 insertions(+), 3 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
> b/src/mesa/drivers/dri/i965/brw_defines.h
> index a4794c6..60f88ca 100644
> --- a/src/mesa/drivers/dri/i965/brw_defines.h
> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> @@ -1681,3 +1681,6 @@ enum brw_pixel_shader_coverage_mask_mode {
>  # define GEN8_L3CNTLREG_ALL_ALLOC_MASK INTEL_MASK(31, 25)
>  
>  #endif
> +
> +/* Checking the state of mesa and brw before emitting atoms */
> +#define CHECK_BRW_STATE(a,b) ((a.mesa & b.mesa) | (a.brw & b.brw))
> diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c 
> b/src/mesa/drivers/dri/i965/brw_state_upload.c
> index 5e82c1b..434decf 100644
> --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
> @@ -515,7 +515,10 @@ brw_upload_pipeline_state(struct brw_context *brw,
>const struct brw_tracked_state *atom = [i];
>struct brw_state_flags generated;
>  
> - check_and_emit_atom(brw, , atom);
> + /* Checking the state and emitting the atoms */
> + if (CHECK_BRW_STATE(state, atom->dirty)) {
> +check_and_emit_atom(brw, , atom);
> + }
>  
>accumulate_state(, >dirty);
>  
> @@ -532,7 +535,10 @@ brw_upload_pipeline_state(struct brw_context *brw,
>for (i = 0; i < num_atoms; i++) {
>const struct brw_tracked_state *atom = [i];
>  
> - check_and_emit_atom(brw, , atom);
> + /* Checking the state and emitting the atoms */
> + if (CHECK_BRW_STATE(state, atom->dirty)) {
> +check_and_emit_atom(brw, , atom);
> + }

This doesn't make any sense...the very first thing check_and_emit_atom()
does is call check_state(), which does the exact thing your CHECK_BRW_STATE
macro does.  So you're just needlessly checking the same thing twice.

The only reason I could see this helping is if check_state() wasn't inlined,
but a release build with -O2 definitely inlines both check_and_emit_atom()
and check_state().

Are you using GCC?  What are your CFLAGS?  -O2?  I hope you're not trying
to optimize a debug build...

>}
> }
>  
> @@ -567,7 +573,9 @@ brw_pipeline_state_finished(struct brw_context *brw,
>   brw->state.pipelines[i].mesa |= brw->NewGLState;
>   brw->state.pipelines[i].brw |= brw->ctx.NewDriverState;
>} else {
> - memset(>state.pipelines[i], 0, sizeof(struct brw_state_flags));
> + /* Avoiding the memset with initialization */
> + brw->state.pipelines[i].mesa = 0;
> + brw->state.pipelines[i].brw = 0ull;
>}
> }

This is a separate change.

I'm also not seeing why it's useful:

Assembly before (GCC 7.1.1, x86_64, -O2 -fno-omit-frame-pointer):

003e0380 :
  3e0380:   66 0f ef c0 pxor   %xmm0,%xmm0
  3e0384:   55  push   %rbp
  3e0385:   8b 87 20 52 02 00   mov0x25220(%rdi),%eax
  3e038b:   c7 87 20 52 02 00 00movl   $0x0,0x25220(%rdi)
  3e0392:   00 00 00 
  3e0395:   48 89 e5mov%rsp,%rbp
  3e0398:   09 87 38 52 02 00   or %eax,0x25238(%rdi)
  3e039e:   48 8b 87 38 4d 02 00mov0x24d38(%rdi),%rax
  3e03a5:   5d  pop%rbp
  3e03a6:   48 09 87 40 52 02 00or %rax,0x25240(%rdi)
  3e03ad:   48 c7 87 38 4d 02 00movq   $0x0,0x24d38(%rdi)
  3e03b4:   00 00 00 00 
  3e03b8:   0f 11 87 28 52 02 00movups %xmm0,0x25228(%rdi)
  3e03bf:   c3  retq 

Assembly after:

003e0380 :
  3e0380:   55  push   %rbp
  3e0381:   8b 87 20 52 02 00   mov0x25220(%rdi),%eax
  3e0387:   c7 87 28 52 02 00 00movl   $0x0,0x25228(%rdi)
  3e038e:   00 00 00 
  3e0391:   09 87 38 52 02 00   or %eax,0x25238(%rdi)
  3e0397:   48 89 e5mov%rsp,%rbp
  3e039a:   48 8b 87 38 4d 02 00mov0x24d38(%rdi),%rax
  3e03a1:   48 c7 87 30 52 02 00movq   $0x0,0x25230(%rdi)
  3e03a8:   00 00 00 00 
  

[Mesa-dev] [PATCH] i965 : Performance Improvement

[aravindan . muthukumar]

From: Aravindan M 

This patch improves CPI Rate(Cycles per Instruction)
and CPU time utilization for i965. The functions
check_state and brw_pipeline_state_finished was found
poor CPU utilization from performance analysis.

Change-Id: I17c7e719a16e222764217a0e67b4482748537b67
Signed-off-by: Aravindan M 
Reviewed-by: Yogesh M 
Tested-by: Asish 
---
 src/mesa/drivers/dri/i965/brw_defines.h  |  3 +++
 src/mesa/drivers/dri/i965/brw_state_upload.c | 14 +++---
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index a4794c6..60f88ca 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1681,3 +1681,6 @@ enum brw_pixel_shader_coverage_mask_mode {
 # define GEN8_L3CNTLREG_ALL_ALLOC_MASK INTEL_MASK(31, 25)
 
 #endif
+
+/* Checking the state of mesa and brw before emitting atoms */
+#define CHECK_BRW_STATE(a,b) ((a.mesa & b.mesa) | (a.brw & b.brw))
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c 
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 5e82c1b..434decf 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -515,7 +515,10 @@ brw_upload_pipeline_state(struct brw_context *brw,
 const struct brw_tracked_state *atom = [i];
 struct brw_state_flags generated;
 
- check_and_emit_atom(brw, , atom);
+ /* Checking the state and emitting the atoms */
+ if (CHECK_BRW_STATE(state, atom->dirty)) {
+check_and_emit_atom(brw, , atom);
+ }
 
 accumulate_state(, >dirty);
 
@@ -532,7 +535,10 @@ brw_upload_pipeline_state(struct brw_context *brw,
   for (i = 0; i < num_atoms; i++) {
 const struct brw_tracked_state *atom = [i];
 
- check_and_emit_atom(brw, , atom);
+ /* Checking the state and emitting the atoms */
+ if (CHECK_BRW_STATE(state, atom->dirty)) {
+check_and_emit_atom(brw, , atom);
+ }
   }
}
 
@@ -567,7 +573,9 @@ brw_pipeline_state_finished(struct brw_context *brw,
  brw->state.pipelines[i].mesa |= brw->NewGLState;
  brw->state.pipelines[i].brw |= brw->ctx.NewDriverState;
   } else {
- memset(>state.pipelines[i], 0, sizeof(struct brw_state_flags));
+ /* Avoiding the memset with initialization */
+ brw->state.pipelines[i].mesa = 0;
+ brw->state.pipelines[i].brw = 0ull;
   }
}
 
-- 
2.7.4

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[Mesa-dev] [Bug 101775] Xorg segfault since 147d7fb "st/mesa: add a winsys buffers list in st_context"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=101775

Michel Dänzer  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #1 from Michel Dänzer  ---
Thanks for the report, fixed in Git:

Module: Mesa
Branch: master
Commit: 655a32f729a46176c1fc0c1727b33c15c69cad78
URL:   
http://cgit.freedesktop.org/mesa/mesa/commit/?id=655a32f729a46176c1fc0c1727b33c15c69cad78

Author: Michel Dänzer 
Date:   Thu Jul 13 01:21:00 2017 -0600

st/mesa: Handle st_framebuffer_create returning NULL

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Re: [Mesa-dev] [PATCH 1/8] spirv: Import the latest 1.0.2 header from Khronos

[Ian Romanick]

On 07/13/2017 06:57 PM, Jason Ekstrand wrote:
> On Thu, Jul 13, 2017 at 6:38 PM, Ian Romanick  > wrote:
> 
> Shouldn't this also update capability_to_string in spriv_info.c?
> 
> 
> Yes, probably.
>  
> 
>   I'm
> also questioning that implementation... there are huge blocks in that
> array (e.g., all the elements from 61 to 4322) that are zeroed out by
> the initialization.
> 
> 
> Ugh... I didn't realize we were packing it into an array. :(  We really
> need to use a switch since it's sparse.
> 
> I think the correct answer here is a bit of python codegen.  There is a
> json file that provides all of these SPIR-V enums so it should be fairly
> easy to do.

I was thinking the same thing.  I'm on it.

>   This will cause spirv_capability_to_string() to
> happily return NULL pointers that none of the callers are prepared to
> handle.
> 
> 
> I think you'll find that the SPIR-V parser does all sorts of "bad"
> things if you touch it wrong.  It was, after all, written for the Vulkan
> world where crashing is a valid response to *any* invalid input.  We
> probably want to make it a bit more robust for GL.  I've got something
> of a plan for doing so but haven't had the time to sit down and hack on it.
> 
> --Jason
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Re: [Mesa-dev] [PATCH 1/8] spirv: Import the latest 1.0.2 header from Khronos

[Jason Ekstrand]

On Thu, Jul 13, 2017 at 6:38 PM, Ian Romanick  wrote:

> Shouldn't this also update capability_to_string in spriv_info.c?


Yes, probably.


>   I'm
> also questioning that implementation... there are huge blocks in that
> array (e.g., all the elements from 61 to 4322) that are zeroed out by
> the initialization.


Ugh... I didn't realize we were packing it into an array. :(  We really
need to use a switch since it's sparse.

I think the correct answer here is a bit of python codegen.  There is a
json file that provides all of these SPIR-V enums so it should be fairly
easy to do.


>   This will cause spirv_capability_to_string() to
> happily return NULL pointers that none of the callers are prepared to
> handle.
>

I think you'll find that the SPIR-V parser does all sorts of "bad" things
if you touch it wrong.  It was, after all, written for the Vulkan world
where crashing is a valid response to *any* invalid input.  We probably
want to make it a bit more robust for GL.  I've got something of a plan for
doing so but haven't had the time to sit down and hack on it.

--Jason


>
> On 07/13/2017 12:41 PM, Jason Ekstrand wrote:
> > ---
> >  src/compiler/spirv/spirv.h | 41 ++
> +++
> >  1 file changed, 37 insertions(+), 4 deletions(-)
> >
> > diff --git a/src/compiler/spirv/spirv.h b/src/compiler/spirv/spirv.h
> > index 89354c0..61559a1 100644
> > --- a/src/compiler/spirv/spirv.h
> > +++ b/src/compiler/spirv/spirv.h
> > @@ -50,12 +50,12 @@
> >
> >  typedef unsigned int SpvId;
> >
> > -#define SPV_VERSION 0x10100
> > -#define SPV_REVISION 6
> > +#define SPV_VERSION 0x10200
> > +#define SPV_REVISION 1
> >
> >  static const unsigned int SpvMagicNumber = 0x07230203;
> > -static const unsigned int SpvVersion = 0x00010100;
> > -static const unsigned int SpvRevision = 6;
> > +static const unsigned int SpvVersion = 0x00010200;
> > +static const unsigned int SpvRevision = 1;
> >  static const unsigned int SpvOpCodeMask = 0x;
> >  static const unsigned int SpvWordCountShift = 16;
> >
> > @@ -65,6 +65,7 @@ typedef enum SpvSourceLanguage_ {
> >  SpvSourceLanguageGLSL = 2,
> >  SpvSourceLanguageOpenCL_C = 3,
> >  SpvSourceLanguageOpenCL_CPP = 4,
> > +SpvSourceLanguageHLSL = 5,
> >  SpvSourceLanguageMax = 0x7fff,
> >  } SpvSourceLanguage;
> >
> > @@ -129,6 +130,10 @@ typedef enum SpvExecutionMode_ {
> >  SpvExecutionModeFinalizer = 34,
> >  SpvExecutionModeSubgroupSize = 35,
> >  SpvExecutionModeSubgroupsPerWorkgroup = 36,
> > +SpvExecutionModeSubgroupsPerWorkgroupId = 37,
> > +SpvExecutionModeLocalSizeId = 38,
> > +SpvExecutionModeLocalSizeHintId = 39,
> > +SpvExecutionModePostDepthCoverage = 4446,
> >  SpvExecutionModeMax = 0x7fff,
> >  } SpvExecutionMode;
> >
> > @@ -145,6 +150,7 @@ typedef enum SpvStorageClass_ {
> >  SpvStorageClassPushConstant = 9,
> >  SpvStorageClassAtomicCounter = 10,
> >  SpvStorageClassImage = 11,
> > +SpvStorageClassStorageBuffer = 12,
> >  SpvStorageClassMax = 0x7fff,
> >  } SpvStorageClass;
> >
> > @@ -383,6 +389,9 @@ typedef enum SpvDecoration_ {
> >  SpvDecorationInputAttachmentIndex = 43,
> >  SpvDecorationAlignment = 44,
> >  SpvDecorationMaxByteOffset = 45,
> > +SpvDecorationAlignmentId = 46,
> > +SpvDecorationMaxByteOffsetId = 47,
> > +SpvDecorationExplicitInterpAMD = 4999,
> >  SpvDecorationOverrideCoverageNV = 5248,
> >  SpvDecorationPassthroughNV = 5250,
> >  SpvDecorationViewportRelativeNV = 5252,
> > @@ -442,6 +451,13 @@ typedef enum SpvBuiltIn_ {
> >  SpvBuiltInDrawIndex = 4426,
> >  SpvBuiltInDeviceIndex = 4438,
> >  SpvBuiltInViewIndex = 4440,
> > +SpvBuiltInBaryCoordNoPerspAMD = 4992,
> > +SpvBuiltInBaryCoordNoPerspCentroidAMD = 4993,
> > +SpvBuiltInBaryCoordNoPerspSampleAMD = 4994,
> > +SpvBuiltInBaryCoordSmoothAMD = 4995,
> > +SpvBuiltInBaryCoordSmoothCentroidAMD = 4996,
> > +SpvBuiltInBaryCoordSmoothSampleAMD = 4997,
> > +SpvBuiltInBaryCoordPullModelAMD = 4998,
> >  SpvBuiltInViewportMaskNV = 5253,
> >  SpvBuiltInSecondaryPositionNV = 5257,
> >  SpvBuiltInSecondaryViewportMaskNV = 5258,
> > @@ -632,12 +648,19 @@ typedef enum SpvCapability_ {
> >  SpvCapabilitySubgroupBallotKHR = 4423,
> >  SpvCapabilityDrawParameters = 4427,
> >  SpvCapabilitySubgroupVoteKHR = 4431,
> > +SpvCapabilityStorageBuffer16BitAccess = 4433,
> >  SpvCapabilityStorageUniformBufferBlock16 = 4433,
> >  SpvCapabilityStorageUniform16 = 4434,
> > +SpvCapabilityUniformAndStorageBuffer16BitAccess = 4434,
> >  SpvCapabilityStoragePushConstant16 = 4435,
> >  SpvCapabilityStorageInputOutput16 = 4436,
> >  SpvCapabilityDeviceGroup = 4437,
> >  SpvCapabilityMultiView = 4439,
> > +SpvCapabilityVariablePointersStorageBuffer = 4441,
> > +SpvCapabilityVariablePointers = 4442,
> > +SpvCapabilityAtomicStorageOps = 4445,
> > +

Re: [Mesa-dev] [PATCH 2/3] nv20: Fix GL_CLAMP

[Ilia Mirkin]

According to rnndb, GL_CLAMP with value 0x5 is actually supported on
nv10+. I'd name the function *_nv10.

I have, at various times, tried to solve some issues by using the 0x5
clamp on my nv1x hardware (nv17 and nv18), with no positive effect.
This is a piglit run I have around from some time back:

https://people.freedesktop.org/~imirkin/nv10-comparison/problems.html

in case you're curious. I guess this is consistent with your results -
no change from doing this, until we get to borders.

With or without that function name change, this is

Reviewed-by: Ilia Mirkin 

[apologies this took me a while to get to]

On Tue, Jun 27, 2017 at 1:09 PM, Ian Romanick  wrote:
> From: Ian Romanick 
>
> v2: Force T and R wrap modes to GL_CLAMP_TO_EDGE for 1D textures.
> This fixes a regression in tex1d-2dborder.  The test uses a 1D texture
> but it provides S and T texture coordinates.  Since the T wrap mode
> would (correctly) be set to GL_CLAMP, the texture would gradually
> blend (incorrectly) with the border color.
>
> I also tried setting NV20_3D_TEX_FORMAT_DIMS_1D instead of
> NV20_3D_TEX_FORMAT_DIMS_2D for 1D textures, but that did not help.
>
> It is possible that the same problem exists for 2D textures with the
> R-wrap mode, but I don't think there are any piglit tests for that.
>
> No test changes on NV20 (10de:0201).
>
> Signed-off-by: Ian Romanick 
> ---
>  src/mesa/drivers/dri/nouveau/nouveau_gldefs.h | 19 +++
>  src/mesa/drivers/dri/nouveau/nv20_state_tex.c | 16 +---
>  2 files changed, 32 insertions(+), 3 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h 
> b/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
> index 46ec14e..7df04c1 100644
> --- a/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
> +++ b/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
> @@ -239,6 +239,25 @@ nvgl_wrap_mode(unsigned wrap)
>  }
>
>  static inline unsigned
> +nvgl_wrap_mode_nv20(unsigned wrap)
> +{
> +   switch (wrap) {
> +   case GL_REPEAT:
> +   return 0x1;
> +   case GL_MIRRORED_REPEAT:
> +   return 0x2;
> +   case GL_CLAMP:
> +   return 0x5;
> +   case GL_CLAMP_TO_EDGE:
> +   return 0x3;
> +   case GL_CLAMP_TO_BORDER:
> +   return 0x4;
> +   default:
> +   unreachable("Bad GL texture wrap mode");
> +   }
> +}
> +
> +static inline unsigned
>  nvgl_filter_mode(unsigned filter)
>  {
> switch (filter) {
> diff --git a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c 
> b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
> index b0a4c9f..7972069 100644
> --- a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
> +++ b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
> @@ -193,9 +193,19 @@ nv20_emit_tex_obj(struct gl_context *ctx, int emit)
> | NV20_3D_TEX_FORMAT_NO_BORDER
> | 1 << 16;
>
> -   tx_wrap = nvgl_wrap_mode(sa->WrapR) << 16
> -   | nvgl_wrap_mode(sa->WrapT) << 8
> -   | nvgl_wrap_mode(sa->WrapS) << 0;
> +   switch (t->Target) {
> +   case GL_TEXTURE_1D:
> +   tx_wrap = NV20_3D_TEX_WRAP_R_CLAMP_TO_EDGE
> +   | NV20_3D_TEX_WRAP_T_CLAMP_TO_EDGE
> +   | nvgl_wrap_mode_nv20(sa->WrapS) << 0;
> +   break;
> +
> +   default:
> +   tx_wrap = nvgl_wrap_mode_nv20(sa->WrapR) << 16
> +   | nvgl_wrap_mode_nv20(sa->WrapT) << 8
> +   | nvgl_wrap_mode_nv20(sa->WrapS) << 0;
> +   break;
> +   }
>
> tx_filter = nvgl_filter_mode(sa->MagFilter) << 24
> | nvgl_filter_mode(sa->MinFilter) << 16
> --
> 2.9.4
>
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Re: [Mesa-dev] [PATCH 1/8] spirv: Import the latest 1.0.2 header from Khronos

[Ian Romanick]

Shouldn't this also update capability_to_string in spriv_info.c?  I'm
also questioning that implementation... there are huge blocks in that
array (e.g., all the elements from 61 to 4322) that are zeroed out by
the initialization.  This will cause spirv_capability_to_string() to
happily return NULL pointers that none of the callers are prepared to
handle.

On 07/13/2017 12:41 PM, Jason Ekstrand wrote:
> ---
>  src/compiler/spirv/spirv.h | 41 +
>  1 file changed, 37 insertions(+), 4 deletions(-)
> 
> diff --git a/src/compiler/spirv/spirv.h b/src/compiler/spirv/spirv.h
> index 89354c0..61559a1 100644
> --- a/src/compiler/spirv/spirv.h
> +++ b/src/compiler/spirv/spirv.h
> @@ -50,12 +50,12 @@
>  
>  typedef unsigned int SpvId;
>  
> -#define SPV_VERSION 0x10100
> -#define SPV_REVISION 6
> +#define SPV_VERSION 0x10200
> +#define SPV_REVISION 1
>  
>  static const unsigned int SpvMagicNumber = 0x07230203;
> -static const unsigned int SpvVersion = 0x00010100;
> -static const unsigned int SpvRevision = 6;
> +static const unsigned int SpvVersion = 0x00010200;
> +static const unsigned int SpvRevision = 1;
>  static const unsigned int SpvOpCodeMask = 0x;
>  static const unsigned int SpvWordCountShift = 16;
>  
> @@ -65,6 +65,7 @@ typedef enum SpvSourceLanguage_ {
>  SpvSourceLanguageGLSL = 2,
>  SpvSourceLanguageOpenCL_C = 3,
>  SpvSourceLanguageOpenCL_CPP = 4,
> +SpvSourceLanguageHLSL = 5,
>  SpvSourceLanguageMax = 0x7fff,
>  } SpvSourceLanguage;
>  
> @@ -129,6 +130,10 @@ typedef enum SpvExecutionMode_ {
>  SpvExecutionModeFinalizer = 34,
>  SpvExecutionModeSubgroupSize = 35,
>  SpvExecutionModeSubgroupsPerWorkgroup = 36,
> +SpvExecutionModeSubgroupsPerWorkgroupId = 37,
> +SpvExecutionModeLocalSizeId = 38,
> +SpvExecutionModeLocalSizeHintId = 39,
> +SpvExecutionModePostDepthCoverage = 4446,
>  SpvExecutionModeMax = 0x7fff,
>  } SpvExecutionMode;
>  
> @@ -145,6 +150,7 @@ typedef enum SpvStorageClass_ {
>  SpvStorageClassPushConstant = 9,
>  SpvStorageClassAtomicCounter = 10,
>  SpvStorageClassImage = 11,
> +SpvStorageClassStorageBuffer = 12,
>  SpvStorageClassMax = 0x7fff,
>  } SpvStorageClass;
>  
> @@ -383,6 +389,9 @@ typedef enum SpvDecoration_ {
>  SpvDecorationInputAttachmentIndex = 43,
>  SpvDecorationAlignment = 44,
>  SpvDecorationMaxByteOffset = 45,
> +SpvDecorationAlignmentId = 46,
> +SpvDecorationMaxByteOffsetId = 47,
> +SpvDecorationExplicitInterpAMD = 4999,
>  SpvDecorationOverrideCoverageNV = 5248,
>  SpvDecorationPassthroughNV = 5250,
>  SpvDecorationViewportRelativeNV = 5252,
> @@ -442,6 +451,13 @@ typedef enum SpvBuiltIn_ {
>  SpvBuiltInDrawIndex = 4426,
>  SpvBuiltInDeviceIndex = 4438,
>  SpvBuiltInViewIndex = 4440,
> +SpvBuiltInBaryCoordNoPerspAMD = 4992,
> +SpvBuiltInBaryCoordNoPerspCentroidAMD = 4993,
> +SpvBuiltInBaryCoordNoPerspSampleAMD = 4994,
> +SpvBuiltInBaryCoordSmoothAMD = 4995,
> +SpvBuiltInBaryCoordSmoothCentroidAMD = 4996,
> +SpvBuiltInBaryCoordSmoothSampleAMD = 4997,
> +SpvBuiltInBaryCoordPullModelAMD = 4998,
>  SpvBuiltInViewportMaskNV = 5253,
>  SpvBuiltInSecondaryPositionNV = 5257,
>  SpvBuiltInSecondaryViewportMaskNV = 5258,
> @@ -632,12 +648,19 @@ typedef enum SpvCapability_ {
>  SpvCapabilitySubgroupBallotKHR = 4423,
>  SpvCapabilityDrawParameters = 4427,
>  SpvCapabilitySubgroupVoteKHR = 4431,
> +SpvCapabilityStorageBuffer16BitAccess = 4433,
>  SpvCapabilityStorageUniformBufferBlock16 = 4433,
>  SpvCapabilityStorageUniform16 = 4434,
> +SpvCapabilityUniformAndStorageBuffer16BitAccess = 4434,
>  SpvCapabilityStoragePushConstant16 = 4435,
>  SpvCapabilityStorageInputOutput16 = 4436,
>  SpvCapabilityDeviceGroup = 4437,
>  SpvCapabilityMultiView = 4439,
> +SpvCapabilityVariablePointersStorageBuffer = 4441,
> +SpvCapabilityVariablePointers = 4442,
> +SpvCapabilityAtomicStorageOps = 4445,
> +SpvCapabilitySampleMaskPostDepthCoverage = 4447,
> +SpvCapabilityImageGatherBiasLodAMD = 5009,
>  SpvCapabilitySampleMaskOverrideCoverageNV = 5249,
>  SpvCapabilityGeometryShaderPassthroughNV = 5251,
>  SpvCapabilityShaderViewportIndexLayerNV = 5254,
> @@ -952,12 +975,22 @@ typedef enum SpvOp_ {
>  SpvOpNamedBarrierInitialize = 328,
>  SpvOpMemoryNamedBarrier = 329,
>  SpvOpModuleProcessed = 330,
> +SpvOpExecutionModeId = 331,
> +SpvOpDecorateId = 332,
>  SpvOpSubgroupBallotKHR = 4421,
>  SpvOpSubgroupFirstInvocationKHR = 4422,
>  SpvOpSubgroupAllKHR = 4428,
>  SpvOpSubgroupAnyKHR = 4429,
>  SpvOpSubgroupAllEqualKHR = 4430,
>  SpvOpSubgroupReadInvocationKHR = 4432,
> +SpvOpGroupIAddNonUniformAMD = 5000,
> +SpvOpGroupFAddNonUniformAMD = 5001,
> +SpvOpGroupFMinNonUniformAMD = 5002,
> +SpvOpGroupUMinNonUniformAMD = 5003,
> +

Re: [Mesa-dev] [PATCH 3/4] i965: Use async maps for BufferSubData to regions with no valid data.

[Chris Wilson]

Quoting Chris Wilson (2017-06-13 12:57:05)
> Quoting Kenneth Graunke (2017-06-13 01:33:31)
> > When writing a region of a buffer via glBufferSubData(), we can write
> > the data asynchronously if the destination doesn't contain any data.
> > Even if it's busy, the data was undefined, so the new data is fine too.
> > 
> > Decreases the number of stall avoidance blits in Manhattan 3.1:
> > - Skylake GT4: -18.3544% +/- 6.76483% (n=13)
> > - Apollolake:  -12.1095% +/- 5.24458% (n=13)
> 
> Makes sense, but MAP_ASYNC is currently disabled on apl.

Did you confirm this improvement after fixing MAP_ASYNC?
-Chris
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Re: [Mesa-dev] XCOM: Enemy Unknown vs. NaN texture unit LOD bias

[Ian Romanick]

On 07/10/2017 11:25 PM, Kenneth Graunke wrote:
> Hello,
> 
> Mesa master has been hitting assert failures when running "XCOM: Enemy
> Unknown" since commit f8d69beed49c64f883bb8ffb28d4960306baf575, where we
> started asserting that the SAMPLER_STATE LOD Bias value actually fits in
> the correct number of bits.
> 
> Apparently, XCOM calls
> 
>glTexEnv(GL_TEXTURE_FILTER_CONTROL_EXT, GL_TEXTURE_LOD_BIAS_EXT, val);
> 
> to set the texture unit LOD bias...but according to gdb, the value is:
> 
>-nan(0x73)
> 
> In i965, we do CLAMP(lod bias, -16, 15)...but NaN ends up failing both
> the < min and > max comparisons, so it slips through.  But, that raises
> the question...what value *should* we be using?  0?  Min?  Max?
> 
> I couldn't find any immediately applicable GL spec text.  Anyone know of
> any?  If not, does DirectX mandate something?

There is one place.  Section 2.3.4.1 (Floating-Point Computation) of the
OpenGL 4.5 core profile spec says:

   "The result of providing a value that is not a floating-point number
   to such a command is unspecified, but must not lead to GL
   interruption or termination. In IEEE arithmetic, for example,
   providing a negative zero or a denormalized number to a GL command
   yields predictable results, while providing a NaN or an infinity
   yields unspecified results."

Crashing is not allowed, but nearly any other behavior is.  Based on
that, I like Roland's suggestion of changing the CLAMP() macro.  We
should also report this to the developers.  I'd wager that some crazy
NaN value is not what they intended.

> I wrote a hack to check isnan and replace it with 0, which gets the game
> working again, but...it seems like we could have this problem in a lot of
> other places too...and I'm not sure what the right answer is.
> 
> https://cgit.freedesktop.org/~kwg/mesa/commit/?h=xcom=6a1c0515b760c943eb547cced754b465aa3bd4ca
> 
> Thanks for any advice :)
> 
> --Ken



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Re: [Mesa-dev] [PATCH 4/4] i965: Orphan storage in MapBufferRange if invalidating all valid data.

[Kenneth Graunke]

On Thursday, July 13, 2017 3:04:59 PM PDT Jason Ekstrand wrote:
> Do you have any data on how much this helps?  Regardless, the series is
> 
> Reviewed-by: Jason Ekstrand 

Thanks!  It turns out that, no, I don't have any data on this patch.

I'd originally found it helpful, but I had been testing a broken version
which assumed that GL_MAP_WRITE_BIT implied the mapped region would be
overwritten...but it doesn't, unless you have GL_MAP_INVALIDATE_RANGE_BIT.

With that fixed, I'm not seeing this condition ever trigger in any of the
workloads I looked at.

It still seems like the right thing to do, but maybe I should hold off for
now.  (I should also implement InvalidateBufferSubData...)

Patches 1-3 are still definitely useful.

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[Mesa-dev] [PATCH 0/8] anv: Implement VK_KHR_external_semaphore

[Jason Ekstrand]

This series adds back in the VK_KHR_external_semaphore extensions and
re-ups my userspace patches to use the new kernel API I proposed on top of
DRM syncobj.  For the KHR version, I'd like to wait on advertising the
extension until the syncobj kernel bits land.  That way we never have to
worry about Vulkan driver version mismatches for semaphores.  The only bit
of "negotiation" to determine what kind of semaphores to use is to query
the kernel for FENCE_ARRAY support.

Jason Ekstrand (8):
  anv: Add a basic implementation of VK_KHX_external_semaphore
  anv: Submit a dummy batch when only semaphores are provided.
  anv/gem: Use EXECBUFFER2_WR when the FENCE_OUT flag is set
  anv: Implement support for exporting semaphores as FENCE_FD
  intel/drm: Pull in the i916 fence array API
  anv/gem: Add a drm syncobj support
  anv: Use DRM sync objects for external semaphores when available
  anv: Advertise VK_KHR_external_semaphore

 include/drm-uapi/i915_drm.h |  30 -
 src/intel/vulkan/anv_batch_chain.c  | 152 -
 src/intel/vulkan/anv_device.c   |  40 ++
 src/intel/vulkan/anv_entrypoints_gen.py |   6 +
 src/intel/vulkan/anv_gem.c  |  93 -
 src/intel/vulkan/anv_gem_stubs.c|  24 
 src/intel/vulkan/anv_private.h  |  36 -
 src/intel/vulkan/anv_queue.c| 228 +++-
 8 files changed, 590 insertions(+), 19 deletions(-)

-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH 5/8] intel/drm: Pull in the i916 fence array API

[Jason Ekstrand]

---
 include/drm-uapi/i915_drm.h | 30 --
 1 file changed, 28 insertions(+), 2 deletions(-)

diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index c26bf7c..338c8c2 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -431,6 +431,11 @@ typedef struct drm_i915_irq_wait {
  */
 #define I915_PARAM_HAS_EXEC_BATCH_FIRST 48
 
+/* Query whether DRM_I915_GEM_EXECBUFFER2 supports supplying an array of
+ * drm_i915_gem_exec_fence structures.  See I915_EXEC_FENCE_ARRAY.
+ */
+#define I915_PARAM_HAS_EXEC_FENCE_ARRAY  49
+
 typedef struct drm_i915_getparam {
__s32 param;
/*
@@ -812,6 +817,17 @@ struct drm_i915_gem_exec_object2 {
__u64 rsvd2;
 };
 
+struct drm_i915_gem_exec_fence {
+   /**
+* User's handle for a dma-fence to wait on or signal.
+*/
+   __u32 handle;
+
+#define I915_EXEC_FENCE_WAIT(1<<0)
+#define I915_EXEC_FENCE_SIGNAL  (1<<1)
+   __u32 flags;
+};
+
 struct drm_i915_gem_execbuffer2 {
/**
 * List of gem_exec_object2 structs
@@ -826,7 +842,10 @@ struct drm_i915_gem_execbuffer2 {
__u32 DR1;
__u32 DR4;
__u32 num_cliprects;
-   /** This is a struct drm_clip_rect *cliprects */
+   /** This is a struct drm_clip_rect *cliprects if I915_EXEC_FENCE_ARRAY
+ * is not set.  If I915_EXEC_FENCE_ARRAY is set, then this is a
+ * struct drm_i915_gem_exec_fence *fences.
+ */
__u64 cliprects_ptr;
 #define I915_EXEC_RING_MASK  (7<<0)
 #define I915_EXEC_DEFAULT(0<<0)
@@ -927,7 +946,14 @@ struct drm_i915_gem_execbuffer2 {
  * element).
  */
 #define I915_EXEC_BATCH_FIRST  (1<<18)
-#define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_BATCH_FIRST<<1))
+
+/* Setting I915_FENCE_ARRAY implies that num_cliprects and cliprects_ptr
+ * define an array of i915_gem_exec_fence structures which specify a set of
+ * dma fences to wait upon or signal.
+ */
+#define I915_EXEC_FENCE_ARRAY   (1<<19)
+
+#define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_FENCE_ARRAY<<1))
 
 #define I915_EXEC_CONTEXT_ID_MASK  (0x)
 #define i915_execbuffer2_set_context_id(eb2, context) \
-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH 7/8] anv: Use DRM sync objects for external semaphores when available

[Jason Ekstrand]

---
 src/intel/vulkan/anv_batch_chain.c | 56 +++
 src/intel/vulkan/anv_device.c  |  1 +
 src/intel/vulkan/anv_private.h |  8 
 src/intel/vulkan/anv_queue.c   | 93 --
 4 files changed, 134 insertions(+), 24 deletions(-)

diff --git a/src/intel/vulkan/anv_batch_chain.c 
b/src/intel/vulkan/anv_batch_chain.c
index b2cfbdc..3561281 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -957,6 +957,10 @@ struct anv_execbuf {
 
/* Allocated length of the 'objects' and 'bos' arrays */
uint32_t  array_length;
+
+   uint32_t  fence_count;
+   uint32_t  fence_array_length;
+   struct drm_i915_gem_exec_fence *  fences;
 };
 
 static void
@@ -971,6 +975,7 @@ anv_execbuf_finish(struct anv_execbuf *exec,
 {
vk_free(alloc, exec->objects);
vk_free(alloc, exec->bos);
+   vk_free(alloc, exec->fences);
 }
 
 static VkResult
@@ -1061,6 +1066,35 @@ anv_execbuf_add_bo(struct anv_execbuf *exec,
return VK_SUCCESS;
 }
 
+static VkResult
+anv_execbuf_add_syncobj(struct anv_execbuf *exec,
+uint32_t handle,
+uint32_t flags,
+const VkAllocationCallbacks *alloc)
+{
+   if (exec->fence_count >= exec->fence_array_length) {
+  uint32_t new_len = MAX2(exec->fence_array_length * 2, 64);
+
+  struct drm_i915_gem_exec_fence *new_fences =
+ vk_realloc(alloc, exec->fences, new_len * sizeof(*new_fences),
+8, VK_SYSTEM_ALLOCATION_SCOPE_COMMAND);
+  if (new_fences == NULL)
+ return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
+
+  exec->fences = new_fences;
+  exec->fence_array_length = new_len;
+   }
+
+   exec->fences[exec->fence_count] = (struct drm_i915_gem_exec_fence) {
+  .handle = handle,
+  .flags = flags,
+   };
+
+   exec->fence_count++;
+
+   return VK_SUCCESS;
+}
+
 static void
 anv_cmd_buffer_process_relocs(struct anv_cmd_buffer *cmd_buffer,
   struct anv_reloc_list *list)
@@ -1448,6 +1482,14 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
  impl->fd = -1;
  break;
 
+  case ANV_SEMAPHORE_TYPE_DRM_SYNCOBJ:
+ result = anv_execbuf_add_syncobj(, impl->syncobj,
+  I915_EXEC_FENCE_WAIT,
+  >alloc);
+ if (result != VK_SUCCESS)
+return result;
+ break;
+
   default:
  break;
   }
@@ -1482,6 +1524,14 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
  need_out_fence = true;
  break;
 
+  case ANV_SEMAPHORE_TYPE_DRM_SYNCOBJ:
+ result = anv_execbuf_add_syncobj(, impl->syncobj,
+  I915_EXEC_FENCE_SIGNAL,
+  >alloc);
+ if (result != VK_SUCCESS)
+return result;
+ break;
+
   default:
  break;
   }
@@ -1495,6 +1545,12 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
   setup_empty_execbuf(, device);
}
 
+   if (execbuf.fence_count > 0) {
+  execbuf.execbuf.flags |= I915_EXEC_FENCE_ARRAY;
+  execbuf.execbuf.num_cliprects = execbuf.fence_count;
+  execbuf.execbuf.cliprects_ptr = (uintptr_t) execbuf.fences;
+   }
+
if (in_fence != -1) {
   execbuf.execbuf.flags |= I915_EXEC_FENCE_IN;
   execbuf.execbuf.rsvd2 |= (uint32_t)in_fence;
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index cc78f49..fe464e0 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -338,6 +338,7 @@ anv_physical_device_init(struct anv_physical_device *device,
 
device->has_exec_async = anv_gem_get_param(fd, I915_PARAM_HAS_EXEC_ASYNC);
device->has_exec_fence = anv_gem_get_param(fd, I915_PARAM_HAS_EXEC_FENCE);
+   device->has_syncobj = anv_gem_get_param(fd, 
I915_PARAM_HAS_EXEC_FENCE_ARRAY);
 
bool swizzled = anv_gem_get_bit6_swizzle(fd, I915_TILING_X);
 
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index cd744776..490164d 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -653,6 +653,7 @@ struct anv_physical_device {
 int cmd_parser_version;
 boolhas_exec_async;
 boolhas_exec_fence;
+boolhas_syncobj;
 
 uint32_teu_total;
 uint32_tsubslice_total;
@@ -1740,6 +1741,7 @@ enum anv_semaphore_type {
ANV_SEMAPHORE_TYPE_DUMMY,
ANV_SEMAPHORE_TYPE_BO,
ANV_SEMAPHORE_TYPE_SYNC_FILE,
+   ANV_SEMAPHORE_TYPE_DRM_SYNCOBJ,
 };
 
 struct anv_semaphore_impl {
@@ -1758,6 +1760,12 @@ 

[Mesa-dev] [PATCH 2/8] anv: Submit a dummy batch when only semaphores are provided.

[Jason Ekstrand]

Vulkan allows you to do a submit whose only job is to wait on and
trigger semaphores.  The easiest way for us to support that right
now is to insert a dummy execbuf.
---
 src/intel/vulkan/anv_batch_chain.c | 28 +---
 src/intel/vulkan/anv_device.c  | 26 ++
 src/intel/vulkan/anv_private.h |  1 +
 src/intel/vulkan/anv_queue.c   | 17 +
 4 files changed, 69 insertions(+), 3 deletions(-)

diff --git a/src/intel/vulkan/anv_batch_chain.c 
b/src/intel/vulkan/anv_batch_chain.c
index ad76dc1..ec745a4 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -1388,6 +1388,23 @@ setup_execbuf_for_cmd_buffer(struct anv_execbuf *execbuf,
return VK_SUCCESS;
 }
 
+static void
+setup_empty_execbuf(struct anv_execbuf *execbuf, struct anv_device *device)
+{
+   anv_execbuf_add_bo(execbuf, >trivial_batch_bo, NULL, 0,
+  >alloc);
+
+   execbuf->execbuf = (struct drm_i915_gem_execbuffer2) {
+  .buffers_ptr = (uintptr_t) execbuf->objects,
+  .buffer_count = execbuf->bo_count,
+  .batch_start_offset = 0,
+  .batch_len = 8, /* GEN8_MI_BATCH_BUFFER_END and NOOP */
+  .flags = I915_EXEC_HANDLE_LUT | I915_EXEC_RENDER,
+  .rsvd1 = device->context_id,
+  .rsvd2 = 0,
+   };
+}
+
 VkResult
 anv_cmd_buffer_execbuf(struct anv_device *device,
struct anv_cmd_buffer *cmd_buffer,
@@ -1434,9 +1451,14 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
   }
}
 
-   result = setup_execbuf_for_cmd_buffer(, cmd_buffer);
-   if (result != VK_SUCCESS)
-  return result;
+   if (cmd_buffer) {
+  result = setup_execbuf_for_cmd_buffer(, cmd_buffer);
+  if (result != VK_SUCCESS)
+ return result;
+   } else {
+  setup_empty_execbuf(, device);
+   }
+
 
result = anv_device_execbuf(device, , execbuf.bos);
 
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 6fc57cd..a98bd7c 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -1101,6 +1101,28 @@ anv_device_init_border_colors(struct anv_device *device)
 border_colors);
 }
 
+static void
+anv_device_init_trivial_batch(struct anv_device *device)
+{
+   anv_bo_init_new(>trivial_batch_bo, device, 4096);
+   void *map = anv_gem_mmap(device, device->trivial_batch_bo.gem_handle,
+0, 4096, 0);
+
+   struct anv_batch batch = {
+  .start = map,
+  .next = map,
+  .end = map + 4096,
+   };
+
+   anv_batch_emit(, GEN7_MI_BATCH_BUFFER_END, bbe);
+   anv_batch_emit(, GEN7_MI_NOOP, noop);
+
+   if (!device->info.has_llc)
+  gen_clflush_range(map, batch.next - map);
+
+   anv_gem_munmap(map, device->trivial_batch_bo.size);
+}
+
 VkResult anv_CreateDevice(
 VkPhysicalDevicephysicalDevice,
 const VkDeviceCreateInfo*   pCreateInfo,
@@ -1225,6 +1247,8 @@ VkResult anv_CreateDevice(
if (result != VK_SUCCESS)
   goto fail_surface_state_pool;
 
+   anv_device_init_trivial_batch(device);
+
anv_scratch_pool_init(device, >scratch_pool);
 
anv_queue_init(device, >queue);
@@ -1314,6 +1338,8 @@ void anv_DestroyDevice(
anv_gem_munmap(device->workaround_bo.map, device->workaround_bo.size);
anv_gem_close(device, device->workaround_bo.gem_handle);
 
+   anv_gem_close(device, device->trivial_batch_bo.gem_handle);
+
anv_state_pool_finish(>surface_state_pool);
anv_state_pool_finish(>instruction_state_pool);
anv_state_pool_finish(>dynamic_state_pool);
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 4dce360..e95a640 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -740,6 +740,7 @@ struct anv_device {
 struct anv_state_pool   surface_state_pool;
 
 struct anv_bo   workaround_bo;
+struct anv_bo   trivial_batch_bo;
 
 struct anv_pipeline_cache   blorp_shader_cache;
 struct blorp_contextblorp;
diff --git a/src/intel/vulkan/anv_queue.c b/src/intel/vulkan/anv_queue.c
index 570efec..14bc50d 100644
--- a/src/intel/vulkan/anv_queue.c
+++ b/src/intel/vulkan/anv_queue.c
@@ -159,6 +159,23 @@ VkResult anv_QueueSubmit(
pthread_mutex_lock(>mutex);
 
for (uint32_t i = 0; i < submitCount; i++) {
+  if (pSubmits[i].commandBufferCount == 0) {
+ /* If we don't have any command buffers, we need to submit a dummy
+  * batch to give GEM something to wait on.  We could, potentially,
+  * come up with something more efficient but this shouldn't be a
+  * common case.
+  */
+ result = anv_cmd_buffer_execbuf(device, NULL,
+ pSubmits[i].pWaitSemaphores,
+ 

[Mesa-dev] [PATCH 8/8] anv: Advertise VK_KHR_external_semaphore

[Jason Ekstrand]

---
 src/intel/vulkan/anv_device.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index fe464e0..712cc7f 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -414,6 +414,10 @@ static const VkExtensionProperties global_extensions[] = {
   .specVersion = 1,
},
{
+  .extensionName = VK_KHR_EXTERNAL_SEMAPHORE_CAPABILITIES_EXTENSION_NAME,
+  .specVersion = 1,
+   },
+   {
   .extensionName = VK_KHR_GET_PHYSICAL_DEVICE_PROPERTIES_2_EXTENSION_NAME,
   .specVersion = 1,
},
@@ -463,6 +467,14 @@ static const VkExtensionProperties device_extensions[] = {
   .specVersion = 1,
},
{
+  .extensionName = VK_KHR_EXTERNAL_SEMAPHORE_EXTENSION_NAME,
+  .specVersion = 1,
+   },
+   {
+  .extensionName = VK_KHR_EXTERNAL_SEMAPHORE_FD_EXTENSION_NAME,
+  .specVersion = 1,
+   },
+   {
   .extensionName = VK_KHR_GET_MEMORY_REQUIREMENTS_2_EXTENSION_NAME,
   .specVersion = 1,
},
-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH 3/8] anv/gem: Use EXECBUFFER2_WR when the FENCE_OUT flag is set

[Jason Ekstrand]

Reviewed-by: Chad Versace 
---
 src/intel/vulkan/anv_gem.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_gem.c b/src/intel/vulkan/anv_gem.c
index ac47da4..36692f5 100644
--- a/src/intel/vulkan/anv_gem.c
+++ b/src/intel/vulkan/anv_gem.c
@@ -185,7 +185,10 @@ int
 anv_gem_execbuffer(struct anv_device *device,
struct drm_i915_gem_execbuffer2 *execbuf)
 {
-   return anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf);
+   if (execbuf->flags & I915_EXEC_FENCE_OUT)
+  return anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2_WR, execbuf);
+   else
+  return anv_ioctl(device->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf);
 }
 
 int
-- 
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[Mesa-dev] [PATCH 6/8] anv/gem: Add a drm syncobj support

[Jason Ekstrand]

---
 src/intel/vulkan/anv_gem.c   | 52 
 src/intel/vulkan/anv_gem_stubs.c | 24 +++
 src/intel/vulkan/anv_private.h   |  4 
 3 files changed, 80 insertions(+)

diff --git a/src/intel/vulkan/anv_gem.c b/src/intel/vulkan/anv_gem.c
index 5b68e9b..9e6b2bb 100644
--- a/src/intel/vulkan/anv_gem.c
+++ b/src/intel/vulkan/anv_gem.c
@@ -436,3 +436,55 @@ anv_gem_sync_file_merge(struct anv_device *device, int 
fd1, int fd2)
 
return args.fence;
 }
+
+uint32_t
+anv_gem_syncobj_create(struct anv_device *device)
+{
+   struct drm_syncobj_create args = {
+  .flags = 0,
+   };
+
+   int ret = anv_ioctl(device->fd, DRM_IOCTL_SYNCOBJ_CREATE, );
+   if (ret)
+  return 0;
+
+   return args.handle;
+}
+
+void
+anv_gem_syncobj_destroy(struct anv_device *device, uint32_t handle)
+{
+   struct drm_syncobj_destroy args = {
+  .handle = handle,
+   };
+
+   anv_ioctl(device->fd, DRM_IOCTL_SYNCOBJ_DESTROY, );
+}
+
+int
+anv_gem_syncobj_handle_to_fd(struct anv_device *device, uint32_t handle)
+{
+   struct drm_syncobj_handle args = {
+  .handle = handle,
+   };
+
+   int ret = anv_ioctl(device->fd, DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD, );
+   if (ret)
+  return -1;
+
+   return args.fd;
+}
+
+uint32_t
+anv_gem_syncobj_fd_to_handle(struct anv_device *device, int fd)
+{
+   struct drm_syncobj_handle args = {
+  .fd = fd,
+   };
+
+   int ret = anv_ioctl(device->fd, DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE, );
+   if (ret)
+  return 0;
+
+   return args.handle;
+}
diff --git a/src/intel/vulkan/anv_gem_stubs.c b/src/intel/vulkan/anv_gem_stubs.c
index 8d81eb5..842efb3 100644
--- a/src/intel/vulkan/anv_gem_stubs.c
+++ b/src/intel/vulkan/anv_gem_stubs.c
@@ -180,3 +180,27 @@ anv_gem_fd_to_handle(struct anv_device *device, int fd)
 {
unreachable("Unused");
 }
+
+uint32_t
+anv_gem_syncobj_create(struct anv_device *device)
+{
+   unreachable("Unused");
+}
+
+void
+anv_gem_syncobj_destroy(struct anv_device *device, uint32_t handle)
+{
+   unreachable("Unused");
+}
+
+int
+anv_gem_syncobj_handle_to_fd(struct anv_device *device, uint32_t handle)
+{
+   unreachable("Unused");
+}
+
+uint32_t
+anv_gem_syncobj_fd_to_handle(struct anv_device *device, int fd)
+{
+   unreachable("Unused");
+}
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 834271f..cd744776 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -807,6 +807,10 @@ int anv_gem_set_caching(struct anv_device *device, 
uint32_t gem_handle, uint32_t
 int anv_gem_set_domain(struct anv_device *device, uint32_t gem_handle,
uint32_t read_domains, uint32_t write_domain);
 int anv_gem_sync_file_merge(struct anv_device *device, int fd1, int fd2);
+uint32_t anv_gem_syncobj_create(struct anv_device *device);
+void anv_gem_syncobj_destroy(struct anv_device *device, uint32_t handle);
+int anv_gem_syncobj_handle_to_fd(struct anv_device *device, uint32_t handle);
+uint32_t anv_gem_syncobj_fd_to_handle(struct anv_device *device, int fd);
 
 VkResult anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, 
uint64_t size);
 
-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH 4/8] anv: Implement support for exporting semaphores as FENCE_FD

[Jason Ekstrand]

---
 src/intel/vulkan/anv_batch_chain.c | 68 --
 src/intel/vulkan/anv_device.c  |  1 +
 src/intel/vulkan/anv_gem.c | 36 
 src/intel/vulkan/anv_private.h | 23 +
 src/intel/vulkan/anv_queue.c   | 56 +--
 5 files changed, 173 insertions(+), 11 deletions(-)

diff --git a/src/intel/vulkan/anv_batch_chain.c 
b/src/intel/vulkan/anv_batch_chain.c
index ec745a4..b2cfbdc 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -1416,11 +1416,13 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
struct anv_execbuf execbuf;
anv_execbuf_init();
 
+   int in_fence = -1;
VkResult result = VK_SUCCESS;
for (uint32_t i = 0; i < num_in_semaphores; i++) {
   ANV_FROM_HANDLE(anv_semaphore, semaphore, in_semaphores[i]);
-  assert(semaphore->temporary.type == ANV_SEMAPHORE_TYPE_NONE);
-  struct anv_semaphore_impl *impl = >permanent;
+  struct anv_semaphore_impl *impl =
+ semaphore->temporary.type != ANV_SEMAPHORE_TYPE_NONE ?
+ >temporary : >permanent;
 
   switch (impl->type) {
   case ANV_SEMAPHORE_TYPE_BO:
@@ -1429,13 +1431,42 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
  if (result != VK_SUCCESS)
 return result;
  break;
+
+  case ANV_SEMAPHORE_TYPE_SYNC_FILE:
+ if (in_fence == -1) {
+in_fence = impl->fd;
+ } else {
+int merge = anv_gem_sync_file_merge(device, in_fence, impl->fd);
+if (merge == -1)
+   return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR);
+
+close(impl->fd);
+close(in_fence);
+in_fence = merge;
+ }
+
+ impl->fd = -1;
+ break;
+
   default:
  break;
   }
+
+  /* Waiting on a semaphore with temporary state implicitly resets it back
+   * to the permanent state.
+   */
+  if (semaphore->temporary.type != ANV_SEMAPHORE_TYPE_NONE) {
+ assert(semaphore->temporary.type == ANV_SEMAPHORE_TYPE_SYNC_FILE);
+ semaphore->temporary.type = ANV_SEMAPHORE_TYPE_NONE;
+  }
}
 
+   bool need_out_fence = false;
for (uint32_t i = 0; i < num_out_semaphores; i++) {
   ANV_FROM_HANDLE(anv_semaphore, semaphore, out_semaphores[i]);
+  /* Out fences can't have temporary state because that would imply
+   * that we imported a sync file and are trying to signal it.
+   */
   assert(semaphore->temporary.type == ANV_SEMAPHORE_TYPE_NONE);
   struct anv_semaphore_impl *impl = >permanent;
 
@@ -1446,6 +1477,11 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
  if (result != VK_SUCCESS)
 return result;
  break;
+
+  case ANV_SEMAPHORE_TYPE_SYNC_FILE:
+ need_out_fence = true;
+ break;
+
   default:
  break;
   }
@@ -1459,9 +1495,37 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
   setup_empty_execbuf(, device);
}
 
+   if (in_fence != -1) {
+  execbuf.execbuf.flags |= I915_EXEC_FENCE_IN;
+  execbuf.execbuf.rsvd2 |= (uint32_t)in_fence;
+   }
+
+   if (need_out_fence)
+  execbuf.execbuf.flags |= I915_EXEC_FENCE_OUT;
 
result = anv_device_execbuf(device, , execbuf.bos);
 
+   /* Execbuf does not consume the in_fence.  It's our job to close it. */
+   close(in_fence);
+
+   if (result == VK_SUCCESS && need_out_fence) {
+  int out_fence = execbuf.execbuf.rsvd2 >> 32;
+  for (uint32_t i = 0; i < num_out_semaphores; i++) {
+ ANV_FROM_HANDLE(anv_semaphore, semaphore, out_semaphores[i]);
+ /* Out fences can't have temporary state because that would imply
+  * that we imported a sync file and are trying to signal it.
+  */
+ assert(semaphore->temporary.type == ANV_SEMAPHORE_TYPE_NONE);
+ struct anv_semaphore_impl *impl = >permanent;
+
+ if (impl->type == ANV_SEMAPHORE_TYPE_SYNC_FILE) {
+assert(impl->fd == -1);
+impl->fd = dup(out_fence);
+ }
+  }
+  close(out_fence);
+   }
+
anv_execbuf_finish(, >alloc);
 
return result;
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index a98bd7c..cc78f49 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -337,6 +337,7 @@ anv_physical_device_init(struct anv_physical_device *device,
   goto fail;
 
device->has_exec_async = anv_gem_get_param(fd, I915_PARAM_HAS_EXEC_ASYNC);
+   device->has_exec_fence = anv_gem_get_param(fd, I915_PARAM_HAS_EXEC_FENCE);
 
bool swizzled = anv_gem_get_bit6_swizzle(fd, I915_TILING_X);
 
diff --git a/src/intel/vulkan/anv_gem.c b/src/intel/vulkan/anv_gem.c
index 36692f5..5b68e9b 100644
--- a/src/intel/vulkan/anv_gem.c
+++ b/src/intel/vulkan/anv_gem.c
@@ -22,6 +22,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -400,3 +401,38 @@ 

[Mesa-dev] [PATCH 1/8] anv: Add a basic implementation of VK_KHX_external_semaphore

[Jason Ekstrand]

This patch adds an implementation based on DRM BOs.  We don't actually
advertise the extension yet because we want to add a couple more paths
first.
---
 src/intel/vulkan/anv_entrypoints_gen.py |   6 ++
 src/intel/vulkan/anv_queue.c| 116 ++--
 2 files changed, 117 insertions(+), 5 deletions(-)

diff --git a/src/intel/vulkan/anv_entrypoints_gen.py 
b/src/intel/vulkan/anv_entrypoints_gen.py
index e59c494..d08e35e 100644
--- a/src/intel/vulkan/anv_entrypoints_gen.py
+++ b/src/intel/vulkan/anv_entrypoints_gen.py
@@ -39,6 +39,9 @@ SUPPORTED_EXTENSIONS = [
 'VK_KHR_external_memory_capabilities',
 'VK_KHR_external_memory_fd',
 'VK_KHR_get_memory_requirements2',
+'VK_KHR_external_semaphore',
+'VK_KHR_external_semaphore_capabilities',
+'VK_KHR_external_semaphore_fd',
 'VK_KHR_get_physical_device_properties2',
 'VK_KHR_get_surface_capabilities2',
 'VK_KHR_incremental_present',
@@ -51,6 +54,9 @@ SUPPORTED_EXTENSIONS = [
 'VK_KHR_wayland_surface',
 'VK_KHR_xcb_surface',
 'VK_KHR_xlib_surface',
+'VK_KHX_external_semaphore',
+'VK_KHX_external_semaphore_capabilities',
+'VK_KHX_external_semaphore_fd',
 'VK_KHX_multiview',
 ]
 
diff --git a/src/intel/vulkan/anv_queue.c b/src/intel/vulkan/anv_queue.c
index 2c10e9d..570efec 100644
--- a/src/intel/vulkan/anv_queue.c
+++ b/src/intel/vulkan/anv_queue.c
@@ -528,11 +528,38 @@ VkResult anv_CreateSemaphore(
if (semaphore == NULL)
   return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 
-   /* The DRM execbuffer ioctl always execute in-oder so long as you stay
-* on the same ring.  Since we don't expose the blit engine as a DMA
-* queue, a dummy no-op semaphore is a perfectly valid implementation.
-*/
-   semaphore->permanent.type = ANV_SEMAPHORE_TYPE_DUMMY;
+   const VkExportSemaphoreCreateInfoKHR *export =
+  vk_find_struct_const(pCreateInfo->pNext, 
EXPORT_SEMAPHORE_CREATE_INFO_KHR);
+VkExternalSemaphoreHandleTypeFlagsKHR handleTypes =
+  export ? export->handleTypes : 0;
+
+   if (handleTypes == 0) {
+  /* The DRM execbuffer ioctl always execute in-oder so long as you stay
+   * on the same ring.  Since we don't expose the blit engine as a DMA
+   * queue, a dummy no-op semaphore is a perfectly valid implementation.
+   */
+  semaphore->permanent.type = ANV_SEMAPHORE_TYPE_DUMMY;
+   } else if (handleTypes & 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR) {
+  assert(handleTypes == 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR);
+
+  semaphore->permanent.type = ANV_SEMAPHORE_TYPE_BO;
+  VkResult result = anv_bo_cache_alloc(device, >bo_cache,
+   4096, >permanent.bo);
+  if (result != VK_SUCCESS) {
+ vk_free2(>alloc, pAllocator, semaphore);
+ return result;
+  }
+
+  /* If we're going to use this as a fence, we need to *not* have the
+   * EXEC_OBJECT_ASYNC bit set.
+   */
+  assert(!(semaphore->permanent.bo->flags & EXEC_OBJECT_ASYNC));
+   } else {
+  assert(!"Unknown handle type");
+  vk_free2(>alloc, pAllocator, semaphore);
+  return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR);
+   }
+
semaphore->temporary.type = ANV_SEMAPHORE_TYPE_NONE;
 
*pSemaphore = anv_semaphore_to_handle(semaphore);
@@ -574,3 +601,82 @@ void anv_DestroySemaphore(
 
vk_free2(>alloc, pAllocator, semaphore);
 }
+
+void anv_GetPhysicalDeviceExternalSemaphorePropertiesKHR(
+VkPhysicalDevicephysicalDevice,
+const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo,
+VkExternalSemaphorePropertiesKHR*   pExternalSemaphoreProperties)
+{
+   switch (pExternalSemaphoreInfo->handleType) {
+   case VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR:
+  pExternalSemaphoreProperties->exportFromImportedHandleTypes =
+ VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR;
+  pExternalSemaphoreProperties->compatibleHandleTypes =
+ VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR;
+  pExternalSemaphoreProperties->externalSemaphoreFeatures =
+ VK_EXTERNAL_SEMAPHORE_FEATURE_EXPORTABLE_BIT_KHR |
+ VK_EXTERNAL_SEMAPHORE_FEATURE_IMPORTABLE_BIT_KHR;
+  break;
+
+   default:
+  pExternalSemaphoreProperties->exportFromImportedHandleTypes = 0;
+  pExternalSemaphoreProperties->compatibleHandleTypes = 0;
+  pExternalSemaphoreProperties->externalSemaphoreFeatures = 0;
+   }
+}
+
+VkResult anv_ImportSemaphoreFdKHR(
+VkDevice_device,
+const VkImportSemaphoreFdInfoKHR*   pImportSemaphoreFdInfo)
+{
+   ANV_FROM_HANDLE(anv_device, device, _device);
+   ANV_FROM_HANDLE(anv_semaphore, semaphore, 
pImportSemaphoreFdInfo->semaphore);
+
+   switch (pImportSemaphoreFdInfo->handleType) {
+   case VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR: {
+  struct anv_bo *bo;
+  VkResult 

[Mesa-dev] [PATCH] ac/nir: rewrite shared variable handling (v2)

[Connor Abbott]

From: Connor Abbott 

Translate the NIR variables directly to LLVM instead of lowering to a
TGSI-style giant array of vec4's and then back to a variable. This
should fix indirect dereferences, make shared variables more tightly
packed, and make LLVM's alias analysis more precise. This should fix an
upcoming Feral title, which has a compute shader that was failing to
compile because the extra padding made us run out of LDS space.

v2: Combine the previous two patches into one, only use this for shared
variables for now until LLVM becomes smarter.

Cc: Alex Smith 
Reviewed-by: Bas Nieuwenhuizen 
---
Alex: I made this by squashing together two patches from my series, so it
should still work, but I'd still like to get your Tested-by before I push to
make sure I didn't screw something up.

 src/amd/common/ac_nir_to_llvm.c | 245 ++--
 1 file changed, 158 insertions(+), 87 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 9223310..9a69066 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -65,6 +65,7 @@ struct nir_to_llvm_context {
 
struct hash_table *defs;
struct hash_table *phis;
+   struct hash_table *vars;
 
LLVMValueRef descriptor_sets[AC_UD_MAX_SETS];
LLVMValueRef ring_offsets;
@@ -154,7 +155,6 @@ struct nir_to_llvm_context {
LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS * 4];
 
-   LLVMValueRef shared_memory;
uint64_t input_mask;
uint64_t output_mask;
int num_locals;
@@ -387,23 +387,6 @@ static LLVMTypeRef const_array(LLVMTypeRef elem_type, int 
num_elements)
   CONST_ADDR_SPACE);
 }
 
-static LLVMValueRef get_shared_memory_ptr(struct nir_to_llvm_context *ctx,
- int idx,
- LLVMTypeRef type)
-{
-   LLVMValueRef offset;
-   LLVMValueRef ptr;
-   int addr_space;
-
-   offset = LLVMConstInt(ctx->i32, idx * 16, false);
-
-   ptr = ctx->shared_memory;
-   ptr = LLVMBuildGEP(ctx->builder, ptr, , 1, "");
-   addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
-   ptr = LLVMBuildBitCast(ctx->builder, ptr, LLVMPointerType(type, 
addr_space), "");
-   return ptr;
-}
-
 static LLVMTypeRef to_integer_type_scalar(struct ac_llvm_context *ctx, 
LLVMTypeRef t)
 {
if (t == ctx->f16 || t == ctx->i16)
@@ -2905,6 +2888,45 @@ load_gs_input(struct nir_to_llvm_context *ctx,
return result;
 }
 
+static LLVMValueRef
+build_gep_for_deref(struct nir_to_llvm_context *ctx,
+   nir_deref_var *deref)
+{
+   struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, 
deref->var);
+   assert(entry->data);
+   LLVMValueRef val = entry->data;
+   nir_deref *tail = deref->deref.child;
+   while (tail != NULL) {
+   LLVMValueRef offset;
+   switch (tail->deref_type) {
+   case nir_deref_type_array: {
+   nir_deref_array *array = nir_deref_as_array(tail);
+   offset = LLVMConstInt(ctx->i32, array->base_offset, 0);
+   if (array->deref_array_type ==
+   nir_deref_array_type_indirect) {
+   offset = LLVMBuildAdd(ctx->builder, offset,
+ get_src(ctx,
+ array->indirect),
+ "");
+   }
+   break;
+   }
+   case nir_deref_type_struct: {
+   nir_deref_struct *deref_struct =
+   nir_deref_as_struct(tail);
+   offset = LLVMConstInt(ctx->i32,
+ deref_struct->index, 0);
+   break;
+   }
+   default:
+   unreachable("bad deref type");
+   }
+   val = ac_build_gep0(>ac, val, offset);
+   tail = tail->child;
+   }
+   return val;
+}
+
 static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx,
   nir_intrinsic_instr *instr)
 {
@@ -2966,6 +2988,14 @@ static LLVMValueRef visit_load_var(struct 
nir_to_llvm_context *ctx,
}
}
break;
+   case nir_var_shared: {
+   LLVMValueRef address = build_gep_for_deref(ctx,
+  instr->variables[0]);
+   LLVMValueRef val = LLVMBuildLoad(ctx->builder, address, "");
+   return LLVMBuildBitCast(ctx->builder, val,
+  

Re: [Mesa-dev] [PATCH 4/4] i965: Orphan storage in MapBufferRange if invalidating all valid data.

[Jason Ekstrand]

Do you have any data on how much this helps?  Regardless, the series is

Reviewed-by: Jason Ekstrand 

On Mon, Jun 12, 2017 at 5:33 PM, Kenneth Graunke 
wrote:

> We can promote INVALIDATE_RANGE_BIT to INVALIDATE_BUFFER_BIT if the
> range contains the only valid data in the buffer.  This allows us to
> orphan the storage, instead of doing stall avoidance blits.
> ---
>  src/mesa/drivers/dri/i965/intel_buffer_objects.c | 7 +++
>  1 file changed, 7 insertions(+)
>
> I don't have any performance data for this.
>
> diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
> b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
> index 09c18db1afe..c305539e1b5 100644
> --- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
> +++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
> @@ -371,6 +371,13 @@ brw_map_buffer_range(struct gl_context *ctx,
>return NULL;
> }
>
> +   if ((access & GL_MAP_INVALIDATE_RANGE_BIT) &&
> +   (length == obj->Size ||
> +(intel_obj->valid_data_start >= offset &&
> + intel_obj->valid_data_end <= offset + length))) {
> +  access |= GL_MAP_INVALIDATE_BUFFER_BIT;
> +   }
> +
> /* If the access is synchronized (like a normal buffer mapping), then
> get
>  * things flushed out so the later mapping syncs appropriately through
> GEM.
>  * If the user doesn't care about existing buffer contents and mapping
> would
> --
> 2.13.1
>
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[Mesa-dev] [PATCH] st/va: Fix scaling list ordering for H.265

[Mark Thompson]

Mesa here requires the scaling lists in diagonal scan order, but
VAAPI passes them in raster scan order.  Therefore, rearrange the
elements when copying.  (This ordering was likely inherited from
VDPAU, which does pass them in diagonal scan order.)

Signed-off-by: Mark Thompson 
---
Fixes some of the related conformance tests (SLIST_A_Sony_4 and 
SLIST_C_Sony_3).  Not sure what's going on with the other SLIST ones, so 
someone with more H.265 knowledge than me might want to look at this.

Also fixes Sony_4K_HDR_Camp, as reported in 
.


 src/gallium/state_trackers/va/picture_hevc.c | 39 +++-
 1 file changed, 33 insertions(+), 6 deletions(-)

diff --git a/src/gallium/state_trackers/va/picture_hevc.c 
b/src/gallium/state_trackers/va/picture_hevc.c
index 28743ee7aa..a4825aeb92 100644
--- a/src/gallium/state_trackers/va/picture_hevc.c
+++ b/src/gallium/state_trackers/va/picture_hevc.c
@@ -179,14 +179,41 @@ void vlVaHandlePictureParameterBufferHEVC(vlVaDriver 
*drv, vlVaContext *context,
 void vlVaHandleIQMatrixBufferHEVC(vlVaContext *context, vlVaBuffer *buf)
 {
VAIQMatrixBufferHEVC *h265 = buf->data;
+   int i, j;
+
+   static const uint8_t diagonal_scan_4x4[16] = {
+   0,  4,  1,  8,  5,  2, 12,  9,  6,  3, 13, 10,  7, 14, 11, 15,
+   };
+   static const uint8_t diagonal_scan_8x8[64] = {
+   0,  8,  1, 16,  9,  2, 24, 17, 10,  3, 32, 25, 18, 11,  4, 40,
+  33, 26, 19, 12,  5, 48, 41, 34, 27, 20, 13,  6, 56, 49, 42, 35,
+  28, 21, 14,  7, 57, 50, 43, 36, 29, 22, 15, 58, 51, 44, 37, 30,
+  23, 59, 52, 45, 38, 31, 60, 53, 46, 39, 61, 54, 47, 62, 55, 63,
+   };
 
assert(buf->size >= sizeof(VAIQMatrixBufferH264) && buf->num_elements == 1);
-   memcpy(>desc.h265.pps->sps->ScalingList4x4, h265->ScalingList4x4, 
6 * 16);
-   memcpy(>desc.h265.pps->sps->ScalingList8x8, h265->ScalingList8x8, 
6 * 64);
-   memcpy(>desc.h265.pps->sps->ScalingList16x16, 
h265->ScalingList16x16, 6 * 64);
-   memcpy(>desc.h265.pps->sps->ScalingList32x32, 
h265->ScalingList32x32, 2 * 64);
-   memcpy(>desc.h265.pps->sps->ScalingListDCCoeff16x16, 
h265->ScalingListDC16x16, 6);
-   memcpy(>desc.h265.pps->sps->ScalingListDCCoeff32x32, 
h265->ScalingListDC32x32, 2);
+
+   for (i = 0; i < 6; i++) {
+  for (j = 0; j < 16; j++)
+ context->desc.h265.pps->sps->ScalingList4x4[i][j] = 
h265->ScalingList4x4[i][diagonal_scan_4x4[j]];
+
+  for (j = 0; j < 64; j++) {
+ context->desc.h265.pps->sps->ScalingList8x8[i][j] =
+h265->ScalingList8x8[i][diagonal_scan_8x8[j]];
+ context->desc.h265.pps->sps->ScalingList16x16[i][j] =
+
h265->ScalingList16x16[i][diagonal_scan_8x8[j]];
+
+ if (i < 2)
+context->desc.h265.pps->sps->ScalingList32x32[i][j] =
+   
h265->ScalingList32x32[i][diagonal_scan_8x8[j]];
+  }
+
+  context->desc.h265.pps->sps->ScalingListDCCoeff16x16[i] =
+ h265->ScalingListDC16x16[i];
+  if (i < 2)
+ context->desc.h265.pps->sps->ScalingListDCCoeff32x32[i] =
+h265->ScalingListDC32x32[i];
+   }
 }
 
 void vlVaHandleSliceParameterBufferHEVC(vlVaContext *context, vlVaBuffer *buf)
-- 
2.11.0

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[Mesa-dev] [PATCH] gallium/u_blitter: don't use TXF for scaled blits

[Marek Olšák]

From: Marek Olšák 

There seems to be a rounding difference with F2I vs nearest filtering.
The precise problem in the rounding is unknown.

This fixes an incorrect output with OpenMAX encoding.
---
 src/gallium/auxiliary/util/u_blitter.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_blitter.c 
b/src/gallium/auxiliary/util/u_blitter.c
index c38534d..65c6f5d 100644
--- a/src/gallium/auxiliary/util/u_blitter.c
+++ b/src/gallium/auxiliary/util/u_blitter.c
@@ -1770,29 +1770,31 @@ void util_blitter_blit_generic(struct blitter_context 
*blitter,
 
blit_color = has_color && (mask & PIPE_MASK_RGBA);
blit_depth = has_depth && (mask & PIPE_MASK_Z);
blit_stencil = has_stencil && (mask & PIPE_MASK_S) &&
   ctx->has_stencil_export;
 
if (!blit_stencil && !blit_depth && !blit_color) {
   return;
}
 
-   if (blit_stencil ||
-   (dstbox->width == abs(srcbox->width) &&
-dstbox->height == abs(srcbox->height))) {
+   bool is_scaled = dstbox->width != abs(srcbox->width) ||
+dstbox->height != abs(srcbox->height);
+
+   if (blit_stencil || !is_scaled)
   filter = PIPE_TEX_FILTER_NEAREST;
-   }
 
bool use_txf = false;
 
+   /* Don't support scaled blits. The TXF shader uses F2I for rounding. */
if (ctx->has_txf &&
+   !is_scaled &&
filter == PIPE_TEX_FILTER_NEAREST &&
src->target != PIPE_TEXTURE_CUBE &&
src->target != PIPE_TEXTURE_CUBE_ARRAY) {
   int src_width = u_minify(src_width0, src->u.tex.first_level);
   int src_height = u_minify(src_height0, src->u.tex.first_level);
   int src_depth = src->u.tex.last_layer + 1;
   struct pipe_box box = *srcbox;
 
   /* Eliminate negative width/height/depth. */
   if (box.width < 0) {
-- 
2.7.4

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[Mesa-dev] [PATCH 1/8] spirv: Import the latest 1.0.2 header from Khronos

[Jason Ekstrand]

---
 src/compiler/spirv/spirv.h | 41 +
 1 file changed, 37 insertions(+), 4 deletions(-)

diff --git a/src/compiler/spirv/spirv.h b/src/compiler/spirv/spirv.h
index 89354c0..61559a1 100644
--- a/src/compiler/spirv/spirv.h
+++ b/src/compiler/spirv/spirv.h
@@ -50,12 +50,12 @@
 
 typedef unsigned int SpvId;
 
-#define SPV_VERSION 0x10100
-#define SPV_REVISION 6
+#define SPV_VERSION 0x10200
+#define SPV_REVISION 1
 
 static const unsigned int SpvMagicNumber = 0x07230203;
-static const unsigned int SpvVersion = 0x00010100;
-static const unsigned int SpvRevision = 6;
+static const unsigned int SpvVersion = 0x00010200;
+static const unsigned int SpvRevision = 1;
 static const unsigned int SpvOpCodeMask = 0x;
 static const unsigned int SpvWordCountShift = 16;
 
@@ -65,6 +65,7 @@ typedef enum SpvSourceLanguage_ {
 SpvSourceLanguageGLSL = 2,
 SpvSourceLanguageOpenCL_C = 3,
 SpvSourceLanguageOpenCL_CPP = 4,
+SpvSourceLanguageHLSL = 5,
 SpvSourceLanguageMax = 0x7fff,
 } SpvSourceLanguage;
 
@@ -129,6 +130,10 @@ typedef enum SpvExecutionMode_ {
 SpvExecutionModeFinalizer = 34,
 SpvExecutionModeSubgroupSize = 35,
 SpvExecutionModeSubgroupsPerWorkgroup = 36,
+SpvExecutionModeSubgroupsPerWorkgroupId = 37,
+SpvExecutionModeLocalSizeId = 38,
+SpvExecutionModeLocalSizeHintId = 39,
+SpvExecutionModePostDepthCoverage = 4446,
 SpvExecutionModeMax = 0x7fff,
 } SpvExecutionMode;
 
@@ -145,6 +150,7 @@ typedef enum SpvStorageClass_ {
 SpvStorageClassPushConstant = 9,
 SpvStorageClassAtomicCounter = 10,
 SpvStorageClassImage = 11,
+SpvStorageClassStorageBuffer = 12,
 SpvStorageClassMax = 0x7fff,
 } SpvStorageClass;
 
@@ -383,6 +389,9 @@ typedef enum SpvDecoration_ {
 SpvDecorationInputAttachmentIndex = 43,
 SpvDecorationAlignment = 44,
 SpvDecorationMaxByteOffset = 45,
+SpvDecorationAlignmentId = 46,
+SpvDecorationMaxByteOffsetId = 47,
+SpvDecorationExplicitInterpAMD = 4999,
 SpvDecorationOverrideCoverageNV = 5248,
 SpvDecorationPassthroughNV = 5250,
 SpvDecorationViewportRelativeNV = 5252,
@@ -442,6 +451,13 @@ typedef enum SpvBuiltIn_ {
 SpvBuiltInDrawIndex = 4426,
 SpvBuiltInDeviceIndex = 4438,
 SpvBuiltInViewIndex = 4440,
+SpvBuiltInBaryCoordNoPerspAMD = 4992,
+SpvBuiltInBaryCoordNoPerspCentroidAMD = 4993,
+SpvBuiltInBaryCoordNoPerspSampleAMD = 4994,
+SpvBuiltInBaryCoordSmoothAMD = 4995,
+SpvBuiltInBaryCoordSmoothCentroidAMD = 4996,
+SpvBuiltInBaryCoordSmoothSampleAMD = 4997,
+SpvBuiltInBaryCoordPullModelAMD = 4998,
 SpvBuiltInViewportMaskNV = 5253,
 SpvBuiltInSecondaryPositionNV = 5257,
 SpvBuiltInSecondaryViewportMaskNV = 5258,
@@ -632,12 +648,19 @@ typedef enum SpvCapability_ {
 SpvCapabilitySubgroupBallotKHR = 4423,
 SpvCapabilityDrawParameters = 4427,
 SpvCapabilitySubgroupVoteKHR = 4431,
+SpvCapabilityStorageBuffer16BitAccess = 4433,
 SpvCapabilityStorageUniformBufferBlock16 = 4433,
 SpvCapabilityStorageUniform16 = 4434,
+SpvCapabilityUniformAndStorageBuffer16BitAccess = 4434,
 SpvCapabilityStoragePushConstant16 = 4435,
 SpvCapabilityStorageInputOutput16 = 4436,
 SpvCapabilityDeviceGroup = 4437,
 SpvCapabilityMultiView = 4439,
+SpvCapabilityVariablePointersStorageBuffer = 4441,
+SpvCapabilityVariablePointers = 4442,
+SpvCapabilityAtomicStorageOps = 4445,
+SpvCapabilitySampleMaskPostDepthCoverage = 4447,
+SpvCapabilityImageGatherBiasLodAMD = 5009,
 SpvCapabilitySampleMaskOverrideCoverageNV = 5249,
 SpvCapabilityGeometryShaderPassthroughNV = 5251,
 SpvCapabilityShaderViewportIndexLayerNV = 5254,
@@ -952,12 +975,22 @@ typedef enum SpvOp_ {
 SpvOpNamedBarrierInitialize = 328,
 SpvOpMemoryNamedBarrier = 329,
 SpvOpModuleProcessed = 330,
+SpvOpExecutionModeId = 331,
+SpvOpDecorateId = 332,
 SpvOpSubgroupBallotKHR = 4421,
 SpvOpSubgroupFirstInvocationKHR = 4422,
 SpvOpSubgroupAllKHR = 4428,
 SpvOpSubgroupAnyKHR = 4429,
 SpvOpSubgroupAllEqualKHR = 4430,
 SpvOpSubgroupReadInvocationKHR = 4432,
+SpvOpGroupIAddNonUniformAMD = 5000,
+SpvOpGroupFAddNonUniformAMD = 5001,
+SpvOpGroupFMinNonUniformAMD = 5002,
+SpvOpGroupUMinNonUniformAMD = 5003,
+SpvOpGroupSMinNonUniformAMD = 5004,
+SpvOpGroupFMaxNonUniformAMD = 5005,
+SpvOpGroupUMaxNonUniformAMD = 5006,
+SpvOpGroupSMaxNonUniformAMD = 5007,
 SpvOpMax = 0x7fff,
 } SpvOp;
 
-- 
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[Mesa-dev] [PATCH 3/8] spirv/nir: Add some useful asserts for type decorations

[Jason Ekstrand]

Now that vtn_type has piles of unions, we should assert sanity before
setting fields that may stomp others.
---
 src/compiler/spirv/spirv_to_nir.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 763dbf4..89ebc5f 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -599,12 +599,16 @@ type_decoration_cb(struct vtn_builder *b,
 
switch (dec->decoration) {
case SpvDecorationArrayStride:
+  assert(type->base_type == vtn_base_type_matrix ||
+ type->base_type == vtn_base_type_array);
   type->stride = dec->literals[0];
   break;
case SpvDecorationBlock:
+  assert(type->base_type == vtn_base_type_struct);
   type->block = true;
   break;
case SpvDecorationBufferBlock:
+  assert(type->base_type == vtn_base_type_struct);
   type->buffer_block = true;
   break;
case SpvDecorationGLSLShared:
-- 
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[Mesa-dev] [PATCH 2/8] spirv: Add support for the StorageBuffer storage class

[Jason Ekstrand]

---
 src/compiler/spirv/vtn_variables.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/compiler/spirv/vtn_variables.c 
b/src/compiler/spirv/vtn_variables.c
index 5af27bf..4f21fdd 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -1405,6 +1405,10 @@ vtn_storage_class_to_mode(SpvStorageClass class,
  assert(!"Invalid uniform variable type");
   }
   break;
+   case SpvStorageClassStorageBuffer:
+  mode = vtn_variable_mode_ssbo;
+  nir_mode = 0;
+  break;
case SpvStorageClassUniformConstant:
   if (glsl_type_is_image(interface_type->type)) {
  mode = vtn_variable_mode_image;
-- 
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[Mesa-dev] [PATCH 5/8] nir/spirv: Add a helper for pushing SSA values

[Jason Ekstrand]

---
 src/compiler/spirv/spirv_to_nir.c  |  5 +++--
 src/compiler/spirv/vtn_cfg.c   | 11 +--
 src/compiler/spirv/vtn_private.h   |  9 +
 src/compiler/spirv/vtn_variables.c |  5 +++--
 4 files changed, 20 insertions(+), 10 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 7038bd9..6e35f83 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1379,6 +1379,7 @@ static void
 vtn_handle_function_call(struct vtn_builder *b, SpvOp opcode,
  const uint32_t *w, unsigned count)
 {
+   struct vtn_type *res_type = vtn_value(b, w[1], vtn_value_type_type)->type;
struct nir_function *callee =
   vtn_value(b, w[3], vtn_value_type_function)->func->impl->function;
 
@@ -1402,6 +1403,7 @@ vtn_handle_function_call(struct vtn_builder *b, SpvOp 
opcode,
}
 
nir_variable *out_tmp = NULL;
+   assert(res_type->type == callee->return_type);
if (!glsl_type_is_void(callee->return_type)) {
   out_tmp = nir_local_variable_create(b->impl, callee->return_type,
   "out_tmp");
@@ -1413,8 +1415,7 @@ vtn_handle_function_call(struct vtn_builder *b, SpvOp 
opcode,
if (glsl_type_is_void(callee->return_type)) {
   vtn_push_value(b, w[2], vtn_value_type_undef);
} else {
-  struct vtn_value *retval = vtn_push_value(b, w[2], vtn_value_type_ssa);
-  retval->ssa = vtn_local_load(b, call->return_deref);
+  vtn_push_ssa(b, w[2], res_type, vtn_local_load(b, call->return_deref));
}
 }
 
diff --git a/src/compiler/spirv/vtn_cfg.c b/src/compiler/spirv/vtn_cfg.c
index df54b3c..c81a62d 100644
--- a/src/compiler/spirv/vtn_cfg.c
+++ b/src/compiler/spirv/vtn_cfg.c
@@ -112,12 +112,12 @@ vtn_cfg_handle_prepass_instruction(struct vtn_builder *b, 
SpvOp opcode,
  val->pointer = vtn_pointer_for_variable(b, vtn_var, type);
   } else {
  /* We're a regular SSA value. */
- struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa);
+ struct vtn_ssa_value *param_ssa =
+vtn_local_load(b, nir_deref_var_create(b, param));
+ struct vtn_value *val = vtn_push_ssa(b, w[2], type, param_ssa);
 
  /* Name the parameter so it shows up nicely in NIR */
  param->name = ralloc_strdup(param, val->name);
-
- val->ssa = vtn_local_load(b, nir_deref_var_create(b, param));
   }
   break;
}
@@ -504,14 +504,13 @@ vtn_handle_phis_first_pass(struct vtn_builder *b, SpvOp 
opcode,
 * algorithm all over again.  It's easier if we just let
 * lower_vars_to_ssa do that for us instead of repeating it here.
 */
-   struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa);
-
struct vtn_type *type = vtn_value(b, w[1], vtn_value_type_type)->type;
nir_variable *phi_var =
   nir_local_variable_create(b->nb.impl, type->type, "phi");
_mesa_hash_table_insert(b->phi_table, w, phi_var);
 
-   val->ssa = vtn_local_load(b, nir_deref_var_create(b, phi_var));
+   vtn_push_ssa(b, w[2], type,
+vtn_local_load(b, nir_deref_var_create(b, phi_var)));
 
return true;
 }
diff --git a/src/compiler/spirv/vtn_private.h b/src/compiler/spirv/vtn_private.h
index 2f96c09..8d745bb 100644
--- a/src/compiler/spirv/vtn_private.h
+++ b/src/compiler/spirv/vtn_private.h
@@ -514,6 +514,15 @@ vtn_push_value(struct vtn_builder *b, uint32_t value_id,
 }
 
 static inline struct vtn_value *
+vtn_push_ssa(struct vtn_builder *b, uint32_t value_id,
+ struct vtn_type *type, struct vtn_ssa_value *ssa)
+{
+   struct vtn_value *val = vtn_push_value(b, value_id, vtn_value_type_ssa);
+   val->ssa = ssa;
+   return val;
+}
+
+static inline struct vtn_value *
 vtn_untyped_value(struct vtn_builder *b, uint32_t value_id)
 {
assert(value_id < b->value_id_bound);
diff --git a/src/compiler/spirv/vtn_variables.c 
b/src/compiler/spirv/vtn_variables.c
index a9ba392..a9e2dbf 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -1774,6 +1774,8 @@ vtn_handle_variables(struct vtn_builder *b, SpvOp opcode,
}
 
case SpvOpLoad: {
+  struct vtn_type *res_type =
+ vtn_value(b, w[1], vtn_value_type_type)->type;
   struct vtn_pointer *src =
  vtn_value(b, w[3], vtn_value_type_pointer)->pointer;
 
@@ -1783,8 +1785,7 @@ vtn_handle_variables(struct vtn_builder *b, SpvOp opcode,
  return;
   }
 
-  struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa);
-  val->ssa = vtn_variable_load(b, src);
+  vtn_push_ssa(b, w[2], res_type, vtn_variable_load(b, src));
   break;
}
 
-- 
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[Mesa-dev] [PATCH 8/8] anv: Advertise support for VK_KHR_variable_pointers

[Jason Ekstrand]

We don't support the general version yet because that requires us to
lower shared variables up-front in SPIR-V -> NIR.  This shouldn't be a
whole lot of work but it's not something we support today.
---
 src/intel/vulkan/anv_device.c   | 11 +++
 src/intel/vulkan/anv_entrypoints_gen.py |  1 +
 src/intel/vulkan/anv_pipeline.c |  1 +
 3 files changed, 13 insertions(+)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index cc37f40..4a258cb 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -493,6 +493,10 @@ static const VkExtensionProperties device_extensions[] = {
   .specVersion = 68,
},
{
+  .extensionName = VK_KHR_VARIABLE_POINTERS_EXTENSION_NAME,
+  .specVersion = 1,
+   },
+   {
   .extensionName = VK_KHX_MULTIVIEW_EXTENSION_NAME,
   .specVersion = 1,
},
@@ -748,6 +752,13 @@ void anv_GetPhysicalDeviceFeatures2KHR(
  break;
   }
 
+  case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VARIABLE_POINTER_FEATURES_KHR: {
+ VkPhysicalDeviceVariablePointerFeaturesKHR *features = (void *)ext;
+ features->variablePointersStorageBuffer = true;
+ features->variablePointers = false;
+ break;
+  }
+
   default:
  anv_debug_ignored_stype(ext->sType);
  break;
diff --git a/src/intel/vulkan/anv_entrypoints_gen.py 
b/src/intel/vulkan/anv_entrypoints_gen.py
index 3be8a03..e2ced38 100644
--- a/src/intel/vulkan/anv_entrypoints_gen.py
+++ b/src/intel/vulkan/anv_entrypoints_gen.py
@@ -49,6 +49,7 @@ SUPPORTED_EXTENSIONS = [
 'VK_KHR_storage_buffer_storage_class',
 'VK_KHR_surface',
 'VK_KHR_swapchain',
+'VK_KHR_variable_pointers',
 'VK_KHR_wayland_surface',
 'VK_KHR_xcb_surface',
 'VK_KHR_xlib_surface',
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 5494a6e..c88aa69 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -129,6 +129,7 @@ anv_shader_compile_to_nir(struct anv_pipeline *pipeline,
   .draw_parameters = true,
   .image_write_without_format = true,
   .multiview = true,
+  .variable_pointers = true,
};
 
nir_function *entry_point =
-- 
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[Mesa-dev] [PATCH 6/8] nir/spirv: Add support for SPV_KHR_variable_pointers

[Jason Ekstrand]

---
 src/compiler/spirv/nir_spirv.h |  1 +
 src/compiler/spirv/spirv_to_nir.c  | 42 ---
 src/compiler/spirv/vtn_cfg.c   |  5 +++--
 src/compiler/spirv/vtn_private.h   | 23 +--
 src/compiler/spirv/vtn_variables.c | 45 +++---
 5 files changed, 106 insertions(+), 10 deletions(-)

diff --git a/src/compiler/spirv/nir_spirv.h b/src/compiler/spirv/nir_spirv.h
index 7f16866..83577fb 100644
--- a/src/compiler/spirv/nir_spirv.h
+++ b/src/compiler/spirv/nir_spirv.h
@@ -51,6 +51,7 @@ struct nir_spirv_supported_extensions {
bool image_write_without_format;
bool int64;
bool multiview;
+   bool variable_pointers;
 };
 
 nir_function *spirv_to_nir(const uint32_t *words, size_t word_count,
diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 6e35f83..e60c9f7 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -185,6 +185,13 @@ vtn_ssa_value(struct vtn_builder *b, uint32_t value_id)
case vtn_value_type_ssa:
   return val->ssa;
 
+   case vtn_value_type_pointer:
+  assert(val->pointer->ptr_type && val->pointer->ptr_type->type);
+  struct vtn_ssa_value *ssa =
+ vtn_create_ssa_value(b, val->pointer->ptr_type->type);
+  ssa->def = vtn_pointer_to_ssa(b, val->pointer);
+  return ssa;
+
default:
   unreachable("Invalid type for an SSA value");
}
@@ -861,9 +868,20 @@ vtn_handle_type(struct vtn_builder *b, SpvOp opcode,
  vtn_value(b, w[3], vtn_value_type_type)->type;
 
   val->type->base_type = vtn_base_type_pointer;
-  val->type->type = NULL;
   val->type->storage_class = storage_class;
   val->type->deref = deref_type;
+
+  struct vtn_type *without_array = deref_type;
+  while (without_array->base_type == vtn_base_type_array)
+ without_array = without_array->array_element;
+
+  if (storage_class == SpvStorageClassUniform ||
+  storage_class == SpvStorageClassStorageBuffer) {
+ /* These can actually be stored to nir_variables and used as SSA
+  * values so they need a real glsl_type.
+  */
+ val->type->type = glsl_vector_type(GLSL_TYPE_UINT, 2);
+  }
   break;
}
 
@@ -1387,7 +1405,8 @@ vtn_handle_function_call(struct vtn_builder *b, SpvOp 
opcode,
for (unsigned i = 0; i < call->num_params; i++) {
   unsigned arg_id = w[4 + i];
   struct vtn_value *arg = vtn_untyped_value(b, arg_id);
-  if (arg->value_type == vtn_value_type_pointer) {
+  if (arg->value_type == vtn_value_type_pointer &&
+  arg->pointer->ptr_type->type == NULL) {
  nir_deref_var *d = vtn_pointer_to_deref(b, arg->pointer);
  call->params[i] = nir_deref_var_clone(d, call);
   } else {
@@ -2769,6 +2788,11 @@ vtn_handle_preamble_instruction(struct vtn_builder *b, 
SpvOp opcode,
  spv_check_supported(multiview, cap);
  break;
 
+  case SpvCapabilityVariablePointersStorageBuffer:
+  case SpvCapabilityVariablePointers:
+ spv_check_supported(variable_pointers, cap);
+ break;
+
   default:
  unreachable("Unhandled capability");
   }
@@ -3153,6 +3177,19 @@ vtn_handle_body_instruction(struct vtn_builder *b, SpvOp 
opcode,
   break;
}
 
+   case SpvOpSelect: {
+  /* Handle OpSelect up-front here because it needs to be able to handle
+   * pointers and not just regular vectors and scalars.
+   */
+  struct vtn_type *res_type = vtn_value(b, w[1], 
vtn_value_type_type)->type;
+  struct vtn_ssa_value *ssa = vtn_create_ssa_value(b, res_type->type);
+  ssa->def = nir_bcsel(>nb, vtn_ssa_value(b, w[3])->def,
+   vtn_ssa_value(b, w[4])->def,
+   vtn_ssa_value(b, w[5])->def);
+  vtn_push_ssa(b, w[2], res_type, ssa);
+  break;
+   }
+
case SpvOpSNegate:
case SpvOpFNegate:
case SpvOpNot:
@@ -3210,7 +3247,6 @@ vtn_handle_body_instruction(struct vtn_builder *b, SpvOp 
opcode,
case SpvOpBitwiseOr:
case SpvOpBitwiseXor:
case SpvOpBitwiseAnd:
-   case SpvOpSelect:
case SpvOpIEqual:
case SpvOpFOrdEqual:
case SpvOpFUnordEqual:
diff --git a/src/compiler/spirv/vtn_cfg.c b/src/compiler/spirv/vtn_cfg.c
index c81a62d..03c452c 100644
--- a/src/compiler/spirv/vtn_cfg.c
+++ b/src/compiler/spirv/vtn_cfg.c
@@ -52,7 +52,8 @@ vtn_cfg_handle_prepass_instruction(struct vtn_builder *b, 
SpvOp opcode,
   func->num_params = func_type->length;
   func->params = ralloc_array(b->shader, nir_parameter, func->num_params);
   for (unsigned i = 0; i < func->num_params; i++) {
- if (func_type->params[i]->base_type == vtn_base_type_pointer) {
+ if (func_type->params[i]->base_type == vtn_base_type_pointer &&
+ func_type->params[i]->type == NULL) {
 func->params[i].type = func_type->params[i]->deref->type;
  } else {

[Mesa-dev] [PATCH 4/8] nir/spirv: Implement OpPtrAccessChain for buffers

[Jason Ekstrand]

---
 src/compiler/spirv/spirv_to_nir.c  |  4 +++-
 src/compiler/spirv/vtn_private.h   | 11 ---
 src/compiler/spirv/vtn_variables.c | 23 +++
 3 files changed, 34 insertions(+), 4 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 89ebc5f..7038bd9 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -600,7 +600,8 @@ type_decoration_cb(struct vtn_builder *b,
switch (dec->decoration) {
case SpvDecorationArrayStride:
   assert(type->base_type == vtn_base_type_matrix ||
- type->base_type == vtn_base_type_array);
+ type->base_type == vtn_base_type_array ||
+ type->base_type == vtn_base_type_pointer);
   type->stride = dec->literals[0];
   break;
case SpvDecorationBlock:
@@ -3067,6 +3068,7 @@ vtn_handle_body_instruction(struct vtn_builder *b, SpvOp 
opcode,
case SpvOpCopyMemory:
case SpvOpCopyMemorySized:
case SpvOpAccessChain:
+   case SpvOpPtrAccessChain:
case SpvOpInBoundsAccessChain:
case SpvOpArrayLength:
   vtn_handle_variables(b, opcode, w, count);
diff --git a/src/compiler/spirv/vtn_private.h b/src/compiler/spirv/vtn_private.h
index 7cb5035..2f96c09 100644
--- a/src/compiler/spirv/vtn_private.h
+++ b/src/compiler/spirv/vtn_private.h
@@ -220,15 +220,15 @@ struct vtn_type {
/* Specifies the length of complex types. */
unsigned length;
 
+   /* for arrays, matrices and pointers, the array stride */
+   unsigned stride;
+
union {
   /* Members for scalar, vector, and array-like types */
   struct {
  /* for arrays, the vtn_type for the elements of the array */
  struct vtn_type *array_element;
 
- /* for arrays and matrices, the array stride */
- unsigned stride;
-
  /* for matrices, whether the matrix is stored row-major */
  bool row_major:1;
 
@@ -308,6 +308,11 @@ struct vtn_access_link {
 struct vtn_access_chain {
uint32_t length;
 
+   /** Whether or not to treat the base pointer as an array.  This is only
+* true if this access chain came from an OpPtrAccessChain.
+*/
+   bool ptr_as_array;
+
/** Struct elements and array offsets.
 *
 * This is an array of 1 so that it can conveniently be created on the
diff --git a/src/compiler/spirv/vtn_variables.c 
b/src/compiler/spirv/vtn_variables.c
index 4f21fdd..a9ba392 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -67,6 +67,12 @@ vtn_access_chain_pointer_dereference(struct vtn_builder *b,
   vtn_access_chain_extend(b, base->chain, deref_chain->length);
struct vtn_type *type = base->type;
 
+   /* OpPtrAccessChain is only allowed on things which support variable
+* pointers.  For everything else, the client is expected to just pass us
+* the right access chain.
+*/
+   assert(!deref_chain->ptr_as_array);
+
unsigned start = base->chain ? base->chain->length : 0;
for (unsigned i = 0; i < deref_chain->length; i++) {
   chain->link[start + i] = deref_chain->link[i];
@@ -135,6 +141,21 @@ vtn_ssa_offset_pointer_dereference(struct vtn_builder *b,
struct vtn_type *type = base->type;
 
unsigned idx = 0;
+   if (deref_chain->ptr_as_array) {
+  /* We need ptr_type for the stride */
+  assert(base->ptr_type);
+  /* This must be a pointer to an actual element somewhere */
+  assert(block_index && offset);
+  /* We need at least one element in the chain */
+  assert(deref_chain->length >= 1);
+
+  nir_ssa_def *elem_offset =
+ vtn_access_link_as_ssa(b, deref_chain->link[idx],
+base->ptr_type->stride);
+  offset = nir_iadd(>nb, offset, elem_offset);
+  idx++;
+   }
+
if (!block_index) {
   assert(base->var);
   if (glsl_type_is_array(type->type)) {
@@ -1699,8 +1720,10 @@ vtn_handle_variables(struct vtn_builder *b, SpvOp opcode,
}
 
case SpvOpAccessChain:
+   case SpvOpPtrAccessChain:
case SpvOpInBoundsAccessChain: {
   struct vtn_access_chain *chain = vtn_access_chain_create(b, count - 4);
+  chain->ptr_as_array = (opcode == SpvOpPtrAccessChain);
 
   unsigned idx = 0;
   for (int i = 4; i < count; i++) {
-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH 7/8] anv: Advertise support for VK_KHR_storage_buffer_storage_class

[Jason Ekstrand]

---
 src/intel/vulkan/anv_device.c   | 4 
 src/intel/vulkan/anv_entrypoints_gen.py | 1 +
 2 files changed, 5 insertions(+)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 6fc57cd..cc37f40 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -485,6 +485,10 @@ static const VkExtensionProperties device_extensions[] = {
   .specVersion = 1,
},
{
+  .extensionName = VK_KHR_STORAGE_BUFFER_STORAGE_CLASS_EXTENSION_NAME,
+  .specVersion = 1,
+   },
+   {
   .extensionName = VK_KHR_SWAPCHAIN_EXTENSION_NAME,
   .specVersion = 68,
},
diff --git a/src/intel/vulkan/anv_entrypoints_gen.py 
b/src/intel/vulkan/anv_entrypoints_gen.py
index e59c494..3be8a03 100644
--- a/src/intel/vulkan/anv_entrypoints_gen.py
+++ b/src/intel/vulkan/anv_entrypoints_gen.py
@@ -46,6 +46,7 @@ SUPPORTED_EXTENSIONS = [
 'VK_KHR_push_descriptor',
 'VK_KHR_sampler_mirror_clamp_to_edge',
 'VK_KHR_shader_draw_parameters',
+'VK_KHR_storage_buffer_storage_class',
 'VK_KHR_surface',
 'VK_KHR_swapchain',
 'VK_KHR_wayland_surface',
-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH 0/8] anv, spirv: Implement VK_KHR_variable_pointers

[Jason Ekstrand]

This little series contains the SPIR-V and ANV bits for the new
VK_KHR_variable_pointers extension and it's prerequisite extension
VK_KHR_storage_buffer_storage_class.

Cc: Connor Abbott 

Jason Ekstrand (8):
  spirv: Import the latest 1.0.2 header from Khronos
  spirv: Add support for the StorageBuffer storage class
  spirv/nir: Add some useful asserts for type decorations
  nir/spirv: Implement OpPtrAccessChain for buffers
  nir/spirv: Add a helper for pushing SSA values
  nir/spirv: Add support for SPV_KHR_variable_pointers
  anv: Advertise support for VK_KHR_storage_buffer_storage_class
  anv: Advertise support for VK_KHR_variable_pointers

 src/compiler/spirv/nir_spirv.h  |  1 +
 src/compiler/spirv/spirv.h  | 41 --
 src/compiler/spirv/spirv_to_nir.c   | 53 ---
 src/compiler/spirv/vtn_cfg.c| 16 +++
 src/compiler/spirv/vtn_private.h| 39 +++--
 src/compiler/spirv/vtn_variables.c  | 77 ++---
 src/intel/vulkan/anv_device.c   | 15 +++
 src/intel/vulkan/anv_entrypoints_gen.py |  2 +
 src/intel/vulkan/anv_pipeline.c |  1 +
 9 files changed, 220 insertions(+), 25 deletions(-)

-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH 7/8] anv: Implement VK_KHR_dedicated_allocation

[Jason Ekstrand]

We always recommend sub-allocation and don't do anything special for
dedicated allocations.
---
 src/intel/vulkan/anv_device.c   | 18 ++
 src/intel/vulkan/anv_entrypoints_gen.py |  1 +
 2 files changed, 19 insertions(+)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index b374fac..cabfb09d 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -441,6 +441,10 @@ static const VkExtensionProperties global_extensions[] = {
 
 static const VkExtensionProperties device_extensions[] = {
{
+  .extensionName = VK_KHR_DEDICATED_ALLOCATION_EXTENSION_NAME,
+  .specVersion = 1,
+   },
+   {
   .extensionName = VK_KHR_DESCRIPTOR_UPDATE_TEMPLATE_EXTENSION_NAME,
   .specVersion = 1,
},
@@ -1747,6 +1751,13 @@ void anv_GetBufferMemoryRequirements2KHR(
 
vk_foreach_struct(ext, pMemoryRequirements->pNext) {
   switch (ext->sType) {
+  case VK_STRUCTURE_TYPE_MEMORY_DEDICATED_REQUIREMENTS_KHR: {
+ VkMemoryDedicatedRequirementsKHR *requirements = (void *)ext;
+ requirements->prefersDedicatedAllocation = VK_FALSE;
+ requirements->requiresDedicatedAllocation = VK_FALSE;
+ break;
+  }
+
   default:
  anv_debug_ignored_stype(ext->sType);
  break;
@@ -1789,6 +1800,13 @@ void anv_GetImageMemoryRequirements2KHR(
 
vk_foreach_struct(ext, pMemoryRequirements->pNext) {
   switch (ext->sType) {
+  case VK_STRUCTURE_TYPE_MEMORY_DEDICATED_REQUIREMENTS_KHR: {
+ VkMemoryDedicatedRequirementsKHR *requirements = (void *)ext;
+ requirements->prefersDedicatedAllocation = VK_FALSE;
+ requirements->requiresDedicatedAllocation = VK_FALSE;
+ break;
+  }
+
   default:
  anv_debug_ignored_stype(ext->sType);
  break;
diff --git a/src/intel/vulkan/anv_entrypoints_gen.py 
b/src/intel/vulkan/anv_entrypoints_gen.py
index 4cc1f6a..820a1f1 100644
--- a/src/intel/vulkan/anv_entrypoints_gen.py
+++ b/src/intel/vulkan/anv_entrypoints_gen.py
@@ -33,6 +33,7 @@ from mako.template import Template
 MAX_API_VERSION = 1.0
 
 SUPPORTED_EXTENSIONS = [
+'VK_KHR_dedicated_allocation',
 'VK_KHR_descriptor_update_template',
 'VK_KHR_get_memory_requirements2',
 'VK_KHR_get_physical_device_properties2',
-- 
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[Mesa-dev] [PATCH 4/8] vulkan: Update to the new 1.0.54 spec XML and headers

[Jason Ekstrand]

There is one small ANV change here because we used the
VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX enum in the BO cache and that had
to be updated to have the _KHR suffix.
---

There's more to this patch but I dropped the XML and header update because
they are highly uninteresting.  The only interesting bit is the ANV change.

 include/vulkan/vulkan.h  | 1284 ++
 src/intel/vulkan/anv_allocator.c |6 +-
 src/vulkan/registry/vk.xml   | 1208 +++
 3 files changed, 1710 insertions(+), 788 deletions(-)

diff --git a/src/intel/vulkan/anv_allocator.c b/src/intel/vulkan/anv_allocator.c
index d637867..efaaebc 100644
--- a/src/intel/vulkan/anv_allocator.c
+++ b/src/intel/vulkan/anv_allocator.c
@@ -1280,14 +1280,14 @@ anv_bo_cache_import(struct anv_device *device,
uint32_t gem_handle = anv_gem_fd_to_handle(device, fd);
if (!gem_handle) {
   pthread_mutex_unlock(>mutex);
-  return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX);
+  return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR);
}
 
struct anv_cached_bo *bo = anv_bo_cache_lookup_locked(cache, gem_handle);
if (bo) {
   if (bo->bo.size != size) {
  pthread_mutex_unlock(>mutex);
- return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX);
+ return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR);
   }
   __sync_fetch_and_add(>refcount, 1);
} else {
@@ -1303,7 +1303,7 @@ anv_bo_cache_import(struct anv_device *device,
   if (import_size == (off_t)-1 || import_size != size) {
  anv_gem_close(device, gem_handle);
  pthread_mutex_unlock(>mutex);
- return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX);
+ return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR);
   }
 
   bo = vk_alloc(>alloc, sizeof(struct anv_cached_bo), 8,
-- 
2.5.0.400.gff86faf

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[Mesa-dev] [PATCH 6/8] anv: Implement VK_KHR_get_memory_requirements2

[Jason Ekstrand]

---
 src/intel/vulkan/anv_device.c   | 47 +
 src/intel/vulkan/anv_entrypoints_gen.py |  1 +
 2 files changed, 48 insertions(+)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index e63742f..b374fac 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -445,6 +445,10 @@ static const VkExtensionProperties device_extensions[] = {
   .specVersion = 1,
},
{
+  .extensionName = VK_KHR_GET_MEMORY_REQUIREMENTS_2_EXTENSION_NAME,
+  .specVersion = 1,
+   },
+   {
   .extensionName = VK_KHR_INCREMENTAL_PRESENT_EXTENSION_NAME,
   .specVersion = 1,
},
@@ -1733,6 +1737,23 @@ void anv_GetBufferMemoryRequirements(
pMemoryRequirements->memoryTypeBits = memory_types;
 }
 
+void anv_GetBufferMemoryRequirements2KHR(
+VkDevice_device,
+const VkBufferMemoryRequirementsInfo2KHR*   pInfo,
+VkMemoryRequirements2KHR*   pMemoryRequirements)
+{
+   anv_GetBufferMemoryRequirements(_device, pInfo->buffer,
+   >memoryRequirements);
+
+   vk_foreach_struct(ext, pMemoryRequirements->pNext) {
+  switch (ext->sType) {
+  default:
+ anv_debug_ignored_stype(ext->sType);
+ break;
+  }
+   }
+}
+
 void anv_GetImageMemoryRequirements(
 VkDevice_device,
 VkImage _image,
@@ -1758,6 +1779,23 @@ void anv_GetImageMemoryRequirements(
pMemoryRequirements->memoryTypeBits = memory_types;
 }
 
+void anv_GetImageMemoryRequirements2KHR(
+VkDevice_device,
+const VkImageMemoryRequirementsInfo2KHR*pInfo,
+VkMemoryRequirements2KHR*   pMemoryRequirements)
+{
+   anv_GetImageMemoryRequirements(_device, pInfo->image,
+  >memoryRequirements);
+
+   vk_foreach_struct(ext, pMemoryRequirements->pNext) {
+  switch (ext->sType) {
+  default:
+ anv_debug_ignored_stype(ext->sType);
+ break;
+  }
+   }
+}
+
 void anv_GetImageSparseMemoryRequirements(
 VkDevicedevice,
 VkImage image,
@@ -1767,6 +1805,15 @@ void anv_GetImageSparseMemoryRequirements(
*pSparseMemoryRequirementCount = 0;
 }
 
+void anv_GetImageSparseMemoryRequirements2KHR(
+VkDevicedevice,
+const VkImageSparseMemoryRequirementsInfo2KHR* pInfo,
+uint32_t*   pSparseMemoryRequirementCount,
+VkSparseImageMemoryRequirements2KHR*pSparseMemoryRequirements)
+{
+   *pSparseMemoryRequirementCount = 0;
+}
+
 void anv_GetDeviceMemoryCommitment(
 VkDevicedevice,
 VkDeviceMemory  memory,
diff --git a/src/intel/vulkan/anv_entrypoints_gen.py 
b/src/intel/vulkan/anv_entrypoints_gen.py
index c2d35b7..4cc1f6a 100644
--- a/src/intel/vulkan/anv_entrypoints_gen.py
+++ b/src/intel/vulkan/anv_entrypoints_gen.py
@@ -34,6 +34,7 @@ MAX_API_VERSION = 1.0
 
 SUPPORTED_EXTENSIONS = [
 'VK_KHR_descriptor_update_template',
+'VK_KHR_get_memory_requirements2',
 'VK_KHR_get_physical_device_properties2',
 'VK_KHR_get_surface_capabilities2',
 'VK_KHR_incremental_present',
-- 
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[Mesa-dev] [PATCH 5/8] anv: Advertise version 1.0.54

[Jason Ekstrand]

---
 src/intel/vulkan/anv_device.c  | 2 +-
 src/intel/vulkan/dev_icd.json.in   | 2 +-
 src/intel/vulkan/intel_icd.json.in | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 3ee21a8..e63742f 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -862,7 +862,7 @@ void anv_GetPhysicalDeviceProperties(
};
 
*pProperties = (VkPhysicalDeviceProperties) {
-  .apiVersion = VK_MAKE_VERSION(1, 0, 42),
+  .apiVersion = VK_MAKE_VERSION(1, 0, 54),
   .driverVersion = vk_get_driver_version(),
   .vendorID = 0x8086,
   .deviceID = pdevice->chipset_id,
diff --git a/src/intel/vulkan/dev_icd.json.in b/src/intel/vulkan/dev_icd.json.in
index e4e65fa..84ac3d4 100644
--- a/src/intel/vulkan/dev_icd.json.in
+++ b/src/intel/vulkan/dev_icd.json.in
@@ -2,6 +2,6 @@
 "file_format_version": "1.0.0",
 "ICD": {
 "library_path": "@build_libdir@/libvulkan_intel.so",
-"api_version": "1.0.3"
+"api_version": "1.0.54"
 }
 }
diff --git a/src/intel/vulkan/intel_icd.json.in 
b/src/intel/vulkan/intel_icd.json.in
index e959291..61db4bf 100644
--- a/src/intel/vulkan/intel_icd.json.in
+++ b/src/intel/vulkan/intel_icd.json.in
@@ -2,6 +2,6 @@
 "file_format_version": "1.0.0",
 "ICD": {
 "library_path": "@install_libdir@/libvulkan_intel.so",
-"api_version": "1.0.3"
+"api_version": "1.0.54"
 }
 }
-- 
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[Mesa-dev] [PATCH 8/8] anv: Implement VK_KHR_external_memory_*

[Jason Ekstrand]

---
 src/intel/vulkan/anv_device.c   | 86 +++--
 src/intel/vulkan/anv_entrypoints_gen.py |  3 ++
 src/intel/vulkan/anv_formats.c  | 79 ++
 3 files changed, 163 insertions(+), 5 deletions(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index cabfb09d..6fc57cd 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -408,6 +408,10 @@ anv_physical_device_finish(struct anv_physical_device 
*device)
 
 static const VkExtensionProperties global_extensions[] = {
{
+  .extensionName = VK_KHR_EXTERNAL_MEMORY_CAPABILITIES_EXTENSION_NAME,
+  .specVersion = 1,
+   },
+   {
   .extensionName = VK_KHR_GET_PHYSICAL_DEVICE_PROPERTIES_2_EXTENSION_NAME,
   .specVersion = 1,
},
@@ -449,6 +453,14 @@ static const VkExtensionProperties device_extensions[] = {
   .specVersion = 1,
},
{
+  .extensionName = VK_KHR_EXTERNAL_MEMORY_EXTENSION_NAME,
+  .specVersion = 1,
+   },
+   {
+  .extensionName = VK_KHR_EXTERNAL_MEMORY_FD_EXTENSION_NAME,
+  .specVersion = 1,
+   },
+   {
   .extensionName = VK_KHR_GET_MEMORY_REQUIREMENTS_2_EXTENSION_NAME,
   .specVersion = 1,
},
@@ -888,6 +900,8 @@ void anv_GetPhysicalDeviceProperties2KHR(
 VkPhysicalDevicephysicalDevice,
 VkPhysicalDeviceProperties2KHR* pProperties)
 {
+   ANV_FROM_HANDLE(anv_physical_device, pdevice, physicalDevice);
+
anv_GetPhysicalDeviceProperties(physicalDevice, >properties);
 
vk_foreach_struct(ext, pProperties->pNext) {
@@ -900,6 +914,16 @@ void anv_GetPhysicalDeviceProperties2KHR(
  break;
   }
 
+  case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_ID_PROPERTIES_KHR: {
+ VkPhysicalDeviceIDPropertiesKHR *id_props =
+(VkPhysicalDeviceIDPropertiesKHR *)ext;
+ memcpy(id_props->deviceUUID, pdevice->device_uuid, VK_UUID_SIZE);
+ memcpy(id_props->driverUUID, pdevice->driver_uuid, VK_UUID_SIZE);
+ /* The LUID is for Windows. */
+ id_props->deviceLUIDValid = false;
+ break;
+  }
+
   case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_PROPERTIES_KHX: {
  VkPhysicalDeviceMultiviewPropertiesKHX *properties =
 (VkPhysicalDeviceMultiviewPropertiesKHX *)ext;
@@ -1543,11 +1567,31 @@ VkResult anv_AllocateMemory(
mem->map = NULL;
mem->map_size = 0;
 
-   result = anv_bo_cache_alloc(device, >bo_cache,
-   pAllocateInfo->allocationSize,
-   >bo);
-   if (result != VK_SUCCESS)
-  goto fail;
+   const VkImportMemoryFdInfoKHR *fd_info =
+  vk_find_struct_const(pAllocateInfo->pNext, IMPORT_MEMORY_FD_INFO_KHR);
+
+   /* The Vulkan spec permits handleType to be 0, in which case the struct is
+* ignored.
+*/
+   if (fd_info && fd_info->handleType) {
+  /* At the moment, we only support the OPAQUE_FD memory type which is
+   * just a GEM buffer.
+   */
+  assert(fd_info->handleType ==
+ VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT_KHR);
+
+  result = anv_bo_cache_import(device, >bo_cache,
+   fd_info->fd, pAllocateInfo->allocationSize,
+   >bo);
+  if (result != VK_SUCCESS)
+ goto fail;
+   } else {
+  result = anv_bo_cache_alloc(device, >bo_cache,
+  pAllocateInfo->allocationSize,
+  >bo);
+  if (result != VK_SUCCESS)
+ goto fail;
+   }
 
assert(mem->type->heapIndex < pdevice->memory.heap_count);
if (pdevice->memory.heaps[mem->type->heapIndex].supports_48bit_addresses)
@@ -1566,6 +1610,38 @@ VkResult anv_AllocateMemory(
return result;
 }
 
+VkResult anv_GetMemoryFdKHR(
+VkDevicedevice_h,
+const VkMemoryGetFdInfoKHR* pGetFdInfo,
+int*pFd)
+{
+   ANV_FROM_HANDLE(anv_device, dev, device_h);
+   ANV_FROM_HANDLE(anv_device_memory, mem, pGetFdInfo->memory);
+
+   assert(pGetFdInfo->sType == VK_STRUCTURE_TYPE_MEMORY_GET_FD_INFO_KHR);
+
+   /* We support only one handle type. */
+   assert(pGetFdInfo->handleType ==
+  VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT_KHR);
+
+   return anv_bo_cache_export(dev, >bo_cache, mem->bo, pFd);
+}
+
+VkResult anv_GetMemoryFdPropertiesKHR(
+VkDevicedevice_h,
+VkExternalMemoryHandleTypeFlagBitsKHR   handleType,
+int fd,
+VkMemoryFdPropertiesKHR*pMemoryFdProperties)
+{
+   /* The valid usage section for this function says:
+*
+*"handleType must not be one of the handle types defined as opaque."
+*
+* Since we only handle opaque handles for now, there are no FD properties.
+*/
+   return 

[Mesa-dev] [PATCH 1/8] anv: Drop support for VK_KHX_external_memory_*

[Jason Ekstrand]

These have been formally deprecated by Khronos never to be shipped
again.  The KHR versions should be implemented/used instead.
---
 src/intel/vulkan/anv_device.c   | 84 ++---
 src/intel/vulkan/anv_entrypoints_gen.py |  3 --
 src/intel/vulkan/anv_formats.c  | 79 ---
 3 files changed, 5 insertions(+), 161 deletions(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 39c907e..8d89bf0 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -438,10 +438,6 @@ static const VkExtensionProperties global_extensions[] = {
},
 #endif
{
-  .extensionName = VK_KHX_EXTERNAL_MEMORY_CAPABILITIES_EXTENSION_NAME,
-  .specVersion = 1,
-   },
-   {
   .extensionName = VK_KHX_EXTERNAL_SEMAPHORE_CAPABILITIES_EXTENSION_NAME,
   .specVersion = 1,
},
@@ -477,14 +473,6 @@ static const VkExtensionProperties device_extensions[] = {
   .specVersion = 68,
},
{
-  .extensionName = VK_KHX_EXTERNAL_MEMORY_EXTENSION_NAME,
-  .specVersion = 1,
-   },
-   {
-  .extensionName = VK_KHX_EXTERNAL_MEMORY_FD_EXTENSION_NAME,
-  .specVersion = 1,
-   },
-   {
   .extensionName = VK_KHX_EXTERNAL_SEMAPHORE_EXTENSION_NAME,
   .specVersion = 1,
},
@@ -904,8 +892,6 @@ void anv_GetPhysicalDeviceProperties2KHR(
 VkPhysicalDevicephysicalDevice,
 VkPhysicalDeviceProperties2KHR* pProperties)
 {
-   ANV_FROM_HANDLE(anv_physical_device, pdevice, physicalDevice);
-
anv_GetPhysicalDeviceProperties(physicalDevice, >properties);
 
vk_foreach_struct(ext, pProperties->pNext) {
@@ -918,16 +904,6 @@ void anv_GetPhysicalDeviceProperties2KHR(
  break;
   }
 
-  case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_ID_PROPERTIES_KHX: {
- VkPhysicalDeviceIDPropertiesKHX *id_props =
-(VkPhysicalDeviceIDPropertiesKHX *)ext;
- memcpy(id_props->deviceUUID, pdevice->device_uuid, VK_UUID_SIZE);
- memcpy(id_props->driverUUID, pdevice->driver_uuid, VK_UUID_SIZE);
- /* The LUID is for Windows. */
- id_props->deviceLUIDValid = false;
- break;
-  }
-
   case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_PROPERTIES_KHX: {
  VkPhysicalDeviceMultiviewPropertiesKHX *properties =
 (VkPhysicalDeviceMultiviewPropertiesKHX *)ext;
@@ -1571,31 +1547,11 @@ VkResult anv_AllocateMemory(
mem->map = NULL;
mem->map_size = 0;
 
-   const VkImportMemoryFdInfoKHX *fd_info =
-  vk_find_struct_const(pAllocateInfo->pNext, IMPORT_MEMORY_FD_INFO_KHX);
-
-   /* The Vulkan spec permits handleType to be 0, in which case the struct is
-* ignored.
-*/
-   if (fd_info && fd_info->handleType) {
-  /* At the moment, we only support the OPAQUE_FD memory type which is
-   * just a GEM buffer.
-   */
-  assert(fd_info->handleType ==
- VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT_KHX);
-
-  result = anv_bo_cache_import(device, >bo_cache,
-   fd_info->fd, pAllocateInfo->allocationSize,
-   >bo);
-  if (result != VK_SUCCESS)
- goto fail;
-   } else {
-  result = anv_bo_cache_alloc(device, >bo_cache,
-  pAllocateInfo->allocationSize,
-  >bo);
-  if (result != VK_SUCCESS)
- goto fail;
-   }
+   result = anv_bo_cache_alloc(device, >bo_cache,
+   pAllocateInfo->allocationSize,
+   >bo);
+   if (result != VK_SUCCESS)
+  goto fail;
 
assert(mem->type->heapIndex < pdevice->memory.heap_count);
if (pdevice->memory.heaps[mem->type->heapIndex].supports_48bit_addresses)
@@ -1614,36 +1570,6 @@ VkResult anv_AllocateMemory(
return result;
 }
 
-VkResult anv_GetMemoryFdKHX(
-VkDevicedevice_h,
-VkDeviceMemory  memory_h,
-VkExternalMemoryHandleTypeFlagBitsKHX   handleType,
-int*pFd)
-{
-   ANV_FROM_HANDLE(anv_device, dev, device_h);
-   ANV_FROM_HANDLE(anv_device_memory, mem, memory_h);
-
-   /* We support only one handle type. */
-   assert(handleType == VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT_KHX);
-
-   return anv_bo_cache_export(dev, >bo_cache, mem->bo, pFd);
-}
-
-VkResult anv_GetMemoryFdPropertiesKHX(
-VkDevicedevice_h,
-VkExternalMemoryHandleTypeFlagBitsKHX   handleType,
-int fd,
-VkMemoryFdPropertiesKHX*pMemoryFdProperties)
-{
-   /* The valid usage section for this function says:
-*
-*"handleType must not be one of the handle types defined as opaque."
-*
-* Since we only handle opaque handles for now, there are no FD properties.
-*/
-   return 

[Mesa-dev] [PATCH 3/8] radv: Drop support for VK_KHX_external_memory_*

[Jason Ekstrand]

These have been formally deprecated by Khronos never to be shipped
again.  The KHR versions should be implemented/used instead.
---
 src/amd/vulkan/radv_device.c   |  68 +---
 src/amd/vulkan/radv_entrypoints_gen.py |   3 -
 src/amd/vulkan/radv_formats.c  | 112 -
 src/amd/vulkan/radv_image.c|   7 +--
 4 files changed, 2 insertions(+), 188 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index c31a687..3b3a368 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -98,10 +98,6 @@ static const VkExtensionProperties instance_extensions[] = {
.extensionName = 
VK_KHR_GET_PHYSICAL_DEVICE_PROPERTIES_2_EXTENSION_NAME,
.specVersion = 1,
},
-   {
-   .extensionName = 
VK_KHX_EXTERNAL_MEMORY_CAPABILITIES_EXTENSION_NAME,
-   .specVersion = 1,
-   },
 };
 
 static const VkExtensionProperties common_device_extensions[] = {
@@ -141,14 +137,6 @@ static const VkExtensionProperties 
common_device_extensions[] = {
.extensionName = VK_NV_DEDICATED_ALLOCATION_EXTENSION_NAME,
.specVersion = 1,
},
-   {
-   .extensionName = VK_KHX_EXTERNAL_MEMORY_EXTENSION_NAME,
-   .specVersion = 1,
-   },
-   {
-   .extensionName = VK_KHX_EXTERNAL_MEMORY_FD_EXTENSION_NAME,
-   .specVersion = 1,
-   },
 };
 
 static VkResult
@@ -735,7 +723,6 @@ void radv_GetPhysicalDeviceProperties2KHR(
VkPhysicalDevicephysicalDevice,
VkPhysicalDeviceProperties2KHR *pProperties)
 {
-   RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
radv_GetPhysicalDeviceProperties(physicalDevice, 
>properties);
 
vk_foreach_struct(ext, pProperties->pNext) {
@@ -746,13 +733,6 @@ void radv_GetPhysicalDeviceProperties2KHR(
properties->maxPushDescriptors = MAX_PUSH_DESCRIPTORS;
break;
}
-   case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_ID_PROPERTIES_KHX: {
-   VkPhysicalDeviceIDPropertiesKHX *properties = 
(VkPhysicalDeviceIDPropertiesKHX*)ext;
-   radv_device_get_cache_uuid(0, properties->driverUUID);
-   memcpy(properties->deviceUUID, pdevice->device_uuid, 
VK_UUID_SIZE);
-   properties->deviceLUIDValid = false;
-   break;
-   }
default:
break;
}
@@ -2088,9 +2068,6 @@ VkResult radv_AllocateMemory(
*pMem = VK_NULL_HANDLE;
return VK_SUCCESS;
}
-
-   const VkImportMemoryFdInfoKHX *import_info =
-   vk_find_struct_const(pAllocateInfo->pNext, 
IMPORT_MEMORY_FD_INFO_KHX);
const VkDedicatedAllocationMemoryAllocateInfoNV *dedicate_info =
vk_find_struct_const(pAllocateInfo->pNext, 
DEDICATED_ALLOCATION_MEMORY_ALLOCATE_INFO_NV);
 
@@ -2107,18 +2084,6 @@ VkResult radv_AllocateMemory(
mem->buffer = NULL;
}
 
-   if (import_info) {
-   assert(import_info->handleType ==
-  VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT_KHX);
-   mem->bo = device->ws->buffer_from_fd(device->ws, 
import_info->fd,
-NULL, NULL);
-   if (!mem->bo) {
-   result = VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX;
-   goto fail;
-   } else
-   goto out_success;
-   }
-
uint64_t alloc_size = align_u64(pAllocateInfo->allocationSize, 4096);
if (pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_WRITE_COMBINE ||
pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_CACHED)
@@ -2142,7 +2107,7 @@ VkResult radv_AllocateMemory(
goto fail;
}
mem->type_index = pAllocateInfo->memoryTypeIndex;
-out_success:
+
*pMem = radv_device_memory_to_handle(mem);
 
return VK_SUCCESS;
@@ -3290,34 +3255,3 @@ vk_icdNegotiateLoaderICDInterfaceVersion(uint32_t 
*pSupportedVersion)
*pSupportedVersion = MIN2(*pSupportedVersion, 3u);
return VK_SUCCESS;
 }
-
-VkResult radv_GetMemoryFdKHX(VkDevice _device,
-VkDeviceMemory _memory,
-VkExternalMemoryHandleTypeFlagsKHX handleType,
-int *pFD)
-{
-   RADV_FROM_HANDLE(radv_device, device, _device);
-   RADV_FROM_HANDLE(radv_device_memory, memory, _memory);
-
-   /* We support only one handle type. */
-   assert(handleType == VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT_KHX);
-
-   bool ret = radv_get_memory_fd(device, memory, pFD);
-   if (ret == false)
-   return 

[Mesa-dev] [PATCH 2/8] anv: Drop support for VK_KHX_external_semaphore_*

[Jason Ekstrand]

These have been formally deprecated by Khronos never to be shipped
again.  The KHR versions should be implemented/used instead.
---
 src/intel/vulkan/anv_device.c   |  12 
 src/intel/vulkan/anv_entrypoints_gen.py |   3 -
 src/intel/vulkan/anv_queue.c| 115 ++--
 3 files changed, 5 insertions(+), 125 deletions(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 8d89bf0..3ee21a8 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -437,10 +437,6 @@ static const VkExtensionProperties global_extensions[] = {
   .specVersion = 6,
},
 #endif
-   {
-  .extensionName = VK_KHX_EXTERNAL_SEMAPHORE_CAPABILITIES_EXTENSION_NAME,
-  .specVersion = 1,
-   },
 };
 
 static const VkExtensionProperties device_extensions[] = {
@@ -473,14 +469,6 @@ static const VkExtensionProperties device_extensions[] = {
   .specVersion = 68,
},
{
-  .extensionName = VK_KHX_EXTERNAL_SEMAPHORE_EXTENSION_NAME,
-  .specVersion = 1,
-   },
-   {
-  .extensionName = VK_KHX_EXTERNAL_SEMAPHORE_FD_EXTENSION_NAME,
-  .specVersion = 1,
-   },
-   {
   .extensionName = VK_KHX_MULTIVIEW_EXTENSION_NAME,
   .specVersion = 1,
},
diff --git a/src/intel/vulkan/anv_entrypoints_gen.py 
b/src/intel/vulkan/anv_entrypoints_gen.py
index 0de83fa..c2d35b7 100644
--- a/src/intel/vulkan/anv_entrypoints_gen.py
+++ b/src/intel/vulkan/anv_entrypoints_gen.py
@@ -46,9 +46,6 @@ SUPPORTED_EXTENSIONS = [
 'VK_KHR_wayland_surface',
 'VK_KHR_xcb_surface',
 'VK_KHR_xlib_surface',
-'VK_KHX_external_semaphore',
-'VK_KHX_external_semaphore_capabilities',
-'VK_KHX_external_semaphore_fd',
 'VK_KHX_multiview',
 ]
 
diff --git a/src/intel/vulkan/anv_queue.c b/src/intel/vulkan/anv_queue.c
index b12b2e0..2c10e9d 100644
--- a/src/intel/vulkan/anv_queue.c
+++ b/src/intel/vulkan/anv_queue.c
@@ -528,38 +528,11 @@ VkResult anv_CreateSemaphore(
if (semaphore == NULL)
   return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 
-   const VkExportSemaphoreCreateInfoKHX *export =
-  vk_find_struct_const(pCreateInfo->pNext, 
EXPORT_SEMAPHORE_CREATE_INFO_KHX);
-VkExternalSemaphoreHandleTypeFlagsKHX handleTypes =
-  export ? export->handleTypes : 0;
-
-   if (handleTypes == 0) {
-  /* The DRM execbuffer ioctl always execute in-oder so long as you stay
-   * on the same ring.  Since we don't expose the blit engine as a DMA
-   * queue, a dummy no-op semaphore is a perfectly valid implementation.
-   */
-  semaphore->permanent.type = ANV_SEMAPHORE_TYPE_DUMMY;
-   } else if (handleTypes & 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHX) {
-  assert(handleTypes == 
VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHX);
-
-  semaphore->permanent.type = ANV_SEMAPHORE_TYPE_BO;
-  VkResult result = anv_bo_cache_alloc(device, >bo_cache,
-   4096, >permanent.bo);
-  if (result != VK_SUCCESS) {
- vk_free2(>alloc, pAllocator, semaphore);
- return result;
-  }
-
-  /* If we're going to use this as a fence, we need to *not* have the
-   * EXEC_OBJECT_ASYNC bit set.
-   */
-  assert(!(semaphore->permanent.bo->flags & EXEC_OBJECT_ASYNC));
-   } else {
-  assert(!"Unknown handle type");
-  vk_free2(>alloc, pAllocator, semaphore);
-  return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX);
-   }
-
+   /* The DRM execbuffer ioctl always execute in-oder so long as you stay
+* on the same ring.  Since we don't expose the blit engine as a DMA
+* queue, a dummy no-op semaphore is a perfectly valid implementation.
+*/
+   semaphore->permanent.type = ANV_SEMAPHORE_TYPE_DUMMY;
semaphore->temporary.type = ANV_SEMAPHORE_TYPE_NONE;
 
*pSemaphore = anv_semaphore_to_handle(semaphore);
@@ -601,81 +574,3 @@ void anv_DestroySemaphore(
 
vk_free2(>alloc, pAllocator, semaphore);
 }
-
-void anv_GetPhysicalDeviceExternalSemaphorePropertiesKHX(
-VkPhysicalDevicephysicalDevice,
-const VkPhysicalDeviceExternalSemaphoreInfoKHX* pExternalSemaphoreInfo,
-VkExternalSemaphorePropertiesKHX*   pExternalSemaphoreProperties)
-{
-   switch (pExternalSemaphoreInfo->handleType) {
-   case VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHX:
-  pExternalSemaphoreProperties->exportFromImportedHandleTypes =
- VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHX;
-  pExternalSemaphoreProperties->compatibleHandleTypes =
- VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHX;
-  pExternalSemaphoreProperties->externalSemaphoreFeatures =
- VK_EXTERNAL_SEMAPHORE_FEATURE_EXPORTABLE_BIT_KHX |
- VK_EXTERNAL_SEMAPHORE_FEATURE_IMPORTABLE_BIT_KHX;
-  break;
-
-   default:
-  pExternalSemaphoreProperties->exportFromImportedHandleTypes = 0;
-  pExternalSemaphoreProperties->compatibleHandleTypes = 0;
-  

[Mesa-dev] [PATCH 0/8] vulkan: Update to 1.0.54

[Jason Ekstrand]

This little series updates us to the 1.0.54 headers and XML.  The major
change here is that 1.0.54 dropped the VK_KHX_external* extensions and
replaced them with VK_KHR variants.  The first three patches drop support
for the KHX versions from anv and radv and the last 3 implement the KHR
version of external memory and the related dependent extensions.

Cc: Dave Airlie 

Jason Ekstrand (8):
  anv: Drop support for VK_KHX_external_memory_*
  anv: Drop support for VK_KHX_external_semaphore_*
  radv: Drop support for VK_KHX_external_memory_*
  vulkan: Update to the new 1.0.54 spec XML and headers
  anv: Advertise version 1.0.54
  anv: Implement VK_KHR_get_memory_requirements2
  anv: Implement VK_KHR_dedicated_allocation
  anv: Implement VK_KHR_external_memory_*

 include/vulkan/vulkan.h | 1284 +--
 src/amd/vulkan/radv_device.c|   68 +-
 src/amd/vulkan/radv_entrypoints_gen.py  |3 -
 src/amd/vulkan/radv_formats.c   |  112 ---
 src/amd/vulkan/radv_image.c |7 +-
 src/intel/vulkan/anv_allocator.c|6 +-
 src/intel/vulkan/anv_device.c   |  129 +++-
 src/intel/vulkan/anv_entrypoints_gen.py |   11 +-
 src/intel/vulkan/anv_formats.c  |   42 +-
 src/intel/vulkan/anv_queue.c|  115 +--
 src/intel/vulkan/dev_icd.json.in|2 +-
 src/intel/vulkan/intel_icd.json.in  |2 +-
 src/vulkan/registry/vk.xml  | 1208 +++--
 13 files changed, 1837 insertions(+), 1152 deletions(-)

-- 
2.5.0.400.gff86faf

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Re: [Mesa-dev] [PATCH 0/8] compiler: Add a new gl_image_format enum and use it

[Jason Ekstrand]

On Thu, Jul 13, 2017 at 9:57 AM, Eric Anholt  wrote:

> Jason Ekstrand  writes:
>
> > I know what you're all thinking:  Why are we adding yet another format
> > enum?  I asked myself the same question.  Really, I've spent enough of my
> > life writing format enum conversion tables that I should know better.
> >
> > It all started as an attempt to write patch 6 which prints the formats of
> > images used in shaders in nir_print.  Unfortunately, what I wanted to do
> > was to use _mesa_enum_to_string to convert the GL enum (which is what we
> > were using before) into a string to print.  The problem is that this
> > function exists in mesa/main and is therefore unavailable in nir_print().
> > So, instead of writing a remap table just for nir_print(), I decided to
> > bite the bullet and add something to shader_enums.
> >
> > Really, I think this makes a fair amount of sense as the image formats in
> > GLSL or SPIR-V really live in their own compiler enum space.  The only
> > reason why we re-used the GL enums before was for convenience.  This
> meant
> > that spirv_to_nir had a big table to convert SPIR-V enums to GL enums
> which
> > is a bit awkward since it's for Vulkan.  In any case, I don't think this
> > actually makes the situation any worse.
>
> Could we just pull the Mesa formats and their names up to the top,
> instead?
>

I knew someone would ask that question...  Yes, that's what we really
should do in the long run.  One of these days, I'd like to have a single
format enum to which all other enums get converted.  Unfortunately, when
that happens, I'll probably want to refactor MESA_FORMAT a bit to make it
more compatible with Vulkan and that's going to be a lot of work.
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Re: [Mesa-dev] [PATCH 1/2] intel/decoder: Reuse the MAX2 macro instead of defining another one.

[Lionel Landwerlin]

This series is :

Reviewed-by: Lionel Landwerlin 

Thanks!

On 13/07/17 19:37, Eric Anholt wrote:

---
  src/intel/common/gen_decoder.c | 4 +---
  1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index ba3a5139aec6..60591ad666bf 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -39,8 +39,6 @@
  
  #define XML_BUFFER_SIZE 4096
  
-#define MAX(a, b) ((a) < (b) ? (b) : (a))

-
  #define MAKE_GEN(major, minor) ( ((major) << 8) | (minor) )
  
  struct gen_spec {

@@ -381,7 +379,7 @@ create_and_append_field(struct parser_context *ctx,
  const char **atts)
  {
 if (ctx->group->nfields == ctx->group->fields_size) {
-  ctx->group->fields_size = MAX(ctx->group->fields_size * 2, 2);
+  ctx->group->fields_size = MAX2(ctx->group->fields_size * 2, 2);
ctx->group->fields =
   (struct gen_field **) realloc(ctx->group->fields,
 sizeof(ctx->group->fields[0]) *



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[Mesa-dev] [PATCH] egl: propagate EGL_BAD_ATTRIBUTE during EGLImage attr parsing

[Emil Velikov]

From: Emil Velikov 

Earlier commit refactored/split the parsing into separate hunks.
While no functional change was intended, it did not attribute that
different error is set when the attrib. value is incorrect.

Fixes:  3ee2be4113d ("egl: split _eglParseImageAttribList into per
extension functions")
Cc: Michel Dänzer 
Reported-by: Michel Dänzer 
Signed-off-by: Emil Velikov 
---
There's at least one other way (tad longer and more extensive) way to
address this. Considering no other extensions bother with separate
error, that may be an overkill... for now.
---
 src/egl/main/eglimage.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/src/egl/main/eglimage.c b/src/egl/main/eglimage.c
index a96075fe558..72a556e8dbd 100644
--- a/src/egl/main/eglimage.c
+++ b/src/egl/main/eglimage.c
@@ -302,6 +302,13 @@ _eglParseImageAttribList(_EGLImageAttribs *attrs, 
_EGLDisplay *dpy,
   if (err == EGL_SUCCESS)
   continue;
 
+  /* EXT_image_dma_buf_import states that if invalid value is provided for
+   * its attributes, we should return EGL_BAD_ATTRIBUTE.
+   * Bail out ASAP, since follow-up calls can return another EGL_BAD error.
+   */
+  if (err == EGL_BAD_ATTRIBUTE)
+  return _eglError(err, __func__);
+
   err = _eglParseEXTImageDmaBufImportModifiersAttribs(attrs, dpy, attr, 
val);
   if (err == EGL_SUCCESS)
   continue;
-- 
2.13.0

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[Mesa-dev] [PATCH 1/2] intel/decoder: Reuse the MAX2 macro instead of defining another one.

[Eric Anholt]

---
 src/intel/common/gen_decoder.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index ba3a5139aec6..60591ad666bf 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -39,8 +39,6 @@
 
 #define XML_BUFFER_SIZE 4096
 
-#define MAX(a, b) ((a) < (b) ? (b) : (a))
-
 #define MAKE_GEN(major, minor) ( ((major) << 8) | (minor) )
 
 struct gen_spec {
@@ -381,7 +379,7 @@ create_and_append_field(struct parser_context *ctx,
 const char **atts)
 {
if (ctx->group->nfields == ctx->group->fields_size) {
-  ctx->group->fields_size = MAX(ctx->group->fields_size * 2, 2);
+  ctx->group->fields_size = MAX2(ctx->group->fields_size * 2, 2);
   ctx->group->fields =
  (struct gen_field **) realloc(ctx->group->fields,
sizeof(ctx->group->fields[0]) *
-- 
2.11.0

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[Mesa-dev] [PATCH 2/2] intel/decoder: Reuse the gen_make_gen() helper.

[Eric Anholt]

---
 src/intel/common/gen_decoder.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index 60591ad666bf..85880143f00e 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -39,8 +39,6 @@
 
 #define XML_BUFFER_SIZE 4096
 
-#define MAKE_GEN(major, minor) ( ((major) << 8) | (minor) )
-
 struct gen_spec {
uint32_t gen;
 
@@ -420,7 +418,7 @@ start_element(void *data, const char *element_name, const 
char **atts)
   if (n == 1)
  minor = 0;
 
-  ctx->spec->gen = MAKE_GEN(major, minor);
+  ctx->spec->gen = gen_make_gen(major, minor);
} else if (strcmp(element_name, "instruction") == 0 ||
   strcmp(element_name, "struct") == 0) {
   ctx->group = create_group(ctx, name, atts, NULL);
-- 
2.11.0

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Re: [Mesa-dev] [PATCH 03/10] egl: split _eglParseImageAttribList into per extension functions

[Emil Velikov]

On 13 July 2017 at 08:48, Michel Dänzer  wrote:
> On 30/06/17 08:15 PM, Emil Velikov wrote:
>> Will allow us to simplify existing code and make further improvements
>> short and simple.
>>
>> No functional change intended.
>
> Famous last words. :)
>
Unfortunately.

> This broke the piglit test
> spec@ext_image_dma_buf_import@ext_image_dma_buf_import-invalid_hints for
> me with radeonsi:
>
> Unexpected EGL error: EGL_BAD_PARAMETER 0x300c
> Expected EGL error: EGL_BAD_ATTRIBUTE 0x3004
> Unexpected EGL error: EGL_BAD_PARAMETER 0x300c
> Expected EGL error: EGL_BAD_ATTRIBUTE 0x3004
> Unexpected EGL error: EGL_BAD_PARAMETER 0x300c
> Expected EGL error: EGL_BAD_ATTRIBUTE 0x3004
> Unexpected EGL error: EGL_BAD_PARAMETER 0x300c
> Expected EGL error: EGL_BAD_ATTRIBUTE 0x3004
>
Seems like we're overriding the EGL_BAD_ATTRIBUTE. Couple of routes
come ti mind - will flip a coin and send a patch in a few minutes.

Thanks
Emil
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[Mesa-dev] [Bug 100708] Trine 2 doesn't start on radeonsi on mesa 17

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100708

--- Comment #9 from Kamil Páral  ---
I can confirm this problem with Radeon 270. I've seen this error:

XIO:  fatal IO error 11 (Resource temporarily unavailable) on X server ":0"
  after 178 requests (178 known processed) with 4 events remaining.

or this error:

XIO:  fatal IO error 2 (No such file or directory) on X server ":0"
  after 188 requests (188 known processed) with 8 events remaining.

mesa-dri-drivers-17.2.0-0.69.git7250cba.fc26.x86_64
mesa-dri-drivers-17.2.0-0.69.git7250cba.fc26.i686
libdrm-2.4.81-1.fc26.x86_64
libdrm-2.4.81-1.fc26.i686
Fedora 26

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Re: [Mesa-dev] [PATCH 0/9] intel: coverity round of fixes

[Anuj Phogat]

On Thu, Jul 13, 2017 at 10:08 AM, Lionel Landwerlin
 wrote:
> Hi all,
>
> Here are some fixes for coverity issues.
>
> Cheers,
>
> Lionel Landwerlin (9):
>   isl: use 64bit arithmetic to compute size
>   intel/compiler: remove check unsigned is >= 0
>   i965: map_gtt: check mapping address before adding offset
>   i965: check pointer before dereferencing it
>   intel/compiler: don't check unsigned is >= 0
>   i965: fix missing NULL return if allocation fails
>   intel/compiler: no need to check unsigned is >= 0
>   anv: don't use strcpy for copying strings
>   aubinator: don't leak fd of opened aubfile
>
>  src/intel/compiler/brw_eu_emit.c |  2 +-
>  src/intel/compiler/brw_fs_nir.cpp|  2 +-
>  src/intel/compiler/brw_vec4_gs_visitor.cpp   |  2 +-
>  src/intel/isl/isl.c  |  4 ++--
>  src/intel/tools/aubinator.c  |  2 ++
>  src/intel/vulkan/anv_device.c|  3 ++-
>  src/mesa/drivers/dri/i965/intel_buffer_objects.c |  1 +
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c|  4 +++-
>  src/mesa/drivers/dri/i965/intel_tex_copy.c   | 14 +++---
>  9 files changed, 20 insertions(+), 14 deletions(-)
>
> --
> 2.13.2
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Series is:
Reviewed-by: Anuj Phogat 
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Re: [Mesa-dev] [PATCH] st/mesa: handle stfbi being NULL on entry of st_framebuffer_reuse_or_create

[Charmaine Lee]

Reviewed-by: Charmaine Lee 

From: Lucas Stach 
Sent: Thursday, July 13, 2017 10:01 AM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee; Brian Paul
Subject: [PATCH] st/mesa: handle stfbi being NULL on entry of 
st_framebuffer_reuse_or_create

Apparently this can happen. Just bail out early in that case, as all the called
functions return NULL in that case.

Fixes weston-terminal for me.

Fixes: 147d7fb772a7 ("st/mesa: add a winsys buffers list in st_context")
Signed-off-by: Lucas Stach 
---
 src/mesa/state_tracker/st_manager.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/mesa/state_tracker/st_manager.c 
b/src/mesa/state_tracker/st_manager.c
index 348b456c4d1d..d910eec00a16 100644
--- a/src/mesa/state_tracker/st_manager.c
+++ b/src/mesa/state_tracker/st_manager.c
@@ -788,6 +788,9 @@ st_framebuffer_reuse_or_create(struct st_context *st,
 {
struct st_framebuffer *cur = NULL, *stfb = NULL;

+   if (!stfbi)
+   return NULL;
+
/* Check if there is already a framebuffer object for the specified
 * framebuffer interface in this context. If there is one, use it.
 */
--
2.11.0

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[Mesa-dev] [PATCH 8/9] anv: don't use strcpy for copying strings

[Lionel Landwerlin]

CID: 1358935
Signed-off-by: Lionel Landwerlin 
---
 src/intel/vulkan/anv_device.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 39c907e9f2d..d3607deccfc 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -895,7 +895,8 @@ void anv_GetPhysicalDeviceProperties(
   .sparseProperties = {0}, /* Broadwell doesn't do sparse. */
};
 
-   strcpy(pProperties->deviceName, pdevice->name);
+   strncpy(pProperties->deviceName, pdevice->name,
+   VK_MAX_PHYSICAL_DEVICE_NAME_SIZE);
memcpy(pProperties->pipelineCacheUUID,
   pdevice->pipeline_cache_uuid, VK_UUID_SIZE);
 }
-- 
2.13.2

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[Mesa-dev] [PATCH 5/9] intel/compiler: don't check unsigned is >= 0

[Lionel Landwerlin]

CID: 1224468
Signed-off-by: Lionel Landwerlin 
---
 src/intel/compiler/brw_vec4_gs_visitor.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_vec4_gs_visitor.cpp 
b/src/intel/compiler/brw_vec4_gs_visitor.cpp
index f763f482365..ca59927cd3a 100644
--- a/src/intel/compiler/brw_vec4_gs_visitor.cpp
+++ b/src/intel/compiler/brw_vec4_gs_visitor.cpp
@@ -422,7 +422,7 @@ vec4_gs_visitor::set_stream_control_data_bits(unsigned 
stream_id)
assert(c->control_data_bits_per_vertex == 2);
 
/* Must be a valid stream */
-   assert(stream_id >= 0 && stream_id < MAX_VERTEX_STREAMS);
+   assert(stream_id < MAX_VERTEX_STREAMS);
 
/* Control data bits are initialized to 0 so we don't have to set any
 * bits when sending vertices to stream 0.
-- 
2.13.2

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[Mesa-dev] [PATCH 7/9] intel/compiler: no need to check unsigned is >= 0

[Lionel Landwerlin]

CID: 1338342
Signed-off-by: Lionel Landwerlin 
---
 src/intel/compiler/brw_fs_nir.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_fs_nir.cpp 
b/src/intel/compiler/brw_fs_nir.cpp
index a9dce42c38d..aea2c625630 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -1776,7 +1776,7 @@ fs_visitor::set_gs_stream_control_data_bits(const fs_reg 
_count,
assert(gs_compile->control_data_bits_per_vertex == 2);
 
/* Must be a valid stream */
-   assert(stream_id >= 0 && stream_id < MAX_VERTEX_STREAMS);
+   assert(stream_id < MAX_VERTEX_STREAMS);
 
/* Control data bits are initialized to 0 so we don't have to set any
 * bits when sending vertices to stream 0.
-- 
2.13.2

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[Mesa-dev] [PATCH 9/9] aubinator: don't leak fd of opened aubfile

[Lionel Landwerlin]

CID: 1373563
Signed-off-by: Lionel Landwerlin 
---
 src/intel/tools/aubinator.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 6c9a8f052c2..48d4456cc16 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -904,6 +904,8 @@ aub_file_open(const char *filename)
   exit(EXIT_FAILURE);
}
 
+   close(fd);
+
file->cursor = file->map;
file->end = file->map + sb.st_size / 4;
 
-- 
2.13.2

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[Mesa-dev] [PATCH 3/9] i965: map_gtt: check mapping address before adding offset

[Lionel Landwerlin]

The NULL check might fail if offset isn't 0.

CID: 971379
Signed-off-by: Lionel Landwerlin 
---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c 
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 575f04f8648..e7ebc29b59d 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2965,11 +2965,13 @@ intel_miptree_map_gtt(struct brw_context *brw,
y /= bh;
x /= bw;
 
-   base = intel_miptree_map_raw(brw, mt, map->mode) + mt->offset;
+   base = intel_miptree_map_raw(brw, mt, map->mode);
 
if (base == NULL)
   map->ptr = NULL;
else {
+  base += mt->offset;
+
   /* Note that in the case of cube maps, the caller must have passed the
* slice number referencing the face.
   */
-- 
2.13.2

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[Mesa-dev] [PATCH 6/9] i965: fix missing NULL return if allocation fails

[Lionel Landwerlin]

CID: 1250585
Signed-off-by: Lionel Landwerlin 
---
 src/mesa/drivers/dri/i965/intel_buffer_objects.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c 
b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
index 85cc1a694bf..fde6b224cd4 100644
--- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
+++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
@@ -99,6 +99,7 @@ brw_new_buffer_object(struct gl_context * ctx, GLuint name)
struct intel_buffer_object *obj = CALLOC_STRUCT(intel_buffer_object);
if (!obj) {
   _mesa_error_no_memory(__func__);
+  return NULL;
}
 
_mesa_initialize_buffer_object(ctx, >Base, name);
-- 
2.13.2

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[Mesa-dev] [PATCH 4/9] i965: check pointer before dereferencing it

[Lionel Landwerlin]

Check that irb isn't NULL before accessing irb->Base.Base.NumSamples.

CID: 1026046
Signed-off-by: Lionel Landwerlin 
---
 src/mesa/drivers/dri/i965/intel_tex_copy.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_tex_copy.c 
b/src/mesa/drivers/dri/i965/intel_tex_copy.c
index e0d5cadb6f6..4fe3585296d 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_copy.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_copy.c
@@ -52,6 +52,13 @@ intel_copy_texsubimage(struct brw_context *brw,
 {
const GLenum internalFormat = intelImage->base.Base.InternalFormat;
 
+   if (!intelImage->mt || !irb || !irb->mt) {
+  if (unlikely(INTEL_DEBUG & DEBUG_PERF))
+fprintf(stderr, "%s fail %p %p (0x%08x)\n",
+__func__, intelImage->mt, irb, internalFormat);
+  return false;
+   }
+
/* No pixel transfer operations (zoom, bias, mapping), just a blit */
if (brw->ctx._ImageTransferState)
   return false;
@@ -69,13 +76,6 @@ intel_copy_texsubimage(struct brw_context *brw,
/* glCopyTexSubImage() can't be called on a multisampled texture. */
assert(intelImage->base.Base.NumSamples == 0);
 
-   if (!intelImage->mt || !irb || !irb->mt) {
-  if (unlikely(INTEL_DEBUG & DEBUG_PERF))
-fprintf(stderr, "%s fail %p %p (0x%08x)\n",
-__func__, intelImage->mt, irb, internalFormat);
-  return false;
-   }
-
/* account for view parameters and face index */
int dst_level = intelImage->base.Base.Level +
intelImage->base.Base.TexObject->MinLevel;
-- 
2.13.2

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[Mesa-dev] [PATCH 1/9] isl: use 64bit arithmetic to compute size

[Lionel Landwerlin]

If we allow the size to be more than 2^32, then we should compute it
in 64bit arithmetic otherwise we might run into overflow issues.

CID: 1412892, 1412891
Signed-off-by: Lionel Landwerlin 
---
 src/intel/isl/isl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index ba56d86c178..1026fe94952 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -1469,7 +1469,7 @@ isl_surf_init_s(const struct isl_device *dev,
uint32_t base_alignment;
uint64_t size;
if (tiling == ISL_TILING_LINEAR) {
-  size = row_pitch * padded_h_el + pad_bytes;
+  size = (uint64_t) row_pitch * padded_h_el + pad_bytes;
 
   /* From the Broadwell PRM Vol 2d, 
RENDER_SURFACE_STATE::SurfaceBaseAddress:
*
@@ -1494,7 +1494,7 @@ isl_surf_init_s(const struct isl_device *dev,
   const uint32_t total_h_tl =
  isl_align_div(padded_h_el, tile_info.logical_extent_el.height);
 
-  size = total_h_tl * tile_info.phys_extent_B.height * row_pitch;
+  size = (uint64_t) total_h_tl * tile_info.phys_extent_B.height * 
row_pitch;
 
   const uint32_t tile_size = tile_info.phys_extent_B.width *
  tile_info.phys_extent_B.height;
-- 
2.13.2

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[Mesa-dev] [PATCH 2/9] intel/compiler: remove check unsigned is >= 0

[Lionel Landwerlin]

By definition unsigned are always >= 0.

CID: 742212
Signed-off-by: Lionel Landwerlin 
---
 src/intel/compiler/brw_eu_emit.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index 231d6fdaec0..0b0d67a5c56 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -306,7 +306,7 @@ validate_reg(const struct gen_device_info *devinfo,
reg.nr == BRW_ARF_ACCUMULATOR)
   assert(reg.swizzle == BRW_SWIZZLE_XYZW);
 
-   assert(reg.hstride >= 0 && reg.hstride < ARRAY_SIZE(hstride_for_reg));
+   assert(reg.hstride < ARRAY_SIZE(hstride_for_reg));
hstride = hstride_for_reg[reg.hstride];
 
if (reg.vstride == 0xf) {
-- 
2.13.2

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[Mesa-dev] [PATCH 0/9] intel: coverity round of fixes

[Lionel Landwerlin]

Hi all,

Here are some fixes for coverity issues.

Cheers,

Lionel Landwerlin (9):
  isl: use 64bit arithmetic to compute size
  intel/compiler: remove check unsigned is >= 0
  i965: map_gtt: check mapping address before adding offset
  i965: check pointer before dereferencing it
  intel/compiler: don't check unsigned is >= 0
  i965: fix missing NULL return if allocation fails
  intel/compiler: no need to check unsigned is >= 0
  anv: don't use strcpy for copying strings
  aubinator: don't leak fd of opened aubfile

 src/intel/compiler/brw_eu_emit.c |  2 +-
 src/intel/compiler/brw_fs_nir.cpp|  2 +-
 src/intel/compiler/brw_vec4_gs_visitor.cpp   |  2 +-
 src/intel/isl/isl.c  |  4 ++--
 src/intel/tools/aubinator.c  |  2 ++
 src/intel/vulkan/anv_device.c|  3 ++-
 src/mesa/drivers/dri/i965/intel_buffer_objects.c |  1 +
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c|  4 +++-
 src/mesa/drivers/dri/i965/intel_tex_copy.c   | 14 +++---
 9 files changed, 20 insertions(+), 14 deletions(-)

--
2.13.2
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[Mesa-dev] [PATCH] st/mesa: handle stfbi being NULL on entry of st_framebuffer_reuse_or_create

[Lucas Stach]

Apparently this can happen. Just bail out early in that case, as all the called
functions return NULL in that case.

Fixes weston-terminal for me.

Fixes: 147d7fb772a7 ("st/mesa: add a winsys buffers list in st_context")
Signed-off-by: Lucas Stach 
---
 src/mesa/state_tracker/st_manager.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/mesa/state_tracker/st_manager.c 
b/src/mesa/state_tracker/st_manager.c
index 348b456c4d1d..d910eec00a16 100644
--- a/src/mesa/state_tracker/st_manager.c
+++ b/src/mesa/state_tracker/st_manager.c
@@ -788,6 +788,9 @@ st_framebuffer_reuse_or_create(struct st_context *st,
 {
struct st_framebuffer *cur = NULL, *stfb = NULL;
 
+   if (!stfbi)
+   return NULL;
+
/* Check if there is already a framebuffer object for the specified
 * framebuffer interface in this context. If there is one, use it.
 */
-- 
2.11.0

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Re: [Mesa-dev] [PATCH 0/8] compiler: Add a new gl_image_format enum and use it

[Eric Anholt]

Jason Ekstrand  writes:

> I know what you're all thinking:  Why are we adding yet another format
> enum?  I asked myself the same question.  Really, I've spent enough of my
> life writing format enum conversion tables that I should know better.
>
> It all started as an attempt to write patch 6 which prints the formats of
> images used in shaders in nir_print.  Unfortunately, what I wanted to do
> was to use _mesa_enum_to_string to convert the GL enum (which is what we
> were using before) into a string to print.  The problem is that this
> function exists in mesa/main and is therefore unavailable in nir_print().
> So, instead of writing a remap table just for nir_print(), I decided to
> bite the bullet and add something to shader_enums.
>
> Really, I think this makes a fair amount of sense as the image formats in
> GLSL or SPIR-V really live in their own compiler enum space.  The only
> reason why we re-used the GL enums before was for convenience.  This meant
> that spirv_to_nir had a big table to convert SPIR-V enums to GL enums which
> is a bit awkward since it's for Vulkan.  In any case, I don't think this
> actually makes the situation any worse.

Could we just pull the Mesa formats and their names up to the top,
instead?


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Re: [Mesa-dev] [PATCH] st/mesa: add a winsys buffers list in st_context

[Andy Furniss]

OK, thanks, I missed that.

Brian Paul wrote:
A patch to fix this was already posted and reviewed.  I'll push it soon 
since I think Michel is off-line this time of day.


-Brian

On 07/13/2017 09:17 AM, Andy Furniss wrote:

This breaks startx on radeonsi for me on a R9 285.

[  5297.130] (II) glamor: OpenGL accelerated X.org driver based.
[  5297.132] (II) glamor: EGL version 1.5 (DRI2):
[  5297.133] (EE)
[  5297.133] (EE) Backtrace:
[  5297.151] (EE) 0: /usr/libexec/Xorg (OsSigHandler+0x29) [0x584069]
[  5297.164] (EE) 1: /lib/libc.so.6 (killpg+0x40) [0x7f667a45768f]
[  5297.165] (EE) 2: /usr/lib/dri/radeonsi_dri.so
(st_framebuffer_reuse_or_create.isra.8+0x19a) [0x7f6673aa441a]
[  5297.166] (EE) 3: /usr/lib/dri/radeonsi_dri.so
(st_api_make_current+0x2e) [0x7f6673aa463e]
[  5297.168] (EE) 4: /usr/lib/dri/radeonsi_dri.so (driBindContext+0x36)
[0x7f6673bdfdd6]
[  5297.168] (EE) 5: /usr/lib/../lib64/libEGL.so.1
(dri2_make_current+0x113) [0x7f666bb23c23]
[  5297.168] (EE) 6: /usr/lib/../lib64/libEGL.so.1
(eglMakeCurrent+0x2a3) [0x7f666bb15123]
[  5297.181] (EE) 7: /usr/lib/xorg/modules/libglamoregl.so
(glamor_egl_init+0x2c9) [0x7f666c03c8a9]
[  5297.189] (EE) 8: /usr/lib/xorg/modules/drivers/amdgpu_drv.so
(amdgpu_glamor_pre_init+0x4f) [0x7f667524266f]
[  5297.190] (EE) 9: /usr/lib/xorg/modules/drivers/amdgpu_drv.so
(AMDGPUPreInit_KMS+0x70d) [0x7f667523aa7d]
[  5297.191] (EE) 10: /usr/libexec/Xorg (InitOutput+0xa9b) [0x477f1b]
[  5297.192] (EE) 11: /usr/libexec/Xorg (dix_main+0x1c6) [0x439106]
[  5297.194] (EE) 12: /lib/libc.so.6 (__libc_start_main+0xf0)
[0x7f667a4445e0]
[  5297.194] (EE) 13: /usr/libexec/Xorg (_start+0x29) [0x424649]
[  5297.194] (EE)
[  5297.194] (EE) Segmentation fault at address 0x490
[  5297.195] (EE)
Fatal server error:
[  5297.195] (EE) Caught signal 11 (Segmentation fault). Server aborting

Charmaine Lee wrote:

Commit a5e733c6b52e93de3000647d075f5ca2f55fcb71 fixes the dangling
framebuffer object by unreferencing the window system draw/read buffers
when context is released. However this can prematurely destroy the
resources associated with these window system buffers. The problem is
reproducible with Turbine Demo running with VMware driver. In this case,
the depth buffer content was lost when the context is rebound to a
drawable.

To prevent premature destroy of the resources associated with
window system buffers, this patch maintains a list of these buffers in
the context, making sure the reference counts of these buffers will not
reach zero until the associated framebuffer interface objects no
longer exist. This also helps to avoid unnecessary destruction and
re-construction of the resources associated with the framebuffer.

Fixes VMware bug 1909807.
---
  src/gallium/include/state_tracker/st_api.h|  5 +++
  src/gallium/state_trackers/dri/dri_drawable.c |  4 ++
  src/gallium/state_trackers/wgl/stw_st.c   |  4 +-
  src/mesa/state_tracker/st_context.c   | 22 ++
  src/mesa/state_tracker/st_context.h   |  7 
  src/mesa/state_tracker/st_manager.c   | 59
++-
  src/mesa/state_tracker/st_manager.h   |  4 ++
  7 files changed, 94 insertions(+), 11 deletions(-)

diff --git a/src/gallium/include/state_tracker/st_api.h
b/src/gallium/include/state_tracker/st_api.h
index d641092..3fd5f01 100644
--- a/src/gallium/include/state_tracker/st_api.h
+++ b/src/gallium/include/state_tracker/st_api.h
@@ -311,6 +311,11 @@ struct st_framebuffer_iface
 int32_t stamp;
 /**
+* Identifier that uniquely identifies the framebuffer interface
object.
+*/
+   uint32_t ID;
+
+   /**
  * Available for the state tracker manager to use.
  */
 void *st_manager_private;
diff --git a/src/gallium/state_trackers/dri/dri_drawable.c
b/src/gallium/state_trackers/dri/dri_drawable.c
index 3c2e307..0cfdc30 100644
--- a/src/gallium/state_trackers/dri/dri_drawable.c
+++ b/src/gallium/state_trackers/dri/dri_drawable.c
@@ -38,6 +38,8 @@
  #include "util/u_memory.h"
  #include "util/u_inlines.h"
+static uint32_t drifb_ID = 0;
+
  static void
  swap_fences_unref(struct dri_drawable *draw);
@@ -155,6 +157,7 @@ dri_create_buffer(__DRIscreen * sPriv,
 dPriv->driverPrivate = (void *)drawable;
 p_atomic_set(>base.stamp, 1);
+   drawable->base.ID = p_atomic_inc_return(_ID);
 return GL_TRUE;
  fail:
@@ -177,6 +180,7 @@ dri_destroy_buffer(__DRIdrawable * dPriv)
 swap_fences_unref(drawable);
+   drawable->base.ID = 0;
 FREE(drawable);
  }
diff --git a/src/gallium/state_trackers/wgl/stw_st.c
b/src/gallium/state_trackers/wgl/stw_st.c
index 7806a2a..c2844b0 100644
--- a/src/gallium/state_trackers/wgl/stw_st.c
+++ b/src/gallium/state_trackers/wgl/stw_st.c
@@ -46,7 +46,7 @@ struct stw_st_framebuffer {
 unsigned texture_mask;
  };
-
+static uint32_t stwfb_ID = 0;
  /**
   * Is the given mutex held by the calling thread?
@@ -234,6 +234,7 @@ stw_st_create_framebuffer(struct stw_framebuffer 
*fb)

 stwfb->fb = fb;
 

Re: [Mesa-dev] [PATCH] anv/pipeline: use BITFIELD64_BIT() to check enable vertex inputs

[Matt Turner]

On Thu, Jul 13, 2017 at 7:48 AM, Juan A. Suarez Romero
 wrote:
> When initializing the ANV pipeline, one of the tasks is checking which
> vertex inputs are enabled. This is done by checking if the enabled bits
> in inputs_read.
>
> But the mask to use is computed doing `(1 << (VERT_ATTRIB_GENERIC0 +
> desc->location))`. The problem here is that if location is 15 or
> greater, the sum is 32 or greater. But C is handling 1 as a 32-bit
> integer, which means the displaced bit is out of range and thus the full
> value is 0.
>
> Rather, use BITFIELD64_BIT() to compute the mask.
>
> This fixes:
> dEQP-VK.pipeline.vertex_input.max_attributes.16_attributes.binding_one_to_one.interleaved
>
> Signed-off-by: Juan A. Suarez Romero 
> Cc: mesa-sta...@lists.freedesktop.org
> ---
>  src/intel/vulkan/anv_pipeline.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
> index 5494a6e..edbe2e7 100644
> --- a/src/intel/vulkan/anv_pipeline.c
> +++ b/src/intel/vulkan/anv_pipeline.c
> @@ -1330,7 +1330,7 @@ anv_pipeline_init(struct anv_pipeline *pipeline,
>const VkVertexInputAttributeDescription *desc =
>   _info->pVertexAttributeDescriptions[i];
>
> -  if (inputs_read & (1 << (VERT_ATTRIB_GENERIC0 + desc->location)))
> +  if (inputs_read & BITFIELD64_BIT(VERT_ATTRIB_GENERIC0 + 
> desc->location))

The BITFIELD64_BIT macro exists just for MSVC support (See commit
5fc5820cbc0faf57a48154466b4792294841a690)

Since this code will never be compiled with MSVC, it's safe to use
1ull. I'm not really sure how mtypes.h is being indirectly included.

Reviewed-by: Matt Turner 
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Re: [Mesa-dev] [PATCH v2 05/11] gbm: Pull out FourCC <-> DRIimage format table

[Jason Ekstrand]

On July 13, 2017 9:03:01 AM Daniel Stone  wrote:


Hi,

On 13 July 2017 at 16:59, Jason Ekstrand  wrote:

On July 13, 2017 4:13:17 AM Daniel Stone  wrote:

+   /* The two GBM_BO_FORMAT_[XA]RGB formats alias the GBM_FORMAT_*
+* formats of the same name. We want to accept them whenever someone
+* has a GBM format, but never return them to the user. */
+   if (gbm_format == GBM_BO_FORMAT_XRGB)
+  gbm_format = GBM_FORMAT_XRGB;
+   else if (gbm_format == GBM_BO_FORMAT_ARGB)
+  gbm_format = GBM_FORMAT_ARGB;


You could put them in the table but make sure they come after their
GBM_FORMAT counterparts.  I'm not sure if that's actually better though.


I had actually typed that out, but decided it was more confusing.
Given that the two are an anomaly and we're definitely not going to
have any more non-drm_fourcc formats, it looked far easier to
completely special-case them.


Fine with me.


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Re: [Mesa-dev] [PATCH v2 11/11] egl/wayland: Use linux-dmabuf interface for buffers

[Jason Ekstrand]

On July 13, 2017 4:13:04 AM Daniel Stone  wrote:


When available, use the zwp_linux_dambuf_v1 interface to create buffers,
which allows multiple planes and buffer modifiers to be used.

Signed-off-by: Daniel Stone 
---
 configure.ac|   5 +-
 src/egl/Makefile.am |  23 +++-
 src/egl/drivers/dri2/.gitignore |   2 +
 src/egl/drivers/dri2/egl_dri2.c |   7 ++
 src/egl/drivers/dri2/egl_dri2.h |  10 ++
 src/egl/drivers/dri2/platform_wayland.c | 195 +---
 6 files changed, 221 insertions(+), 21 deletions(-)
 create mode 100644 src/egl/drivers/dri2/.gitignore

v2: Add missing include, more comments.

diff --git a/configure.ac b/configure.ac
index 61d98e28e0..33cb749a5a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -88,6 +88,7 @@ LIBOMXIL_BELLAGIO_REQUIRED=0.0
 LIBVA_REQUIRED=0.38.0
 VDPAU_REQUIRED=1.1
 WAYLAND_REQUIRED=1.11
+WAYLAND_PROTOCOLS_REQUIRED=1.8
 XCB_REQUIRED=1.9.3
 XCBDRI2_REQUIRED=1.8
 XCBGLX_REQUIRED=1.8.1
@@ -1683,7 +1684,9 @@ for plat in $platforms; do
case "$plat" in
wayland)

-		PKG_CHECK_MODULES([WAYLAND], [wayland-client >= $WAYLAND_REQUIRED 
wayland-server >= $WAYLAND_REQUIRED])
+		PKG_CHECK_MODULES([WAYLAND], [wayland-client >= $WAYLAND_REQUIRED 
wayland-server >= $WAYLAND_REQUIRED wayland-protocols >= 
$WAYLAND_PROTOCOLS_REQUIRED])
+ac_wayland_protocols_pkgdatadir=`$PKG_CONFIG 
--variable=pkgdatadir wayland-protocols`
+AC_SUBST(WAYLAND_PROTOCOLS_DATADIR, 
$ac_wayland_protocols_pkgdatadir)


if test "x$WAYLAND_SCANNER" = "x:"; then
AC_MSG_ERROR([wayland-scanner is needed to compile the 
wayland platform])
diff --git a/src/egl/Makefile.am b/src/egl/Makefile.am
index 81090387b5..19295de3ed 100644
--- a/src/egl/Makefile.am
+++ b/src/egl/Makefile.am
@@ -21,6 +21,8 @@

 include Makefile.sources

+BUILT_SOURCES =
+
 AM_CFLAGS = \
-I$(top_srcdir)/include \
-I$(top_srcdir)/src/egl/main \
@@ -61,11 +63,27 @@ endif
 endif

 if HAVE_PLATFORM_WAYLAND
+WL_DMABUF_XML = 
$(WAYLAND_PROTOCOLS_DATADIR)/unstable/linux-dmabuf/linux-dmabuf-unstable-v1.xml

+
+drivers/dri2/linux-dmabuf-unstable-v1-protocol.c: $(WL_DMABUF_XML)
+   $(MKDIR_GEN)
+   $(AM_V_GEN)$(WAYLAND_SCANNER) code < $< > $@
+
+drivers/dri2/linux-dmabuf-unstable-v1-client-protocol.h: $(WL_DMABUF_XML)
+   $(MKDIR_GEN)
+   $(AM_V_GEN)$(WAYLAND_SCANNER) client-header < $< > $@
+
+BUILT_SOURCES += \
+   drivers/dri2/linux-dmabuf-unstable-v1-protocol.c \
+   drivers/dri2/linux-dmabuf-unstable-v1-client-protocol.h
+
 AM_CFLAGS += $(WAYLAND_CFLAGS)
 libEGL_common_la_LIBADD += $(WAYLAND_LIBS)
 libEGL_common_la_LIBADD += $(LIBDRM_LIBS)
 libEGL_common_la_LIBADD += 
 $(top_builddir)/src/egl/wayland/wayland-drm/libwayland-drm.la

-dri2_backend_FILES += drivers/dri2/platform_wayland.c
+libEGL_common_la_LIBADD += $(top_builddir)/src/util/libmesautil.la
+dri2_backend_FILES += drivers/dri2/platform_wayland.c  \
+   drivers/dri2/linux-dmabuf-unstable-v1-protocol.c
 endif

 if HAVE_PLATFORM_DRM
@@ -85,6 +103,7 @@ endif

 AM_CFLAGS += \
-I$(top_srcdir)/src/loader \
+   -I$(top_builddir)/src/egl/drivers/dri2 \
-I$(top_srcdir)/src/egl/drivers/dri2 \
-I$(top_srcdir)/src/gbm/backends/dri \
-I$(top_srcdir)/src/egl/wayland/wayland-egl \
@@ -118,7 +137,7 @@ g_egldispatchstubs.h: $(GLVND_GEN_DEPS)
$(top_srcdir)/src/egl/generate/egl.xml \
$(top_srcdir)/src/egl/generate/egl_other.xml > $@

-BUILT_SOURCES = g_egldispatchstubs.c g_egldispatchstubs.h
+BUILT_SOURCES += g_egldispatchstubs.c g_egldispatchstubs.h
 CLEANFILES = $(BUILT_SOURCES)

 if USE_LIBGLVND
diff --git a/src/egl/drivers/dri2/.gitignore b/src/egl/drivers/dri2/.gitignore
new file mode 100644
index 00..e96becbb54
--- /dev/null
+++ b/src/egl/drivers/dri2/.gitignore
@@ -0,0 +1,2 @@
+linux-dmabuf-unstable-v1-client-protocol.h
+linux-dmabuf-unstable-v1-protocol.c
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 2392bfbb2a..a96a42ebb4 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -53,6 +53,7 @@
 #ifdef HAVE_WAYLAND_PLATFORM
 #include "wayland-drm.h"
 #include "wayland-drm-client-protocol.h"
+#include "linux-dmabuf-unstable-v1-client-protocol.h"
 #endif

 #ifdef HAVE_X11_PLATFORM
@@ -62,6 +63,7 @@
 #include "egl_dri2.h"
 #include "loader/loader.h"
 #include "util/u_atomic.h"
+#include "util/u_vector.h"

 /* The kernel header drm_fourcc.h defines the DRM formats below.  We duplicate
  * some of the definitions here so that building Mesa won't bleeding-edge
@@ -934,11 +936,16 @@ dri2_display_destroy(_EGLDisplay *disp)
case _EGL_PLATFORM_WAYLAND:
   if (dri2_dpy->wl_drm)
   wl_drm_destroy(dri2_dpy->wl_drm);
+  if (dri2_dpy->wl_dmabuf)
+  

Re: [Mesa-dev] [PATCH v2 10/11] egl/wayland: Remove duplicate wl_buffer creation code

[Daniel Stone]

Hi,
Apologies if the mobile client mangles formatting. I've heard this new
version is better, so let's see if it's really true.

On Thu, 13 Jul 2017 at 5:20 pm, Jason Ekstrand  wrote:

> On July 13, 2017 4:13:53 AM Daniel Stone  wrote:
> > @@ -650,21 +650,23 @@ create_wl_buffer(struct dri2_egl_display *dri2_dpy,
> > dri2_dpy->image->queryImage(image, __DRI_IMAGE_ATTRIB_FOURCC,
> );
> >
> > if (dri2_dpy->capabilities & WL_DRM_CAPABILITY_PRIME) {
> > +  struct wl_drm *wl_drm =
> > + dri2_surf ? dri2_surf->wl_drm_wrapper : dri2_dpy->wl_drm;
>
> If the previous patch had dropped the dri2_surf parameter in favor of
> wl_drm, this wouldn't be needed.  Let's do that.


Except that the final patch uses zwp_linux_dmabuf_v1 instead of wl_drm. As
we don't need a proxy wrapper for dmabuf (since the intermediate 'params'
builder object can have a proxy set on it without being prone to races), we
really do need the surface: for wl_drm this selects between proxy objects,
and for dmabuf it selects between event queues. Maybe a lookup helper
function is in order? Dunno.


> > @@ -820,70 +822,19 @@
> dri2_wl_create_wayland_buffer_from_image(_EGLDriver *drv,
> > struct dri2_egl_image *dri2_img = dri2_egl_image(img);
> > __DRIimage *image = dri2_img->dri_image;
> > struct wl_buffer *buffer;
> > -   int width, height, format, pitch;
> > -   enum wl_drm_format wl_format;
> >
> > -   dri2_dpy->image->queryImage(image, __DRI_IMAGE_ATTRIB_FORMAT,
> );
> > -
> > -   switch (format) {
> > -   case __DRI_IMAGE_FORMAT_ARGB:
> > -  if (!(dri2_dpy->formats & HAS_ARGB))
> > - goto bad_format;
>
> These checks suddenly go away.  Is that intended?  Given that this entry
> point exists to let the user move a client wl_buffer to a different server,
> I think we want some checks here.


Good catch! Will do in v3, thanks.

Cheers,
Daniel


>
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Re: [Mesa-dev] [PATCH v2 01/11] util: Remove u_math from u_vector

[Eric Engestrom]

On Thursday, 2017-07-13 15:38:11 +0200, Lucas Stach wrote:
> Am Donnerstag, den 13.07.2017, 12:12 +0100 schrieb Daniel Stone:
> > u_vector.h doesn't actually use anything from u_math, but it does mean
> > everyone has to pull in src/gallium/auxiliary/util includes.
> > 
> > Just remove it, adding a  include to u_vector.c to cover
> > memcpy.
> > 
> > Signed-off-by: Daniel Stone 
> > ---
> >  src/util/u_vector.c | 3 +++
> >  src/util/u_vector.h | 1 -
> >  2 files changed, 3 insertions(+), 1 deletion(-)
> > 
> > v2: Add u_math.h include for u_vector.c so we get power_of_two.
> > 
> > diff --git a/src/util/u_vector.c b/src/util/u_vector.c
> > index 37c4245ebe..4dc7bc22b6 100644
> > --- a/src/util/u_vector.c
> > +++ b/src/util/u_vector.c
> > @@ -20,6 +20,9 @@
> >   * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
> > DEALINGS
> >   * IN THE SOFTWARE.
> >   */
> > +
> > +#include 
> 
> I don't think we need the string.h include if we are going to include
> u_math.h.

"include what you use" is a well-accepted best practice.
This doc explains some of the reasons why you should do that:
https://github.com/include-what-you-use/include-what-you-use/blob/master/docs/WhyIWYU.md

Cheers,
  Eric
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