Reviewed-by: Matt Turner
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
On Thu, 2017-09-14 at 14:39 -0700, Francisco Jerez wrote:
> Jan Vesely writes:
>
> > On Mon, 2017-09-04 at 13:23 -0700, Francisco Jerez wrote:
> > > Jan Vesely writes:
> > >
> > > > v2: wait in map_buffer and map_image as well
> > > > v3: use
On Fri, Sep 15, 2017 at 6:39 PM, Jason Ekstrand
wrote:
> From: Connor Abbott
>
> v2 (Jason Ekstrand):
> - Various whitespace cleanups
> - Add helpers for reading/writing objects
> - Rework derefs
> - [de]serialize nir_shader::num_*
> - Fix uses of
On Fri, 2017-09-15 at 17:59 -0700, Francisco Jerez wrote:
> Jan Vesely writes:
>
> > On Fri, 2017-09-15 at 17:48 -0700, Francisco Jerez wrote:
> > > Jan Vesely writes:
> > >
> > > > Signed-off-by: Jan Vesely
> > > > ---
>
On Fri, Sep 15, 2017 at 6:39 PM, Jason Ekstrand
wrote:
> ---
> src/compiler/nir/nir.h | 17 +
> src/compiler/nir/nir_serialize.c | 18 ++
> 2 files changed, 35 insertions(+)
>
> diff --git a/src/compiler/nir/nir.h
Cc: mesa-sta...@lists.freedesktop.org
---
src/compiler/nir/nir_intrinsics.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/nir/nir_intrinsics.h
b/src/compiler/nir/nir_intrinsics.h
index ea51525..e461153 100644
--- a/src/compiler/nir/nir_intrinsics.h
+++
It's redundant with nir_shader::info::stage.
---
src/amd/common/ac_nir_to_llvm.c| 30 ++---
src/amd/common/ac_shader_info.c| 2 +-
src/amd/vulkan/radv_shader.c | 4 +-
src/compiler/glsl/glsl_to_nir.cpp | 10
---
src/compiler/glsl_types.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/compiler/glsl_types.cpp b/src/compiler/glsl_types.cpp
index a7fc7ff..704b63c 100644
--- a/src/compiler/glsl_types.cpp
+++ b/src/compiler/glsl_types.cpp
@@ -2149,6 +2149,8 @@ encode_type_to_blob(struct blob
This commit primarily makes two changes. First, blob_reserve_bytes now
takes an alignment parameter. Second, we now return an offset into the
blob instead of a pointer and leave the pointer arithmetic to the
caller. This way you can call blob_reserve_bytes, emit a bunch more
stuff, and then
From: Connor Abbott
Not sure if this is the best place to put it, but we're going to need
this for NIR too.
---
src/compiler/glsl/shader_cache.cpp | 171 -
src/compiler/glsl_types.cpp| 171 +
---
src/compiler/nir/nir.h | 17 +
src/compiler/nir/nir_serialize.c | 18 ++
2 files changed, 35 insertions(+)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index e6104fc..57cd0d9 100644
--- a/src/compiler/nir/nir.h
+++
From: Connor Abbott
v2 (Jason Ekstrand):
- Various whitespace cleanups
- Add helpers for reading/writing objects
- Rework derefs
- [de]serialize nir_shader::num_*
- Fix uses of blob_reserve_bytes
- Use a bitfield struct for packing tex_instr data
---
From: Connor Abbott
I want to use this for NIR too.
---
src/compiler/Makefile.sources| 4 ++--
src/compiler/{glsl => }/blob.c | 0
src/compiler/{glsl => }/blob.h | 0
src/mesa/state_tracker/st_shader_cache.h | 2 +-
4 files changed, 3
Jason and I use this for debugging all the time. Recompiling the driver
to enable it is kind of annoying. It's a great thing to try along with
always_flush_batch=true and always_flush_cache=true to detect a class of
problems - namely, atoms listening to an insufficient set of dirty bits.
---
Jan Vesely writes:
> On Fri, 2017-09-15 at 17:48 -0700, Francisco Jerez wrote:
>> Jan Vesely writes:
>>
>> > Signed-off-by: Jan Vesely
>> > ---
>> > src/gallium/state_trackers/clover/llvm/compat.hpp | 10 ++
On Fri, 2017-09-15 at 17:48 -0700, Francisco Jerez wrote:
> Jan Vesely writes:
>
> > Signed-off-by: Jan Vesely
> > ---
> > src/gallium/state_trackers/clover/llvm/compat.hpp | 10 ++
> >
Jan Vesely writes:
> Signed-off-by: Jan Vesely
> ---
> src/gallium/state_trackers/clover/llvm/compat.hpp | 10 ++
> src/gallium/state_trackers/clover/llvm/invocation.cpp | 2 +-
> 2 files changed, 11 insertions(+), 1 deletion(-)
>
>
Signed-off-by: Jan Vesely
---
src/gallium/state_trackers/clover/llvm/compat.hpp | 10 ++
src/gallium/state_trackers/clover/llvm/invocation.cpp | 2 +-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git
I don't think we need patches 2 or 6 and the commit message from 2 should
probably go on 5. I left a comment on patch 4. Other than that, 1, 3, 4,
and 5 are
Reviewed-by: Jason Ekstrand
On Fri, Sep 15, 2017 at 3:02 AM, Iago Toral Quiroga
wrote:
>
On Fri, Sep 15, 2017 at 3:02 AM, Iago Toral Quiroga
wrote:
> ---
> src/mesa/drivers/dri/i965/brw_blorp.c | 12 ++--
> src/mesa/drivers/dri/i965/brw_clear.c | 2 +-
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 28
> +++
> 3
Given the fact that we're whacking BRW_NEW_AUX_USAGE whenever aux_state
changes, I don't think we need this. First off, for most surfaces, the aux
buffer is created when the surface is created at which point it's never
been referenced with a SURFACE_STATE and we don't need to flag new state.
The
On Fri, Sep 15, 2017 at 3:02 AM, Iago Toral Quiroga
wrote:
> intel_miptree_texture_aux_usage() will report ISL_AUX_USAGE_NONE for
> textures that have a fast clear surface when they have been fully
> resolved in order to avoid unnecesary aux surface lookups and save
>
On Fri, Sep 15, 2017 at 7:10 AM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> Hi all,
>
> This series implements KHR_sampler_ycbcr_conversion (and
> KHR_bind_memory2 as requirement) for the Anv driver. Apologies for
> this series which is a bit invasive as it needs to introduce the
On Fri, Sep 15, 2017 at 7:11 AM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> This change introduce the concept of planes for image & views. It
> matches the planes available in new formats.
>
> We also refactor depth & stencil support through the usage of planes
> for the sake of
Ported from radeonsi.
---
src/amd/vulkan/radv_formats.c | 85 +++
src/amd/vulkan/radv_private.h | 2 +
2 files changed, 87 insertions(+)
diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c
index c19a9a37a49..24445412813 100644
---
---
src/amd/vulkan/radv_device.c | 4
src/amd/vulkan/radv_image.c | 24 +---
2 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index c112453e395..e6d595dfbe5 100644
---
On Fri, Sep 15, 2017 at 7:11 AM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> Signed-off-by: Lionel Landwerlin
> ---
> src/intel/vulkan/anv_descriptor_set.c| 107
> +--
>
On Fri, Sep 15, 2017 at 1:31 AM, Romain Failliot
wrote:
> 2017-09-14 19:19 GMT-04:00 Bas Nieuwenhuizen :
>>
>> Also you can implement 0% of the feature list and still be vulkan 1.0
>> compliant ;)
>
>
> Oh... is that so?
> Thanks for all your
On Fri, Sep 15, 2017 at 7:11 AM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> Adding new downsampling factors for each planes.
>
> Signed-off-by: Lionel Landwerlin
> ---
> src/intel/vulkan/anv_formats.c| 158 ++
>
https://bugs.freedesktop.org/show_bug.cgi?id=99856
Jan Vesely changed:
What|Removed |Added
Status|NEW |RESOLVED
On Fri, Sep 15, 2017 at 7:11 AM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> Signed-off-by: Lionel Landwerlin
> ---
> src/intel/isl/isl_format_layout.csv | 4
> 1 file changed, 4 insertions(+)
>
> diff --git
So, yeah, I also sent an implementation of this one... I'm not sure which
is better. Mine just does a bit more refactoring to keep things clean. I
hadn't even though about the fact that of course you implemented it too.
--Jason
On Fri, Sep 15, 2017 at 7:10 AM, Lionel Landwerlin <
On Fri, Sep 15, 2017 at 7:10 AM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> Signed-off-by: Lionel Landwerlin
> ---
> src/vulkan/util/vk_util.h | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/src/vulkan/util/vk_util.h
On Fri, Sep 15, 2017 at 7:10 AM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> It will be used to store extension numbers as well.
>
> Signed-off-by: Lionel Landwerlin
> ---
> src/vulkan/util/gen_enum_to_str.py | 19 +--
> 1 file
https://bugs.freedesktop.org/show_bug.cgi?id=102710
--- Comment #5 from mais...@archlinux.us ---
This is clearly missing conformance coverage:
https://github.com/KhronosGroup/VK-GL-CTS/issues/50
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for
I don't know if this really makes things any better or worse. TBH, I'd
kind-of like to get rid of the dedent entirely and just have the C fully
left-aligned. In any case, this is fine.
Acked-by: Jason Ekstrand
On Fri, Sep 15, 2017 at 7:10 AM, Lionel Landwerlin <
https://bugs.freedesktop.org/show_bug.cgi?id=102710
--- Comment #4 from mais...@archlinux.us ---
The implementation is clearly wrong. Image views are setup incorrectly for 2D
arrays. The hack patch fixes the issue, but it's probably broken for other
cases.
--
You are receiving this mail
https://bugs.freedesktop.org/show_bug.cgi?id=102710
--- Comment #3 from mais...@archlinux.us ---
Created attachment 134269
--> https://bugs.freedesktop.org/attachment.cgi?id=134269=edit
Hack patch
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee
On Fri, Sep 15, 2017 at 11:18 AM, Ilia Mirkin wrote:
> Signed-off-by: Ilia Mirkin
> ---
>
> Note that the use of ICMS_INNER_CONSERVATIVE disagrees with the GL driver.
> Perhaps it's more performant than ICMS_NORMAL and is otherwise permitted?
> Not
https://bugs.freedesktop.org/show_bug.cgi?id=102710
--- Comment #2 from mais...@archlinux.us ---
Here's the workaround I apply. N is not REMAINING_ARRAY_LAYERS.
https://github.com/Themaister/Granite/blob/master/vulkan/command_buffer.cpp#L289
Only the first layer seems to be blitted.
--
You
https://bugs.freedesktop.org/show_bug.cgi?id=102665
Vinson Lee changed:
What|Removed |Added
Status|RESOLVED|REOPENED
Okay, this patch was just nonsense. Superseded by
https://patchwork.freedesktop.org/patch/177162/
On Fri, Sep 15, 2017 at 9:24 PM, Bas Nieuwenhuizen
wrote:
> Forgotten when implementing them using 2D textures.
>
> This fixes:
>
Only on GFX9 we implement them as 2D images.
This fixes:
dEQP-VK.image.image_size.1d_array.readonly_12x34
dEQP-VK.image.image_size.1d_array.readonly_1x1
dEQP-VK.image.image_size.1d_array.readonly_32x32
dEQP-VK.image.image_size.1d_array.readonly_7x1
This patch is:
Reviewed-by: Thomas Helland
2017-09-15 19:09 GMT+02:00 Eric Engestrom :
> Signed-off-by: Eric Engestrom
> ---
> docs/submittingpatches.html | 12
> 1 file changed, 12 insertions(+)
>
>
Forgotten when implementing them using 2D textures.
This fixes:
dEQP-VK.image.image_size.1d_array.readonly_12x34
dEQP-VK.image.image_size.1d_array.readonly_1x1
dEQP-VK.image.image_size.1d_array.readonly_32x32
dEQP-VK.image.image_size.1d_array.readonly_7x1
On Friday, September 15, 2017 10:11:11 AM PDT Eric Engestrom wrote:
> Signed-off-by: Eric Engestrom
> ---
> src/mesa/drivers/dri/i965/brw_gs.c| 1 -
> src/mesa/drivers/dri/i965/intel_batchbuffer.c | 1 -
> 2 files changed, 2 deletions(-)
>
> diff --git
---
src/intel/vulkan/anv_device.c | 41 +---
src/intel/vulkan/anv_extensions.py | 1 +
src/intel/vulkan/anv_image.c | 43 ++
3 files changed, 68 insertions(+), 17 deletions(-)
diff --git
---
src/amd/vulkan/radv_cmd_buffer.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 068247d04d4..5da866ca64e 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++
Thanks! Rb
On September 15, 2017 10:12:04 AM Eric Engestrom
wrote:
Signed-off-by: Eric Engestrom
---
src/mesa/drivers/dri/i965/brw_gs.c| 1 -
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 1 -
2 files changed, 2
Signed-off-by: Ilia Mirkin
---
Note that the use of ICMS_INNER_CONSERVATIVE disagrees with the GL driver.
Perhaps it's more performant than ICMS_NORMAL and is otherwise permitted?
Not sure, so I left it as-is.
Also note that there are no tests for this, and I have not
Allow the capability to be exposed, and convert the new execution mode
into fs state.
Signed-off-by: Ilia Mirkin
---
src/compiler/spirv/nir_spirv.h| 1 +
src/compiler/spirv/spirv_to_nir.c | 9 +
2 files changed, 10 insertions(+)
diff --git
On 15 September 2017 at 17:37, Marathe, Yogesh wrote:
> Hi Emil,
>
>>-Original Message-
>>From: Emil Velikov [mailto:emil.l.veli...@gmail.com]
>>Sent: Friday, September 15, 2017 9:52 PM
>>To: Marathe, Yogesh
>>Cc: Eric Engestrom
From: Yogesh Marathe
Originally dri3 egl surface was wrapped around _EGLSurface.
With next commit we'll add additional attributes, which will be checked
from generic code. Thus in order to access that we need to use
dri2_egl_surface.
The name of the latter is a
From: Zhongmin Wu
Use the plumbing introduced with previous patch, to interact with the
Android framework.
Namely: currently we use an invalid fd or -1 for our calls to
ANativeWindow::{queue,cancel}Buffer.
At the same time applications (like flatland) may rely on it
From: Zhongmin Wu
Add plumbing to allow creation of per display surface out fence.
This can be used to implement explicit sync. One user of which is
Android - which will be addressed with next commit.
Signed-off-by: Zhongmin Wu
Signed-off-by:
>-Original Message-
>From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf Of
>Emil Velikov
>Sent: Friday, September 15, 2017 10:00 PM
>To: Marathe, Yogesh
>Cc: ML mesa-dev
>Subject: Re: [Mesa-dev] [PATCH 3/3]
If transform feedback is recording a varying, it needs a slot in the
VUE map, regardless of whether or not the shader writes it.
Together with the previous patch, this fixes:
- KHR-GL45.enhanced_layouts.xfb_capture_struct
The test captures a structure where the vertex shader writes the first
and
This can occur if the shader is capturing some of the values from the
VUE header for transform feedback, but the shader hasn't written all of
them.
---
src/intel/compiler/brw_vec4_visitor.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
unify_interfaces() only updates the NIR program info, not the copy
in the gl_program itself. So, by using the old copy, we were missing
out on these updates.
The TCS/TES ones already did this correctly.
---
src/mesa/drivers/dri/i965/brw_gs.c | 2 +-
src/mesa/drivers/dri/i965/brw_vs.c | 2 +-
2
Signed-off-by: Eric Engestrom
---
src/mesa/drivers/dri/i965/brw_gs.c| 1 -
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c
b/src/mesa/drivers/dri/i965/brw_gs.c
index
Signed-off-by: Eric Engestrom
---
docs/submittingpatches.html | 12
1 file changed, 12 insertions(+)
diff --git a/docs/submittingpatches.html b/docs/submittingpatches.html
index ecf9590a95..0581391b29 100644
--- a/docs/submittingpatches.html
+++
On Thu, Sep 14, 2017 at 12:26 AM, Tapani Pälli wrote:
> fixes following warning:
>warning: format specifies type 'long' but the argument has type 'uint64_t'
> (aka 'unsigned long long')
>
> cast is needed to avoid this turning in to another warning on 32bit build:
>
On Fri, Sep 15, 2017 at 2:04 AM, Grazvydas Ignotas wrote:
> It was because on some platforms ./configure test looking for
> __atomic_* passes because it's a compile (not link) test, even when
> the compiler inserts library calls instead of actual implementation.
> It looks like
Hi Emil,
>-Original Message-
>From: Emil Velikov [mailto:emil.l.veli...@gmail.com]
>Sent: Friday, September 15, 2017 9:52 PM
>To: Marathe, Yogesh
>Cc: Eric Engestrom ; mesa-
>d...@lists.freedesktop.org
>Subject: Re: [Mesa-dev] [PATCH
On 15 September 2017 at 07:36, wrote:
> From: Zhongmin Wu
>
> Add plumbing to allow creation of per display surface out fence.
>
> Currently enabled only on android, since the system expects a valid
> fd in ANativeWindow::{queue,cancel}Buffer. We
On 15 September 2017 at 07:36, wrote:
> From: Yogesh Marathe
>
> As base is moved one level down corresponding implementation in
> dri3 needs a change.
>
> Tested with Intel Mesa CI
>
> Signed-off-by: Yogesh Marathe
On 15 September 2017 at 16:48, Marathe, Yogesh wrote:
> Hi Eric,
>
>>-Original Message-
>>From: Eric Engestrom [mailto:eric.engest...@imgtec.com]
>>Sent: Friday, September 15, 2017 7:13 PM
>>To: Marathe, Yogesh
>>Cc:
---
src/intel/vulkan/anv_extensions.py | 1 +
src/intel/vulkan/anv_image.c | 37 +++--
2 files changed, 36 insertions(+), 2 deletions(-)
diff --git a/src/intel/vulkan/anv_extensions.py
b/src/intel/vulkan/anv_extensions.py
index acec785..ba7bb56 100644
---
Hello list,
The candidate for the Mesa 17.2.1 is now available. Currently we have:
- 53 queued
- 0 nominated (outstanding)
- and 7 rejected patches
The current queue consists of:
Nearly a multiple fixes, making the GLSL shader cache more robust. The
RADV driver
has seen a few dozen patches,
It turned out not to be a hardware bug, but the shader compiler
emitting wrong varying component use information. With that fixed
we can turn flat shading back on.
Signed-off-by: Lucas Stach
Reviewed-by: Philipp Zabel
---
It seems that newer cores don't use the PA_ATTRIBUTES to decide if the
varying should bypass the flat shading, but derive this from the component
use. This fixes flat shading on GC880+.
VARYING_COMPONENT_USE_POINTCOORD is a bit of a misnomer now, as it isn't
only used for pointcoords, but missing
---
src/intel/blorp/blorp_blit.c | 29 -
src/intel/blorp/blorp_priv.h | 5 +
2 files changed, 21 insertions(+), 13 deletions(-)
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 9c921cc..11c2116a 100644
---
The Broadawell method of handling uncompressed views of compressed
textures was to make the texture linear and have a tiled shadow copy.
This isn't needed on Sky Lake because the HALIGN and VALIGN parameters
are specified in surface elements and required to be a multiple of 4.
This means that we
In order to get support everywhere, this gets a bit complicated. On Sky
Lake and later, everything is fine because HALIGN/VALIGN are specified
in surface elements and are required to be at least 4 so any offsetting
we may need to do falls neatly within the heavy restrictions placed on
the X/Y
---
src/intel/blorp/blorp_clear.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index 0feebef..e8b1e32 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@
---
src/intel/vulkan/anv_extensions.py | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/intel/vulkan/anv_extensions.py
b/src/intel/vulkan/anv_extensions.py
index acec785..52390fe 100644
--- a/src/intel/vulkan/anv_extensions.py
+++ b/src/intel/vulkan/anv_extensions.py
@@ -63,6 +63,7 @@
This struct represents a full surface state including the addresses of
the referenced main and auxiliary surfaces (if any). This makes
relocation setup substantially simpler and allows us to move 100% of the
surface state setup logic into anv_image where it belongs. Before, we
were manually
---
src/intel/vulkan/anv_image.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 492b341..63e507a 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -581,6 +581,7 @@ anv_layout_to_aux_usage(const
---
src/intel/vulkan/genX_pipeline.c | 31 +--
1 file changed, 21 insertions(+), 10 deletions(-)
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 844c118..c2fa9c0 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++
This gives us a single centralized place where we take an image view and
use it to fill out a surface state.
Reviewed-by: Lionel Landwerlin
---
src/intel/vulkan/anv_image.c | 173 +
src/intel/vulkan/anv_private.h | 16
---
src/intel/vulkan/anv_image.c | 23 +++
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 63e507a..202becc 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -30,6
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
Reviewed-by: Jason Ekstrand
---
src/intel/vulkan/anv_device.c | 8
1 file changed, 8 insertions(+)
diff --git a/src/intel/vulkan/anv_device.c
It's not SPIR-V that's backwards from GLSL, it's Vulkan that's backwards
from GL. Let's make NIR consistent with the source language and do the
flipping inside the Vulkan driver instead.
Cc: Kenneth Graunke
Cc: Dave Airlie
---
This is useful if we only need to copy part of a larger resource, mostly
when using the RS engine to de-/tile on pipe transfers.
Signed-off-by: Lucas Stach
---
src/gallium/drivers/etnaviv/etnaviv_clear_blit.c | 27
Currently we are blitting the whole resource when the RS is used to
de-/tile a resource. This can be very inefficient for large resources
where the transfer is only changing a small part of the resource
(happens a lot with glTexSubImage2D).
Optimize this by only blitting the tile aligned
Hi all,
this small series optimizes transfers where we de-/tile the resource with
the RS. Currently we are always blitting the whole resource between the
transfer and data buffer. This is really inefficient when the transfer only
targets part of the resource.
A prime example exposing the issue
The RS can blit abitrary tile aligned subregions of a resource by
adjusting the buffer offset.
Signed-off-by: Lucas Stach
---
src/gallium/drivers/etnaviv/etnaviv_clear_blit.c | 75 +---
1 file changed, 67 insertions(+), 8 deletions(-)
diff --git
Hi Eric,
>-Original Message-
>From: Eric Engestrom [mailto:eric.engest...@imgtec.com]
>Sent: Friday, September 15, 2017 7:13 PM
>To: Marathe, Yogesh
>Cc: mesa-dev@lists.freedesktop.org
>Subject: Re: [Mesa-dev] [PATCH 2/3] egl: Wrap dri3 surface primitive around
Hi,
On 15 September 2017 at 16:13, Emil Velikov wrote:
> On 15 September 2017 at 15:13, Daniel Stone wrote:
>> But if you avoid wl_resource_instance_of() and replace it with
>> wl_resource_get_destroy_listener(), you can side-step the problem, by
On Thursday 14 September 2017, Samuel Pitoiset wrote:
>
> On 09/13/2017 06:34 PM, Fredrik Höglund wrote:
> > On Wednesday 13 September 2017, Samuel Pitoiset wrote:
> >> When binding a new pipeline, we applied all dynamic states
> >> without checking if they really need to be re-emitted. This
> >>
Hi,
On 13.09.2017 19:08, Jason Ekstrand wrote:
On Wed, Sep 13, 2017 at 8:42 AM, Nicolai Hähnle > wrote:
On 13.09.2017 11:54, Eero Tamminen wrote:
On 12.09.2017 09:55, Jordan Justen wrote:
On 2017-09-11 21:44:32, Timothy
On 09/15/2017 07:42 AM, Emil Velikov wrote:
Hi Kyle,
On 8 September 2017 at 13:09, Emil Velikov wrote:
On 7 September 2017 at 19:21, Kyle Brenneman wrote:
On 09/07/2017 11:56 AM, Emil Velikov wrote:
On 7 September 2017 at 18:36, Kyle
https://bugs.freedesktop.org/show_bug.cgi?id=102677
Juan A. Suarez changed:
What|Removed |Added
CC|
On 13.09.2017 22:45, Emil Velikov wrote:
On 13 September 2017 at 20:48, Nicolai Hähnle wrote:
On 13.09.2017 20:28, Emil Velikov wrote:
Hi Nicolai,
I'm doing a final run through the lists for 17.2.1 and doesn't seem
like this landed in master.
Just a friendly poke, in
On 15 September 2017 at 15:13, Daniel Stone wrote:
> Hi,
>
> On 15 September 2017 at 14:30, Emil Velikov wrote:
>> On 15 September 2017 at 14:04, Daniel Stone wrote:
>>> I'd be slightly wary of this current series. Currently,
On Fri, 2017-09-15 at 13:04 +0200, Juan A. Suarez Romero wrote:
> On Fri, 2017-09-15 at 12:47 +0200, Samuel Pitoiset wrote:
> > I guess this will break some piglits.
> >
>
>
> Right. I'll check them and provide fixes
After running piglit with and without this patch, I didn't find any
https://bugs.freedesktop.org/show_bug.cgi?id=100151
--- Comment #11 from Bruce Cherniak ---
I tried this again, and can only get the failure as you describe on CentOS.
Seems to work on other OSs. It also appears fixed in 17.1 and 17.2 mesa
releases. At this point, I
Am Freitag, den 15.09.2017, 13:07 +0100 schrieb Emil Velikov:
> On 14 September 2017 at 11:27, Gert Wollny
> wrote:
> > The second version of the two patches now forces llvm-3.3 for
> > "make Gallium ST Other" and no longer requires changing any
> > Makefile.am.
> > In
Hi,
On 15 September 2017 at 14:30, Emil Velikov wrote:
> On 15 September 2017 at 14:04, Daniel Stone wrote:
>> I'd be slightly wary of this current series. Currently, both
>> libwayland-server.so and libwayland-client.so define
>>
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/anv_device.c | 51 ++--
src/intel/vulkan/anv_extensions.py | 1 +
src/intel/vulkan/anv_formats.c | 59 ++
src/intel/vulkan/anv_image.c
1 - 100 of 159 matches
Mail list logo