https://bugs.freedesktop.org/show_bug.cgi?id=111036
Stuart Naylor changed:
What|Removed |Added
Status|RESOLVED|REOPENED
Resolution|FIXED
https://bugs.freedesktop.org/show_bug.cgi?id=111026
Stuart Naylor changed:
What|Removed |Added
Resolution|FIXED |---
Status|RESOLVED
Ping! The spec bug was updated and they have agreed to update the spec
to define this behavior.
I've also sent a piglit test for this:
https://patchwork.freedesktop.org/patch/317112/
On 1/7/19 12:25 pm, Timothy Arceri wrote:
Without this the restored program will fail the pipeline validation
Only VS needs that. We shouldn't hardcode these values but
that's complicated to not do that for now.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_shader.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_shader.c
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_nir_to_llvm.c | 69 ---
1 file changed, 64 insertions(+), 5 deletions(-)
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c
b/src/amd/vulkan/radv_nir_to_llvm.c
index d40635c6510..c76c259d271 100644
---
It will be used for stream output but for now only declares it
if VS and if the PrimitiveID needs to be exported.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_nir_to_llvm.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c
Reviewed-by: Bas Nieuwenhuizen
for the series.
On Wed, Jul 10, 2019 at 3:15 PM Samuel Pitoiset
wrote:
>
> It will help for GS as NGG on GFX10.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_nir_to_llvm.c | 118 +-
> 1 file changed, 2 insertions(+),
https://bugs.freedesktop.org/show_bug.cgi?id=02
Bug ID: 02
Summary: lp_bld_misc.cpp:834:156: error: no matching function
for call to
‘llvm::IRBuilder<>::CreateAtomicCmpXchg(llvm::Value*,
llvm::Value*,
Hi again Mark,
On Wed, Jul 10, 2019 at 4:59 PM Mark Janes wrote:
> Do you have some documentation on how you are building Android with
> Mesa? We set up a buildtest using an Android (Celadon) tree from Intel,
> and it seems to be less up-to-date than your build.
>
> Last week, you found a
https://bugs.freedesktop.org/show_bug.cgi?id=87738
--- Comment #7 from ka.n...@mail.ru ---
It would be really nice to have it in place. There are a lot of of pre-GCN 1.1
card out there capable to work with opencl. In fact, I was practically forced
to upgrade my nice GCN 1.0 card solely because of
Hi,
the procedure I apply is to build android-x86, but it could be applied to
AOSP or Celadon too.
The sequence of steps is described in details here:
https://www.android-x86.org/source.html
At the moment I am testing with
BOARD_GPU_DRIVERS ?= i915 i965 nouveau r300g r600g radeonsi virgl vmwgfx
Do you have some documentation on how you are building Android with
Mesa? We set up a buildtest using an Android (Celadon) tree from Intel,
and it seems to be less up-to-date than your build.
Last week, you found a build error that was missed by our CI. When you
pushed this series, we got:
> I don't think other drivers have had to do this. I've definitely
> resisted stuff like that in nouveau in the past. Are you sure this is
> necessary? Would be good to check if these tests pass or fail on
> nouveau, for example. (Although by coincidence, they could be ending
> up with zero
It's a known upstream issue; it was taken off the mustpass list but... I
have issues, ok? I just really wanted 100/100 passing :)
I think it was 16.
On Wed, Jul 10, 2019 at 03:48:35PM +0200, Erik Faye-Lund wrote:
> On Wed, 2019-07-10 at 06:24 -0700, Alyssa Rosenzweig wrote:
> > Fixes a buggy
On Wed, Jul 10, 2019 at 9:25 AM Alyssa Rosenzweig
wrote:
>
> Fixes a buggy dEQP test.
>
> Signed-off-by: Alyssa Rosenzweig
> ---
> .../drivers/panfrost/ci/expected-failures.txt | 6 --
> src/gallium/drivers/panfrost/meson.build | 1 +
> .../drivers/panfrost/midgard/compiler.h | 6
On Wed, 2019-07-10 at 06:24 -0700, Alyssa Rosenzweig wrote:
> Fixes a buggy dEQP test.
>
Maybe you could share which test this fixes, so someone can fix it?
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
On Wed, 2019-07-10 at 06:24 -0700, Alyssa Rosenzweig wrote:
> Fixes a buggy dEQP test.
>
> Signed-off-by: Alyssa Rosenzweig
> ---
> .../drivers/panfrost/ci/expected-failures.txt | 6 --
> src/gallium/drivers/panfrost/meson.build | 1 +
> .../drivers/panfrost/midgard/compiler.h | 6
Patches 8 to 11 look good to me:
Reviewed-by: Tomeu Vizoso
Thanks,
Tomeu
On 7/10/19 3:24 PM, Alyssa Rosenzweig wrote:
A lot of the pan_screen.c code was cargoculted from other drivers. The
upshot is that we return true for a lot of PIPE_CAPs that we don't
actually support, resulting in us
A lot of the pan_screen.c code was cargoculted from other drivers. The
upshot is that we return true for a lot of PIPE_CAPs that we don't
actually support, resulting in us exposing way too many extensions that
we don't actually support. Be more careful.
Some CAPs we do need to fake to access
Oops.
Signed-off-by: Alyssa Rosenzweig
---
src/gallium/drivers/panfrost/pan_blend.h | 2 +-
src/gallium/drivers/panfrost/pan_blend_cso.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/panfrost/pan_blend.h
The asterisks were inherited from... softpipe, maybe?
Signed-off-by: Alyssa Rosenzweig
---
src/gallium/drivers/panfrost/pan_screen.c | 46 +++
1 file changed, 21 insertions(+), 25 deletions(-)
diff --git a/src/gallium/drivers/panfrost/pan_screen.c
It's easy to forget about, but shader size does matter for things like
i-cache, so let's include it in the analysis.
Signed-off-by: Alyssa Rosenzweig
---
src/gallium/drivers/panfrost/midgard/midgard_compile.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git
Don't try to schedule to vmul when that can't possible work (forcing a
bundle break). glmark:
total bundles in shared programs: 2700 -> 2683 (-0.63%)
bundles in affected programs: 695 -> 678 (-2.45%)
helped: 14
HURT: 0
helped stats (abs) min: 1 max: 4 x̄: 1.21 x̃: 1
helped stats (rel) min: 1.27%
All the kool kids are doing it.
Signed-off-by: Alyssa Rosenzweig
---
.../drivers/panfrost/midgard/midgard.h| 1 +
.../panfrost/midgard/midgard_compile.c| 39 +++
2 files changed, 40 insertions(+)
diff --git a/src/gallium/drivers/panfrost/midgard/midgard.h
Panfrost is known to only work on a select few CPU/GPU combinations at
the moment (tested system-on-chips: RK3288, RK3399, and S912). Whitelist
the combinations known to work and refuse to load on others where
nothing works yet to avoid user confusion.
Signed-off-by: Alyssa Rosenzweig
---
We have to emit it anyway for the report to be happy (with respect to
unrolling), so return an actual count rather than dummy numbers.
Signed-off-by: Alyssa Rosenzweig
---
src/gallium/drivers/panfrost/midgard/compiler.h| 3 +++
src/gallium/drivers/panfrost/midgard/midgard_compile.c | 8
It won't work. Just, stop it.
Signed-off-by: Alyssa Rosenzweig
---
src/gallium/drivers/panfrost/midgard/midgard_compile.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c
b/src/gallium/drivers/panfrost/midgard/midgard_compile.c
Fixes a buggy dEQP test.
Signed-off-by: Alyssa Rosenzweig
---
.../drivers/panfrost/ci/expected-failures.txt | 6 --
src/gallium/drivers/panfrost/meson.build | 1 +
.../drivers/panfrost/midgard/compiler.h | 6 ++
.../panfrost/midgard/midgard_compile.c| 4 +
bany/ball type ops read from all 4 channels even though they only write
to 1; specify this in the opcode table like we do for dot products.
Signed-off-by: Alyssa Rosenzweig
---
.../drivers/panfrost/midgard/midgard_ops.c | 16
1 file changed, 8 insertions(+), 8
It will help for GS as NGG on GFX10.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_nir_to_llvm.c | 118 +-
1 file changed, 2 insertions(+), 116 deletions(-)
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c
b/src/amd/vulkan/radv_nir_to_llvm.c
index
For selecting a different SQ_EXP_POS target.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_nir_to_llvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c
b/src/amd/vulkan/radv_nir_to_llvm.c
index ba0fb557266..597d006284a 100644
---
When they are exported to the next stage.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_nir_to_llvm.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c
b/src/amd/vulkan/radv_nir_to_llvm.c
index c0ff3210bd2..b83fee304fb
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_nir_to_llvm.c | 128 ++
1 file changed, 128 insertions(+)
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c
b/src/amd/vulkan/radv_nir_to_llvm.c
index fc598222fcf..ba0fb557266 100644
---
Cleanup.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_nir_to_llvm.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c
b/src/amd/vulkan/radv_nir_to_llvm.c
index bd14f9fff1b..c0ff3210bd2 100644
---
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_nir_to_llvm.c | 102 --
1 file changed, 70 insertions(+), 32 deletions(-)
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c
b/src/amd/vulkan/radv_nir_to_llvm.c
index b83fee304fb..fc598222fcf 100644
---
r-b for both
On Wed, Jul 10, 2019 at 1:00 PM Samuel Pitoiset
wrote:
>
> Now that the output usage mask is set to 0x1 the LayerID is
> correctly exported in the loop above.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_nir_to_llvm.c | 19 ++-
> 1 file changed, 2
A step in the right direction, but not totally right I don't think.
> +struct pipe_surface *surf = ctx->pipe_framebuffer.zsbuf;
> +struct panfrost_resource *rsrc = pan_resource(surf->texture);
> +sfbd->depth_buffer = rsrc->bo->gpu;
Critically,
https://bugs.freedesktop.org/show_bug.cgi?id=110673
--- Comment #9 from gregory shu ---
(In reply to zhoulei from comment #8)
> Issues have been fixed with these two set of patches:
>
> https://lists.freedesktop.org/archives/mesa-dev/2019-May/219673.html
>
>
This was probably not caught before because no supported test was
exercising the flrp lowering with other bit size different than 32.
With the arrival of VK_KHR_shader_float_controls we will have some of
those and, unless we keep the bit size, we will end with something
like:
Now that the output usage mask is set to 0x1 the LayerID is
correctly exported in the loop above.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_nir_to_llvm.c | 19 ++-
1 file changed, 2 insertions(+), 17 deletions(-)
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c
When the stage preceding FS doesn't export it the fragment shader
might read it, even if it's 0.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_shader_info.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/src/amd/vulkan/radv_shader_info.c
https://bugs.freedesktop.org/show_bug.cgi?id=111092
kyle.de...@mykolab.com changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
https://bugs.freedesktop.org/show_bug.cgi?id=111092
--- Comment #12 from Connor Abbott ---
That MR is now merged, does the game work?
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
This was stale code that was causing a SIGSEGV when using SFBD, as we
stopped creating the corresponding BO.
Signed-off-by: Tomeu Vizoso
---
src/gallium/drivers/panfrost/pan_context.h | 1 -
src/gallium/drivers/panfrost/pan_sfbd.c| 8 ++--
2 files changed, 6 insertions(+), 3
This was stale code that was causing a SIGSEGV when using SFBD, as we
stopped creating the corresponding BO.
Signed-off-by: Tomeu Vizoso
---
src/gallium/drivers/panfrost/pan_context.h | 1 -
src/gallium/drivers/panfrost/pan_sfbd.c| 6 --
2 files changed, 4 insertions(+), 3 deletions(-)
This patch adds gfx10_format_table.h in Makefile.sources
and the rules for Android to fix following building errors:
In file included from external/mesa/src/amd/vulkan/radv_debug.c:35:
In file included from external/mesa/src/amd/vulkan/radv_debug.h:27:
Reviewed-by: Samuel Pitoiset
On 7/10/19 6:11 AM, Timothy Arceri wrote:
Fixes: 726a31df705b ("radv: Add the concept of radv shader binaries.")
---
src/amd/vulkan/radv_pipeline_cache.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/amd/vulkan/radv_pipeline_cache.c
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