Hi,
While looking at the GLSL IR code, I noticed that different parts of the
code use 2 different hash table implementations. ir_loop_analysis,
ir_variable_refcount, ir_clone, etc. use struct hash_table under
program/hash_table.h, whereas ir_variable_refcount and link_uniform_blocks
use struct
I'm not sure if this is relevant to the i965 fs backend in particular, but
Briggs in his thesis [1] recommended simply ignoring the liveness of any
register read by a copy instruction immediately after said instruction when
computing the interference graph in order to solve this exact problem (see
--git a/src/glsl/ir_dead_branches.cpp b/src/glsl/ir_dead_branches.cpp
new file mode 100644
index 000..f86f009
--- /dev/null
+++ b/src/glsl/ir_dead_branches.cpp
@@ -0,0 +1,226 @@
+/*
+ * Copyright © 2013 Connor Abbott (con...@abbott.cx)
+ *
+ * Permission is hereby granted, free of charge, to any
\
$(GLSL_SRCDIR)/ir_reader.cpp \
$(GLSL_SRCDIR)/ir_rvalue_visitor.cpp \
diff --git a/src/glsl/ir_loop_jumps.cpp b/src/glsl/ir_loop_jumps.cpp
new file mode 100644
index 000..1386340
--- /dev/null
+++ b/src/glsl/ir_loop_jumps.cpp
@@ -0,0 +1,129 @@
+/*
+ * Copyright © 2013 Connor Abbott (con
..c1044f6
--- /dev/null
+++ b/src/glsl/opt_to_ssa.cpp
@@ -0,0 +1,1155 @@
+/*
+ * Copyright © 2013 Connor Abbott (con...@abbott.cx)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal
We forgot to handle the case where the base type was a boolean.
---
src/glsl/ir_constant_expression.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/glsl/ir_constant_expression.cpp
b/src/glsl/ir_constant_expression.cpp
index f811fd1..9edc378 100644
---
,
bool uniform_locations_assigned,
diff --git a/src/glsl/opt_from_ssa.cpp b/src/glsl/opt_from_ssa.cpp
new file mode 100644
index 000..6071c45
--- /dev/null
+++ b/src/glsl/opt_from_ssa.cpp
@@ -0,0 +1,198 @@
+/*
+ * Copyright © 2013 Connor Abbott (con...@abbott.cx)
+ *
+ * Permission is hereby
This patch introduces all the changes to the IR that are necessary for
representing programs in the SSA form. This consists of a new variable
mode, the SSA temporary, which is guarenteed to be written to exactly
once, and classes to represent phi nodes in the IR.
In the current code, variables
/click-pldi95.pdf
Connor Abbott (11):
glsl: fix handling of quadop_vector constant expression
glsl: add as_loop_jump() method to ir_instruction
glsl: add a foreach_list_reverse macro
glsl: add dead branch analysis
glsl: add loop jump visitor
glsl: add swizzle_component() to ir_builder
This will let us dynamically downcast to ir_loop_jump, which will be
needed later.
---
src/glsl/ir.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index 19e8383..d1e790d 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -138,6 +138,7 @@ public:
ssa_assign() creates an SSA variable and assignment at the same
time. With this, simple sequences of SSA statements can be easily
created.
---
src/glsl/ir_builder.cpp | 14 ++
src/glsl/ir_builder.h | 1 +
2 files changed, 15 insertions(+)
diff --git a/src/glsl/ir_builder.cpp
This patch is mainly for allowing me to test these changes with piglit.
In the future, a do_ssa_optimizations() function will need to be
created and used by this code, as well as all other users of
do_common_optimizations().
---
src/glsl/glsl_parser_extras.cpp | 4
1 file changed, 4
On Fri, Jan 31, 2014 at 3:34 PM, Paul Berry stereotype...@gmail.com wrote:
On 22 January 2014 09:16, Connor Abbott cwabbo...@gmail.com wrote:
This series enables GLSL IR support for SSA, including passes to convert
to and from SSA form. SSA is a form of the intermediate representation
On Tue, Jan 28, 2014 at 2:45 PM, Paul Berry stereotype...@gmail.com wrote:
On 22 January 2014 09:16, Connor Abbott cwabbo...@gmail.com wrote:
diff --git a/src/glsl/ir_clone.cpp b/src/glsl/ir_clone.cpp
index cb732a5..7075579 100644
--- a/src/glsl/ir_clone.cpp
+++ b/src/glsl/ir_clone.cpp
On Tue, Jan 28, 2014 at 1:50 PM, Paul Berry stereotype...@gmail.com wrote:
On 22 January 2014 09:16, Connor Abbott cwabbo...@gmail.com wrote:
This patch introduces all the changes to the IR that are necessary for
representing programs in the SSA form. This consists of a new variable
mode
On Fri, Jan 31, 2014 at 11:55 AM, Paul Berry stereotype...@gmail.comwrote:
On 22 January 2014 09:16, Connor Abbott cwabbo...@gmail.com wrote:
Right now we are being basically as naive as possible, and inserting
more copies than necessary. It is possible to implement a more
sophisticated
Hi,
So I believe that we can all agree that the tree-based representation
that GLSL IR currently uses for shaders needs to go. For the benefit
of those that didn't watch Ian Romanick's talk at FOSDEM, I'll
reiterate some of the problems with it as of now:
- All the ir_dereference chains blow up
On Fri, Feb 7, 2014 at 3:13 PM, Ian Romanick i...@freedesktop.org wrote:
On 02/06/2014 09:34 PM, Connor Abbott wrote:
Hi,
So I believe that we can all agree that the tree-based representation
that GLSL IR currently uses for shaders needs to go. For the benefit
of those that didn't watch Ian
On Tue, Jan 28, 2014 at 1:50 PM, Paul Berry stereotype...@gmail.com wrote:
On 22 January 2014 09:16, Connor Abbott cwabbo...@gmail.com wrote:
This patch introduces all the changes to the IR that are necessary for
representing programs in the SSA form. This consists of a new variable
mode
On Wed, Mar 12, 2014 at 6:49 PM, Ian Romanick i...@freedesktop.org wrote:
From: Ian Romanick ian.d.roman...@intel.com
Signed-off-by: Ian Romanick ian.d.roman...@intel.com
---
src/glsl/ir_clone.cpp | 10 +-
src/glsl/ir_constant_expression.cpp | 195
On Wed, Mar 12, 2014 at 6:49 PM, Ian Romanick i...@freedesktop.org wrote:
From: Ian Romanick ian.d.roman...@intel.com
Signed-off-by: Ian Romanick ian.d.roman...@intel.com
---
src/glsl/ir_constant_expression.cpp | 52
+
1 file changed, 36 insertions(+),
This way, when someone modifies create_test_cases.py and forgets to
commit their changes again, people will notice.
Signed-off-by: Connor Abbott cwabbo...@gmail.com
---
src/glsl/tests/optimization-test | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/glsl/tests/optimization-test b
create_test_cases.py in line with them.
Signed-off-by: Connor Abbott cwabbo...@gmail.com
---
src/glsl/ir_print_visitor.cpp | 2 +-
src/glsl/tests/lower_jumps/lower_breaks_1.opt_test | 3 +--
src/glsl/tests/lower_jumps/lower_breaks_1.opt_test.expected| 3
he used to create the tests.
Fix that, so that now create_test_cases.py is synced with the generated
tests.
Signed-off-by: Connor Abbott cwabbo...@gmail.com
---
src/glsl/tests/lower_jumps/create_test_cases.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/glsl/tests
They were made unneccesary by the last commit.
Signed-off-by: Connor Abbott cwabbo...@gmail.com
---
src/glsl/tests/lower_jumps/.gitignore | 2 ++
src/glsl/tests/lower_jumps/lower_breaks_1.opt_test | 12 -
.../lower_jumps/lower_breaks_1.opt_test.expected | 4 ---
src/glsl
both problems, and then I removed the generated tests so that
stuff like this won't happen again.
Connor Abbott (4):
glsl: be more consistent about printing constants
glsl/tests/lower_jumps: fix generated sexpr's for loops
glsl/tests: call create_test_cases.py in optimization-test
glsl/tests
he used to create the tests.
Fix that, so that now create_test_cases.py is synced with the generated
tests.
Signed-off-by: Connor Abbott cwabbo...@gmail.com
---
src/glsl/tests/lower_jumps/create_test_cases.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/glsl/tests
.
This series fixes both problems, and then removes the generated tests so
that stuff like this won't happen again.
v2: actually generate the test files
Connor Abbott (4):
glsl: be more consistent about printing constants
glsl/tests/lower_jumps: fix generated sexpr's for loops
glsl/tests: call
They were made unneccesary by the last commit.
Signed-off-by: Connor Abbott cwabbo...@gmail.com
---
src/glsl/tests/lower_jumps/.gitignore | 2 ++
src/glsl/tests/lower_jumps/lower_breaks_1.opt_test | 12 -
.../lower_jumps/lower_breaks_1.opt_test.expected | 4 ---
src/glsl
This way, when someone modifies create_test_cases.py and forgets to
commit their changes again, people will notice.
v2: make sure we parse the right directories and check for existance the
right way.
Signed-off-by: Connor Abbott cwabbo...@gmail.com
---
src/glsl/tests/optimization-test | 8
create_test_cases.py in line with them.
Signed-off-by: Connor Abbott cwabbo...@gmail.com
---
src/glsl/ir_print_visitor.cpp | 2 +-
src/glsl/tests/lower_jumps/lower_breaks_1.opt_test | 3 +--
src/glsl/tests/lower_jumps/lower_breaks_1.opt_test.expected| 3
On Wed, May 28, 2014 at 2:37 PM, Eric Anholt e...@anholt.net wrote:
Here's a series I started back in January as a little experiment.
Basically, I feel guilty for pushing GLSL IR into the driver, and wish I'd
just fixed up Mesa IR back in the day. But, given that we're still
feeding Mesa IR
On Tue, May 27, 2014 at 9:47 PM, Matt Turner matts...@gmail.com wrote:
Here's a respin of my load_payload series from mid-April with some
feedback from Ken addressed and some bugs fixed.
This series is available in my tree (with a few unrelated patches
before it)
On Wed, May 28, 2014 at 6:18 PM, Kenneth Graunke kenn...@whitecape.org wrote:
On 05/28/2014 01:17 PM, Matt Turner wrote:
On Wed, May 28, 2014 at 1:09 PM, Kenneth Graunke kenn...@whitecape.org
wrote:
On 05/27/2014 06:23 PM, Connor Abbott wrote:
This way, when someone modifies
On Wed, May 28, 2014 at 8:50 PM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Wed, May 28, 2014 at 2:37 PM, Eric Anholt e...@anholt.net wrote:
Here's a series I started back in January as a little experiment.
Basically, I feel guilty for pushing GLSL IR
On Tue, Jun 10, 2014 at 3:34 PM, Matt Turner matts...@gmail.com wrote:
On Wed, May 28, 2014 at 4:44 PM, Connor Abbott cwabbo...@gmail.com wrote:
On Tue, May 27, 2014 at 9:47 PM, Matt Turner matts...@gmail.com wrote:
Here's a respin of my load_payload series from mid-April with some
feedback
On Jun 26, 2014 5:30 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
Right now, the Intel driver is the only driver in mesa that implements
this extension. Is anyone using this? Is it ok if we purge it? I'm doing
some work on the texture format code and DUDV8 is an ugly special case.
Thanks,
On Sat, Jun 28, 2014 at 9:34 PM, Kenneth Graunke kenn...@whitecape.org wrote:
Apparently INTEL_DEBUG=fs has crashed on Broadwell for anything using
ARB_fragment_program since commit 9cee3ff5. We need to NULL-check the
right field.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Cc:
This series adds a couple things I need to exec_list for my work, and
does some cleanups made possible. Only compile tested on i965.
Connor Abbott (3):
exec_list: add a prepend function
exec_list: add a function to count the size of a list
exec_list: make various places use the new get_size
This complements the existing append function. It's implemented in a
rather simple way right now; it could be changed if performance is a
concern.
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/glsl/list.h | 20 +++-
1 file changed, 19 insertions(+), 1 deletion
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/glsl/list.h | 20
1 file changed, 20 insertions(+)
diff --git a/src/glsl/list.h b/src/glsl/list.h
index ca6ee9d..68ab3fd 100644
--- a/src/glsl/list.h
+++ b/src/glsl/list.h
@@ -324,6 +324,8 @@ struct exec_list
Instead of hand-rolling it.
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/glsl/ast_to_hir.cpp | 4 +---
src/glsl/ir_reader.cpp| 7 +++
src/glsl/opt_function_inlining.cpp| 7 ++-
src/mesa
On Wednesday, July 09, 2014 03:56:41 PM Ian Romanick wrote:
On 07/08/2014 12:20 PM, Connor Abbott wrote:
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/glsl/list.h | 20
1 file changed, 20 insertions(+)
diff --git a/src/glsl/list.h b/src/glsl
of optimization, in that if deref-array_index
were a constant but it got wrapped in an i2u expressoin then we
would've gone and generated an add and a mul instruction when that
isn't really necessary.
In any case, this patch is
Reviewed-by: Connor Abbott cwabbo...@gmail.com
for codepaths that want to distinguish between
intrinsics and non-intrinsics without using strcmp.
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/glsl/link_functions.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/glsl/link_functions.cpp b/src/glsl/link_functions.cpp
.
No difference in shader-db run times, but I'm keeping this in because
the q total that it calculates will also be used in the next commit.
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/program/register_allocate.c | 35 +++
1 file changed, 27 insertions
the summary:
total instructions in shared programs: 4545447 - 4545411 (-0.00%)
instructions in affected programs: 1353 - 1317 (-2.66%)
GAINED:124
LOST: 6
Connor Abbott (3):
ra: cleanup the public API
ra: make the p, q test more
we're at it rename ra_allocate_no_spills() to
ra_allocate() since there's no equivalent with spills, because the
backend is supposed to handle spilling.
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c | 2 +-
src/mesa/drivers/dri
programs: 1353 - 1317 (-2.66%)
GAINED:124
LOST: 6
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/program/register_allocate.c | 111 +--
1 file changed, 29 insertions(+), 82
On Tue, Jul 29, 2014 at 5:53 PM, Connor Abbott cwabbo...@gmail.com wrote:
This patch series contains some improvements to the register allocator
used by the i965 fs and vec4 backends and r300g. The most important
patch, and the only one with an intended functional change, is the last
one. Full
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/glsl/list.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/glsl/list.h b/src/glsl/list.h
index 3ee6cda..c402f48 100644
--- a/src/glsl/list.h
+++ b/src/glsl/list.h
@@ -644,6 +644,12 @@ inline void exec_node::insert_before
we're at it rename ra_allocate_no_spills() to
ra_allocate() since there's no equivalent with spills, because the
backend is supposed to handle spilling.
Reviewed-by: Eric Anholt e...@anholt.net
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/gallium/drivers/r300/compiler
.
No difference in shader-db run times, but I'm keeping this in because
the q total that it calculates will also be used in the next few commits.
Reviewed-by: Eric Anholt e...@anholt.net
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/program/register_allocate.c | 33
: 6
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/program/register_allocate.c | 57 ++--
1 file changed, 22 insertions(+), 35 deletions(-)
diff --git a/src/mesa/program/register_allocate.c
b/src/mesa/program/register_allocate.c
-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/program/register_allocate.c | 52 +---
1 file changed, 6 insertions(+), 46 deletions(-)
diff --git a/src/mesa/program/register_allocate.c
b/src/mesa/program/register_allocate.c
index 73d3b1a..f2f5910 100644
whitespace, split the last patch in two
Connor Abbott (4):
ra: cleanup the public API
ra: make the p, q test more efficient
ra: consider all spillable nodes for spilling
ra: optimistically color only one node at a time
.../drivers/r300/compiler/radeon_pair_regalloc.c | 2 +-
src/mesa
On Wed, Jul 30, 2014 at 10:50 PM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
Before, we would only consider nodes for spilling if they were
optimistically pushed onto the stack. But the logic for this was
complicated, and duplicated some things; also, we
On Thu, Jul 31, 2014 at 1:05 PM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
That's not necessarily true - you could want to spill a trivially
colored register that interferes with a non trivially colored
register, especially if the spill cost of the non
: 1353 - 1307 (-3.40%)
GAINED:124
LOST: 6
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/program/register_allocate.c | 57 ++--
1 file changed, 22 insertions(+), 35 deletions(-)
diff
whitespace, split the last patch in two
v3: rewrite patch 3, removing regressions in number of instructions
Connor Abbott (4):
ra: cleanup the public API
ra: make the p, q test more efficient
ra: don't consider nodes for spilling we don't need to
ra: optimistically color only one node
we're at it rename ra_allocate_no_spills() to
ra_allocate() since there's no equivalent with spills, because the
backend is supposed to handle spilling.
Reviewed-by: Eric Anholt e...@anholt.net
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/gallium/drivers/r300/compiler
-by: Connor Abbott connor.abb...@intel.com
---
Eric, does this patch seem OK to you? There are some comments indicating
the deleted code is necessary, but based on our conversation and my
tests it doesn't seem so...
src/mesa/program/register_allocate.c | 51
1 file
.
No difference in shader-db run times, but I'm keeping this in because
the q total that it calculates will also be used in the next few commits.
Reviewed-by: Eric Anholt e...@anholt.net
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/program/register_allocate.c | 33
On Fri, Aug 1, 2014 at 11:51 AM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Thu, Jul 31, 2014 at 1:05 PM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
That's not necessarily true - you could want to spill a trivially
On Fri, Aug 1, 2014 at 12:25 PM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Fri, Aug 1, 2014 at 11:51 AM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Thu, Jul 31, 2014 at 1:05 PM, Eric Anholt e...@anholt.net wrote
On Mon, Aug 4, 2014 at 9:46 AM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Fri, Aug 1, 2014 at 12:25 PM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Fri, Aug 1, 2014 at 11:51 AM, Eric Anholt e...@anholt.net wrote
On Mon, Aug 4, 2014 at 10:17 AM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Mon, Aug 4, 2014 at 9:46 AM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Fri, Aug 1, 2014 at 12:25 PM, Eric Anholt e...@anholt.net wrote
On Mon, Aug 4, 2014 at 10:42 AM, Connor Abbott cwabbo...@gmail.com wrote:
On Mon, Aug 4, 2014 at 10:17 AM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes:
On Mon, Aug 4, 2014 at 9:46 AM, Eric Anholt e...@anholt.net wrote:
Connor Abbott cwabbo...@gmail.com writes
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 11 ++-
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/src
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 4 +---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 8
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
b/src/mesa/drivers/dri
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 5 ++---
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 3 ++-
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 10 +-
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/src
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 +++-
src/mesa/drivers/dri/i965/brw_shader.cpp | 13 +
src/mesa/drivers/dri/i965/brw_shader.h | 3 ++-
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 4
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 5 +++--
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 5 +++--
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 30 +---
3 files changed, 24 insertions(+), 16
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 12 -
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 6 ++---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 37 +++-
3 files changed, 29 insertions(+), 26
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 15 ---
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 9 ++--
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 67 +++-
3 files changed, 49 insertions(+), 42
IR frontend which was
previously creating a fake ir_texture * to hack around the mess.
No piglit changes on my Ivy Bridge.
Connor Abbott (13):
i965/fs: don't use ir-shadow_comparitor in emit_texture_*
i965: make brw_texture_offset() more generic
i965/fs: don't use ir-offset in emit_texture_
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 4 ++--
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 16
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git
We already have the type from the original destination.
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers
At this point, the only thing it's used for is the opcode.
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 27 --
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 6 +--
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 55
the information needed to make a texture instruction and
handles all the setup, and all we have to do to emit a texture
instruction while converting from GLSL IR, Mesa IR, or any new backend
is to extract the information emit_texture() needs and then call it.
Signed-off-by: Connor Abbott connor.abb
Now that we've made all the texture emit code mostly independent of GLSL
IR, this isn't necessary any more.
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 19 +--
1 file changed, 5 insertions(+), 14 deletions(-)
diff --git
IR frontend which was
previously creating a fake ir_texture * to hack around the mess.
No piglit changes on my Ivy Bridge.
v2: fix build failure in the middle of the series.
Connor Abbott (13):
i965/fs: don't use ir-shadow_comparitor in emit_texture_*
i965: make brw_texture_offset() more
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 4 +---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 8
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
b/src/mesa/drivers/dri
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 5 +++--
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 5 +++--
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 30 +---
3 files changed, 24 insertions(+), 16
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 15 ---
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 9 ++--
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 67 +++-
3 files changed, 49 insertions(+), 42
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 +++-
src/mesa/drivers/dri/i965/brw_shader.cpp | 13 +
src/mesa/drivers/dri/i965/brw_shader.h | 3 ++-
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 4
the information needed to make a texture instruction and
handles all the setup, and all we have to do to emit a texture
instruction while converting from GLSL IR, Mesa IR, or any new backend
is to extract the information emit_texture() needs and then call it.
Signed-off-by: Connor Abbott connor.abb
Now that we've made all the texture emit code mostly independent of GLSL
IR, this isn't necessary any more.
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 19 +--
1 file changed, 5 insertions(+), 14 deletions(-)
diff --git
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 12 -
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 6 ++---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 37 +++-
3 files changed, 29 insertions(+), 26
We already have the type from the original destination.
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 11 ++-
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/src
v2: fix build failure
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 3 ++-
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 12 ++--
3 files changed, 9 insertions(+), 8 deletions
v2: fix build failure
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 7 +++
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src
At this point, the only thing it's used for is the opcode.
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 27 --
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 6 +--
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 55
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 4 ++--
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 16
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 12 -
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 6 ++---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 37 +++-
3 files changed, 29 insertions(+), 26
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index
This lets us call dump_instructions() after register allocation without
failing an assertion.
This interacts trivially with my previous patch.
Signed-off-by: Connor Abbott connor.abb...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 4
1 file changed, 4 insertions
On Fri, Aug 8, 2014 at 4:55 PM, Matt Turner matts...@gmail.com wrote:
Reviewed-by: Matt Turner matts...@gmail.com
I'll commit both of these tonight. (Does the vec4 backend have the
same problem?)
AFAICT, it has the same problem that this patch fixes but not the last
patch. I would fix send
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