Re: [Mesa-dev] [PATCH] mesa: Drop PATH_MAX usage.

On Tuesday, November 15, 2016 10:28:11 PM PST Roland Mainz wrote: > On Tue, Nov 15, 2016 at 9:56 PM, Emil Velikov > wrote: > > On 15 November 2016 at 20:04, Kenneth Graunke wrote: > >> GNU/Hurd does not define PATH_MAX since it doesn't have such arbitrary > >

[Mesa-dev] [PATCH 3/7] i965: Make URB code use prog_data for GS/tessellation enable checks.

If geometry/tessellation shaders are disabled, prog_data will be NULL (see brw_state_upload.c). This consolidates dirty bits a little. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen7_urb.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/src/mesa

[Mesa-dev] [PATCH 1/7] intel: Convert devinfo->urb.max_*_entries into an array.

Signed-off-by: Kenneth Graunke --- src/intel/common/gen_device_info.c | 144 +-- src/intel/common/gen_device_info.h | 10 ++- src/intel/vulkan/genX_pipeline.c | 12 ++- src/mesa/drivers/dri/i965/gen6_urb.c | 8 +- src/mesa/drivers/dri/i965/gen7_urb.c

[Mesa-dev] [PATCH 7/7] intel: Share URB configuration code between GL and Vulkan.

This code is far too complicated to cut and paste. Signed-off-by: Kenneth Graunke --- src/intel/Makefile.sources | 1 + src/intel/common/gen_l3_config.h | 6 ++ src/intel/common/gen_urb_config.c| 201 +++ src/intel/vulkan/anv_genX.h

[Mesa-dev] [PATCH 5/7] i965: Drop brw->urb.{nr_*_entries, *_start} assignments from gen7_urb.c.

The context fields are for Gen4-5; setting them has always been useless. There's no point in spending the cost in the hottest path in the driver. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen7_urb.c | 25 - 1 file changed, 8 insertions(+), 17 dele

[Mesa-dev] [PATCH 4/7] i965: Switch to roundf in HS/DS URB code.

Matt intentionally switched the VS calculation to be float-based in commit c1da15709a0c0c2775bd9e534f67c60f7dc95ce8. Tessellation support was written before this and rebased forward, and missed the change. Now it's consistent. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri

[Mesa-dev] [PATCH 2/7] intel: Convert devinfo->urb.min_*_entries into an array.

Signed-off-by: Kenneth Graunke --- src/intel/common/gen_device_info.c | 86 src/intel/common/gen_device_info.h | 6 ++- src/intel/vulkan/genX_pipeline.c | 6 +-- src/mesa/drivers/dri/i965/gen6_urb.c | 3 +- src/mesa/drivers/dri/i965/gen7_urb.c | 9

[Mesa-dev] [PATCH 6/7] i965: Use arrays in Gen7+ URB code.

So much of this code was cut and pasted per stage. We can accomplish much of it by looping over shader stages. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen7_urb.c | 336 ++- 1 file changed, 134 insertions(+), 202 deletions(-) diff --git a

[Mesa-dev] [PATCH] i965: Use 3DSTATE_CLIP's User Clip Distance Enable bitmask on Gen8+.

. Setting the "Use the 3DSTATE_CLIP bitmask" force enable bit allows us to drop _NEW_TRANSFORM from all the shader stage atoms, so we can re-emit them less often. Improves performance of OglBatch7 (version 6) by 2.70773% +/- 0.491257% (n = 38) at 1024x768 on Cherryview. Signed-off-by: Kenne

Re: [Mesa-dev] [PATCH 5/7] i965: Drop brw->urb.{nr_*_entries, *_start} assignments from gen7_urb.c.

On Wednesday, November 16, 2016 11:06:44 AM PST Pohjolainen, Topi wrote: > On Tue, Nov 15, 2016 at 05:54:00PM -0800, Kenneth Graunke wrote: > > The context fields are for Gen4-5; setting them has always been useless. > > There's no point in spending the cost in the hottes

Re: [Mesa-dev] [PATCH 1/7] intel: Convert devinfo->urb.max_*_entries into an array.

On Wednesday, November 16, 2016 10:56:32 AM PST Pohjolainen, Topi wrote: > On Tue, Nov 15, 2016 at 05:53:56PM -0800, Kenneth Graunke wrote: > > diff --git a/src/intel/common/gen_device_info.h > > b/src/intel/common/gen_device_info.h > > index 10324e6..3125a68 100644 >

Re: [Mesa-dev] [PATCH 06/14] nir: Add a "compact array" flag and IO lowering code.

On Wednesday, November 16, 2016 8:20:44 PM PST Jason Ekstrand wrote: > On Mon, Nov 14, 2016 at 5:41 PM, Kenneth Graunke > wrote: > > > Certain built-in arrays, such as gl_ClipDistance[], gl_CullDistance[], > > gl_TessLevelInner[], and gl_TessLevelOuter[] are specified

Re: [Mesa-dev] [PATCH 07/14] nir: add a pass to compact clip/cull distances.

On Wednesday, November 16, 2016 8:37:50 PM PST Jason Ekstrand wrote: > On Mon, Nov 14, 2016 at 5:41 PM, Kenneth Graunke > wrote: > > > Signed-off-by: Kenneth Graunke > > --- > > src/compiler/Makefile.sources | 1 +

[Mesa-dev] [PATCH] i965: Disable depth writes when depth test is GL_EQUAL.

he problem, fixing it was pretty simple. [1] https://github.com/janesma/apitrace/wiki/frameretrace-branch Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_cc.c| 2 +- src/mesa/drivers/dri/i965/brw_context.h | 7 +++ src/mesa/drivers/dri/i965/brw_draw.c

[Mesa-dev] [PATCH] i965: Fix compute shader crash.

Fixes crashes when starting Deus Ex: Mankind Divided. Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_cs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_cs.c b/src/mesa/drivers/dri/i965

Re: [Mesa-dev] [PATCH] mesa: fix old classic drivers to use ralloc for ARB asm programs

; @@ -2944,7 +2943,7 @@ get_mesa_program(struct gl_context *ctx, > return prog; > > fail_exit: > - free(mesa_instructions); > + ralloc_free(mesa_instructions); > _mesa_reference_program(ctx, &shader->Program, NULL); > return NULL; > } > Revi

[Mesa-dev] [PATCH] i965: Fix a mistake from porting the URB allocation code to arrays.

[i]. Fixes a large performance regression in TessMark. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98815 Signed-off-by: Kenneth Graunke --- src/intel/common/gen_urb_config.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/common/gen_urb_config.c b/src

Re: [Mesa-dev] [PATCH 1/3] anv: use do { } while (0) in the anv_finishme macro

On Thursday, November 24, 2016 6:18:13 PM PST Emil Velikov wrote: > From: Emil Velikov > > Use the generic construct instead of the currect GCC specific one. > > Cc: Kenneth Graunke > Suggested-by: Kenneth Graunke > Signed-off-by: Emil Velikov > --- > src/inte

Re: [Mesa-dev] [PATCH] Revert "glsl/es31: precision qualifier doesn't need to match in shader interface block members"

On Friday, November 25, 2016 3:19:57 PM PST Rob Clark wrote: > no worries.. I can keep the reverts locally (it is marginally easier > than rebuilding glmark2 and I only really care until I get far enough > with $new_hw to advertise desktop gl 2.0+.. otherwise I wouldn't be > using glmark2-es) > >

Re: [Mesa-dev] [PATCH 2/8] anv: Use library mtime for cache UUID.

result = vk_errorf(VK_ERROR_INITIALIZATION_FAILED, > + "cannot generate UUID"); > + goto fail; > + } > + I don't see why this error case is special - all the others just have "goto fail". This stuff may need to get cleaned up, bu

Re: [Mesa-dev] [PATCH] nir: print var binding in dumps.

ar, print_state *state) > loc = buf; >} > > - fprintf(fp, " (%s, %u)%s", loc, var->data.driver_location, > + fprintf(fp, " (%s, %u, %u)%s", loc, var->data.driver_location, > var->data.binding, > var->data.compact ? &q

Re: [Mesa-dev] [PATCH] anv: expose depthBiasClamp, it is already set

.depthBounds = false, > >.wideLines= true, > > -- > > 2.7.3 > > Looks like it's all hooked up to me. Reviewed-by: Kenneth Graunke signature.asc Description: This is a digitally signed message part. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] anv: enable drawIndirectFirstInstance

ectFirstInstance= true, >.depthClamp = true, >.depthBiasClamp = true, >.fillModeNonSolid = true, > Yep, this is hooked up. Reviewed-by: Kenneth Graun

Re: [Mesa-dev] [PATCH 09/18] i965: Simplify num_sources_from_inst().

On Tuesday, November 22, 2016 11:59:43 AM PST Matt Turner wrote: > desc will always be non-NULL, because brw_validate_instructions() does > not attempt to validate any instructions that fail the > is_unsupported_inst() check. > --- > src/mesa/drivers/dri/i965/brw_eu_validate.c | 4 +--- > 1 file c

Re: [Mesa-dev] [PATCH 09/18] i965: Simplify num_sources_from_inst().

On Sunday, November 27, 2016 12:42:49 AM PST Kenneth Graunke wrote: > On Tuesday, November 22, 2016 11:59:43 AM PST Matt Turner wrote: > > desc will always be non-NULL, because brw_validate_instructions() does > > not attempt to validate any instructions that fail the > >

Re: [Mesa-dev] [PATCH 14/18] i965: Replace reg_type_size[] with a function.

> + assert(devinfo->gen >= 8 || type <= BRW_HW_REG_TYPE_F); > + return imm_hw_sizes[type]; > + } else { > + /* Non-immediate registers */ > + static const int hw_sizes[] = { ditto - unsigned? > + [BRW_HW_REG_TYPE_UD] = 4, > + [BRW_HW_

Re: [Mesa-dev] [PATCH 2/8] anv: Use library mtime for cache UUID.

On Sunday, November 27, 2016 12:17:52 PM PST Emil Velikov wrote: > On 27 November 2016 at 02:31, Kenneth Graunke wrote: > > On Thursday, November 24, 2016 8:30:39 PM PST Emil Velikov wrote: > >> From: Emil Velikov [snip] > >> @@ -186,7 +208,14 @@ anv_

Re: [Mesa-dev] [PATCH] anv: bump maxFramebufferLayers to 2048

= (1 << 11), >.framebufferColorSampleCounts = sample_counts, >.framebufferDepthSampleCounts = sample_counts, > .framebufferStencilSampleCounts = sample_counts, > Reviewed-by: Kenneth Graunke signature.asc Description: Thi

Re: [Mesa-dev] [PATCH 1/2] anv: set maxFragmentDualSrcAttachments to 1

= 1, > .maxFragmentCombinedOutputResources = 8, > .maxComputeSharedMemorySize = 32768, > .maxComputeWorkGroupCount = { 65535, 65535, > 65535 }, > Both are Reviewed-by: Ken

Re: [Mesa-dev] [PATCH] i965/fs: Refactor handling of constant tg4 offsets

. It's much less confusing now. I think this is a good first step. It doesn't conflict with our longer term plans to replace inst->offset with immediate sources. Even if we do that, keeping the "must be constant" [-8, 7] ordinary offsets separate from the [-32, 31] g

Re: [Mesa-dev] [PATCH 14/27] i965: Allow aux buffers to have an offset

he data at an offset from > the main framebuffer, ie. share a buffer object. This patch just makes > having an aux offset possible. > > Thanks to Ken for helping me find the most simple fix... > > Cc: Kenneth Graunke > Signed-off-by: Ben Widawsky > --- > src/m

Re: [Mesa-dev] [PATCH] i965: Release aux buffer when disabling ccs

On Monday, December 5, 2016 12:08:13 AM PST Topi Pohjolainen wrote: > Otherwise subsequent render cycles keep on using compression > and/or fast clear. > > Signed-off-by: Topi Pohjolainen > CC: Kalyan Kondapally > CC: Kenneth Graunke > --- > src/mesa/drivers/dri/i965

Re: [Mesa-dev] [PATCH] main: allow NEAREST_MIPMAP_NEAREST for stencil texturing

s a ton of sense. Thanks for reporting this, Józef, and thanks for fixing it, Roland! Reviewed-by: Kenneth Graunke signature.asc Description: This is a digitally signed message part. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] i965: Allocate at least some URB space even when max_vertices = 0.

fixes things on earlier generations. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visito

Re: [Mesa-dev] [PATCH 4/6] nir/lower_tex: add lowering for texture gradient on shadow samplers

it odd to me - if a driver sets options->lower_txd_shadow but not options->lower_txd_cube_map, then textureGrad(samplerCubeShadow, ...) would not be lowered. I would sort of expect that case to be lowered if either option is set. I suppose it's not a problem in practice, as we set

Re: [Mesa-dev] [PATCH 1/6] nir/lower_tex: generalize get_texture_size()

On Thursday, December 1, 2016 8:53:16 AM PST Iago Toral Quiroga wrote: > This was written specifically for RECT samplers. Make it more generic so > we can call this from the gradient lowerings too. > --- > src/compiler/nir/nir_lower_tex.c | 15 ++- > 1 file changed, 10 insertions(+), 5

[Mesa-dev] [PATCH 2/2] i965: Don't force SSO layout for VS->TCS.

bug.cgi?id=98893 Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp | 3 ++- src/mesa/drivers/dri/i965/brw_vs.c | 4 +--- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp b/src/mesa/drivers/dri/i965/brw_ve

[Mesa-dev] [PATCH 1/2] i965: Unify shader interfaces explicitly.

: spec/glsl-1.50/execution/geometry/clip-distance-vs-gs-out. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97232 Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_link.cpp | 29 + 1 file changed, 29 insertions(+) diff --git a/src/mesa/driver

Re: [Mesa-dev] [PATCH] genxml/gen9: Change the default of MI_SEMAPHORE_WAIT::RegisterPoleMode

-- a/src/intel/genxml/gen9.xml > +++ b/src/intel/genxml/gen9.xml > @@ -3200,7 +3200,7 @@ > > > > - default="1"/> > + > > > > Reviewed-by: Kenneth Graunke signature.asc Description: This is a

[Mesa-dev] [PATCH] i965: Initialize "separate" flag in VUE maps.

Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vue_map.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_vue_map.c b/src/mesa/drivers/dri/i965/brw_vue_map.c index 4d509d3..982a31f 100644 --- a/src/mesa/drivers/dri/i965/brw_vue_map.c +++ b/src/m

[Mesa-dev] [PATCH] i965: Drop redundant key->outputs_written initialization.

This was already set to the same value earlier. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_tcs.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c index 95926db..76cd0a5 100644 --- a/src/mesa

Re: [Mesa-dev] [PATCH v3] compiler/glsl: fix precision problem of tanh

> > v2: added more explanation in the comment. > v3: fixed a typo in the comment. > > Signed-off-by: Haixia Shi > Cc: Jason Ekstrand , > Cc: Stéphane Marchesin , > Cc: Kenneth Graunke > > Change-Id: I324c948b3323ff8107127c42934f14459e124b95 > --- > src/compiler

Re: [Mesa-dev] [PATCH V2] i965: delay adding built-in uniforms to Parameters list

ew code back to brw_link_shader() > --- > src/mesa/drivers/dri/i965/brw_link.cpp | 42 > +++--- > 1 file changed, 19 insertions(+), 23 deletions(-) Reviewed-by: Kenneth Graunke signature.asc Description: This is a di

Re: [Mesa-dev] [PATCH v3] compiler/glsl: fix precision problem of tanh

On Thursday, December 8, 2016 9:17:04 PM PST Jason Ekstrand wrote: > On Thu, Dec 8, 2016 at 8:41 PM, Roland Scheidegger > wrote: > > > I'm wondering, isn't that actually a problem of the test, that is it > > can't actually expect reasonable results with such input values? > > Since within the sha

Re: [Mesa-dev] [PATCH 1/2] glsl: Use a simpler formula for tanh

> +* > +* Clamp x to (-inf, +10] to avoid precision problems. When x > 10, e^x > is > +* so much larger than 1.0 that 1.0 gets flushed to zero in the > computation > +* e^x +- 1 so it can be ignored. e^2x (you say e^x here and e^2x in the spirv patch). I'

Re: [Mesa-dev] [PATCH 1/7] mesa: Add types for ARB_transform_feedback_oveflow_query.

On Wednesday, December 7, 2016 10:50:29 AM PST Rafael Antognolli wrote: > Add some basic types and storage for the queries of this extension. > > Signed-off-by: Rafael Antognolli > --- > src/mesa/main/extensions_table.h | 1 + > src/mesa/main/mtypes.h | 5 + > 2 files changed, 6 in

Re: [Mesa-dev] [PATCH 0/2] i965: Fix dEQP-EGL.functional.image.render_multiple_contexts.gles2_renderbuffer_depth16_depth_buffer

be good if Topi could take a look too, but these get my Reviewed-by: Kenneth Graunke signature.asc Description: This is a digitally signed message part. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] mesa: Return LINEAR encoding for winsys FBO depth/stencil.

fers: GL45-CTS.gtf30.GL3Tests.framebuffer_srgb.framebuffer_srgb_default_encoding Signed-off-by: Kenneth Graunke --- src/mesa/main/fbobject.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c index 64c4ab5..26fc15d 100644 --- a/src/mesa/main/fbobject.c

[Mesa-dev] [PATCH] glsl: Make copy propagation not panic when it sees an intrinsic.

> 10867 (-80.75%) helped: 14 HURT: 0 total cycles in shared programs: 288879704 -> 291270232 (0.83%) cycles in affected programs: 12758080 -> 15148608 (18.74%) helped: 6 HURT: 8 All shaders helped are compute shaders in Tomb Raider or Deus Ex. Signed-off-by: Kenneth Graunke --- src/compil

Re: [Mesa-dev] [PATCH] glsl: Make copy propagation not panic when it sees an intrinsic.

On Saturday, December 10, 2016 12:37:16 PM PST Matt Turner wrote: > On Fri, Dec 9, 2016 at 8:28 PM, Kenneth Graunke wrote: > > A number of games have large arrays of constants, which we promote to > > uniforms. This introduces copies from the uniform array to the original >

[Mesa-dev] [PATCH] i965: Print out cycle estimates at the start of block annotations.

We now print START B15 <-B14 (42774 cycles) indicating that we estimate B15 will take 42,774 cycles. Printing this should make it easier where time is spent in the program. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/intel_asm_annotation.c | 2 +- 1 file changed

[Mesa-dev] [PATCH] mesa: Clamp GetUniformuiv values to be >= 0.

y. Signed-off-by: Kenneth Graunke --- src/mesa/main/uniform_query.cpp | 48 + 1 file changed, 39 insertions(+), 9 deletions(-) Hey Nicolai, I wrote a similar patch a while back, but never got around to sending it, since I realized that the gl45release bran

Re: [Mesa-dev] [PATCH 4/9] i965: Factor out oword block read and write message control calculation.

On Friday, December 9, 2016 11:03:27 AM PST Francisco Jerez wrote: > We'll need roughly the same logic in other places and it would be > annoying to duplicate it. Instead factor it out into a function-like > macro that takes the number of dwords per block (which will prove more > convenient than t

Re: [Mesa-dev] [PATCH 4/9] i965: Factor out oword block read and write message control calculation.

On Sunday, December 11, 2016 5:44:03 PM PST Francisco Jerez wrote: > Kenneth Graunke writes: > > > On Friday, December 9, 2016 11:03:27 AM PST Francisco Jerez wrote: > >> We'll need roughly the same logic in other places and it would be > >> annoying to duplic

[Mesa-dev] [PATCH 1/2] i965: Make DCE set null destinations on messages with side effects.

71%) helped: 2 HURT: 0 total fills in shared programs: 17328 -> 17264 (-0.37%) fills in affected programs: 228 -> 164 (-28.07%) helped: 2 HURT: 0 Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp | 10 +++--- 1 file changed, 3 insertions(+), 7

[Mesa-dev] [PATCH 2/2] glsl: Make copy propagation not panic when it sees an intrinsic.

pills in shared programs: 14990 -> 14685 (-2.03%) spills in affected programs: 345 -> 40 (-88.41%) helped: 9 HURT: 1 total fills in shared programs: 17264 -> 16744 (-3.01%) fills in affected programs: 705 -> 185 (-73.76%) helped: 9 HURT: 1 Helps Tomb Raider and Deus Ex: Mankind Div

Re: [Mesa-dev] [PATCH] glsl: Make copy propagation not panic when it sees an intrinsic.

On Monday, December 12, 2016 4:35:46 PM PST Marek Olšák wrote: [snip] > Yeah, the GLSL compiler can't really do anything if it sees a bitcast. > I tried to write a pass that removes bitcasts, but it's a PITA because > you can have a vec4 where xzw are used as float and y as int. > > I just gave up

Re: [Mesa-dev] [PATCH v2 2/7] nir/lower_tex: add lowering for texture gradient on cube maps

t projector_idx = nir_tex_instr_src_index(tex, nir_tex_src_projector); int offset_idx = nir_tex_instr_src_index(tex, nir_tex_src_offset); /* we replace ddx and ddy with a single value: lod */ int num_srcs = tex->num_srcs - 1; nir_ssa_def *dPdx = tex->src[nir_tex_

Re: [Mesa-dev] [PATCH 1/9] i965/gen6+: Invalidate constant cache on brw_emit_mi_flush().

On Friday, December 9, 2016 11:03:24 AM PST Francisco Jerez wrote: > In order to make sure that the constant cache is coherent with > previous rendering when we start using it for pull constant loads. > --- > src/mesa/drivers/dri/i965/brw_pipe_control.c | 1 + > 1 file changed, 1 insertion(+) > >

Re: [Mesa-dev] [PATCH 2/9] i965: Let the caller of brw_set_dp_write/read_message control the target cache.

+++- > src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 15 -- > 3 files changed, 43 insertions(+), 42 deletions(-) This patch is: Reviewed-by: Kenneth Graunke signature.asc Description: This is a digitally signed message part. ___

Re: [Mesa-dev] [PATCH 3/9] i965/fs: Switch to the constant cache for uniform pull constants.

On Friday, December 9, 2016 11:03:26 AM PST Francisco Jerez wrote: > -/* We have to use a message header on Skylake to get SIMD4x2 > - * mode. Reserve space for the register. > -*/ This should reduce the message length of the SENDs, right? It might be worth ad

Re: [Mesa-dev] [PATCH 6/9] i965/fs: Fetch one cacheline of pull constants at a time.

ine at a time, it seems very unlikely that we'd ever load the same cacheline twice within 16 cycles. We could if we have IF (non-uniform) load[foo] ELSE load[bar] where foo and bar are indirect expressions that happen to be equal. But that seems quite uncommon. Series is: Reviewed-by: Ken

Re: [Mesa-dev] [PATCH 1/9] i965/gen6+: Invalidate constant cache on brw_emit_mi_flush().

On Tuesday, December 13, 2016 1:10:22 PM PST Francisco Jerez wrote: > Kenneth Graunke writes: > > > On Friday, December 9, 2016 11:03:24 AM PST Francisco Jerez wrote: > >> In order to make sure that the constant cache is coherent with > >> previous rendering w

Re: [Mesa-dev] Documenting with Sphinx

On Tuesday, December 13, 2016 2:47:27 PM PST Eric Anholt wrote: > Jason Ekstrand writes: > > > Hey All, > > I don't figure this will be terribly controversial (I'm about to be wrong, > > aren't I?) but how do people feel about switching our "primary" > > documentation focus, as far as we have one

[Mesa-dev] [PATCH] i965/vec4: Fix TCS output reads with non-zero component qualifiers.

even come from the URB at all. Instead we want to do: SEND .ZW MOV .XY .ZW or more simply: SEND .XYZW MOV .XY .ZW Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp | 7 --- 1 file changed, 4 insertions(

Re: [Mesa-dev] [PATCH] nir/lower_tex: fix number of components in replace_gradient_with_lod()

p;txl->dest, 4, 32, NULL); > + nir_ssa_dest_init(&txl->instr, &txl->dest, > + tex->dest.ssa.num_components, 32, NULL); > nir_builder_instr_insert(b, &txl->instr); > > nir_ssa_def_rewrite_uses(&tex->dest.ssa, nir_src_for_s

[Mesa-dev] [PATCH 1/2] genxml: Rename "DS Function Enable" to "Function Enable".

This makes Gen7/7.5 match Gen8-9. Signed-off-by: Kenneth Graunke --- src/intel/genxml/gen7.xml | 2 +- src/intel/genxml/gen75.xml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml index 6bde403..77eeac1 100644 --- a/src

[Mesa-dev] [PATCH 2/2] genxml: Make Gen8 3DSTATE_DS SIMD8 enable work like Gen9+.

This will let us avoid ifdefs. Signed-off-by: Kenneth Graunke --- src/intel/genxml/gen8.xml | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml index ebaf73a..08ee7be 100644 --- a/src/intel/genxml/gen8.xml +++ b/src/intel

Re: [Mesa-dev] [PATCH 6/9] i965/fs: Fetch one cacheline of pull constants at a time.

On Wednesday, December 14, 2016 2:18:16 PM PST Francisco Jerez wrote: > Francisco Jerez writes: > > > Kenneth Graunke writes: > > > >> On Friday, December 9, 2016 11:03:29 AM PST Francisco Jerez wrote: > >>> Asking the DC for less than one cacheline (4

[Mesa-dev] [PATCH v2] i965/vec4: Fix TCS output reads with non-zero component qualifiers.

even come from the URB at all. Instead we want to do: SEND MOV .XY .ZW Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp b/src/mesa/d

Re: [Mesa-dev] [PATCH] nir: Turn imov/fmov of undef into undef

- nir_ssa_undef(b, num_components, nir_dest_bit_size(alu->dest.dest)); > + nir_ssa_def *undef = nir_ssa_undef(b, alu->dest.dest.ssa.num_components, > + nir_dest_bit_size(alu->dest.dest)); > nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, n

[Mesa-dev] [PATCH] glsl: Fix program interface queries relating to interface blocks.

t;, "block[1]", ... resource list entries - so those rules are real, and actually used. So if they don't apply to block members, then how should members be named? Unfortunately, I don't see any rules outside of issue 16 - where the rationale is very un

[Mesa-dev] [PATCH] glsl: Drop bogus is_vertex_input from add_shader_variable().

stage_mask is a bitmask of shader stages, so the proper comparison would be (1 << MESA_SHADER_VERTEX), not MESA_SHADER_VERTEX itself. But we only care for structure types, and VS inputs cannot be structs. So we can just drop this entirely. Signed-off-by: Kenneth Graunke --- src/compile

[Mesa-dev] [PATCH] mesa: Clamp ValueMask to [0, 255].

hat anyway. Signed-off-by: Kenneth Graunke --- src/mesa/main/stencil.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mesa/main/stencil.c b/src/mesa/main/stencil.c index b303bb7..608c564 100644 --- a/src/mesa/main/stencil.c +++ b/src/mesa/main/stencil.c @@ -16

Re: [Mesa-dev] [PATCH] glsl: Fix program interface queries relating to interface blocks.

On Saturday, December 17, 2016 5:41:35 PM PST Alejandro Piñeiro wrote: > On 17/12/16 03:35, Kenneth Graunke wrote: > > This fixes 555 dEQP tests (using the nougat-cts-dev branch), Piglit's > > arb_program_interface_query/arb_program_interface_query-resource-query, > &g

Re: [Mesa-dev] [PATCH] mesa: Clamp ValueMask to [0, 255].

On Sunday, December 18, 2016 11:33:49 AM PST Chris Forbes wrote: > I don't see any spec justification for masking this. dEQP is broken here. > Implementations have the flexibility to retain more bits in the mask (and > have more bits set in the initial state) than the depth of the deepest > stencil

[Mesa-dev] [PATCH 3/3] mesa/get: Convert stencil values to TYPE_UINT.

.functional.state_query.integers.stencil*value*mask*getfloat when run in a single process (with state reset code happening between tests, which makes dEQP set the stencil value mask to 0x). Signed-off-by: Kenneth Graunke --- src/mesa/main/get_hash_params.py | 12 ++-- 1 file changed

[Mesa-dev] [PATCH 2/3] mesa/get: Add TYPE_UINT for casting through a GLuint.

he source value as an unsigned value. Otherwise, we'll produce a negative number when bit 31 is set. This commit merely adds the plumbing. It doesn't convert any values. Signed-off-by: Kenneth Graunke --- src/mesa/main/get.c | 43 +++ 1 fi

[Mesa-dev] [PATCH 1/3] mesa/get: Make GetFloat/GetDouble of TYPE_INT_N not normalize things.

and access via glGetFloat(), but we may as well fix it. Found by inspection. Signed-off-by: Kenneth Graunke --- src/mesa/main/get.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c index ba02cb2..25444e7 100644 --- a/src/mesa/m

[Mesa-dev] [PATCH v2 1/3] mesa/get: Make GetFloat/GetDouble of TYPE_INT_N not normalize things.

and access via glGetFloat(), but we may as well fix it. Found by inspection. v2: Gotta catch 'em all (fix another case of this caught by Ilia) Signed-off-by: Kenneth Graunke Reviewed-by: Ilia Mirkin --- src/mesa/main/get.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff

[Mesa-dev] [PATCH v2 2/3] mesa/get: Add TYPE_UINT for casting through a GLuint.

he source value as an unsigned value. Otherwise, we'll produce a negative number when bit 31 is set. This commit merely adds the plumbing. It doesn't convert any values. v2: Gotta catch 'em all (add missing cases caught by Ilia) Signed-off-by: Kenneth Graunke

[Mesa-dev] [PATCH] i965: Don't bail on vertex element processing if we need draw params.

https://bugs.freedesktop.org/show_bug.cgi?id=99144 Reported-by: Pierre-Eric Pelloux-Prayer Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen8_draw_upload.c | 34 ++-- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/src/mesa/drivers/dri

Re: [Mesa-dev] [PATCH 08/19] glsl: Walk a list of ir_dereference_array to mark array elements as accessed

; > mem_ctx = NULL; > } > > +static operand > +deref_array(operand array, operand index) I'd suggest just making this return the ir_rvalue *, rather than wrapping it in an operand. It's not necessary - if you take the resulting ir_rvalue *, and pass it to anything expecting an operand, it'll automatically create one for you. But you can also just use it as a normal piece of IR that way. > +{ > + void *mem_ctx = ralloc_parent(array.val); > + > + ir_rvalue *val = new(mem_ctx) ir_dereference_array(array.val, index.val); > + > + return operand(val); > +} > + > +static operand > +deref_struct(operand s, const char *field) Ditto. It might also make sense to just put these in ir_builder, as well. Either way, the series is: Reviewed-by: Kenneth Graunke signature.asc Description: This is a digitally signed message part. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] glsl: Fix program interface queries relating to interface blocks.

On Monday, December 19, 2016 1:36:00 PM PST Ian Romanick wrote: > On 12/16/2016 09:35 PM, Kenneth Graunke wrote: > > This fixes 555 dEQP tests (using the nougat-cts-dev branch), Piglit's > > arb_program_interface_query/arb_program_interface_query-resource

[Mesa-dev] [PATCH] glsl: Use ir_var_temporary when generating inline functions.

inker. Fixes a new Piglit test: glsl-fs-multiple-builtins. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99097 Reported-by: Niels Ole Salscheider Signed-off-by: Kenneth Graunke --- src/compiler/glsl/opt_function_inlining.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --

Re: [Mesa-dev] [PATCH] glsl: Use ir_var_temporary when generating inline functions.

On Monday, December 19, 2016 3:29:13 PM PST Kenneth Graunke wrote: > We were using ir_var_auto for the inlined function parameter variables, > which is wrong, as it suggests that those are real variables declared > by the program. > > Normally this doesn't matter. However,

Re: [Mesa-dev] [PATCH] glsl: Fix program interface queries relating to interface blocks.

On Monday, December 19, 2016 8:41:17 PM PST Matt Turner wrote: > On Mon, Dec 19, 2016 at 4:13 PM, Kenneth Graunke > wrote: > > For what it's worth, the OpenGL wiki's Program Introspection page(*), > > under "Interface block member naming" gives an example

Re: [Mesa-dev] [PATCH 2/9] i965: Consider surface resolves just before draw

internal driver state. > > > > > > Signed-off-by: Topi Pohjolainen > > > CC: Kenneth Graunke > > > CC: Jason Ekstrand > > > CC: Ben Widawsky > > > --- > > > src/mesa/drivers/dri/i965/brw_compute.c | 1 + > > > src/mesa/driv

Re: [Mesa-dev] [PATCH] mesa: don't attempt to unlock an unlocked debug state mutex

On Tuesday, December 20, 2016 12:08:06 PM PST Jonathan Gray wrote: > Can someone push this to master? Pushed: To ssh://git.freedesktop.org/git/mesa/mesa ab8ea1b..62b8bcd master -> master Have you thought about applying for commit access? signature.asc Description: This is a digitally signe

Re: [Mesa-dev] [PATCH] Mesa: Fix error code for glTexImage3D in GLES

On Wednesday, December 21, 2016 9:05:27 AM PST Randy Xu wrote: > From the OGLES 3.2 spec, Section 8.5 Texture Image Specification, page 158: > "An INVALID_OPERATION error is generated if a combination of > values for format, type, and internalformat is specified that is > not listed as a valid

Re: [Mesa-dev] [PATCH] mesa: sanitize input stencil mask values

On Thursday, December 22, 2016 10:47:46 AM PST Haixia Shi wrote: > Hello Mesa-Dev: > > To give you some background, we are observing that mask values getting > converted to -1 when running multiple dEQP-GLES31 tests in sequence. > > There's already a previous commit > (b8b1d83c71fd148d2fd84afdc20

Re: [Mesa-dev] [PATCH 1/2] glsl: add driconf to zero-init unintialized vars

) > + && (var->type->base_type >= GLSL_TYPE_UINT) > + && (var->type->base_type <= GLSL_TYPE_BOOL) I'd prefer: && (var->type->is_numeric() || var->type->is_boolean()) Either way, Reviewed-by: Kenneth Gr

Re: [Mesa-dev] [PATCH shader-db 2/4] split-to-files.py: fix parsing compute shaders

On Thursday, June 30, 2016 5:03:24 PM PDT Marek Olšák wrote: > From: Marek Olšák > > --- > split-to-files.py | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/split-to-files.py b/split-to-files.py > index 7e14d89..0e1d729 100755 > --- a/split-to-files.py > +++ b/split-to-files.py > @@

Re: [Mesa-dev] Add gperf as a build dependency?

On Thursday, June 30, 2016 10:13:47 AM PDT Ian Romanick wrote: > I think I might want to use gperf for something in Mesa, but I'm not > 100% sure yet. Before I proceed, is it even acceptable to add that as a > build dependency? Why not make it an optional dependency? signature.asc Description:

Re: [Mesa-dev] [PATCH v2 03/11] mesa: Strip arrayness from interface block names in some IO validation

Cc: Ilia Mirkin This is an annoying amount of code, but it looks OK to me and I don't have any ideas of how to do it better. Reviewed-by: Kenneth Graunke signature.asc Description: This is a digitally signed message part. ___ mesa-dev mailing li

Re: [Mesa-dev] [PATCH v2 04/11] glsl: Pack integer and double varyings as flat even if interpolation mode is none

58 > Cc: "12.0" > Cc: Gregory Hainaut > Cc: Ilia Mirkin Reviewed-by: Kenneth Graunke signature.asc Description: This is a digitally signed message part. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] anv: Add anv_timestamp.h to VULKAN_GENERATED_SOURCES.

Otherwise it doesn't get automatically generated in a clean build. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96825 Signed-off-by: Kenneth Graunke --- src/intel/vulkan/Makefile.sources | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/v

Re: [Mesa-dev] [PATCH] i965: consolidate generation check

key->clamp_vertex_color = ctx->Light._ClampVertexColor; > } > > - /* _NEW_POINT */ > - if (brw->gen < 6 && ctx->Point.PointSprite) { > - key->point_coord_replace = ctx->Point.CoordReplace & 0xff; > - } > - > /* _NEW_TE

Re: [Mesa-dev] [PATCH] i965: don't copy VS attribute work arounds for HSW+

n < 8 && !brw->is_haswell) { > + memcpy(key->gl_attrib_wa_flags, brw->vb.attrib_wa_flags, > + sizeof(brw->vb.attrib_wa_flags)); > + } > } > > void Reviewed-by: Kenneth Graunke signature.asc Description: This is a digitally signed messag

Re: [Mesa-dev] [PATCH mesa] i965/docs: update Intel Linux Graphics URLs

On Wednesday, July 6, 2016 5:09:15 PM PDT Eric Engestrom wrote: > Signed-off-by: Eric Engestrom > --- > docs/developers.html | 2 +- > docs/faq.html| 2 +- > src/mesa/drivers/dri/i965/brw_defines.h | 2 +- > src/mesa/drivers/dri/i965/brw_sf_state.c

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