Re: [Mesa-dev] [PATCH 8/9] r600: work out shader export mask at shader build time

[Roland Scheidegger]

Am 05.02.2018 um 05:29 schrieb Dave Airlie:
> From: Dave Airlie 
> 
> Since enhanced layouts allows setting specific MRT outputs, we
> can get sparse outputs, so we have to calculate the shader
> mask earlier.
> 
> Signed-off-by: Dave Airlie 
> ---
>  src/gallium/drivers/r600/evergreen_state.c   | 3 ++-
>  src/gallium/drivers/r600/r600_pipe.h | 1 +
>  src/gallium/drivers/r600/r600_shader.c   | 3 +++
>  src/gallium/drivers/r600/r600_shader.h   | 3 +++
>  src/gallium/drivers/r600/r600_state.c| 2 +-
>  src/gallium/drivers/r600/r600_state_common.c | 1 +
>  6 files changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/src/gallium/drivers/r600/evergreen_state.c 
> b/src/gallium/drivers/r600/evergreen_state.c
> index 11e473d604..f8042c21c0 100644
> --- a/src/gallium/drivers/r600/evergreen_state.c
> +++ b/src/gallium/drivers/r600/evergreen_state.c
> @@ -2026,7 +2026,7 @@ static void evergreen_emit_cb_misc_state(struct 
> r600_context *rctx, struct r600_
>   struct radeon_winsys_cs *cs = rctx->b.gfx.cs;
>   struct r600_cb_misc_state *a = (struct r600_cb_misc_state*)atom;
>   unsigned fb_colormask = (1ULL << ((unsigned)a->nr_cbufs * 4)) - 1;
> - unsigned ps_colormask = (1ULL << ((unsigned)a->nr_ps_color_outputs * 
> 4)) - 1;
> + unsigned ps_colormask = a->ps_color_export_mask;
>   unsigned rat_colormask = evergreen_construct_rat_mask(rctx, a, 
> a->nr_cbufs);
>   radeon_set_context_reg_seq(cs, R_028238_CB_TARGET_MASK, 2);
>   radeon_emit(cs, (a->blend_colormask & fb_colormask) | rat_colormask); 
> /* R_028238_CB_TARGET_MASK */
> @@ -3373,6 +3373,7 @@ void evergreen_update_ps_state(struct pipe_context 
> *ctx, struct r600_pipe_shader
>   exports_ps = 2;
>   }
>   shader->nr_ps_color_outputs = num_cout;
> + shader->ps_color_export_mask = rshader->ps_color_export_mask;
>   if (ninterp == 0) {
>   ninterp = 1;
>   have_perspective = TRUE;
> diff --git a/src/gallium/drivers/r600/r600_pipe.h 
> b/src/gallium/drivers/r600/r600_pipe.h
> index 0b772b2599..9b94f3654c 100644
> --- a/src/gallium/drivers/r600/r600_pipe.h
> +++ b/src/gallium/drivers/r600/r600_pipe.h
> @@ -153,6 +153,7 @@ struct r600_cb_misc_state {
>   unsigned blend_colormask; /* 8*4 bits for 8 RGBA colorbuffers */
>   unsigned nr_cbufs;
>   unsigned nr_ps_color_outputs;
> + unsigned ps_color_export_mask;
>   unsigned image_rat_enabled_mask;
>   unsigned buffer_rat_enabled_mask;
>   bool multiwrite;
> diff --git a/src/gallium/drivers/r600/r600_shader.c 
> b/src/gallium/drivers/r600/r600_shader.c
> index 893a71b915..9984e783b5 100644
> --- a/src/gallium/drivers/r600/r600_shader.c
> +++ b/src/gallium/drivers/r600/r600_shader.c
> @@ -3875,6 +3875,7 @@ static int r600_shader_from_tgsi(struct r600_context 
> *rctx,
>   output[j].array_base = 
> shader->output[i].sid;
>   output[j].type = 
> V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
>   shader->nr_ps_color_exports++;
> + shader->ps_color_export_mask |= (0xf << 
> (shader->output[i].sid * 4));
>   if (shader->fs_write_all && 
> (rscreen->b.chip_class >= EVERGREEN)) {
>   for (k = 1; k < 
> max_color_exports; k++) {
>   j++;
> @@ -3890,6 +3891,7 @@ static int r600_shader_from_tgsi(struct r600_context 
> *rctx,
>   output[j].op = 
> CF_OP_EXPORT;
>   output[j].type = 
> V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
>   
> shader->nr_ps_color_exports++;
> + 
> shader->ps_color_export_mask |= (0xf << (j * 4));
>   }
>   }
>   } else if (shader->output[i].name == 
> TGSI_SEMANTIC_POSITION) {
> @@ -3978,6 +3980,7 @@ static int r600_shader_from_tgsi(struct r600_context 
> *rctx,
>   output[j].op = CF_OP_EXPORT;
>   j++;
>   shader->nr_ps_color_exports++;
> + shader->ps_color_export_mask = 0xf;
>   }
>  
>   noutput = j;
> diff --git a/src/gallium/drivers/r600/r600_shader.h 
> b/src/gallium/drivers/r600/r600_shader.h
> index da96688e54..7fca3f455e 100644
> --- a/src/gallium/drivers/r600/r600_shader.h
> +++ b/src/gallium/drivers/r600/r600_shader.h
> @@ -84,6 +84,7 @@ struct r600_shader {
>   unsignednr_ps_max_color_exports;
>   /* Real number of ps color exports compiled in the bytecode */
>   unsignednr_ps_color_exports;

[Mesa-dev] [PATCH 8/9] r600: work out shader export mask at shader build time

[Dave Airlie]

From: Dave Airlie 

Since enhanced layouts allows setting specific MRT outputs, we
can get sparse outputs, so we have to calculate the shader
mask earlier.

Signed-off-by: Dave Airlie 
---
 src/gallium/drivers/r600/evergreen_state.c   | 3 ++-
 src/gallium/drivers/r600/r600_pipe.h | 1 +
 src/gallium/drivers/r600/r600_shader.c   | 3 +++
 src/gallium/drivers/r600/r600_shader.h   | 3 +++
 src/gallium/drivers/r600/r600_state.c| 2 +-
 src/gallium/drivers/r600/r600_state_common.c | 1 +
 6 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 11e473d604..f8042c21c0 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2026,7 +2026,7 @@ static void evergreen_emit_cb_misc_state(struct 
r600_context *rctx, struct r600_
struct radeon_winsys_cs *cs = rctx->b.gfx.cs;
struct r600_cb_misc_state *a = (struct r600_cb_misc_state*)atom;
unsigned fb_colormask = (1ULL << ((unsigned)a->nr_cbufs * 4)) - 1;
-   unsigned ps_colormask = (1ULL << ((unsigned)a->nr_ps_color_outputs * 
4)) - 1;
+   unsigned ps_colormask = a->ps_color_export_mask;
unsigned rat_colormask = evergreen_construct_rat_mask(rctx, a, 
a->nr_cbufs);
radeon_set_context_reg_seq(cs, R_028238_CB_TARGET_MASK, 2);
radeon_emit(cs, (a->blend_colormask & fb_colormask) | rat_colormask); 
/* R_028238_CB_TARGET_MASK */
@@ -3373,6 +3373,7 @@ void evergreen_update_ps_state(struct pipe_context *ctx, 
struct r600_pipe_shader
exports_ps = 2;
}
shader->nr_ps_color_outputs = num_cout;
+   shader->ps_color_export_mask = rshader->ps_color_export_mask;
if (ninterp == 0) {
ninterp = 1;
have_perspective = TRUE;
diff --git a/src/gallium/drivers/r600/r600_pipe.h 
b/src/gallium/drivers/r600/r600_pipe.h
index 0b772b2599..9b94f3654c 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -153,6 +153,7 @@ struct r600_cb_misc_state {
unsigned blend_colormask; /* 8*4 bits for 8 RGBA colorbuffers */
unsigned nr_cbufs;
unsigned nr_ps_color_outputs;
+   unsigned ps_color_export_mask;
unsigned image_rat_enabled_mask;
unsigned buffer_rat_enabled_mask;
bool multiwrite;
diff --git a/src/gallium/drivers/r600/r600_shader.c 
b/src/gallium/drivers/r600/r600_shader.c
index 893a71b915..9984e783b5 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -3875,6 +3875,7 @@ static int r600_shader_from_tgsi(struct r600_context 
*rctx,
output[j].array_base = 
shader->output[i].sid;
output[j].type = 
V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
shader->nr_ps_color_exports++;
+   shader->ps_color_export_mask |= (0xf << 
(shader->output[i].sid * 4));
if (shader->fs_write_all && 
(rscreen->b.chip_class >= EVERGREEN)) {
for (k = 1; k < 
max_color_exports; k++) {
j++;
@@ -3890,6 +3891,7 @@ static int r600_shader_from_tgsi(struct r600_context 
*rctx,
output[j].op = 
CF_OP_EXPORT;
output[j].type = 
V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;

shader->nr_ps_color_exports++;
+   
shader->ps_color_export_mask |= (0xf << (j * 4));
}
}
} else if (shader->output[i].name == 
TGSI_SEMANTIC_POSITION) {
@@ -3978,6 +3980,7 @@ static int r600_shader_from_tgsi(struct r600_context 
*rctx,
output[j].op = CF_OP_EXPORT;
j++;
shader->nr_ps_color_exports++;
+   shader->ps_color_export_mask = 0xf;
}
 
noutput = j;
diff --git a/src/gallium/drivers/r600/r600_shader.h 
b/src/gallium/drivers/r600/r600_shader.h
index da96688e54..7fca3f455e 100644
--- a/src/gallium/drivers/r600/r600_shader.h
+++ b/src/gallium/drivers/r600/r600_shader.h
@@ -84,6 +84,7 @@ struct r600_shader {
unsignednr_ps_max_color_exports;
/* Real number of ps color exports compiled in the bytecode */
unsignednr_ps_color_exports;
+   unsignedps_color_export_mask;
/* bit n is set if the shader writes gl_ClipDistance[n] */
unsignedcc_dist_mask;