Re: [Mesa-dev] [PATCH 1/2] intel/fs: Implement GRF bank conflict mitigation pass.

Hi, On 11.12.2017 12:28, Eero Tamminen wrote: Thanks for finally having this handled in Mesa! This patch series, live intervals and "Don't let undefined values prevent copy propagation" commits help performance in following tests: * GfxBench CarChase (2% by live intervals) That was on SKL

Re: [Mesa-dev] [PATCH 1/2] intel/fs: Implement GRF bank conflict mitigation pass.

Hi, Thanks for finally having this handled in Mesa! This patch series, live intervals and "Don't let undefined values prevent copy propagation" commits help performance in following tests: * GfxBench CarChase (2% by live intervals) * GfxBench AztecRuins & Manhattan 3.0 (very marginally) *

Re: [Mesa-dev] [PATCH 1/2] intel/fs: Implement GRF bank conflict mitigation pass.

On Wed, Dec 6, 2017 at 12:38 PM, Francisco Jerez wrote: > This series (which is ready for production and improves the cycle count > of over 46k shaders) has been sitting here for nearly half a year. I'm > planning to self-review it and land it (along with PATCH 3/2 I just

Re: [Mesa-dev] [PATCH 1/2] intel/fs: Implement GRF bank conflict mitigation pass.

On Thu, Jun 22, 2017 at 12:20 PM, Francisco Jerez wrote: > Unnecessary GRF bank conflicts increase the issue time of ternary > instructions (the overwhelmingly most common of which is MAD) by > roughly 50%, leading to reduced ALU throughput. This pass attempts to >

Re: [Mesa-dev] [PATCH 1/2] intel/fs: Implement GRF bank conflict mitigation pass.

This series (which is ready for production and improves the cycle count of over 46k shaders) has been sitting here for nearly half a year. I'm planning to self-review it and land it (along with PATCH 3/2 I just sent to make sure we keep regressions under control) if nobody else does in the next

[Mesa-dev] [PATCH 1/2] intel/fs: Implement GRF bank conflict mitigation pass.

Unnecessary GRF bank conflicts increase the issue time of ternary instructions (the overwhelmingly most common of which is MAD) by roughly 50%, leading to reduced ALU throughput. This pass attempts to minimize the number of bank conflicts by rearranging the layout of the GRF space post-register