[Mesa-dev] [PATCH 3/3] radv: enable conditional discard optimisation on radv.

[Dave Airlie]

From: Dave Airlie 

This fixes a bunch of GPU hangs introduced in some CTS
tests like
dEQP-VK.memory.pipeline_barrier.host_write_uniform_buffer.65536

It works around an issue seen in the LLVM backend, but
also makes the radv code work more like the radeonsi stack.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_pipeline.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 54f59a8..f94436b 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -144,6 +144,7 @@ radv_optimize_nir(struct nir_shader *shader)
 NIR_PASS(progress, shader, nir_opt_algebraic);
 NIR_PASS(progress, shader, nir_opt_constant_folding);
 NIR_PASS(progress, shader, nir_opt_undef);
+NIR_PASS(progress, shader, nir_opt_conditional_discard);
 } while (progress);
 }
 
-- 
2.5.5

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[Mesa-dev] [PATCH 3/3] radv: enable conditional discard optimisation on radv.

[Dave Airlie]

From: Dave Airlie 

This fixes a bunch of GPU hangs introduced in some CTS
tests like
dEQP-VK.memory.pipeline_barrier.host_write_uniform_buffer.65536

It works around an issue seen in the LLVM backend, but
also makes the radv code work more like the radeonsi stack.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_pipeline.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 54f59a8..f94436b 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -144,6 +144,7 @@ radv_optimize_nir(struct nir_shader *shader)
 NIR_PASS(progress, shader, nir_opt_algebraic);
 NIR_PASS(progress, shader, nir_opt_constant_folding);
 NIR_PASS(progress, shader, nir_opt_undef);
+NIR_PASS(progress, shader, nir_opt_conditional_discard);
 } while (progress);
 }
 
-- 
2.7.4

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[Mesa-dev] [PATCH 3/3] radv: enable conditional discard optimisation on radv.

[Dave Airlie]

From: Dave Airlie 

This fixes a bunch of GPU hangs introduced in some CTS
tests like
dEQP-VK.memory.pipeline_barrier.host_write_uniform_buffer.65536

It works around an issue seen in the LLVM backend, but
also makes the radv code work more like the radeonsi stack.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_pipeline.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 54f59a8..f94436b 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -144,6 +144,7 @@ radv_optimize_nir(struct nir_shader *shader)
 NIR_PASS(progress, shader, nir_opt_algebraic);
 NIR_PASS(progress, shader, nir_opt_constant_folding);
 NIR_PASS(progress, shader, nir_opt_undef);
+NIR_PASS(progress, shader, nir_opt_conditional_discard);
 } while (progress);
 }
 
-- 
2.7.4

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