Re: [Mesa-dev] [PATCH v4] glsl: update the extensions that are enabled for 460

On 08/03/2017 07:36 PM, Ilia Mirkin wrote: On Thu, Aug 3, 2017 at 5:24 AM, Samuel Pitoiset wrote: Other ones are either unsupported or don't have any helper function checks. v4: - drop ARB suffix for shader_group_vote/arb_shader_atomic_counter_ops v3: - always add

Re: [Mesa-dev] [PATCH v2 6/6] radeonsi: try to re-use previously deleted bindless descriptor slots

On 08/01/2017 09:54 PM, Marek Olšák wrote: Hi Samuel, Can you move this slot allocator into a util module? It seems generic enough that it could be reused for "handle" and "ID" allocations. Some additional notes: - a bit array of uin32_t would be better. bool is too large (1 byte). - "free"

[Mesa-dev] [PATCH 1/3] glsl: remove unused field from ir_call

--- src/compiler/glsl/ir.h | 5 - 1 file changed, 5 deletions(-) diff --git a/src/compiler/glsl/ir.h b/src/compiler/glsl/ir.h index 40f3338470..d425b97aca 100644 --- a/src/compiler/glsl/ir.h +++ b/src/compiler/glsl/ir.h @@ -1595,32 +1595,30 @@ public: */ class ir_call : public

Re: [Mesa-dev] [PATCH] radv: avoid GPU hangs if someone does a resolve with non-multisample src (v2)

Reviewed-by: Bas Nieuwenhuizen On Fri, Aug 4, 2017 at 4:51 AM, Dave Airlie wrote: > From: Dave Airlie > > This is a bug in the app, but I'd rather avoid hanging the GPU, > esp if someone is running in validation and it takes out

[Mesa-dev] [PATCH 2/3] glsl: clone builtin function constants

f81ede469910d fixed a problem with shaders including IR that was owned by builtins. However the approach of cloning the whole function each time we referenced it lead to a significant reduction in the GLSL IR compiler performance. Everything was already cloned when inlining the function, as far

[Mesa-dev] [PATCH 3/3] glsl: stop cloning builtin fuctions _mesa_glsl_find_builtin_function()

The cloning was introduced in f81ede469910d to fixed a problem with shaders including IR that was owned by builtins. However the approach of cloning the whole function each time we reference a builtin lead to a significant reduction in the GLSL IR compilers performance. The previous patch fixes

Re: [Mesa-dev] [Mesa-stable] [PATCH] radv: Fix decompression on multisampled depth buffers

On 3 August 2017 at 23:44, Bas Nieuwenhuizen wrote: > On Fri, Aug 4, 2017 at 12:26 AM, Marek Olšák wrote: > > Hi Alex, > > > > Which game uses texturing from MSAA depth buffers? > > They don't necessarily have to do that, radv could also be doing some

Re: [Mesa-dev] [PATCH 1/2] mesa: reduce CPU overhead when updating the scissor

On 08/04/2017 12:33 AM, Marek Olšák wrote: Hi Samuel, FLUSH_VERTICES must be called *before* any of the states are changed, not after. My mistake, please ignore this series... Samuel. Marek On Wed, Aug 2, 2017 at 9:42 PM, Samuel Pitoiset wrote: Before:

Re: [Mesa-dev] LLVM build issue on r299777

On Thu, 2017-08-03 at 21:19 +0200, Marek Olšák wrote: > On Thu, Aug 3, 2017 at 7:54 PM, Juan A. Suarez Romero > wrote: > > On Fri, 2017-04-28 at 14:15 +0200, Nicolai Hähnle wrote: > > > On 28.04.2017 13:08, Eric Engestrom wrote: > > > > Hi, > > > > > > > > I'm currently

Re: [Mesa-dev] [PATCH] anv/formats: Allow sampling on depth-only formats on gen7

On Thu, 2017-08-03 at 20:00 -0700, Jason Ekstrand wrote: > We can't sample from depth-stencil formats but on gen7 but we can > sample > from depth-only formats. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102024 > --- Reviewed-by: Juan A. Suarez Romero >

Re: [Mesa-dev] [EGL android: accquire fence implementation 1/2] i965: Return the last fence if the batch buffer is empty and nothing to be flushed when _intel_batchbuffer_flush_fence.

Hi Yogesh, On Fri, Aug 4, 2017 at 7:12 PM, Marathe, Yogesh wrote: > Hi Emil, > >> -Original Message- >> From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf >> Of Emil Velikov >> Sent: Tuesday, July 25, 2017 8:19 PM >> To: Wu, Zhongmin

Re: [Mesa-dev] [PATCH 10/12] egl/drm: remove unreachable code in dri2_drm_create_surface()

On Thursday, 2017-08-03 19:29:36 +0100, Emil Velikov wrote: > From: Emil Velikov > > The function can be called only when the type is EGL_WINDOW_BIT. > Remove the unneeded switch statement. I take it we plan on never supporting pbuffers or pixmaps in platform_drm?

[Mesa-dev] [PATCH 4/7] radeonsi: de-atomize L2 prefetch

From: Marek Olšák I'd like to be able to move the prefetch call site around. --- src/gallium/drivers/radeonsi/si_cp_dma.c| 7 +++ src/gallium/drivers/radeonsi/si_descriptors.c | 2 +- src/gallium/drivers/radeonsi/si_hw_context.c| 2 +-

[Mesa-dev] [PATCH 1/7] gallium/radeon: print all members of radeon_info with R600_DEBUG=info

From: Marek Olšák also set max_alignment on amdgpu. --- src/gallium/drivers/radeon/r600_pipe_common.c | 16 ++-- src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 2 +- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git

[Mesa-dev] [PATCH 7/7] radeonsi: rename shader_userdata -> shader_pointers where appropriate

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_compute.c | 2 +- src/gallium/drivers/radeonsi/si_descriptors.c | 24 src/gallium/drivers/radeonsi/si_pipe.h| 2 +- src/gallium/drivers/radeonsi/si_state.h | 6 +++---

[Mesa-dev] [PATCH 5/7] radeonsi: move flush+prefetch invocation and state emission into separate funcs

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state_draw.c | 97 1 file changed, 57 insertions(+), 40 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index

[Mesa-dev] [PATCH 3/7] radeonsi: align all CE dumps to L2 cache line size

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_descriptors.c | 25 + 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index

[Mesa-dev] [PATCH 2/7] radeonsi: remove a tautology sctx->framebuffer.nr_samples >= 1

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index c9bb108..11dee49 100644 ---

[Mesa-dev] [PATCH 6/7] radeonsi: use optimal packet order when doing a pipeline sync

From: Marek Olšák Process new SET packets in parallel with previous draw calls. This decreases [CP busy / SPI busy] by a very tiny amount (verified with GRBM perf counters), and probably increases FPS by a very tiny amount for apps that do pipeline syncs often. ---

Re: [Mesa-dev] [EGL android: accquire fence implementation 1/2] i965: Return the last fence if the batch buffer is empty and nothing to be flushed when _intel_batchbuffer_flush_fence.

Hi Emil, > -Original Message- > From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On Behalf > Of Emil Velikov > Sent: Tuesday, July 25, 2017 8:19 PM > To: Wu, Zhongmin > Cc: Gao, Shuo ; Antognolli, Rafael >

Re: [Mesa-dev] [PATCH 06/12] egl: add dri2_setup_swap_interval helper

On Thursday, 2017-08-03 19:29:32 +0100, Emil Velikov wrote: > From: Emil Velikov > > The current two implementations - X11 and Wayland were identical, > barrind the upper limit. > > Instead of having same code twice - introduce a helper and pass the > limit as an

Re: [Mesa-dev] [PATCH] gallium/clover: Remove libxmlconfig.la from targets/clover/Makefile.am

Am 04.08.2017 11:08, schrieb Nicolai Hähnle: On 04.08.2017 10:27, Nicolai Hähnle wrote: On 04.08.2017 06:24, Aaron Watry wrote: Gets rid of a bunch of errors like the following: make[4]: Entering directory '/home/me/src/mesa/build/src/gallium/targets/opencl' CXXLDlibOpenCL.la

Re: [Mesa-dev] [PATCH 08/12] egl: handle BAD_NATIVE_WINDOW/PIXMAP further up the stack

On Thursday, 2017-08-03 19:29:34 +0100, Emil Velikov wrote: > From: Emil Velikov > > The basic (null) check is identical across all backends. > Just move it to the top. > > Note that eglCreateWindowSurface* already has a guard in the *Common > helper. Read the code,

Re: [Mesa-dev] [PATCH] loader/dri3: Use dri3_find_back in loader_dri3_swap_buffers_msc

On 08/04/2017 04:47 AM, Michel Dänzer wrote: On 03/08/17 11:25 PM, Thomas Hellstrom wrote: Hi, Michel. Thanks for doing this. No worries, thank you for coming up with the fix in the first place. :) Was there a follow-up st/mesa fix to this. I remember someone posting about a problem about

Re: [Mesa-dev] [PATCH] gallium/clover: Remove libxmlconfig.la from targets/clover/Makefile.am

On 04.08.2017 06:24, Aaron Watry wrote: Gets rid of a bunch of errors like the following: make[4]: Entering directory '/home/me/src/mesa/build/src/gallium/targets/opencl' CXXLDlibOpenCL.la ../../../../src/util/.libs/libxmlconfig.a(libxmlconfig_la-xmlconfig.o): In function

Re: [Mesa-dev] [PATCH 16/23] gallium: introduce device/driver UUID queries

Reviewed-by: Samuel Pitoiset On 08/04/2017 03:54 AM, Timothy Arceri wrote: From: Andres Rodriguez v2: remove unnecessary returns v3 (Timothy Arceri): updated trace v4 (Timothy Arceri): actually dump the params in trace Signed-off-by: Andres

Re: [Mesa-dev] [PATCH] gallium/clover: Remove libxmlconfig.la from targets/clover/Makefile.am

On 04.08.2017 10:27, Nicolai Hähnle wrote: On 04.08.2017 06:24, Aaron Watry wrote: Gets rid of a bunch of errors like the following: make[4]: Entering directory '/home/me/src/mesa/build/src/gallium/targets/opencl' CXXLDlibOpenCL.la

Re: [Mesa-dev] [PATCH 06/23] mesa: hook up memoryobject tex(ture)storage api

On 08/04/2017 11:10 AM, Timothy Arceri wrote: On 04/08/17 18:45, Samuel Pitoiset wrote: On 08/04/2017 03:54 AM, Timothy Arceri wrote: From: Andres Rodriguez V2 (Timothy Arceri): - formating fixes V3 (Timothy): - error check memory == 0 before lookup

Re: [Mesa-dev] [PATCH 02/23] mesa: add support for memory object creation/import/delete

On 08/04/2017 03:54 AM, Timothy Arceri wrote: From: Andres Rodriguez Used by EXT_external_objects and EXT_external_objects_fd V2 (Timothy Arceri): - Throw GL_OUT_OF_MEMORY error if CreateMemoryObjectsEXT() fails. - C99 tidy ups - remove void cast (Constantine

Re: [Mesa-dev] [PATCH 04/23] gallium: introduce memory object

On 08/04/2017 03:54 AM, Timothy Arceri wrote: From: Dave Airlie v2: fix comment regarding fd ownership, define pipe_memory_object v3: remove stray return v4 (Timothy Arceri): update trace v5 (Timothy Arceri): actually dump the params in trace Reviewed-by: Marek Olšák

Re: [Mesa-dev] [PATCH 06/23] mesa: hook up memoryobject tex(ture)storage api

On 08/04/2017 03:54 AM, Timothy Arceri wrote: From: Andres Rodriguez V2 (Timothy Arceri): - formating fixes V3 (Timothy): - error check memory == 0 before lookup Signed-off-by: Andres Rodriguez Reviewed-by: Samuel Pitoiset

Re: [Mesa-dev] [PATCH 13/23] mesa: hook up (Named)BufferStorageMem api

On 08/04/2017 03:54 AM, Timothy Arceri wrote: Include no_error variants as well. v2 (Timothy Arceri): - reduced code churn by squashing some changes into previous commits v3 (Timothy Arceri): - drop unused function declaration v4 (Timothy Arceri): - fix Driver function assert()

Re: [Mesa-dev] [PATCH v4] glsl: update the extensions that are enabled for 460

On 03.08.2017 11:24, Samuel Pitoiset wrote: Other ones are either unsupported or don't have any helper function checks. v4: - drop ARB suffix for shader_group_vote/arb_shader_atomic_counter_ops v3: - always add gl_BaseVertex & co when 460 is enabled v2: - fix ARB_shader_draw_parameters system

Re: [Mesa-dev] [PATCH v2 8/9] anv: Use DRM sync objects for external semaphores when available

Quoting Jason Ekstrand (2017-08-04 02:25:27) > @@ -1497,6 +1569,12 @@ anv_cmd_buffer_execbuf(struct anv_device *device, >setup_empty_execbuf(, device); > } > > + if (execbuf.fence_count > 0) { For sanity, since I just had to check, assert(device->has_syncobj); > +

Re: [Mesa-dev] [PATCH 06/23] mesa: hook up memoryobject tex(ture)storage api

On 04/08/17 18:45, Samuel Pitoiset wrote: On 08/04/2017 03:54 AM, Timothy Arceri wrote: From: Andres Rodriguez V2 (Timothy Arceri): - formating fixes V3 (Timothy): - error check memory == 0 before lookup Signed-off-by: Andres Rodriguez

[Mesa-dev] [PATCH] loader: always include libxmlconfig on autotools build

From: Nicolai Hähnle This aligns with the fact that we also check for EXPAT_LIBS unconditionally in configure.ac now. It should make all the various build permutations of Clover work (whether DRI is enabled or disabled in the build). Cc: Aaron Watry

Re: [Mesa-dev] [PATCH v2 6/6] radeonsi: try to re-use previously deleted bindless descriptor slots

On Fri, Aug 4, 2017 at 10:06 AM, Samuel Pitoiset wrote: > > > On 08/01/2017 09:54 PM, Marek Olšák wrote: >> >> Hi Samuel, >> >> Can you move this slot allocator into a util module? It seems generic >> enough that it could be reused for "handle" and "ID" allocations. >>

Re: [Mesa-dev] [PATCH v2 2/9] anv: Submit a dummy batch when only semaphores are provided.

Quoting Jason Ekstrand (2017-08-04 02:25:21) > Vulkan allows you to do a submit whose only job is to wait on and > trigger semaphores. The easiest way for us to support that right > now is to insert a dummy execbuf. > --- > diff --git a/src/intel/vulkan/anv_device.c

Re: [Mesa-dev] [PATCH 07/23] mesa: hook up memory object multisamples tex(ture)storage api

Reviewed-by: Samuel Pitoiset On 08/04/2017 03:54 AM, Timothy Arceri wrote: From: Andres Rodriguez V2 (Timothy): - error check memory == 0 before lookup Signed-off-by: Andres Rodriguez Reviewed-by: Samuel Pitoiset

Re: [Mesa-dev] [PATCH] i965: Avoids loop for buffer object availability in add_exec_bo

Hi Chris, > -Original Message- > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] > Sent: Tuesday, August 1, 2017 2:35 PM > To: Marathe, Yogesh ; mesa- > d...@lists.freedesktop.org > Cc: Muthukumar, Aravindan > Subject: RE:

Re: [Mesa-dev] [PATCH] radv: avoid GPU hangs if someone does a resolve with non-multisample src (v2)

On 04.08.2017 04:51, Dave Airlie wrote: From: Dave Airlie This is a bug in the app, but I'd rather avoid hanging the GPU, esp if someone is running in validation and it takes out their development environment. v2: get it right, reverse the polarity. Signed-off-by: Dave

Re: [Mesa-dev] [PATCH v2 6/6] radeonsi: try to re-use previously deleted bindless descriptor slots

On 08/04/2017 10:33 AM, Marek Olšák wrote: On Fri, Aug 4, 2017 at 10:06 AM, Samuel Pitoiset wrote: On 08/01/2017 09:54 PM, Marek Olšák wrote: Hi Samuel, Can you move this slot allocator into a util module? It seems generic enough that it could be reused for

Re: [Mesa-dev] [PATCH v2 7/9] anv/allocator: Add a syncobj cache

Quoting Jason Ekstrand (2017-08-04 02:25:26) > This is mostly a copy+paste of the BO cache but it's a bit simpler > because syncobjs don't have actual backing storage so we don't need to > check sizes or anything like that. Also, we put the refcount directly > in anv_syncobj because they will

Re: [Mesa-dev] [PATCH] i965: Avoids loop for buffer object availability in add_exec_bo

Quoting Muthukumar, Aravindan (2017-08-04 09:53:57) > > The tip of https://cgit.freedesktop.org/~ickle/mesa/log/?h=qbo > > i.e. > > https://cgit.freedesktop.org/~ickle/mesa/commit/?h=qbo=b40fa6633bdac9 > > 4cef2fd5f56360dfdb5eeb3738 > > I tested the patch series with mesa demos which seems

Re: [Mesa-dev] [PATCH 13/23] mesa: hook up (Named)BufferStorageMem api

On 04/08/17 18:49, Samuel Pitoiset wrote: On 08/04/2017 03:54 AM, Timothy Arceri wrote: Include no_error variants as well. v2 (Timothy Arceri): - reduced code churn by squashing some changes into previous commits v3 (Timothy Arceri): - drop unused function declaration v4 (Timothy

[Mesa-dev] [Bug 102038] assertion failure in update_framebuffer_size

https://bugs.freedesktop.org/show_bug.cgi?id=102038 --- Comment #2 from Brian Paul --- Hmm, swr isn't working at all for me. It's hanging in a swr_fence_finish() call with everything I've tried. Even glxinfo hangs (but elsewhere). Maybe one of the swr developers can take a

Re: [Mesa-dev] [PATCH 3/8] clover: Add device_clc_version to llvm::[compile|link]_program

On Sun, 2017-07-30 at 20:26 -0500, Aaron Watry wrote: > We'll be using it to select the default language version soon. > > Signed-off-by: Aaron Watry > Cc: Pierre Moreau > Cc: Jan Vesely > > v2: (Pierre) Move changes to

Re: [Mesa-dev] [PATCH] loader: always include libxmlconfig on autotools build

On 4 August 2017 at 10:53, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > This aligns with the fact that we also check for EXPAT_LIBS > unconditionally in configure.ac now. It should make all the > various build permutations of Clover work (whether

Re: [Mesa-dev] [PATCH 0/8 v2] A few clover fixes for both CTS and eventual 1.2 support

Hi, I went through most of the series. I think the approach is OK. The biggest issue I had is with the sequence: 1.) add an interface 2.) implement a feature 3.) change the interface I gave my rb to 1 and 2, but you might want to consider changing them as well, if returning int from the

Re: [Mesa-dev] [PATCH 08/11] i965/miptree: Call alloc_aux in create_for_bo

On 2017-08-02 13:35:33, Jason Ekstrand wrote: > Originally, I had moved it to the caller to make some things easier when > adding the CCS modifier. However, this broke DRI2 because > intel_process_dri2_buffer calls intel_miptree_create_for_bo but never > calls intel_miptree_alloc_aux. Also, in

[Mesa-dev] [PATCH] egl: Clean up native_type vs drawable mess

The next patch is going to stop passing XCB_WINDOW_NONE (of type xcb_window_enum_t) as an argument where these functions expect a void *, which clang does not appreciate. This patch cleans things up to better convince me and reviewers that it's safe to do that. ---

[Mesa-dev] [PATCH 02/25] i965: Move compaction "prepass" into brw_eu_compact.c

--- src/intel/compiler/brw_eu_compact.c | 82 - src/intel/compiler/brw_eu_emit.c| 72 +--- 2 files changed, 82 insertions(+), 72 deletions(-) diff --git a/src/intel/compiler/brw_eu_compact.c

[Mesa-dev] [PATCH 03/25] i965: Silence signed/unsigned comparison warning

--- src/intel/compiler/test_eu_compact.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/compiler/test_eu_compact.cpp b/src/intel/compiler/test_eu_compact.cpp index 39e7f1a27c..1ef7e5ae7f 100644 --- a/src/intel/compiler/test_eu_compact.cpp +++

[Mesa-dev] [PATCH 00/25] i965: Switch to always using logical register types

The mixture of hardware encodings and logical types has caused lots of confusion. It's time to fix that. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 09/25] i965: Reorder brw_reg_type enum values

These vaguely corresponded to the hardware encodings, but that is purely historical at this point. Reorder them so we stop making things "almost work" when mixing enums. The ordering has been closen so that no enum value is the same as a compatible hardware encoding. ---

[Mesa-dev] [PATCH 06/25] i965: Only change type of 0.0f to VF if destination stride == 1

The destination stride must be equivalent to a dword if VF is used. Also, since the only compaction table entires with "i:vf" have the destination as "r:f" specifically check that the destination is of type float. --- src/intel/compiler/brw_eu_compact.c | 3 ++- 1 file changed, 2 insertions(+),

[Mesa-dev] [PATCH 05/25] i965: Remove CONT/BREAK from instruction compaction test

These cannot be compacted. A similar mistake was fixed in commit 90eaf01616a8 --- src/intel/compiler/test_eu_compact.cpp | 4 1 file changed, 4 deletions(-) diff --git a/src/intel/compiler/test_eu_compact.cpp b/src/intel/compiler/test_eu_compact.cpp index 668a972bfa..1532e3b984 100644 ---

[Mesa-dev] [PATCH 08/25] i965: Validate destination restrictions with vector immediates

--- src/intel/compiler/brw_eu_emit.c| 13 +- src/intel/compiler/brw_eu_validate.c| 61 + src/intel/compiler/test_eu_validate.cpp | 79 + 3 files changed, 141 insertions(+), 12 deletions(-) diff --git

[Mesa-dev] [PATCH 04/25] i965: Test instruction compaction on all supported Gens

Note that there's no point in testing on G45, since its compaction is the same as Gen5. Same logic applies to Gen7 variants and low-power parts. --- src/intel/compiler/test_eu_compact.cpp | 50 -- 1 file changed, 42 insertions(+), 8 deletions(-) diff --git

[Mesa-dev] [PATCH 01/25] i965: Mark src inst pointer const in compaction code

--- src/intel/compiler/brw_eu.h | 2 +- src/intel/compiler/brw_eu_compact.c | 23 --- 2 files changed, 13 insertions(+), 12 deletions(-) diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h index a3a9c63239..8e597b212a 100644 ---

[Mesa-dev] [PATCH 1/3] loader: rework xmlconfig dependency

From: Emil Velikov Currently xmlconfig is conditionally used, only when --enable-dri is available. As the library has moved to src/util and has wider wisebase, this guard is no longer correct. Strictly speaking - it wasn't since the introduction of xmlconfig into

[Mesa-dev] [PATCH 2/3] WIP: loader: scons: allow using of xmlconfig on supported platforms

From: Emil Velikov Brings the SCons binaries on par with Autoconf, allowing users to select their GPU via device_id. Signed-off-by: Emil Velikov --- Completely untested. Posting if anyone is interested if polishing it up. ---

Re: [Mesa-dev] [PATCH 4/8] clover/llvm: Use -cl-std and device version to select language defaults

On Sun, 2017-07-30 at 20:26 -0500, Aaron Watry wrote: > According to section 5.8.4.5 of the 2.0 spec, the CL C version is chosen by: > 1) If you have -cl-std=CL1.1+ use the version specified > 2) If not, use the highest 1.x version that the device supports > > Curiously, there is no valid value

Re: [Mesa-dev] [PATCH 8/8] clover/llvm: Make __OPENCL_VERSION__ dynamic

On Sun, 2017-07-30 at 20:26 -0500, Aaron Watry wrote: > Signed-off-by: Aaron Watry > CC: Jan Vesely > > v2: base it on the device version > --- > src/gallium/state_trackers/clover/llvm/invocation.cpp | 3 ++- > 1 file changed, 2 insertions(+), 1

Re: [Mesa-dev] [PATCH 10/12] egl/drm: remove unreachable code in dri2_drm_create_surface()

On 4 August 2017 at 11:03, Eric Engestrom wrote: > On Thursday, 2017-08-03 19:29:36 +0100, Emil Velikov wrote: >> From: Emil Velikov >> >> The function can be called only when the type is EGL_WINDOW_BIT. >> Remove the unneeded switch

[Mesa-dev] [PATCH v3 0/8] anv: Implement VK_KHR_external_semaphore

This series is a quick re-spin of the v2 sent yesterday to address review feedback from Chris. In particular, we now set EXEC_ASYNC on the trivial batch and I deleted the syncobj cache. Somehow, when I was working on this yesterday, I got it into my head that the kernel deduplicates syncobj

[Mesa-dev] [PATCH 17/25] i965: Rename brw_inst's functions that access the register type

Put hw_ in the name so that it's clear these are the hardware encodings. --- src/intel/compiler/brw_disasm.c | 22 src/intel/compiler/brw_eu_compact.c | 22 src/intel/compiler/brw_eu_emit.c| 18 +++ src/intel/compiler/brw_eu_validate.c| 28 +-

[Mesa-dev] [PATCH 18/25] i965: Add functions to abstract access to register types

Previously the brw_inst{,_set}_{dst,src0,src1}_reg_type() functions provided access to the hardware encodings for the register types. We often mixed these with the logical BRW_REGISTER_TYPE_* enums (which themselves used to be the hardware format!) with bad results. With that functionality now

[Mesa-dev] [PATCH 24/25] i965: Mark brw_hw_type_to_reg_type() as a pure function

textdata bss dec hex filename 7816886 346248 420496 8583630 82f9ce i965_dri.so before 7816214 346248 420496 8582958 82f72e i965_dri.so after --- src/intel/compiler/brw_reg_type.h | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 22/25] i965: Stop using hardware register types directly

--- src/intel/compiler/brw_disasm.c | 47 - src/intel/compiler/brw_eu_validate.c | 196 --- src/intel/compiler/brw_reg_type.c| 17 +-- src/intel/compiler/brw_reg_type.h| 11 +- 4 files changed, 113 insertions(+), 158 deletions(-) diff --git

[Mesa-dev] [PATCH 21/25] i965: Add brw_hw_reg_type_to_letters() and use it in brw_disasm.c

--- src/intel/compiler/brw_disasm.c | 72 ++- src/intel/compiler/brw_reg_type.c | 8 + src/intel/compiler/brw_reg_type.h | 4 +++ 3 files changed, 45 insertions(+), 39 deletions(-) diff --git a/src/intel/compiler/brw_disasm.c

[Mesa-dev] [PATCH 19/25] i965: Switch to using the logical register types

--- src/intel/compiler/brw_eu_compact.c | 27 --- src/intel/compiler/brw_eu_emit.c| 13 +++-- 2 files changed, 19 insertions(+), 21 deletions(-) diff --git a/src/intel/compiler/brw_eu_compact.c b/src/intel/compiler/brw_eu_compact.c index

[Mesa-dev] [PATCH 20/25] i965: Move brw_reg_type_letters() as well

And add "to_" to the name for consistency with the other functions in this file. --- src/intel/compiler/brw_eu.c | 28 src/intel/compiler/brw_fs.cpp | 4 ++-- src/intel/compiler/brw_reg.h | 1 - src/intel/compiler/brw_reg_type.c | 30

[Mesa-dev] [PATCH 23/25] i965: Hide the register type hardware encodings

So we stop mixing them with the logical enum. --- src/intel/compiler/brw_eu_defines.h | 31 --- src/intel/compiler/brw_reg_type.c | 31 +++ 2 files changed, 31 insertions(+), 31 deletions(-) diff --git

[Mesa-dev] [PATCH 25/25] i965: Optimize reading the destination type

brw_hw_type_to_reg_type() needs to know only whether the file is BRW_IMMEDIATE_VALUE or not, which is not a valid file for the destination. gcc and clang will evaluate __builtin_strcmp() at compile time, so we can use it to pass a constant file for the destination. textdata bss dec

Re: [Mesa-dev] [PATCH 1/8] clover/device: Move device version into core/device.cpp

On Sun, 2017-07-30 at 20:26 -0500, Aaron Watry wrote: > The device version is the maximum CL version that the device supports. > > Eventually, this will be based on the features/extensions of the actual > device, but for now move it a bit closer to its eventual destination. > > Signed-off-by:

Re: [Mesa-dev] No reloc for i965

On Friday, July 21, 2017 8:36:42 AM PDT Chris Wilson wrote: > Patch reordering from last time so that the cosmetic tweaks are done first > and out of the way. Kenneth has reviewed the core NO_RELOC patches, so > hopefully it doesn't look too bad and we can land at least as far as > there (patch

Re: [Mesa-dev] [PATCH v5 2/2] i965: Queue the buffer with a sync fence for Android OS

On 4 August 2017 at 14:23, Tomasz Figa wrote: > > If this needs so complicated series of checks, maybe it would make > more sense to just set enable_out_fence based on availability of the > capability at initialization time? > Either way is fine with me. >> Did you drop it

[Mesa-dev] [PATCH v3 4/8] anv: Implement support for exporting semaphores as FENCE_FD

--- src/intel/vulkan/anv_batch_chain.c | 57 +-- src/intel/vulkan/anv_device.c | 1 + src/intel/vulkan/anv_gem.c | 36 src/intel/vulkan/anv_private.h | 23 + src/intel/vulkan/anv_queue.c | 69

[Mesa-dev] [PATCH v3 2/8] anv: Submit a dummy batch when only semaphores are provided.

Vulkan allows you to do a submit whose only job is to wait on and trigger semaphores. The easiest way for us to support that right now is to insert a dummy execbuf. --- src/intel/vulkan/anv_batch_chain.c | 28 +--- src/intel/vulkan/anv_device.c | 30

[Mesa-dev] [PATCH v3 1/8] anv: Add a basic implementation of VK_KHX_external_semaphore

This patch adds an implementation based on DRM BOs. We don't actually advertise the extension yet because we want to add a couple more paths first. --- src/intel/vulkan/anv_batch_chain.c | 31 +++- src/intel/vulkan/anv_extensions.py | 3 + src/intel/vulkan/anv_private.h | 3 +

[Mesa-dev] [PATCH v3 7/8] anv: Use DRM sync objects for external semaphores when available

--- src/intel/vulkan/anv_batch_chain.c | 59 +++ src/intel/vulkan/anv_device.c | 1 + src/intel/vulkan/anv_private.h | 8 src/intel/vulkan/anv_queue.c | 83 +++--- 4 files changed, 128 insertions(+), 23 deletions(-)

[Mesa-dev] [PATCH v3 5/8] intel/drm: Pull in the i916 fence array API

--- include/drm-uapi/i915_drm.h | 30 -- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h index c26bf7c..338c8c2 100644 --- a/include/drm-uapi/i915_drm.h +++ b/include/drm-uapi/i915_drm.h @@ -431,6

[Mesa-dev] [PATCH v3 8/8] anv: Advertise VK_KHR_external_semaphore

--- src/intel/vulkan/anv_extensions.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/intel/vulkan/anv_extensions.py b/src/intel/vulkan/anv_extensions.py index 00186bc..3252e0f 100644 --- a/src/intel/vulkan/anv_extensions.py +++ b/src/intel/vulkan/anv_extensions.py

[Mesa-dev] [PATCH v3 6/8] anv/gem: Add a drm syncobj support

--- src/intel/vulkan/anv_gem.c | 52 src/intel/vulkan/anv_gem_stubs.c | 24 +++ src/intel/vulkan/anv_private.h | 4 3 files changed, 80 insertions(+) diff --git a/src/intel/vulkan/anv_gem.c b/src/intel/vulkan/anv_gem.c index

[Mesa-dev] [PATCH v3 3/8] anv/gem: Use EXECBUFFER2_WR when the FENCE_OUT flag is set

Reviewed-by: Chad Versace --- src/intel/vulkan/anv_gem.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_gem.c b/src/intel/vulkan/anv_gem.c index ac47da4..36692f5 100644 --- a/src/intel/vulkan/anv_gem.c +++

Re: [Mesa-dev] [PATCH 2/8] clover: Add device_clc_version to device.[hc]pp

On Sun, 2017-07-30 at 20:26 -0500, Aaron Watry wrote: > device_version and device_clc_version are not necessarily the same for > devices that support CL 1.0, but have a 1.1 compiler and the necessary > extensions. > > CC: Jan Vesey I think you might consider squashing

Re: [Mesa-dev] [PATCH 1/3] loader: rework xmlconfig dependency

On 04.08.2017 20:18, Emil Velikov wrote: From: Emil Velikov Currently xmlconfig is conditionally used, only when --enable-dri is available. As the library has moved to src/util and has wider wisebase, this guard is no longer correct. Strictly speaking - it wasn't

Re: [Mesa-dev] [PATCH 01/11] intel/isl: Stop padding surfaces

Ken and I had a fairly lengthy conversation about this on IRC today: https://people.freedesktop.org/~jekstrand/isl-padding The conclusion was that we both hate the patch but it's probably safe and it does fix bugs. The thing that really wins me over is that we have historically done none of

[Mesa-dev] [PATCH] docs: removed the '--with-sha1' requirement from shading.html

The configuration option --with-sha1 is no longer required for the MESA_SHADER_READ_PATH, MESA_SHADER_DUMP_PATH environment variables to take effect. 1- removed the "--with-sha1" sentence from docs/shading.html 2- added an extra note: that the corresponding dumped and replacement shaders must

[Mesa-dev] [PATCH 3/3] WIP: loader: android: allow using of xmlconfig

From: Emil Velikov Brings the Android binaries on par with Autoconf, allowing users to select their GPU via device_id. Signed-off-by: Emil Velikov --- Completely untested. Posting if anyone is interested if polishing it up. ---

[Mesa-dev] [PATCH 08/12] i965: Pack simple pipelined query objects into the same buffer

Reuse the same query object buffer for multiple queries within the same batch. A task for the future is propagating the GL_NO_MEMORY errors. Signed-off-by: Chris Wilson Cc: Kenneth Graunke Cc: Matt Turner ---

Re: [Mesa-dev] [PATCH 01/11] intel/isl: Stop padding surfaces

Reviewed-by: Jordan Justen On 2017-08-02 13:35:26, Jason Ekstrand wrote: > The docs contain a bunch of commentary about the need to pad various > surfaces out to multiples of something or other. However, all of those > requirements are about avoiding GTT errors due to

[Mesa-dev] [PATCH 07/12] i965: Use 'available' fence for polling query results

If we always write the 'available' flag after writing the final result of the query, we can probe that predicate to quickly query whether the result is ready from userspace. The primary advantage of checking the predicate is that it allows for more fine-grained queries, we do not have to wait for

[Mesa-dev] [PATCH 12/12] i965: Prefer to use the GPU copy if we need to stall for reads

If we need to stall to read the bo, ask the GPU to copy it into the CPU cache whilst we wait. --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] [PATCH 03/12] i965: Replace hard-coded indices with const named variables in gen6_queryobj

To simplify replacement later, replace repeated use of explicit 0/1 with local variables of the same value. Signed-off-by: Chris Wilson Cc: Kenneth Graunke Cc: Matt Turner --- src/mesa/drivers/dri/i965/gen6_queryobj.c | 30

[Mesa-dev] [PATCH 11/12] i965: Use snooping for mapping the miptree

Avoid having to clflush after blitting the miptree to a linear buffer for mapping by enabling snooping on !llc and treating the buffer as coherent. Similarly, it avoids the clflush afterwards if used for READ | WRITE. --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 17 +++-- 1

[Mesa-dev] [PATCH 09/12] i965: Pass consistent args along gen6_queryobj.c

Be consistent in passing along brw_context rather than switching between that and gl_context. Signed-off-by: Chris Wilson --- src/mesa/drivers/dri/i965/gen6_queryobj.c | 32 ++- 1 file changed, 14 insertions(+), 18 deletions(-) diff --git

[Mesa-dev] [PATCH 02/12] i965: Check last known busy status on bo before asking the kernel

If we know the bo is idle (that is we have no submitted a command buffer referencing this bo since the last query) we can skip asking the kernel. Note this may report a false negative if the target is being shared between processes (exported via dmabuf or flink). To allow the caller control over

[Mesa-dev] [PATCH 05/12] i965: Map the query results for the life of the bo

If we map the bo upon creation, we can avoid the latency of mmapping it when querying, and later use the asynchronous, persistent map of the predicate to do a quick query. v2: Inline the wait on results; it disappears shortly in the next few patches. Signed-off-by: Chris Wilson

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