SamplersUsed is 1.
Signed-off-by: Juan A. Suarez Romero
---
src/glsl/nir/glsl_to_nir.cpp | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp
index 57aba5b..5c3fcd1 100644
--- a/src/glsl/nir/glsl_to_nir.cpp
+++
On Fri, 2015-11-06 at 12:21 -0800, Matt Turner wrote:
> On Fri, Nov 6, 2015 at 8:27 AM, Juan A. Suarez Romero
> Looks good to me, and we use _mesa_fls elsewhere to do this same
> calculation.
>
> Reviewed-by: Matt Turner
>
> Jason, was there some reason we weren't do
On Fri, 2015-11-13 at 07:37 -0800, Jason Ekstrand wrote:
> I didn't want to pull a non-inline mesa function into NIR and add a
> link dependency and I was too lazy to move it into util.
But at this moment _mesa_fls() is an inline function. So I guess it is
safe to push it, isn't it?
J.A
Set 3DSTATE_WM/ThreadDispatchEnable bit on/off based on the same
conditions as used in the GL version.
Signed-off-by: Juan A. Suarez Romero
---
src/intel/vulkan/genX_pipeline.c | 49 +---
1 file changed, 26 insertions(+), 23 deletions(-)
diff --git a/src
P-VK.api.image_clearing.clear_color_image.1d_b4g4r4a4_unorm_pack16
- dEQP-VK.api.image_clearing.clear_color_image.2d_b4g4r4a4_unorm_pack16
- dEQP-VK.api.image_clearing.clear_color_image.3d_b4g4r4a4_unorm_pack16
*** BLURB HERE ***
Juan A. Suarez Romero (2):
anv: allow blue in alpha component in swizzle for rend
In pre-Broadwell devices, as B4G4R4A4 is not supported natively, we
workaround it by using a format with a more complex swizzle, that uses
blue in alpha component.
Signed-off-by: Juan A. Suarez Romero
---
src/intel/vulkan/anv_private.h | 14 ++
1 file changed, 10 insertions(+), 4
We are applying several assertions to RENDER_SURFACE_STATE's shader
channels selection to gen>=8 and haswell devices.
But this assertions are not listed in Haswell PRMs.
Signed-off-by: Juan A. Suarez Romero
---
src/intel/isl/isl_surface_state.c | 5 -
1 file changed, 4 insertio
On Wed, 2017-02-08 at 09:27 -0800, Nanley Chery wrote:
> On Wed, Feb 08, 2017 at 01:31:54PM +0100, Juan A. Suarez Romero wrote:
> > In pre-Broadwell devices, as B4G4R4A4 is not supported natively, we
> > workaround it by using a format with a more complex swizzle, that uses
&g
On Wed, 2017-02-08 at 10:53 -0800, Nanley Chery wrote:
> On Wed, Feb 08, 2017 at 06:42:44PM +0100, Juan A. Suarez Romero wrote:
> > On Wed, 2017-02-08 at 09:27 -0800, Nanley Chery wrote:
> > > On Wed, Feb 08, 2017 at 01:31:54PM +0100, Juan A. Suarez Romero wrote:
> > >
ll requires patch from https://lists.freedesktop.org/arc
hives/mesa-dev/2017-February/143480.html
There's a small typo also in a comment.
Other than that, it is:
Reviewed-by: Juan A. Suarez Romero .
BTW, I've also sent a couple of patches to fix these tests:
https://lists.freedesktop.org/
Reviewed-by: Juan A. Suarez Romero
On Thu, 2017-02-09 at 14:37 -0800, Jason Ekstrand wrote:
> It's trivial to swizzle clear colors on the CPU, easily deals with the
> hardware restrictions for render target swizzles, and makes swizzled
> clears work on all hardware as oppos
e_layer, layer_count,
> 0, 0, level_width, level_height,
> vk_to_isl_color(*pColor), color_write_disable);
Great! With this patch, now we don't require my patch.
Reviewed-by: Juan A. Suarez Romero
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On Thu, 2017-02-09 at 15:56 -0800, Francisco Jerez wrote:
> Samuel Iglesias Gonsálvez writes:
>
> > From: "Juan A. Suarez Romero"
> >
> > Take in account the offset value when getting the var from register.
> >
> > This is required when dea
-VK.pipeline.multisample.sampled_image.79x31_4.r16g16_sint.samples_8
dEQP-VK.pipeline.multisample.sampled_image.79x31_4.r32g32b32a32_sfloat.samples_4
dEQP-VK.pipeline.multisample.sampled_image.79x31_4.r32g32b32a32_sfloat.samples_8
Signed-off-by: Juan A. Suarez Romero
---
src/intel/vulkan/anv_device.c | 4 ++--
src/intel/vulkan
On Wed, 2017-02-15 at 10:24 -0800, Jason Ekstrand wrote:
> On Wed, Feb 15, 2017 at 10:09 AM, Juan A. Suarez Romero
> wrote:
> > According to Ivybridge PRM, Volume 4 Part 1 p73, signed integer formats
> >
> > cannot be multisampled.
> >
> >
> >
>
On Thu, 2017-02-16 at 12:37 +0100, Juan A. Suarez Romero wrote:
> On Wed, 2017-02-15 at 10:24 -0800, Jason Ekstrand wrote:
> > On Wed, Feb 15, 2017 at 10:09 AM, Juan A. Suarez Romero
> > wrote:
> > > According to Ivybridge PRM, Volume 4 Part 1 p73, signed integer format
and 4x multisampling
(Jason)
- Add SINT restriction in isl_format_supports_multisampling() (Jason)
Signed-off-by: Juan A. Suarez Romero
---
src/intel/isl/isl_format.c | 22 +-
src/intel/vulkan/anv_formats.c | 4 +++-
2 files changed, 24 insertions(+), 2 deletions
Current Anv allocator assign memory in terms of a fixed block size.
But there can be cases where this block is not enough for a memory
request, and thus several blocks must be assigned in a row.
This commit adds support for specifying how many blocks of memory must
be assigned.
This fixes a numb
On Fri, 2016-07-29 at 12:59 -0700, Francisco Jerez wrote:
> | for (unsigned i = 0; i < 2 * inst->regs_written; i++)
> {
> | for (int c = 0; c < 4; c++)
> | result_live[c] |= BITSET_TEST(
> | live, var_from_reg(alloc, inst->ds
On Mon, 2016-08-08 at 16:12 +0200, Juan A. Suarez Romero wrote:
> Hmm... what about the case of exec_size == 4 and writing just a
> float?
>
> I understand in this case we only should mark one word, so the loop
> should not be 2*inst->regs_written.
>
> Note that in the
When checking if a type contains doubles, integers, samples, etc. we
check if the current type is a record or array, but not if it is an
interface.
This commit also inspects if the type is an interface.
It fixes
spec/arb_enhanced_layouts/compiler/transform-feedback-layout-qualifiers/xfb_offset/i
When checking if a type contains doubles, integers, samples, etc. we
check if the current type is a record or array, but not if it is an
interface.
This commit also inspects if the type is an interface.
It fixes
spec/arb_enhanced_layouts/compiler/transform-feedback-layout-qualifiers/xfb_offset/i
Ignore source file, line number and column in glcpp_error() and
glcpp_warning() if those are not available.
It fixes 4 piglit tests:
spec/glsl-1.10/compiler/version-0.frag: crash pass
spec/glsl-1.10/compiler/version-0.vert: crash pass
spec/glsl-es-3.00/compiler/version-0.frag: crash pass
s
On Wed, 2016-10-26 at 19:32 +1100, Timothy Arceri wrote:
> Please use braces with if when there is on more than a single line in
> the then/else blocks.
>
OK.
> Also there seems to be tabs in here please remove them when adding
> new
> code :)
Hmm... all the code in this file is using tabs. But
Ignore source file, line number and column in glcpp_error() and
glcpp_warning() if those are not available.
It fixes 4 piglit tests:
spec/glsl-1.10/compiler/version-0.frag: crash pass
spec/glsl-1.10/compiler/version-0.vert: crash pass
spec/glsl-es-3.00/compiler/version-0.frag: crash pass
s
On Wed, 2016-10-26 at 13:42 +0200, Juan A. Suarez Romero wrote:
> Ignore source file, line number and column in glcpp_error() and
> glcpp_warning() if those are not available.
>
> It fixes 4 piglit tests:
> spec/glsl-1.10/compiler/version-0.frag: crash pass
> spec/glsl-1.10/
On Thu, 2016-11-03 at 11:40 +0200, Tapani Pälli wrote:
> commit cc6aa1d161280f10ded7834d1ec2413bc97589fe changed to using
> rzalloc
> for gl_program creation but one instance for program creation was
> still
> using calloc.
>
> Signed-off-by: Tapani Pälli
> ---
> src/mesa/drivers/dri/i965/brw_pr
The GL 4.5 spec says:
"If any enabled array’s buffer binding is zero when DrawArrays
or one of the other drawing commands defined in section 10.4 is
called, the result is undefined."
This commits avoids crashing the code, which is not a very good
"undefined result".
This fixes spec/!o
On Thu, 2016-11-03 at 12:23 -0700, Ian Romanick wrote:
> I'm also a little curious how we get to this point with locp being
> NULL.
> Some commentary about that should at least go in the commit message.
So here is the reason.
Mesa initializes parser->version as 0. When finalizes parsing the
sh
Shader can define #version as an integer, including 0.
Initializes version to -1 to know later if shader has defined a #version
or not.
It fixes 4 piglit tests:
spec/glsl-1.10/compiler/version-0.frag: crash pass
spec/glsl-1.10/compiler/version-0.vert: crash pass
spec/glsl-es-3.00/compiler/v
On Fri, 2016-11-04 at 14:09 +, Eric Engestrom wrote:
> On Friday, 2016-11-04 13:22:07 +0100, Juan A. Suarez Romero wrote:
> >
> > Shader can define #version as an integer, including 0.
> >
> > Initializes version to -1 to know later if shader has define
On Fri, 2016-11-04 at 16:57 +0100, Karol Herbst wrote:
> for reference the bug I've created for this:
> https://bugs.freedesktop.org/show_bug.cgi?id=97420
>
>
I'll tag the commit with this bug.
J.A.
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On Sat, 2016-11-05 at 10:48 +0100, Karol Herbst wrote:
> 2016-11-05 2:50 GMT+01:00 Ian Romanick :
> > (Sorry about the top post. Sent from my phone.)
> >
> > That expression will allow versions like 0130 as valid. If you
> just want to
> > allow 0, you need a more complex regular expression. I fe
On Sat, 2016-11-05 at 10:48 +0100, Karol Herbst wrote:
> "#version 0512": 0:1(10): error: GLSL 3.30 is not supported.
> Supported
> versions are: 1.10, 1.20, 1.30, 1.00 ES, and 3.00 ES
>
> so the issue with this would be, that "0512" is parsed as 3.30, which
> isn't right either, but the current m
On Tue, 2016-11-08 at 14:19 +0100, Karol Herbst wrote:
> well I don't care either way, maybe the spec does say anything about
> it.
I was re-reading GLSL 1.10 spec about #version directive.
#version follows the same convention as __VERSION__
For __VERSION___, spec says "will substitute a decimal
Do not evaluate spill costs for registers that were already marked as
no_spill.
---
src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_
On Sun, 2016-11-13 at 23:00 -0800, Kenneth Graunke wrote:
> On Friday, November 11, 2016 9:41:11 AM PST Juan A. Suarez Romero
> wrote:
> >
> > Do not evaluate spill costs for registers that were already marked
> > as
> > no_spill.
> > ---
> > src/mesa/
Fixes warning.
---
src/intel/vulkan/genX_pipeline.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index cb164ad..ada7985 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@
Fixes defined but not used warning.
---
src/intel/vulkan/genX_pipeline.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index ada7985..991fbf6 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeli
I'm sending several unrelated patches that fix different warnings when building
Mesa.
Juan A. Suarez Romero (5):
anv/pipeline: do not discard 'const' modifier
anv/pipeline: define is_dual_src_blend_factor() for gen <= 8
st/va: remove unsed variable
ttn: handle GLSL_SAMP
Fixes a warning.
---
src/gallium/auxiliary/nir/tgsi_to_nir.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c
b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index 3f05acd..e90684f 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliar
And declare coded_buf in vlVaContext as "vlVaBuffer *" instead of
"struct vlVaBuffer *".
This fixes several warnings later about assignment from incompatible
pointer type.
---
src/gallium/state_trackers/va/va_private.h | 30 +++---
1 file changed, 15 insertions(+), 15 dele
pbuff is defined but not used.
---
src/gallium/state_trackers/va/surface.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/gallium/state_trackers/va/surface.c
b/src/gallium/state_trackers/va/surface.c
index f8513d9..357e85e 100644
--- a/src/gallium/state_trackers/va/surface.c
+++ b/src/gal
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 34968a4..c28d425 100644
--- a/src/c
J.A.
[0] https://github.com/KhronosGroup/Vulkan-CTS
Juan A. Suarez Romero (2):
anv/pipeline: get map for double input attributes
anv/nir: add support for dvec3/4 consuming two locations
Samuel Iglesias Gonsálvez (20):
spirv: fix typo in spec_constant_decoration_cb()
spirv: add def
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index e5ec868..dadf7fc 100644
---
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index c28d425..e5ec868 100644
--- a/src
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index dadf7fc..8569
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 02dbceb..3bc23d3 100644
-
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 8569bc8..9751679
From: Samuel Iglesias Gonsálvez
We need to pick two 32-bit values per component to perform the right shuffle
operation.
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 25 +
1 file changed, 21 insertions(+), 4 deletions(-)
diff --git a
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/vtn_variables.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/spirv/vtn_variables.c
b/src/compiler/spirv/vtn_variables.c
index 14366dc..407f449 100644
--- a/src/compiler/spirv/vtn
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/vtn_variables.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/spirv/vtn_variables.c
b/src/compiler/spirv/vtn_variables.c
index 407f449..c02698b 100644
--- a/src/compiler/spirv/vtn
From: Samuel Iglesias Gonsálvez
SPIR-V does not have special opcodes for DF conversions. We need to identify
them by checking the bit size of the operand and the result.
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 29 ++---
src/compi
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 3bc23d3..a13f72a 100644
--- a/src/compiler/spirv/spirv_
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/vtn_variables.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/spirv/vtn_variables.c
b/src/compiler/spirv/vtn_variables.c
index c02698b..8b01da3 100644
--- a/src/compiler/spirv/vtn
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/vtn_glsl450.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/compiler/spirv/vtn_glsl450.c b/src/compiler/spirv/vtn_glsl450.c
index cb0570d..01df1dd 100644
--- a/src/compiler/spirv/vtn_glsl
---
src/intel/vulkan/anv_pipeline.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 27217b9..7c26cce 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -476,6 +476,7 @@ anv_pipeline_compi
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/amd/vulkan/radv_pipeline.c| 5 +++-
src/compiler/spirv/nir_spirv.h| 5 +++-
src/compiler/spirv/spirv_to_nir.c | 54 ++-
src/intel/vulkan/anv_pipeline.c | 5 +++-
4 f
From: Samuel Iglesias Gonsálvez
We use *64*_PASSTHRU formats to upload vertex attributes of 64 bits
to avoid conversions. From the BDW PRM, Volume 2d, page 586
(VERTEX_ELEMENT_STATE):
"When SourceElementFormat is set to one of the *64*_PASSTHRU
formats, 64-bit components are stored in
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/nir/nir.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 3e6d168..1679d89 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 1 +
src/compiler/spirv/vtn_private.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 82d81aa..70e
One difference between OpenGL and Vulkan regarding 64-bit vertex
attribute types is that dvec3 and dvec4 consumes just one location in
OpenGL, while in Vulkan it consumes two locations.
Thus, in OpenGL for each dvec3/dvec4 vertex attrib we mark just one bit
in our internal inputs_read bitmap (and
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 70e45c1..ae35e83 100644
--- a/sr
From: Samuel Iglesias Gonsálvez
Currently, gen8+ supports ARB_gpu_shader_fp64 in mesa master.
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/mesa/drivers/dri/i965/brw_compiler.c | 53 +---
1 file changed, 29 insertions(+), 24 deletions(-)
diff --git a/src/mesa/dr
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/intel/vulkan/anv_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 725848f..9f53fc9 100644
--- a/src/intel/vulkan/anv_d
On Thu, 2016-12-01 at 21:29 +0100, Marek Olšák wrote:
> On Wed, Nov 30, 2016 at 9:23 PM, Emil Velikov om> wrote:
> > Hi all,
> >
> > With holidays not far off, it might be a nice idea to consider the
> > branchpoint/release schedule for the next release.
> >
> > I will be having limited internet
On Thu, 2016-11-03 at 11:02 +0100, Juan A. Suarez Romero wrote:
> The GL 4.5 spec says:
> "If any enabled array’s buffer binding is zero when DrawArrays
> or one of the other drawing commands defined in section 10.4 is
> called, the result is undefined."
&g
On Thu, 2016-11-24 at 13:36 +0100, Juan A. Suarez Romero wrote:
> pbuff is defined but not used.
> ---
> src/gallium/state_trackers/va/surface.c | 1 -
> 1 file changed, 1 deletion(-)
>
>
Gently ping someone to review it.
J.A.
__
f
> > building a remap table or a creative use of popcount.
> >
As you said in another email, I also think it would be more easy to
just mark 2 bits per dvec3/dvec4 in inputs_read and change the GL
driver accordingly, than the other way around, as it is done in TGSI.
> >
branch with the following
command:
$ git clone -b spirv-to-nir-rc2 https://github.com/Igalia/mesa.github
Thanks,
J.A.
Juan A. Suarez Romero (2):
anv/pipeline: get map for double input attributes
nir/i965: use two slots from inputs_read for dvec3/dvec4 vertex input
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index f60c6e6..76faf27 100644
--- a/src/c
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 76faf27..5b16d50 100644
--- a/src
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index c162964..3fa1d8e 100644
--- a/s
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 5b16d50..c162964 100644
---
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 5126dc9..60cc988 100644
-
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/vtn_variables.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/spirv/vtn_variables.c
b/src/compiler/spirv/vtn_variables.c
index be64dd9..d125096 100644
--- a/src/compiler/spirv/vtn
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/vtn_variables.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/spirv/vtn_variables.c
b/src/compiler/spirv/vtn_variables.c
index fbfa4e6..bd93083 100644
--- a/src/compiler/spirv/vtn
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 60cc988..d8553c0 100644
--- a/src/compiler/spirv/spirv_
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/vtn_variables.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/spirv/vtn_variables.c
b/src/compiler/spirv/vtn_variables.c
index d125096..fbfa4e6 100644
--- a/src/compiler/spirv/vtn
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/nir_types.cpp | 15 +++
src/compiler/nir_types.h | 2 ++
2 files changed, 17 insertions(+)
diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp
index cc90efd..ea3bcb8 100644
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/nir/nir.h | 19 +++
1 file changed, 19 insertions(+)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 544d4ba..9310dab 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compi
From: Samuel Iglesias Gonsálvez
This function returns the nir_op corresponding to the conversion between
the given nir_alu_type arguments.
This function lacks support for integer-based types with bit_size != 32
and for float16 conversion ops.
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/c
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/vtn_glsl450.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/compiler/spirv/vtn_glsl450.c b/src/compiler/spirv/vtn_glsl450.c
index cb0570d..01df1dd 100644
--- a/src/compiler/spirv/vtn_glsl
From: Samuel Iglesias Gonsálvez
SPIR-V does not have special opcodes for DF conversions. We need to identify
them by checking the bit size of the operand and the result.
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 4 +++-
src/compiler/spirv/vtn_alu.c
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/amd/vulkan/radv_pipeline.c| 5 +++-
src/compiler/spirv/nir_spirv.h| 5 +++-
src/compiler/spirv/spirv_to_nir.c | 51 +++
src/intel/vulkan/anv_pipeline.c | 5 +++-
4 f
---
src/intel/vulkan/anv_pipeline.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 30ac19a..6a141b6 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -489,6 +489,7 @@ anv_pipeline_compi
From: Samuel Iglesias Gonsálvez
We use *64*_PASSTHRU formats to upload vertex attributes of 64 bits
to avoid conversions. From the BDW PRM, Volume 2d, page 586
(VERTEX_ELEMENT_STATE):
"When SourceElementFormat is set to one of the *64*_PASSTHRU
formats, 64-bit components are stored in
So far, input_reads was a bitmap tracking which vertex input locations
were being used.
In OpenGL, an attribute bigger than a vec4 (like a dvec3 or dvec4)
consumes just one location, any other small attribute. So we mark the
proper bit in inputs_read, and also the same bit in double_inputs_read
if
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/nir/nir.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 9f3abb7..c369db3 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@
From: Samuel Iglesias Gonsálvez
Currently, gen8+ supports ARB_gpu_shader_fp64 in mesa master.
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/mesa/drivers/dri/i965/brw_compiler.c | 36 +---
1 file changed, 24 insertions(+), 12 deletions(-)
diff --git a/src/mesa/dr
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/intel/vulkan/anv_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index d594df7..eb2368a 100644
--- a/src/intel/vulkan/anv_d
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 11f6248..f4bf3b4 100644
--- a/sr
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 1 +
src/compiler/spirv/vtn_private.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 380fbae..11f
From: Samuel Iglesias Gonsálvez
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 3fa1d8e..5303a94 100644
--
From: Samuel Iglesias Gonsálvez
We need to pick two 32-bit values per component to perform the right shuffle
operation.
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 25 +
1 file changed, 21 insertions(+), 4 deletions(-)
diff --git a
On Mon, 2016-12-19 at 13:58 -0800, Francisco Jerez wrote:
> Iago Toral Quiroga writes:
>
> > From: "Juan A. Suarez Romero"
> >
> > Our current data flow analysis does not take into account that
> > channels
> > on 64-bit operands are 64-bit. This
Gently pinging if someone could do a quick review.
Thanks in advance!
J.A.
On Thu, 2016-11-24 at 13:36 +0100, Juan A. Suarez Romero wrote:
> Fixes a warning.
> ---
> src/gallium/auxiliary/nir/tgsi_to_nir.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src
On Fri, 2016-07-29 at 12:59 -0700, Francisco Jerez wrote:
> Iago Toral Quiroga writes:
>
> >
> > From: "Juan A. Suarez Romero"
> >
> > Our current data flow analysis does not take into account that
> > channels
> > on 64-bit operands are
On Mon, 2019-01-07 at 19:04 +0200, Andres Gomez wrote:
> As suggested by Emil Velikov.
>
> Cc: Dylan Baker
> Cc: Juan A. Suarez
> Cc: Emil Velikov
> Signed-off-by: Andres Gomez
> ---
> docs/release-calendar.html | 10 ++
> docs/releasing.html| 14 --
> 2 files chan
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