Re: [Mesa-dev] [PATCH 07/18] ac: add store_tcs_outputs() to the abi
On 11.12.2017 03:43, Timothy Arceri wrote:
---
src/amd/common/ac_nir_to_llvm.c | 63 +
src/amd/common/ac_shader_abi.h | 12
2 files changed, 51 insertions(+), 24 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 3869161967d..ad2c2336ee8 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2759,79 +2759,78 @@ load_tcs_output(struct nir_to_llvm_context *ctx,
value[i] = ac_lds_load(&ctx->ac, dw_addr);
dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
ctx->ac.i32_1, "");
}
result = ac_build_varying_gather_values(&ctx->ac, value,
instr->num_components, comp);
result = LLVMBuildBitCast(ctx->builder, result, get_def_type(ctx->nir,
&instr->dest.ssa), "");
return result;
}
static void
-store_tcs_output(struct nir_to_llvm_context *ctx,
-nir_intrinsic_instr *instr,
+store_tcs_output(struct ac_shader_abi *abi,
+LLVMValueRef vertex_index,
+LLVMValueRef param_index,
+unsigned const_index,
+unsigned location,
+unsigned driver_location,
LLVMValueRef src,
+unsigned component,
+bool is_patch,
+bool is_compact,
unsigned writemask)
{
+ struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
LLVMValueRef dw_addr;
LLVMValueRef stride = NULL;
LLVMValueRef buf_addr = NULL;
- LLVMValueRef vertex_index = NULL;
- LLVMValueRef indir_index = NULL;
- unsigned const_index = 0;
unsigned param;
- const unsigned comp = instr->variables[0]->var->data.location_frac;
- const bool per_vertex = nir_is_per_vertex_io(instr->variables[0]->var,
ctx->stage);
- const bool is_compact = instr->variables[0]->var->data.compact;
bool store_lds = true;
- if (instr->variables[0]->var->data.patch) {
- if (!(ctx->tcs_patch_outputs_read & (1U <<
instr->variables[0]->var->data.location)))
+ if (is_patch) {
+ if (!(ctx->tcs_patch_outputs_read & (1U << location)))
store_lds = false;
} else {
- if (!(ctx->tcs_outputs_read & (1ULL <<
instr->variables[0]->var->data.location)))
+ if (!(ctx->tcs_outputs_read & (1ULL << location)))
store_lds = false;
}
- get_deref_offset(ctx->nir, instr->variables[0],
-false, NULL, per_vertex ? &vertex_index : NULL,
-&const_index, &indir_index);
- param = shader_io_get_unique_index(instr->variables[0]->var->data.location);
- if (instr->variables[0]->var->data.location == VARYING_SLOT_CLIP_DIST0
&&
+ param = shader_io_get_unique_index(location);
+ if (location == VARYING_SLOT_CLIP_DIST0 &&
is_compact && const_index > 3) {
const_index -= 3;
Same question here as on patch #3 for load_tes_inputs -- why -= 3
instead of -= 4? I suppose at least it's consistent? :)
Cheers,
Nicolai
param++;
}
- if (!instr->variables[0]->var->data.patch) {
+ if (!is_patch) {
stride = unpack_param(&ctx->ac, ctx->tcs_out_layout, 13, 8);
dw_addr = get_tcs_out_current_patch_offset(ctx);
} else {
dw_addr = get_tcs_out_current_patch_data_offset(ctx);
}
- mark_tess_output(ctx, instr->variables[0]->var->data.patch, param);
+ mark_tess_output(ctx, is_patch, param);
dw_addr = get_dw_address(ctx, dw_addr, param, const_index, is_compact, vertex_index, stride,
-indir_index);
+param_index);
buf_addr = get_tcs_tes_buffer_address_params(ctx, param, const_index,
is_compact,
-vertex_index, indir_index);
+vertex_index, param_index);
bool is_tess_factor = false;
- if (instr->variables[0]->var->data.location ==
VARYING_SLOT_TESS_LEVEL_INNER ||
- instr->variables[0]->var->data.location ==
VARYING_SLOT_TESS_LEVEL_OUTER)
+ if (location == VARYING_SLOT_TESS_LEVEL_INNER ||
+ location == VARYING_SLOT_TESS_LEVEL_OUTER)
is_tess_factor = true;
unsigned base = is_compact ? const_index : 0;
for (unsigned chan = 0; chan < 8; chan++) {
if (!(writemask & (1 << chan)))
continue;
- LLVMValueRef value = llvm_extract_elem(&ctx->ac, src, chan -
comp);
+ LLVMValueRef value = llvm_extract_elem(&ctx->ac, src, chan -
component);
if (store_lds || is_tess_factor)
ac_lds_store(&ctx->ac, dw_addr,
[Mesa-dev] [PATCH 07/18] ac: add store_tcs_outputs() to the abi
---
src/amd/common/ac_nir_to_llvm.c | 63 +
src/amd/common/ac_shader_abi.h | 12
2 files changed, 51 insertions(+), 24 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 3869161967d..ad2c2336ee8 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2759,79 +2759,78 @@ load_tcs_output(struct nir_to_llvm_context *ctx,
value[i] = ac_lds_load(&ctx->ac, dw_addr);
dw_addr = LLVMBuildAdd(ctx->builder, dw_addr,
ctx->ac.i32_1, "");
}
result = ac_build_varying_gather_values(&ctx->ac, value,
instr->num_components, comp);
result = LLVMBuildBitCast(ctx->builder, result, get_def_type(ctx->nir,
&instr->dest.ssa), "");
return result;
}
static void
-store_tcs_output(struct nir_to_llvm_context *ctx,
-nir_intrinsic_instr *instr,
+store_tcs_output(struct ac_shader_abi *abi,
+LLVMValueRef vertex_index,
+LLVMValueRef param_index,
+unsigned const_index,
+unsigned location,
+unsigned driver_location,
LLVMValueRef src,
+unsigned component,
+bool is_patch,
+bool is_compact,
unsigned writemask)
{
+ struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
LLVMValueRef dw_addr;
LLVMValueRef stride = NULL;
LLVMValueRef buf_addr = NULL;
- LLVMValueRef vertex_index = NULL;
- LLVMValueRef indir_index = NULL;
- unsigned const_index = 0;
unsigned param;
- const unsigned comp = instr->variables[0]->var->data.location_frac;
- const bool per_vertex = nir_is_per_vertex_io(instr->variables[0]->var,
ctx->stage);
- const bool is_compact = instr->variables[0]->var->data.compact;
bool store_lds = true;
- if (instr->variables[0]->var->data.patch) {
- if (!(ctx->tcs_patch_outputs_read & (1U <<
instr->variables[0]->var->data.location)))
+ if (is_patch) {
+ if (!(ctx->tcs_patch_outputs_read & (1U << location)))
store_lds = false;
} else {
- if (!(ctx->tcs_outputs_read & (1ULL <<
instr->variables[0]->var->data.location)))
+ if (!(ctx->tcs_outputs_read & (1ULL << location)))
store_lds = false;
}
- get_deref_offset(ctx->nir, instr->variables[0],
-false, NULL, per_vertex ? &vertex_index : NULL,
-&const_index, &indir_index);
- param =
shader_io_get_unique_index(instr->variables[0]->var->data.location);
- if (instr->variables[0]->var->data.location == VARYING_SLOT_CLIP_DIST0
&&
+ param = shader_io_get_unique_index(location);
+ if (location == VARYING_SLOT_CLIP_DIST0 &&
is_compact && const_index > 3) {
const_index -= 3;
param++;
}
- if (!instr->variables[0]->var->data.patch) {
+ if (!is_patch) {
stride = unpack_param(&ctx->ac, ctx->tcs_out_layout, 13, 8);
dw_addr = get_tcs_out_current_patch_offset(ctx);
} else {
dw_addr = get_tcs_out_current_patch_data_offset(ctx);
}
- mark_tess_output(ctx, instr->variables[0]->var->data.patch, param);
+ mark_tess_output(ctx, is_patch, param);
dw_addr = get_dw_address(ctx, dw_addr, param, const_index, is_compact,
vertex_index, stride,
-indir_index);
+param_index);
buf_addr = get_tcs_tes_buffer_address_params(ctx, param, const_index,
is_compact,
-vertex_index, indir_index);
+vertex_index, param_index);
bool is_tess_factor = false;
- if (instr->variables[0]->var->data.location ==
VARYING_SLOT_TESS_LEVEL_INNER ||
- instr->variables[0]->var->data.location ==
VARYING_SLOT_TESS_LEVEL_OUTER)
+ if (location == VARYING_SLOT_TESS_LEVEL_INNER ||
+ location == VARYING_SLOT_TESS_LEVEL_OUTER)
is_tess_factor = true;
unsigned base = is_compact ? const_index : 0;
for (unsigned chan = 0; chan < 8; chan++) {
if (!(writemask & (1 << chan)))
continue;
- LLVMValueRef value = llvm_extract_elem(&ctx->ac, src, chan -
comp);
+ LLVMValueRef value = llvm_extract_elem(&ctx->ac, src, chan -
component);
if (store_lds || is_tess_factor)
ac_lds_store(&ctx->ac, dw_addr, value);
if (!is_tess_factor && writemask != 0xF)
ac_build_buffer_store_dword(&ctx->ac,
ctx->hs_ring_tess_offchip, value
