Re: Intel i210AT NICs
Some other things to think about when comparing to the intel code in FreeBSD/Linux: igb_read_phy_reg_gs40g/igb_write_phy_reg_gs40g clearing of GS40G_CS_POWER_DOW to power up phy i210 specific part of igb_has_link() igb_acquire_swfw_sync_i210/igb_release_swfw_sync_i210 igb_init_nvm_params_i210/igb_get_flash_presence_i210 etc The phy seems to be a marvell one instead of the intel? one used in the 82580/i350, ie compare the callbacks case I82580_I_PHY_ID: case I350_I_PHY_ID: phy->type = e1000_phy_82580; phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_82580; phy->ops.get_cable_length = igb_get_cable_length_82580; phy->ops.get_phy_info = igb_get_phy_info_82580; phy->ops.set_d0_lplu_state = igb_set_d0_lplu_state_82580; phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580; break; case I210_I_PHY_ID: phy->type = e1000_phy_i210; phy->ops.check_polarity = igb_check_polarity_m88; phy->ops.get_phy_info = igb_get_phy_info_m88; phy->ops.get_cable_length = igb_get_cable_length_m88_gen2; phy->ops.set_d0_lplu_state = igb_set_d0_lplu_state_82580; phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580; phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88; A new phy type should be added rather than using em_phy_82580. And if you want to look at offloading with the legacy descriptor format on the 75+ server adapters it seems the first descriptor has to be used rather than the last. See http://mail-index.netbsd.org/source-changes/2012/08/29/msg036938.html for a writeup.
Re: Intel i210AT NICs
Thanks Brad, here is an updated version:
Index: if_em.c
===
RCS file: /cvs/src/sys/dev/pci/if_em.c,v
retrieving revision 1.275
diff -u -p -r1.275 if_em.c
--- if_em.c 28 Dec 2013 03:34:54 - 1.275
+++ if_em.c 6 Feb 2014 21:00:48 -
@@ -144,6 +144,13 @@ const struct pci_matchid em_devices[] =
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_FIBER },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_SERDES },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_SGMII },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_FIBER },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SERDES },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SGMII },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER_NF },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SERDES_NF },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I211_COPPER },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_82567V_3 },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_IFE },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_IFE_G },
@@ -408,6 +415,8 @@ em_attach(struct device *parent, struct
case em_82575:
case em_82580:
case em_i350:
+ case em_i210:
+ case em_i211:
case em_ich9lan:
case em_ich10lan:
case em_80003es2lan:
@@ -475,7 +484,8 @@ em_attach(struct device *parent, struct
}
if (sc->hw.mac_type == em_80003es2lan || sc->hw.mac_type == em_82575 ||
- sc->hw.mac_type == em_82580 || sc->hw.mac_type == em_i350) {
+ sc->hw.mac_type == em_82580 || sc->hw.mac_type == em_i350 ||
+ sc->hw.mac_type == em_i210 || sc->hw.mac_type == em_i211 ) {
uint32_t reg = EM_READ_REG(&sc->hw, E1000_STATUS);
sc->hw.bus_func = (reg & E1000_STATUS_FUNC_MASK) >>
E1000_STATUS_FUNC_SHIFT;
@@ -776,6 +786,10 @@ em_init(void *arg)
case em_i350:
pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
break;
+ case em_i210:
+ case em_i211:
+ pba = E1000_PBA_34K;
+ break;
case em_82573: /* 82573: Total Packet Buffer is 32K */
/* Jumbo frames not supported */
pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
@@ -1119,7 +1133,8 @@ em_encap(struct em_softc *sc, struct mbu
goto fail;
if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
- sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350)
+ sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350 &&
+ sc->hw.mac_type != em_i210 && sc->hw.mac_type != em_i211)
em_transmit_checksum_setup(sc, m_head, &txd_upper, &txd_lower);
else
txd_upper = txd_lower = 0;
@@ -1758,7 +1773,9 @@ em_hardware_init(struct em_softc *sc)
sc->hw.mac_type == em_82572 ||
sc->hw.mac_type == em_82575 ||
sc->hw.mac_type == em_82580 ||
- sc->hw.mac_type == em_i350)) {
+ sc->hw.mac_type == em_i350 ||
+ sc->hw.mac_type == em_i210 ||
+ sc->hw.mac_type == em_i211)) {
uint16_t phy_tmp = 0;
/* Speed up time to link by disabling smart power down */
@@ -1838,13 +1855,15 @@ em_setup_interface(struct em_softc *sc)
ifp->if_capabilities = IFCAP_VLAN_MTU;
#if NVLAN > 0
- if (sc->hw.mac_type != em_82575 && sc->hw.mac_type != em_82580 &&
- sc->hw.mac_type != em_i350)
+ if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82580 &&
+ sc->hw.mac_type != em_i350 && sc->hw.mac_type != em_i210 &&
+ sc->hw.mac_type != em_i211)
ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
#endif
if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
- sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350)
+ sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350 &&
+ sc->hw.mac_type != em_i210 && sc->hw.mac_type != em_i211)
ifp->if_capabilities |= IFCAP_CSUM_TCPv4 | IFCAP_CSUM_UDPv4;
/*
@@ -2199,7 +2218,8 @@ em_initialize_transmit_unit(struct em_so
sc->txd_cmd = E1000_TXD_CMD_IFCS;
if (sc->hw.mac_type == em_82575 || sc->hw.mac_type == em_82580 ||
- sc->hw.mac_type == em_i350) {
+ sc->hw.mac_type == em_i350 || sc->hw.mac_type == em_i210 ||
+ sc->hw.mac_type == em_i211) {
/* 82575/6 need to enable the TX queue and lack the IDE bit */
reg_tctl = E1000_READ_REG(&sc->hw, TXDCTL);
reg_tctl |= E1000_TXDCTL_QUEUE_ENABLE;
@@ -2624,7 +2644,8 @@ em_initialize_receive_unit(struct em_sof
* asked to or not. So ask for stripped CRC here and
* cope in rxeof
Re: Intel i210AT NICs
On 06.02.2014 12:52, Joerg Goltermann wrote:
Hi,
On 06.02.2014 10:26, Marc Peters wrote:
Hi List,
we have a couple of Supermicro boxes with Supmicro X10SLM+-LN4F Boards.
These are featuring the Intel i210AT Chipsets. Are there any plans or
patches to get them working? Downloaded today's snapshot but they aren't
getting configured either.
Is anyone working on it (and have a patch for me to test ;))?
Updated, against the latest tree:
Index: if_em.c
===
RCS file: /cvs/src/sys/dev/pci/if_em.c,v
retrieving revision 1.275
diff -u -p -r1.275 if_em.c
--- if_em.c 28 Dec 2013 03:34:54 - 1.275
+++ if_em.c 6 Feb 2014 14:48:32 -
@@ -144,6 +144,13 @@ const struct pci_matchid em_devices[] =
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_FIBER },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_SERDES },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_SGMII },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_FIBER },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SERDES },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SGMII },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER_NF },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SERDES_NF },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I211_COPPER },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_82567V_3 },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_IFE },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_IFE_G },
@@ -408,6 +415,8 @@ em_attach(struct device *parent, struct
case em_82575:
case em_82580:
case em_i350:
+ case em_i210:
+ case em_i211:
case em_ich9lan:
case em_ich10lan:
case em_80003es2lan:
@@ -475,7 +484,8 @@ em_attach(struct device *parent, struct
}
if (sc->hw.mac_type == em_80003es2lan || sc->hw.mac_type == em_82575 ||
- sc->hw.mac_type == em_82580 || sc->hw.mac_type == em_i350) {
+ sc->hw.mac_type == em_82580 || sc->hw.mac_type == em_i350 ||
+ sc->hw.mac_type == em_i210 || sc->hw.mac_type == em_i211 ) {
uint32_t reg = EM_READ_REG(&sc->hw, E1000_STATUS);
sc->hw.bus_func = (reg & E1000_STATUS_FUNC_MASK) >>
E1000_STATUS_FUNC_SHIFT;
@@ -776,6 +786,10 @@ em_init(void *arg)
case em_i350:
pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
break;
+ case em_i210:
+ case em_i211:
+ pba = E1000_PBA_34K;
+ break;
case em_82573: /* 82573: Total Packet Buffer is 32K */
/* Jumbo frames not supported */
pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
@@ -1119,7 +1133,8 @@ em_encap(struct em_softc *sc, struct mbu
goto fail;
if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
- sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350)
+ sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350 &&
+ sc->hw.mac_type != em_i210 && sc->hw.mac_type != em_i211)
em_transmit_checksum_setup(sc, m_head, &txd_upper, &txd_lower);
else
txd_upper = txd_lower = 0;
@@ -1758,7 +1773,9 @@ em_hardware_init(struct em_softc *sc)
sc->hw.mac_type == em_82572 ||
sc->hw.mac_type == em_82575 ||
sc->hw.mac_type == em_82580 ||
- sc->hw.mac_type == em_i350)) {
+ sc->hw.mac_type == em_i350 ||
+ sc->hw.mac_type == em_i210 ||
+ sc->hw.mac_type == em_i211)) {
uint16_t phy_tmp = 0;
/* Speed up time to link by disabling smart power down */
@@ -1838,13 +1855,15 @@ em_setup_interface(struct em_softc *sc)
ifp->if_capabilities = IFCAP_VLAN_MTU;
#if NVLAN > 0
- if (sc->hw.mac_type != em_82575 && sc->hw.mac_type != em_82580 &&
- sc->hw.mac_type != em_i350)
+ if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82580 &&
+ sc->hw.mac_type != em_i350 && sc->hw.mac_type != em_i210 &&
+ sc->hw.mac_type != em_i211)
ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
#endif
if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
- sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350)
+ sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350 &&
+ sc->hw.mac_type != em_i210 && sc->hw.mac_type != em_i211)
ifp->if_capabilities |= IFCAP_CSUM_TCPv4 | IFCAP_CSUM_UDPv4;
/*
@@ -2199,7 +2218,8 @@ em_initialize_transmit_unit(struct em_so
sc->txd_cmd = E1000_TXD_CMD_IFCS;
if (sc->hw.mac_type == em_82575 || sc->hw.mac_type == em_82580 ||
- sc->hw.mac_type == em_i350) {
+ sc->hw.mac_type
Re: Intel i210AT NICs
On 02/06/14 13:58, Marc Peters wrote: > On 02/06/14 12:52, Joerg Goltermann wrote: > > These are the cards: > > ppb2 at pci0 dev 28 function 2 "Intel 8 Series PCIE" rev 0xd5: msi > pci3 at ppb2 bus 3 > "Intel I210" rev 0x03 at pci3 dev 0 function 0 not configured > ppb3 at pci0 dev 28 function 3 "Intel 8 Series PCIE" rev 0xd5: msi > pci4 at ppb3 bus 4 > "Intel I210" rev 0x03 at pci4 dev 0 function 0 not configured > ppb4 at pci0 dev 28 function 6 "Intel 8 Series PCIE" rev 0xd5: msi > pci5 at ppb4 bus 5 > "Intel I210" rev 0x03 at pci5 dev 0 function 0 not configured > ppb5 at pci0 dev 28 function 7 "Intel 8 Series PCIE" rev 0xd5: msi > pci6 at ppb5 bus 6 > "Intel I210" rev 0x03 at pci6 dev 0 function 0 not configured > > It's a quad core onboard. > > I will give your patch a try, thanks. > Cards are working and cvs checkout looked good. Will test a bit more and report success or failure.
Re: Intel i210AT NICs
On 02/06/14 12:52, Joerg Goltermann wrote:
> Hi,
>
> On 06.02.2014 10:26, Marc Peters wrote:
>> Hi List,
>>
>> we have a couple of Supermicro boxes with Supmicro X10SLM+-LN4F Boards.
>> These are featuring the Intel i210AT Chipsets. Are there any plans or
>> patches to get them working? Downloaded today's snapshot but they aren't
>> getting configured either.
>>
>> Is anyone working on it (and have a patch for me to test ;))?
>
>
> yesterday I got my I210 cards for testing and this is the first
> version of a patch. The card can be used but I did rare testing
> on it.
>
> I can't find an unknown ethernet device in your attached
> dmesg, maybe this device is attached on an unsupported
> pci bridge?
These are the cards:
ppb2 at pci0 dev 28 function 2 "Intel 8 Series PCIE" rev 0xd5: msi
pci3 at ppb2 bus 3
"Intel I210" rev 0x03 at pci3 dev 0 function 0 not configured
ppb3 at pci0 dev 28 function 3 "Intel 8 Series PCIE" rev 0xd5: msi
pci4 at ppb3 bus 4
"Intel I210" rev 0x03 at pci4 dev 0 function 0 not configured
ppb4 at pci0 dev 28 function 6 "Intel 8 Series PCIE" rev 0xd5: msi
pci5 at ppb4 bus 5
"Intel I210" rev 0x03 at pci5 dev 0 function 0 not configured
ppb5 at pci0 dev 28 function 7 "Intel 8 Series PCIE" rev 0xd5: msi
pci6 at ppb5 bus 6
"Intel I210" rev 0x03 at pci6 dev 0 function 0 not configured
It's a quad core onboard.
I will give your patch a try, thanks.
>
>
>
> It would be really cool if we can get do the split of the em
> driver in e1000 and igb to get closer to the original Intel code.
> Which will make further updates easier and support a lot of
> new features like multiple queues
>
>
>
>
> Index: if_em.c
> ===
> RCS file: /cvs/src/sys/dev/pci/if_em.c,v
> retrieving revision 1.275
> diff -u -p -r1.275 if_em.c
> --- if_em.c28 Dec 2013 03:34:54 -1.275
> +++ if_em.c6 Feb 2014 10:49:24 -
> @@ -144,6 +144,13 @@ const struct pci_matchid em_devices[] =
> { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_FIBER },
> { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_SERDES },
> { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_SGMII },
> +{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER },
> +{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_FIBER },
> +{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SERDES },
> +{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SGMII },
> +{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER_NF },
> +{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SERDES_NF },
> +{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I211_COPPER },
> { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_82567V_3 },
> { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_IFE },
> { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_IFE_G },
> @@ -408,6 +415,8 @@ em_attach(struct device *parent, struct
> case em_82575:
> case em_82580:
> case em_i350:
> +case em_i210:
> +case em_i211:
> case em_ich9lan:
> case em_ich10lan:
> case em_80003es2lan:
> @@ -475,7 +484,8 @@ em_attach(struct device *parent, struct
> }
>
> if (sc->hw.mac_type == em_80003es2lan || sc->hw.mac_type ==
> em_82575 ||
> -sc->hw.mac_type == em_82580 || sc->hw.mac_type == em_i350) {
> +sc->hw.mac_type == em_82580 || sc->hw.mac_type == em_i350 ||
> +sc->hw.mac_type == em_i210 || sc->hw.mac_type == em_i211 ) {
> uint32_t reg = EM_READ_REG(&sc->hw, E1000_STATUS);
> sc->hw.bus_func = (reg & E1000_STATUS_FUNC_MASK) >>
> E1000_STATUS_FUNC_SHIFT;
> @@ -776,6 +786,10 @@ em_init(void *arg)
> case em_i350:
> pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
> break;
> +case em_i210:
> +case em_i211:
> +pba = E1000_PBA_34K;
> +break;
> case em_82573: /* 82573: Total Packet Buffer is 32K */
> /* Jumbo frames not supported */
> pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
> @@ -1119,7 +1133,8 @@ em_encap(struct em_softc *sc, struct mbu
> goto fail;
>
> if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
> -sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350)
> +sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350 &&
> +sc->hw.mac_type != em_i210 && sc->hw.mac_type != em_i211)
> em_transmit_checksum_setup(sc, m_head, &txd_upper, &txd_lower);
> else
> txd_upper = txd_lower = 0;
> @@ -1758,7 +1773,9 @@ em_hardware_init(struct em_softc *sc)
>sc->hw.mac_type == em_82572 ||
>sc->hw.mac_type == em_82575 ||
>sc->hw.mac_type == em_82580 ||
> - sc->hw.mac_type == em_i350)) {
> + sc->hw.mac_type == em_i350 ||
> + sc->hw.mac_type == em_i210 ||
> + sc->hw.mac_type == em_i211)) {
> uint16_t phy_tmp = 0;
>
> /* Speed up time to link by disabling smart power down */
> @@ -1838,13 +1855,15 @@ em_setup_int
Re: Intel i210AT NICs
Hi,
On 06.02.2014 10:26, Marc Peters wrote:
Hi List,
we have a couple of Supermicro boxes with Supmicro X10SLM+-LN4F Boards.
These are featuring the Intel i210AT Chipsets. Are there any plans or
patches to get them working? Downloaded today's snapshot but they aren't
getting configured either.
Is anyone working on it (and have a patch for me to test ;))?
yesterday I got my I210 cards for testing and this is the first
version of a patch. The card can be used but I did rare testing
on it.
I can't find an unknown ethernet device in your attached
dmesg, maybe this device is attached on an unsupported
pci bridge?
It would be really cool if we can get do the split of the em
driver in e1000 and igb to get closer to the original Intel code.
Which will make further updates easier and support a lot of
new features like multiple queues
Index: if_em.c
===
RCS file: /cvs/src/sys/dev/pci/if_em.c,v
retrieving revision 1.275
diff -u -p -r1.275 if_em.c
--- if_em.c 28 Dec 2013 03:34:54 - 1.275
+++ if_em.c 6 Feb 2014 10:49:24 -
@@ -144,6 +144,13 @@ const struct pci_matchid em_devices[] =
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_FIBER },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_SERDES },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_SGMII },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_FIBER },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SERDES },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SGMII },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER_NF },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SERDES_NF },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I211_COPPER },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_82567V_3 },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_IFE },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ICH8_IFE_G },
@@ -408,6 +415,8 @@ em_attach(struct device *parent, struct
case em_82575:
case em_82580:
case em_i350:
+ case em_i210:
+ case em_i211:
case em_ich9lan:
case em_ich10lan:
case em_80003es2lan:
@@ -475,7 +484,8 @@ em_attach(struct device *parent, struct
}
if (sc->hw.mac_type == em_80003es2lan || sc->hw.mac_type == em_82575 ||
- sc->hw.mac_type == em_82580 || sc->hw.mac_type == em_i350) {
+ sc->hw.mac_type == em_82580 || sc->hw.mac_type == em_i350 ||
+ sc->hw.mac_type == em_i210 || sc->hw.mac_type == em_i211 ) {
uint32_t reg = EM_READ_REG(&sc->hw, E1000_STATUS);
sc->hw.bus_func = (reg & E1000_STATUS_FUNC_MASK) >>
E1000_STATUS_FUNC_SHIFT;
@@ -776,6 +786,10 @@ em_init(void *arg)
case em_i350:
pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
break;
+ case em_i210:
+ case em_i211:
+ pba = E1000_PBA_34K;
+ break;
case em_82573: /* 82573: Total Packet Buffer is 32K */
/* Jumbo frames not supported */
pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
@@ -1119,7 +1133,8 @@ em_encap(struct em_softc *sc, struct mbu
goto fail;
if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
- sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350)
+ sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350 &&
+ sc->hw.mac_type != em_i210 && sc->hw.mac_type != em_i211)
em_transmit_checksum_setup(sc, m_head, &txd_upper, &txd_lower);
else
txd_upper = txd_lower = 0;
@@ -1758,7 +1773,9 @@ em_hardware_init(struct em_softc *sc)
sc->hw.mac_type == em_82572 ||
sc->hw.mac_type == em_82575 ||
sc->hw.mac_type == em_82580 ||
- sc->hw.mac_type == em_i350)) {
+ sc->hw.mac_type == em_i350 ||
+ sc->hw.mac_type == em_i210 ||
+ sc->hw.mac_type == em_i211)) {
uint16_t phy_tmp = 0;
/* Speed up time to link by disabling smart power down */
@@ -1838,13 +1855,15 @@ em_setup_interface(struct em_softc *sc)
ifp->if_capabilities = IFCAP_VLAN_MTU;
#if NVLAN > 0
- if (sc->hw.mac_type != em_82575 && sc->hw.mac_type != em_82580 &&
- sc->hw.mac_type != em_i350)
+ if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82580 &&
+ sc->hw.mac_type != em_i350 && sc->hw.mac_type != em_i210 &&
+ sc->hw.mac_type != em_i211)
ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
#endif
if (sc->hw.mac_type >= em_82543 && sc->hw.mac_type != em_82575 &&
- sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350)
+ sc->hw.mac_type != em_82580 && sc->hw.mac_type != em_i350 &
Re: Intel i210AT NICs
On Thu, Feb 06, 2014 at 10:26:19AM +0100, Marc Peters wrote: > Hi List, > > we have a couple of Supermicro boxes with Supmicro X10SLM+-LN4F Boards. > These are featuring the Intel i210AT Chipsets. Are there any plans or > patches to get them working? Downloaded today's snapshot but they aren't > getting configured either. > > Is anyone working on it (and have a patch for me to test ;))? I'm not aware of anyone working on this. It should be possible to add support within em(4) but it is another mac type/phy type and it looks like they changed the eeprom access again. If anyone is interested in donating a card mail me off list and I'll take a look.
Intel i210AT NICs
Hi List, we have a couple of Supermicro boxes with Supmicro X10SLM+-LN4F Boards. These are featuring the Intel i210AT Chipsets. Are there any plans or patches to get them working? Downloaded today's snapshot but they aren't getting configured either. Is anyone working on it (and have a patch for me to test ;))? dmesg below. Cheers, Marc dmesg: OpenBSD 5.5-beta (GENERIC.MP) #284: Mon Feb 3 07:57:32 MST 2014 t...@amd64.openbsd.org:/usr/src/sys/arch/amd64/compile/GENERIC.MP real mem = 8531181568 (8135MB) avail mem = 8295866368 (7911MB) mainbus0 at root bios0 at mainbus0: SMBIOS rev. 2.7 @ 0xec090 (38 entries) bios0: vendor American Megatrends Inc. version "1.1a" date 11/01/2013 bios0: Supermicro X10SLM+-LN4F acpi0 at bios0: rev 2 acpi0: sleep states S0 S3 S4 S5 acpi0: tables DSDT FACP APIC FPDT LPIT SSDT SSDT SSDT SSDT MCFG PRAD HPET SSDT SSDT SPMI DMAR EINJ ERST HEST BERT acpi0: wakeup devices PXSX(S4) RP01(S4) PXSX(S4) RP02(S4) PXSX(S4) RP03(S4) PXSX(S4) RP04(S4) PXSX(S4) RP05(S4) PXSX(S4) RP07(S4) PXSX(S4) RP08(S4) GLAN(S4) EHC1(S4) [...] acpitimer0 at acpi0: 3579545 Hz, 24 bits acpimadt0 at acpi0 addr 0xfee0: PC-AT compat cpu0 at mainbus0: apid 0 (boot processor) cpu0: Intel(R) Xeon(R) CPU E3-1220 v3 @ 3.10GHz, 3100.54 MHz cpu0: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,HLE,AVX2,SMEP,BMI2,ERMS,INVPCID,RTM cpu0: 256KB 64b/line 8-way L2 cache cpu0: smt 0, core 0, package 0 mtrr: Pentium Pro MTRR support, 10 var ranges, 88 fixed ranges cpu0: apic clock running at 99MHz cpu0: mwait min=64, max=64, C-substates=0.2.1.2.4, IBE cpu1 at mainbus0: apid 2 (application processor) cpu1: Intel(R) Xeon(R) CPU E3-1220 v3 @ 3.10GHz, 3100.00 MHz cpu1: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,HLE,AVX2,SMEP,BMI2,ERMS,INVPCID,RTM cpu1: 256KB 64b/line 8-way L2 cache cpu1: smt 0, core 1, package 0 cpu2 at mainbus0: apid 4 (application processor) cpu2: Intel(R) Xeon(R) CPU E3-1220 v3 @ 3.10GHz, 3100.00 MHz cpu2: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,HLE,AVX2,SMEP,BMI2,ERMS,INVPCID,RTM cpu2: 256KB 64b/line 8-way L2 cache cpu2: smt 0, core 2, package 0 cpu3 at mainbus0: apid 6 (application processor) cpu3: Intel(R) Xeon(R) CPU E3-1220 v3 @ 3.10GHz, 3100.00 MHz cpu3: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,HLE,AVX2,SMEP,BMI2,ERMS,INVPCID,RTM cpu3: 256KB 64b/line 8-way L2 cache cpu3: smt 0, core 3, package 0 ioapic0 at mainbus0: apid 8 pa 0xfec0, version 20, 24 pins acpimcfg0 at acpi0 addr 0xf800, bus 0-63 acpihpet0 at acpi0: 14318179 Hz acpiprt0 at acpi0: bus 0 (PCI0) acpiprt1 at acpi0: bus 1 (RP01) acpiprt2 at acpi0: bus 3 (RP03) acpiprt3 at acpi0: bus 4 (RP04) acpiprt4 at acpi0: bus 5 (RP07) acpiprt5 at acpi0: bus 6 (RP08) acpiprt6 at acpi0: bus -1 (PEG0) acpiec0 at acpi0: Failed to read resource settings acpicpu0 at acpi0: C1, PSS acpicpu1 at acpi0: C1, PSS acpicpu2 at acpi0: C1, PSS acpicpu3 at acpi0: C1, PSS acpipwrres0 at acpi0: FN00, resource for FAN0 acpipwrres1 at acpi0: FN01, resource for FAN1 acpipwrres2 at acpi0: FN02, resource for FAN2 acpipwrres3 at acpi0: FN03, resource for FAN3 acpipwrres4 at acpi0: FN04, resource for FAN4 acpitz0 at acpi0: critical temperature is 105 degC acpitz1 at acpi0: critical temperature is 105 degC acpibat0 at acpi0: BAT0 not present acpibat1 at acpi0: BAT1 not present acpibat2 at acpi0: BAT2 not present acpibtn0 at acpi0: PWRB acpibtn1 at acpi0: LID0 acpivideo0 at acpi0: GFX0 acpivout0 at acpivideo0: DD1F ipmi at mainbus0 not configured cpu0: Enhanced SpeedStep 3100 MHz: speeds: 3101, 3100, 2900, 2800, 2600, 2400, 2300, 2100, 1900, 1800, 1600, 1500, 1300, 1100, 1000, 800 MHz pci0 at mainbus0 bus 0 pchb0 at pci0 dev 0 function 0 vendor "Intel", unknown product 0x0c08 rev 0x06 "Intel 8 Series xHCI" rev 0x05 at pci0 dev 20 function 0 not configured "Intel 8 Series MEI" rev 0x04 at pci0 dev 22 function 0 not configured "Intel 8 Series MEI" rev 0x04 at pci0 dev 22 function 1 not configured ehci0 at pci0 dev 26 function
