Re: Intel i7-4770 + z87 chipset - drm error, re0 is missing lladdr, unknown + not configured

2013-10-11 Thread RD Thrush 
On 10/11/13 01:28, Jonathan Gray wrote:
 On Thu, Oct 10, 2013 at 05:48:43PM -0400, RD Thrush wrote:
 I noticed some anomalies in the dmesg on this new system.

 1. error: [drm:pid0:i915_write32] *ERROR* Unknown unclaimed register before 
 writing to 10
 
 That should be harmless, and will go away when we update to newer
 upstream i915 code that clears the error on driver init.
 

 2. dhclient doesn't work with the onboard nic (possibly since the lladdr is 
 0:0:0:0:0:0.

 3. (1) 'unknown' product(ppb0)

 4. (3) 'not configured' items (Intel 8 Series (xHCI|MEI|SMBus)
 
 Index: ichiic.c
 ===
 RCS file: /cvs/src/sys/dev/pci/ichiic.c,v
 retrieving revision 1.30
 diff -u -p -r1.30 ichiic.c
 --- ichiic.c  2 Mar 2013 06:56:16 -   1.30
 +++ ichiic.c  11 Oct 2013 05:12:13 -
 @@ -90,6 +90,7 @@ const struct pci_matchid ichiic_ids[] = 
   { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_SMB },
   { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6321ESB_SMB },
   { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_SMB },
 + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_SMB },
   { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_SMB },
   { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_SMB },
   { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_SMB },
 

Thanks, this patch removed the SMBus unknown from the dmesg.  See my next post
for full dmesg.

Re: Intel i7-4770 + z87 chipset - drm error, re0 is missing lladdr, unknown + not configured

2013-10-11 Thread RD Thrush 
On 10/11/13 01:05, Jonathan Gray wrote:
 On Thu, Oct 10, 2013 at 05:48:43PM -0400, RD Thrush wrote:
 I noticed some anomalies in the dmesg on this new system.

 1. error: [drm:pid0:i915_write32] *ERROR* Unknown unclaimed register before 
 writing to 10

 2. dhclient doesn't work with the onboard nic (possibly since the lladdr is 
 0:0:0:0:0:0.
 
 There is no support for Realtek 8168G/8111G devices, here is a diff which
 apparently lacks some critical part required to make it work
 as it didn't work for the last person who tried it.
 
 Index: re.c
 ===
 RCS file: /cvs/src/sys/dev/ic/re.c,v
 retrieving revision 1.144
 diff -u -p -r1.144 re.c
 --- re.c  5 Oct 2013 22:59:57 -   1.144
 +++ re.c  9 Oct 2013 01:21:41 -
 @@ -223,6 +223,8 @@ static const struct re_revision {
   { RL_HWREV_8101,RTL8101 },
   { RL_HWREV_8101E,   RTL8101E },
   { RL_HWREV_8102E,   RTL8102E },
 + { RL_HWREV_8106E,   RTL8106E },
 + { RL_HWREV_8106E_SPIN1, RTL8106E },
   { RL_HWREV_8401E,   RTL8401E },
   { RL_HWREV_8402,RTL8402 },
   { RL_HWREV_8411,RTL8411 },
 @@ -238,6 +240,10 @@ static const struct re_revision {
   { RL_HWREV_8168C_SPIN2, RTL8168C/8111C },
   { RL_HWREV_8168CP,  RTL8168CP/8111CP },
   { RL_HWREV_8168F,   RTL8168F/8111F },
 + { RL_HWREV_8168G,   RTL8168G/8111G },
 + { RL_HWREV_8168G_SPIN1, RTL8168G/8111G },
 + { RL_HWREV_8168G_SPIN2, RTL8168G/8111G },
 + { RL_HWREV_8168G_SPIN4, RTL8168G/8111G },
   { RL_HWREV_8105E,   RTL8105E },
   { RL_HWREV_8105E_SPIN1, RTL8105E },
   { RL_HWREV_8168D,   RTL8168D/8111D },
 @@ -846,6 +852,8 @@ re_attach(struct rl_softc *sc, const cha
   case RL_HWREV_8402:
   case RL_HWREV_8105E:
   case RL_HWREV_8105E_SPIN1:
 + case RL_HWREV_8106E:
 + case RL_HWREV_8106E_SPIN1:
   sc-rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
   RL_FLAG_PHYWAKE_PM | RL_FLAG_PAR | RL_FLAG_DESCV2 |
   RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD |
 @@ -892,6 +900,15 @@ re_attach(struct rl_softc *sc, const cha
   RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
   RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_NOJUMBO;
   break;
 + case RL_HWREV_8168G:
 + case RL_HWREV_8168G_SPIN1:
 + case RL_HWREV_8168G_SPIN2:
 + case RL_HWREV_8168G_SPIN4:
 + sc-rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
 + RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
 + RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_NOJUMBO |
 + RL_FLAG_EARLYOFF;
 + break;
   case RL_HWREV_8169_8110SB:
   case RL_HWREV_8169_8110SBL:
   case RL_HWREV_8169_8110SCd:
 @@ -1974,6 +1991,7 @@ re_init(struct ifnet *ifp)
  {
   struct rl_softc *sc = ifp-if_softc;
   u_int16_t   cfg;
 + uint32_trxcfg;
   int s;
   union {
   u_int32_t align_dummy;
 @@ -2058,7 +2076,10 @@ re_init(struct ifnet *ifp)
  
   CSR_WRITE_1(sc, RL_EARLY_TX_THRESH, 16);
  
 - CSR_WRITE_4(sc, RL_RXCFG, RL_RXCFG_CONFIG);
 + rxcfg = RL_RXCFG_CONFIG;
 + if (sc-rl_flags  RL_FLAG_EARLYOFF)
 + rxcfg |= RL_RXCFG_EARLYOFF;
 + CSR_WRITE_4(sc, RL_RXCFG, rxcfg);
  
   /* Program promiscuous mode and multicast filters. */
   re_iff(sc);
 Index: rtl81x9reg.h
 ===
 RCS file: /cvs/src/sys/dev/ic/rtl81x9reg.h,v
 retrieving revision 1.76
 diff -u -p -r1.76 rtl81x9reg.h
 --- rtl81x9reg.h  17 Mar 2013 20:47:23 -  1.76
 +++ rtl81x9reg.h  3 Aug 2013 13:54:57 -
 @@ -186,8 +186,14 @@
  #define RL_HWREV_8105E   0x4080
  #define RL_HWREV_8105E_SPIN1 0x40C0
  #define RL_HWREV_84020x4400
 +#define RL_HWREV_8106E   0x4480
 +#define RL_HWREV_8106E_SPIN1 0x4490
  #define RL_HWREV_8168F   0x4800
  #define RL_HWREV_84110x4880
 +#define RL_HWREV_8168G   0x4c00
 +#define RL_HWREV_8168G_SPIN1 0x4c10
 +#define RL_HWREV_8168G_SPIN2 0x5090
 +#define RL_HWREV_8168G_SPIN4 0x5c80  
  #define RL_HWREV_81390x6000
  #define RL_HWREV_8139A   0x7000
  #define RL_HWREV_8139AG  0x7080
 @@ -277,6 +283,7 @@
  #define RL_RXCFG_RX_RUNT 0x0010
  #define RL_RXCFG_RX_ERRPKT   0x0020
  #define RL_RXCFG_WRAP0x0080
 +#define RL_RXCFG_EARLYOFF0x0100
  #define RL_RXCFG_MAXDMA  0x0700
  #define RL_RXCFG_BURSZ   0x1800
  #define  RL_RXCFG_FIFOTHRESH 0xE000
 @@ -847,6 +854,7 @@ struct rl_softc {
  #define  RL_FLAG_AUTOPAD 0x4000
  #define  RL_FLAG_LINK0x8000

Re: Intel i7-4770 + z87 chipset - drm error, re0 is missing lladdr, unknown + not configured

2013-10-11 Thread Jonathan Gray 
On Fri, Oct 11, 2013 at 02:39:30AM -0400, RD Thrush wrote:
 On 10/11/13 01:05, Jonathan Gray wrote:
  On Thu, Oct 10, 2013 at 05:48:43PM -0400, RD Thrush wrote:
  I noticed some anomalies in the dmesg on this new system.
 
  1. error: [drm:pid0:i915_write32] *ERROR* Unknown unclaimed register 
  before writing to 10
 
  2. dhclient doesn't work with the onboard nic (possibly since the lladdr 
  is 0:0:0:0:0:0.
  
  There is no support for Realtek 8168G/8111G devices, here is a diff which
  apparently lacks some critical part required to make it work
  as it didn't work for the last person who tried it.
  
  Index: re.c
  ===
  RCS file: /cvs/src/sys/dev/ic/re.c,v
  retrieving revision 1.144
  diff -u -p -r1.144 re.c
  --- re.c5 Oct 2013 22:59:57 -   1.144
  +++ re.c9 Oct 2013 01:21:41 -
  @@ -223,6 +223,8 @@ static const struct re_revision {
  { RL_HWREV_8101,RTL8101 },
  { RL_HWREV_8101E,   RTL8101E },
  { RL_HWREV_8102E,   RTL8102E },
  +   { RL_HWREV_8106E,   RTL8106E },
  +   { RL_HWREV_8106E_SPIN1, RTL8106E },
  { RL_HWREV_8401E,   RTL8401E },
  { RL_HWREV_8402,RTL8402 },
  { RL_HWREV_8411,RTL8411 },
  @@ -238,6 +240,10 @@ static const struct re_revision {
  { RL_HWREV_8168C_SPIN2, RTL8168C/8111C },
  { RL_HWREV_8168CP,  RTL8168CP/8111CP },
  { RL_HWREV_8168F,   RTL8168F/8111F },
  +   { RL_HWREV_8168G,   RTL8168G/8111G },
  +   { RL_HWREV_8168G_SPIN1, RTL8168G/8111G },
  +   { RL_HWREV_8168G_SPIN2, RTL8168G/8111G },
  +   { RL_HWREV_8168G_SPIN4, RTL8168G/8111G },
  { RL_HWREV_8105E,   RTL8105E },
  { RL_HWREV_8105E_SPIN1, RTL8105E },
  { RL_HWREV_8168D,   RTL8168D/8111D },
  @@ -846,6 +852,8 @@ re_attach(struct rl_softc *sc, const cha
  case RL_HWREV_8402:
  case RL_HWREV_8105E:
  case RL_HWREV_8105E_SPIN1:
  +   case RL_HWREV_8106E:
  +   case RL_HWREV_8106E_SPIN1:
  sc-rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
  RL_FLAG_PHYWAKE_PM | RL_FLAG_PAR | RL_FLAG_DESCV2 |
  RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD |
  @@ -892,6 +900,15 @@ re_attach(struct rl_softc *sc, const cha
  RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
  RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_NOJUMBO;
  break;
  +   case RL_HWREV_8168G:
  +   case RL_HWREV_8168G_SPIN1:
  +   case RL_HWREV_8168G_SPIN2:
  +   case RL_HWREV_8168G_SPIN4:
  +   sc-rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
  +   RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
  +   RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_NOJUMBO |
  +   RL_FLAG_EARLYOFF;
  +   break;
  case RL_HWREV_8169_8110SB:
  case RL_HWREV_8169_8110SBL:
  case RL_HWREV_8169_8110SCd:
  @@ -1974,6 +1991,7 @@ re_init(struct ifnet *ifp)
   {
  struct rl_softc *sc = ifp-if_softc;
  u_int16_t   cfg;
  +   uint32_trxcfg;
  int s;
  union {
  u_int32_t align_dummy;
  @@ -2058,7 +2076,10 @@ re_init(struct ifnet *ifp)
   
  CSR_WRITE_1(sc, RL_EARLY_TX_THRESH, 16);
   
  -   CSR_WRITE_4(sc, RL_RXCFG, RL_RXCFG_CONFIG);
  +   rxcfg = RL_RXCFG_CONFIG;
  +   if (sc-rl_flags  RL_FLAG_EARLYOFF)
  +   rxcfg |= RL_RXCFG_EARLYOFF;
  +   CSR_WRITE_4(sc, RL_RXCFG, rxcfg);
   
  /* Program promiscuous mode and multicast filters. */
  re_iff(sc);
  Index: rtl81x9reg.h
  ===
  RCS file: /cvs/src/sys/dev/ic/rtl81x9reg.h,v
  retrieving revision 1.76
  diff -u -p -r1.76 rtl81x9reg.h
  --- rtl81x9reg.h17 Mar 2013 20:47:23 -  1.76
  +++ rtl81x9reg.h3 Aug 2013 13:54:57 -
  @@ -186,8 +186,14 @@
   #define RL_HWREV_8105E 0x4080
   #define RL_HWREV_8105E_SPIN1   0x40C0
   #define RL_HWREV_8402  0x4400
  +#define RL_HWREV_8106E 0x4480
  +#define RL_HWREV_8106E_SPIN1   0x4490
   #define RL_HWREV_8168F 0x4800
   #define RL_HWREV_8411  0x4880
  +#define RL_HWREV_8168G 0x4c00
  +#define RL_HWREV_8168G_SPIN1   0x4c10
  +#define RL_HWREV_8168G_SPIN2   0x5090
  +#define RL_HWREV_8168G_SPIN4   0x5c80  
   #define RL_HWREV_8139  0x6000
   #define RL_HWREV_8139A 0x7000
   #define RL_HWREV_8139AG0x7080
  @@ -277,6 +283,7 @@
   #define RL_RXCFG_RX_RUNT   0x0010
   #define RL_RXCFG_RX_ERRPKT 0x0020
   #define RL_RXCFG_WRAP  0x0080
  +#define RL_RXCFG_EARLYOFF  0x0100
   #define RL_RXCFG_MAXDMA0x0700
   #define RL_RXCFG_BURSZ 0x1800
   #defineRL_RXCFG_FIFOTHRESH 0xE000
  @@ -847,6 +854,7 @@ struct rl_softc {
   #defineRL_FLAG_AUTOPAD

Re: Intel i7-4770 + z87 chipset - drm error, re0 is missing lladdr, unknown + not configured

2013-10-11 Thread RD Thrush 
On 10/11/13 03:18, Jonathan Gray wrote:
 On Fri, Oct 11, 2013 at 02:39:30AM -0400, RD Thrush wrote:
 On 10/11/13 01:05, Jonathan Gray wrote:
 On Thu, Oct 10, 2013 at 05:48:43PM -0400, RD Thrush wrote:
 I noticed some anomalies in the dmesg on this new system.

 1. error: [drm:pid0:i915_write32] *ERROR* Unknown unclaimed register 
 before writing to 10

 2. dhclient doesn't work with the onboard nic (possibly since the lladdr 
 is 0:0:0:0:0:0.

 There is no support for Realtek 8168G/8111G devices, here is a diff which
 apparently lacks some critical part required to make it work
 as it didn't work for the last person who tried it.

 Index: re.c
 ===
 RCS file: /cvs/src/sys/dev/ic/re.c,v
 retrieving revision 1.144
 diff -u -p -r1.144 re.c
 --- re.c5 Oct 2013 22:59:57 -   1.144
 +++ re.c9 Oct 2013 01:21:41 -
 @@ -223,6 +223,8 @@ static const struct re_revision {
 { RL_HWREV_8101,RTL8101 },
 { RL_HWREV_8101E,   RTL8101E },
 { RL_HWREV_8102E,   RTL8102E },
 +   { RL_HWREV_8106E,   RTL8106E },
 +   { RL_HWREV_8106E_SPIN1, RTL8106E },
 { RL_HWREV_8401E,   RTL8401E },
 { RL_HWREV_8402,RTL8402 },
 { RL_HWREV_8411,RTL8411 },
 @@ -238,6 +240,10 @@ static const struct re_revision {
 { RL_HWREV_8168C_SPIN2, RTL8168C/8111C },
 { RL_HWREV_8168CP,  RTL8168CP/8111CP },
 { RL_HWREV_8168F,   RTL8168F/8111F },
 +   { RL_HWREV_8168G,   RTL8168G/8111G },
 +   { RL_HWREV_8168G_SPIN1, RTL8168G/8111G },
 +   { RL_HWREV_8168G_SPIN2, RTL8168G/8111G },
 +   { RL_HWREV_8168G_SPIN4, RTL8168G/8111G },
 { RL_HWREV_8105E,   RTL8105E },
 { RL_HWREV_8105E_SPIN1, RTL8105E },
 { RL_HWREV_8168D,   RTL8168D/8111D },
 @@ -846,6 +852,8 @@ re_attach(struct rl_softc *sc, const cha
 case RL_HWREV_8402:
 case RL_HWREV_8105E:
 case RL_HWREV_8105E_SPIN1:
 +   case RL_HWREV_8106E:
 +   case RL_HWREV_8106E_SPIN1:
 sc-rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
 RL_FLAG_PHYWAKE_PM | RL_FLAG_PAR | RL_FLAG_DESCV2 |
 RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD |
 @@ -892,6 +900,15 @@ re_attach(struct rl_softc *sc, const cha
 RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
 RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_NOJUMBO;
 break;
 +   case RL_HWREV_8168G:
 +   case RL_HWREV_8168G_SPIN1:
 +   case RL_HWREV_8168G_SPIN2:
 +   case RL_HWREV_8168G_SPIN4:
 +   sc-rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
 +   RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
 +   RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_NOJUMBO |
 +   RL_FLAG_EARLYOFF;
 +   break;
 case RL_HWREV_8169_8110SB:
 case RL_HWREV_8169_8110SBL:
 case RL_HWREV_8169_8110SCd:
 @@ -1974,6 +1991,7 @@ re_init(struct ifnet *ifp)
  {
 struct rl_softc *sc = ifp-if_softc;
 u_int16_t   cfg;
 +   uint32_trxcfg;
 int s;
 union {
 u_int32_t align_dummy;
 @@ -2058,7 +2076,10 @@ re_init(struct ifnet *ifp)
  
 CSR_WRITE_1(sc, RL_EARLY_TX_THRESH, 16);
  
 -   CSR_WRITE_4(sc, RL_RXCFG, RL_RXCFG_CONFIG);
 +   rxcfg = RL_RXCFG_CONFIG;
 +   if (sc-rl_flags  RL_FLAG_EARLYOFF)
 +   rxcfg |= RL_RXCFG_EARLYOFF;
 +   CSR_WRITE_4(sc, RL_RXCFG, rxcfg);
  
 /* Program promiscuous mode and multicast filters. */
 re_iff(sc);
 Index: rtl81x9reg.h
 ===
 RCS file: /cvs/src/sys/dev/ic/rtl81x9reg.h,v
 retrieving revision 1.76
 diff -u -p -r1.76 rtl81x9reg.h
 --- rtl81x9reg.h17 Mar 2013 20:47:23 -  1.76
 +++ rtl81x9reg.h3 Aug 2013 13:54:57 -
 @@ -186,8 +186,14 @@
  #define RL_HWREV_8105E 0x4080
  #define RL_HWREV_8105E_SPIN1   0x40C0
  #define RL_HWREV_8402  0x4400
 +#define RL_HWREV_8106E 0x4480
 +#define RL_HWREV_8106E_SPIN1   0x4490
  #define RL_HWREV_8168F 0x4800
  #define RL_HWREV_8411  0x4880
 +#define RL_HWREV_8168G 0x4c00
 +#define RL_HWREV_8168G_SPIN1   0x4c10
 +#define RL_HWREV_8168G_SPIN2   0x5090
 +#define RL_HWREV_8168G_SPIN4   0x5c80  
  #define RL_HWREV_8139  0x6000
  #define RL_HWREV_8139A 0x7000
  #define RL_HWREV_8139AG0x7080
 @@ -277,6 +283,7 @@
  #define RL_RXCFG_RX_RUNT   0x0010
  #define RL_RXCFG_RX_ERRPKT 0x0020
  #define RL_RXCFG_WRAP  0x0080
 +#define RL_RXCFG_EARLYOFF  0x0100
  #define RL_RXCFG_MAXDMA0x0700
  #define RL_RXCFG_BURSZ 0x1800
  #defineRL_RXCFG_FIFOTHRESH 0xE000
 @@ -847,6 +854,7 @@ struct rl_softc {
  #defineRL_FLAG_AUTOPAD 0x4000
  #defineRL_FLAG_LINK0x8000
  #define

Re: Intel i7-4770 + z87 chipset - drm error, re0 is missing lladdr, unknown + not configured

2013-10-11 Thread RD Thrush 
On 10/10/13 17:48, RD Thrush wrote:
 I noticed some anomalies in the dmesg on this new system.
 
 1. error: [drm:pid0:i915_write32] *ERROR* Unknown unclaimed register before 
 writing to 10
 
 2. dhclient doesn't work with the onboard nic (possibly since the lladdr is 
 0:0:0:0:0:0.
 
 3. (1) 'unknown' product(ppb0)
 
 4. (3) 'not configured' items (Intel 8 Series (xHCI|MEI|SMBus)
 
 I've appended the dmesg, pcidump, biosdecode, dmidecode, and acpidump detail.
 
 I'll be happy to gather more data, test patches, ...
 
 TIA.

FWIW, I've collected some additional dmesg info from recent versions of freebsd 
and linux mint at the following links:

http://arp.thrush.com/openbsd/z87-a/data/freebsd-10.0-alpha5/dmesg.serial-console
http://arp.thrush.com/openbsd/z87-a/data/mint15/dmesg

freebsd seemed to have the same re0 problems originally noted although I didn't 
pursue it since it hung before giving a console prompt.

mint15 worked a little better but I don't know enough linux to get more than 
basic info. X info is at 
http://arp.thrush.com/openbsd/z87-a/data/mint15/Xorg.0.log

Re: Intel i7-4770 + z87 chipset - drm error, re0 is missing lladdr, unknown + not configured

2013-10-10 Thread Brett Mahar 
On Thu, 10 Oct 2013 17:48:43 -0400
RD Thrush openbsd-m...@thrush.com wrote:

| I noticed some anomalies in the dmesg on this new system.
| 
...
| 
| 2. dhclient doesn't work with the onboard nic (possibly since the lladdr is 
0:0:0:0:0:0.

You could check this by adding a random lladdr line to your /etc/hostname.re0

lladdr 22:a4:cf:85:64:b9
up
dhcp

and the running sh /etc/netstart.

Brett.

Re: Intel i7-4770 + z87 chipset - drm error, re0 is missing lladdr, unknown + not configured

2013-10-10 Thread Alexey E. Suslikov 
RD Thrush openbsd-misc at thrush.com writes:

 acpiec0 at acpi0: Failed to read resource settings

... among mentioned things.

Re: Intel i7-4770 + z87 chipset - drm error, re0 is missing lladdr, unknown + not configured

2013-10-10 Thread RD Thrush 
On 10/10/13 19:31, Brett Mahar wrote:
 On Thu, 10 Oct 2013 17:48:43 -0400
 RD Thrush openbsd-m...@thrush.com wrote:
 
 | I noticed some anomalies in the dmesg on this new system.
 | 
 ...
 | 
 | 2. dhclient doesn't work with the onboard nic (possibly since the lladdr is 
 0:0:0:0:0:0.
 
 You could check this by adding a random lladdr line to your /etc/hostname.re0
 
 lladdr 22:a4:cf:85:64:b9
 up
 dhcp
 
 and the running sh /etc/netstart.

Thanks, (on the dhcpd hosts) I 'created' another dhcpd.conf stanza with a 
matching (new) lladdr and now dhcp succeeds.  arping seems to work but ping 
doesn't work and tcpdump -i re0 -envvv shows some bad checksums.  netstat -nr 
output *doesn'* show link#1 for the dhcp IP address(10.1.2.30).

Here's some further detail:

a8v2:build/packages 36#sh /etc/netstart re0
DHCPREQUEST on re0 to 255.255.255.255 port 67
DHCPACK from 10.1.2.18 (00:02:b3:ca:06:00)
bound to 10.1.2.30 -- renewal in 302400 seconds.
a8v2:build/packages 37#tcpdump -i re0 -envvv
tcpdump: listening on re0, link-type EN10MB
tcpdump: WARNING: compensating for unaligned libpcap packets
00:07:12.995766 00:22:15:2c:7d:fc 00:30:18:a3:1b:48 0800 78: 10.1.2.30.46241  
10.1.2.13.3551: S [bad tcp cksum a37b!] 1450186406:1450186406(0) win 16384 mss 
1460,nop,nop,sackOK,nop,wscale 3,nop,nop,timestamp 2079825472 0 (DF) (ttl 64, 
id 44914, len 64, bad cksum 0! differs by 7319)
00:07:13.342214 bc:ae:c5:86:d9:cb 33:33:00:00:00:0c 86dd 208: 
fe80::e074:611b:ae16:65aa.54842  ff02::c.1900: udp 146 [hlim 1] (len 154)
tcpdump: WARNING: compensating for unaligned libpcap packets
00:07:16.343225 bc:ae:c5:86:d9:cb 33:33:00:00:00:0c 86dd 208: 
fe80::e074:611b:ae16:65aa.54842  ff02::c.1900: udp 146 [hlim 1] (len 154)
00:07:18.005627 00:22:15:2c:7d:fc 00:30:18:a3:1b:48 0800 78: 10.1.2.30.7166  
10.1.2.13.3551: S [bad tcp cksum e7a1!] 1750099443:1750099443(0)
 win 16384 mss 1460,nop,nop,sackOK,nop,wscale 3,nop,nop,timestamp 1950332714 
0 (DF) (ttl 64, id 31832, len 64, bad cksum 0! differs by a633)
00:07:19.343500 bc:ae:c5:86:d9:cb 33:33:00:00:00:0c 86dd 208: 
fe80::e074:611b:ae16:65aa.54842  ff02::c.1900: udp 146 [hlim 1] (len 154)
00:07:20.980721 30:85:a9:9a:6d:f0 ff:ff:ff:ff:ff:ff 0800 144: 10.1.2.40.17500  
255.255.255.255.17500: udp 102 (ttl 128, id 3544, len 130)
00:07:20.993563 30:85:a9:9a:6d:f0 ff:ff:ff:ff:ff:ff 0800 144: 10.1.2.40.17500  
255.255.255.255.17500: udp 102 (ttl 128, id 3545, len 130)
00:07:20.993822 30:85:a9:9a:6d:f0 ff:ff:ff:ff:ff:ff 0800 144: 10.1.2.40.17500  
10.1.2.255.17500: udp 102 (ttl 128, id 12521, len 130)
00:07:23.344174 bc:ae:c5:86:d9:cb 33:33:00:00:00:0c 86dd 208: 
fe80::e074:611b:ae16:65aa.54842  ff02::c.1900: udp 146 [hlim 1] (len 154)
00:07:24.441081 bc:ae:c5:86:d9:cb ff:ff:ff:ff:ff:ff 0800 153: 10.1.2.35.17500  
255.255.255.255.17500: udp 111 (ttl 128, id 4141, len 139)
00:07:24.446438 bc:ae:c5:86:d9:cb ff:ff:ff:ff:ff:ff 0800 153: 10.1.2.35.17500  
10.1.2.255.17500: udp 111 (ttl 128, id 4142, len 139)
00:07:26.061193 00:0d:a2:01:7e:88 01:00:5e:7f:ff:fa 0800 304: 10.1.2.11.50001  
239.255.255.250.1900: udp 262 (DF) [ttl 1] (id 0, len 290)
00:07:26.061389 00:1f:33:eb:05:e9 01:00:5e:7f:ff:fa 0800 304: 10.1.2.15.50001  
239.255.255.250.1900: udp 262 (DF) [ttl 1] (id 0, len 290)
00:07:26.061527 00:1f:33:ea:36:d1 01:00:5e:7f:ff:fa 0800 304: 10.1.2.12.50001  
239.255.255.250.1900: udp 262 (DF) [ttl 1] (id 0, len 290)
00:07:26.345178 bc:ae:c5:86:d9:cb 33:33:00:00:00:0c 86dd 208: 
fe80::e074:611b:ae16:65aa.54842  ff02::c.1900: udp 146 [hlim 1] (len 154)
^C
15 packets received by filter
0 packets dropped by kernel
a8v2:build/packages 38#ifconfig re0 hwfeatures
re0: flags=8843UP,BROADCAST,RUNNING,SIMPLEX,MULTICAST mtu 1500

hwfeatures=8037CSUM_IPv4,CSUM_TCPv4,CSUM_UDPv4,VLAN_MTU,VLAN_HWTAGGING,WOL 
hardmtu 7422
lladdr 00:22:15:2c:7d:fc
priority: 0
groups: int egress
media: Ethernet autoselect (1000baseT full-duplex,rxpause,txpause)
status: active
inet 10.1.2.30 netmask 0xff00 broadcast 10.1.2.255
a8v2:build/packages 39#netstat -nr -finet
Routing tables

Internet:
DestinationGatewayFlags   Refs  Use   Mtu  Prio Iface
default10.1.2.1   UGS0   24 - 8 re0
10.1.2/24  link#1 UC100 - 4 re0
10.1.2.1   00:00:24:c9:29:14  UHLc   1   12 - 4 re0
10.1.2.10  00:e0:4c:77:6d:ab  UHLc   06 - 4 re0
10.1.2.11  00:0d:a2:01:7e:88  UHLc   04 - 4 re0
10.1.2.12  00:1f:33:ea:36:d1  UHLc   06 - 4 re0
10.1.2.13  00:30:18:a3:1b:48  UHLc   0  240 - 4 re0
10.1.2.15  00:1f:33:eb:05:e9  UHLc   06 - 4 re0
10.1.2.18  00:02:b3:ca:06:00  UHLc   2   42 - 4 re0
10.1.2.31  00:1b:21:2e:39:c4  UHLc   0   16 - 4 re0
10.1.2.33  00:22:15:2c:7d:0b  UHLc   01

Re: Intel i7-4770 + z87 chipset - drm error, re0 is missing lladdr, unknown + not configured

2013-10-10 Thread Jonathan Gray 
On Thu, Oct 10, 2013 at 05:48:43PM -0400, RD Thrush wrote:
 I noticed some anomalies in the dmesg on this new system.
 
 1. error: [drm:pid0:i915_write32] *ERROR* Unknown unclaimed register before 
 writing to 10
 
 2. dhclient doesn't work with the onboard nic (possibly since the lladdr is 
 0:0:0:0:0:0.

There is no support for Realtek 8168G/8111G devices, here is a diff which
apparently lacks some critical part required to make it work
as it didn't work for the last person who tried it.

Index: re.c
===
RCS file: /cvs/src/sys/dev/ic/re.c,v
retrieving revision 1.144
diff -u -p -r1.144 re.c
--- re.c5 Oct 2013 22:59:57 -   1.144
+++ re.c9 Oct 2013 01:21:41 -
@@ -223,6 +223,8 @@ static const struct re_revision {
{ RL_HWREV_8101,RTL8101 },
{ RL_HWREV_8101E,   RTL8101E },
{ RL_HWREV_8102E,   RTL8102E },
+   { RL_HWREV_8106E,   RTL8106E },
+   { RL_HWREV_8106E_SPIN1, RTL8106E },
{ RL_HWREV_8401E,   RTL8401E },
{ RL_HWREV_8402,RTL8402 },
{ RL_HWREV_8411,RTL8411 },
@@ -238,6 +240,10 @@ static const struct re_revision {
{ RL_HWREV_8168C_SPIN2, RTL8168C/8111C },
{ RL_HWREV_8168CP,  RTL8168CP/8111CP },
{ RL_HWREV_8168F,   RTL8168F/8111F },
+   { RL_HWREV_8168G,   RTL8168G/8111G },
+   { RL_HWREV_8168G_SPIN1, RTL8168G/8111G },
+   { RL_HWREV_8168G_SPIN2, RTL8168G/8111G },
+   { RL_HWREV_8168G_SPIN4, RTL8168G/8111G },
{ RL_HWREV_8105E,   RTL8105E },
{ RL_HWREV_8105E_SPIN1, RTL8105E },
{ RL_HWREV_8168D,   RTL8168D/8111D },
@@ -846,6 +852,8 @@ re_attach(struct rl_softc *sc, const cha
case RL_HWREV_8402:
case RL_HWREV_8105E:
case RL_HWREV_8105E_SPIN1:
+   case RL_HWREV_8106E:
+   case RL_HWREV_8106E_SPIN1:
sc-rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
RL_FLAG_PHYWAKE_PM | RL_FLAG_PAR | RL_FLAG_DESCV2 |
RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD |
@@ -892,6 +900,15 @@ re_attach(struct rl_softc *sc, const cha
RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_NOJUMBO;
break;
+   case RL_HWREV_8168G:
+   case RL_HWREV_8168G_SPIN1:
+   case RL_HWREV_8168G_SPIN2:
+   case RL_HWREV_8168G_SPIN4:
+   sc-rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
+   RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
+   RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_NOJUMBO |
+   RL_FLAG_EARLYOFF;
+   break;
case RL_HWREV_8169_8110SB:
case RL_HWREV_8169_8110SBL:
case RL_HWREV_8169_8110SCd:
@@ -1974,6 +1991,7 @@ re_init(struct ifnet *ifp)
 {
struct rl_softc *sc = ifp-if_softc;
u_int16_t   cfg;
+   uint32_trxcfg;
int s;
union {
u_int32_t align_dummy;
@@ -2058,7 +2076,10 @@ re_init(struct ifnet *ifp)
 
CSR_WRITE_1(sc, RL_EARLY_TX_THRESH, 16);
 
-   CSR_WRITE_4(sc, RL_RXCFG, RL_RXCFG_CONFIG);
+   rxcfg = RL_RXCFG_CONFIG;
+   if (sc-rl_flags  RL_FLAG_EARLYOFF)
+   rxcfg |= RL_RXCFG_EARLYOFF;
+   CSR_WRITE_4(sc, RL_RXCFG, rxcfg);
 
/* Program promiscuous mode and multicast filters. */
re_iff(sc);
Index: rtl81x9reg.h
===
RCS file: /cvs/src/sys/dev/ic/rtl81x9reg.h,v
retrieving revision 1.76
diff -u -p -r1.76 rtl81x9reg.h
--- rtl81x9reg.h17 Mar 2013 20:47:23 -  1.76
+++ rtl81x9reg.h3 Aug 2013 13:54:57 -
@@ -186,8 +186,14 @@
 #define RL_HWREV_8105E 0x4080
 #define RL_HWREV_8105E_SPIN1   0x40C0
 #define RL_HWREV_8402  0x4400
+#define RL_HWREV_8106E 0x4480
+#define RL_HWREV_8106E_SPIN1   0x4490
 #define RL_HWREV_8168F 0x4800
 #define RL_HWREV_8411  0x4880
+#define RL_HWREV_8168G 0x4c00
+#define RL_HWREV_8168G_SPIN1   0x4c10
+#define RL_HWREV_8168G_SPIN2   0x5090
+#define RL_HWREV_8168G_SPIN4   0x5c80  
 #define RL_HWREV_8139  0x6000
 #define RL_HWREV_8139A 0x7000
 #define RL_HWREV_8139AG0x7080
@@ -277,6 +283,7 @@
 #define RL_RXCFG_RX_RUNT   0x0010
 #define RL_RXCFG_RX_ERRPKT 0x0020
 #define RL_RXCFG_WRAP  0x0080
+#define RL_RXCFG_EARLYOFF  0x0100
 #define RL_RXCFG_MAXDMA0x0700
 #define RL_RXCFG_BURSZ 0x1800
 #defineRL_RXCFG_FIFOTHRESH 0xE000
@@ -847,6 +854,7 @@ struct rl_softc {
 #defineRL_FLAG_AUTOPAD 0x4000
 #defineRL_FLAG_LINK0x8000
 #defineRL_FLAG_PHYWAKE_PM  0x0001
+#define

Re: Intel i7-4770 + z87 chipset - drm error, re0 is missing lladdr, unknown + not configured

2013-10-10 Thread Jonathan Gray 
On Thu, Oct 10, 2013 at 05:48:43PM -0400, RD Thrush wrote:
 I noticed some anomalies in the dmesg on this new system.
 
 1. error: [drm:pid0:i915_write32] *ERROR* Unknown unclaimed register before 
 writing to 10

That should be harmless, and will go away when we update to newer
upstream i915 code that clears the error on driver init.

 
 2. dhclient doesn't work with the onboard nic (possibly since the lladdr is 
 0:0:0:0:0:0.
 
 3. (1) 'unknown' product(ppb0)
 
 4. (3) 'not configured' items (Intel 8 Series (xHCI|MEI|SMBus)

Index: ichiic.c
===
RCS file: /cvs/src/sys/dev/pci/ichiic.c,v
retrieving revision 1.30
diff -u -p -r1.30 ichiic.c
--- ichiic.c2 Mar 2013 06:56:16 -   1.30
+++ ichiic.c11 Oct 2013 05:12:13 -
@@ -90,6 +90,7 @@ const struct pci_matchid ichiic_ids[] = 
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_SMB },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6321ESB_SMB },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_SMB },
+   { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_SMB },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_SMB },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_SMB },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_SMB },