Initialize the uid variable to zero to avoid the compilation warning.
Fixes: 7a89399ffad7 ("net/mlx4: Add mlx4_bitmap zone allocator")
Signed-off-by: Tariq Toukan
---
drivers/net/ethernet/mellanox/mlx4/alloc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethern
Hi Dave,
This patchset includes small fixes for mlx4_core driver.
First patch by Jack zeros a field in a FW communication
command, to match the FW spec.
Please queue it to -stable >= v3.17.
In the second patch I zero-initialize a variable to silence
a compliation warning.
Please queue it to -sta
From: Jack Morgenstein
When re-registering a user mr, the mpt information for the
existing mr when running SRIOV is obtained via the QUERY_MPT
fw command. The returned information includes the mpt's lkey.
This retrieved mpt information is used to move the mpt back
to hardware ownership in the re
Hi Dinh,
Did you upstream the patch on linux-stable ?
Thanks,
Clement
On Fri, 2 Nov 2018 at 11:02, Clément Péron wrote:
>
> Hi Dinh,
>
> On Wed, 31 Oct 2018 at 23:02, Dinh Nguyen wrote:
> >
> > Hi Clement,
> >
> > On 10/31/2018 10:36 AM, Clément Péron wrote:
> > > Hi Dinh,
> > >
> > > On Wed, 3
Lugupeetud härra / proua,
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igasuguseid laene ligikaudu 5000 euro
On Wed, Nov 14, 2018 at 05:30:37PM +0300, Pavel Balaev wrote:
> Hello, for now IP rules supports only old TOS values and we cannot use
> DSCP.
>
> This patch adds support for DSCP values in IP rules:
>
> $ ip r add default via 192.168.0.6 table test
> $ ip ru add tos 0x80 table test
> $ ip ru
> 0
On Wed, Nov 14, 2018 at 05:30:37PM +0300, Pavel Balaev wrote:
> Hello, for now IP rules supports only old TOS values and we cannot use
> DSCP.
>
> This patch adds support for DSCP values in IP rules:
>
> $ ip r add default via 192.168.0.6 table test
> $ ip ru add tos 0x80 table test
> $ ip ru
> 0
On 11/15/2018 03:43 AM, Davide Caratti wrote:
> On Wed, 2018-11-14 at 22:46 -0800, Eric Dumazet wrote:
>>
>> On 09/13/2018 10:29 AM, Davide Caratti wrote:
>>> use RCU instead of spinlocks, to protect concurrent read/write on
>>> act_police configuration. This reduces the effects of contention in
When disabling a flag, one needs to AND with the inverse not the flag
itself. Otherwise specifying for instance 'home -nodad' will effectively
clear the flags variable.
While being at it, simplify the code a bit by merging common parts of
negated and non-negated case branches. Also allow for the "
The two external MDIO buses used to communicate with phy devices that
are external to SOC are muxed in LX2160AQDS board.
These buses can be routed to any one of the eight IO slots on
LX2160AQDS board depending on value in fpga register 0x54.
Additionally the external MDIO1 is used to communicate
From: Karsten Graul
When searching for an existing link group the queue pair number is also
to be taken into consideration. When the SMC server sends a new number
in a CLC packet (keeping all other values equal) then a new link group
is to be created on the SMC client side.
Signed-off-by: Karste
From: Hans Wippel
In case of a non-blocking SMC socket, the initial CLC handshake is
performed over a blocking TCP connection in a worker. If the SMC socket
is released, smc_release has to wait for the blocking CLC socket
operations (e.g., kernel_connect) inside the worker.
This patch aborts a C
From: Hans Wippel
When a SMC-D link group is freed, a shutdown signal should be sent to
the peer to indicate that the link group is invalid. This patch adds the
shutdown signal to the SMC code.
Signed-off-by: Hans Wippel
Signed-off-by: Ursula Braun
---
net/smc/smc_core.c | 10 --
net/
From: Ursula Braun
In smc_wr_tx_put_slot() field pend->idx is used after being
cleared. That means always idx 0 is cleared in the wr_tx_mask.
This results in a broken administration of available WR send
payload buffers.
Signed-off-by: Ursula Braun
---
net/smc/smc_wr.c | 4 +++-
1 file changed,
Running uperf tests with SMCD on LPARs results in corrupted cursors.
SMCD cursors should be treated atomically to fix cursor corruption.
Signed-off-by: Ursula Braun
---
net/smc/smc_cdc.c | 24 ++--
net/smc/smc_cdc.h | 56 ++-
From: Ursula Braun
Dave,
here is V2 of some net/smc fixes in different areas for the net tree.
v1->v2:
do not define 8-byte alignment for union smcd_cdc_cursor in
patch 4/5 "net/smc: atomic SMCD cursor handling"
Thanks, Ursula
Hans Wippel (2):
net/smc: abort CLC connection in smc_rele
On Wed, 2018-11-14 at 22:46 -0800, Eric Dumazet wrote:
>
> On 09/13/2018 10:29 AM, Davide Caratti wrote:
> > use RCU instead of spinlocks, to protect concurrent read/write on
> > act_police configuration. This reduces the effects of contention in the
> > data path, in case multiple readers are pre
As rfc7496#section4.5 says about SCTP_PR_SUPPORTED:
This socket option allows the enabling or disabling of the
negotiation of PR-SCTP support for future associations. For existing
associations, it allows one to query whether or not PR-SCTP support
was negotiated on a particular associ
Hi Stephen,
On Wed, Nov 14, 2018 at 11:29:03AM -0800, Stephen Hemminger wrote:
[...]
> I was thinking something like this which simplifies the logic.
>
> diff --git a/ip/ipaddress.c b/ip/ipaddress.c
> index cd8cc76a3473..3f1510383071 100644
> --- a/ip/ipaddress.c
> +++ b/ip/ipaddress.c
> @@ -1212
From: Tomasz Duszynski
Enable all AF VFs during probe. Since AF's VFs work in pairs
(eg: Pkts sent on VF0 are received by VF1 and viceversa),
enable only even number of VFs out of totalVFs, which should
again be less than number of loopback (LBK) channels.
Also enable VF's mailbox interrupts.
S
From: Linu Cherian
- Add interrupt handlers for Master Enable events from PFs
and Master Enable events from VFs of AF
- Master Enable is required for the MSIX delivery to work
- Master Enable bit trap handler doesn't have to do any anything
other than clearing the TRPEND bit, since the enable
From: Sunil Goutham
Errata 35038
Software sets NIX_AF_RX_SW_SYNC[ENA] to sync (flush) in-flight packets
the RX data path before configuration changes (e.g. disabling one or
more RQs). Hardware clears [ENA] to indicate sync is done
An issue exists whereby NIX may clear NIX_AF_RX_SW_SYNC [
From: Geetha sowjanya
Upon receiving FLR IRQ for a RVU PF, teardown or cleanup
resources held by that PF_FUNC. This patch cleans up,
NIX LF
- Stop ingress/egress traffic
- Disable NPC MCAM entries being used.
- Free Tx scheduler queues
- Disable RQ/SQ/CQ HW contexts
NPA LF
- Disable Pool/Aur
From: Tomasz Duszynski
VFs attached to PFs other than AF can not communicate with AF
directly. Instead they are supposed to first send message to
the PF they are residing on and PF forwards it to the AF.
Responses to messages are handled in the reverse order.
On the other hand if VFs are on AF (
From: Sunil Goutham
Added support to handle FLR for AF's VFs (i.e LBK VFs).
Just the FLR interrupt enable/disable, handler registration
etc, actual HW resource cleanup or LFs teardown logic is
already there.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu.c | 129
From: Santosh Shukla
Added basic default MKEX profile. This profile tells
hardware what data to extract from packet and where to
place it (bit offset) in final KEY generated for the
parsed packet. Based on the bit placement of the packet
data, MCAM entries have to programmed for matching.
Also a
From: Geetha sowjanya
RVU admin function (AF) has all the priviliges to cleanup
HW state when VFIO triggers a PCIe function level reset (FLR)
due to either reset or a VM crash. FLR for RVU PF1-PFn will
trigger an IRQ to AF.
This patch enables all RVU PF's FLR interrupts and registers a
handler.
From: Sunil Goutham
While mapping a NIX LF to a NPA LF attached PF_FUNC or
SSO LF attached PF_FUNC, verify if PF_FUNC is valid and
if that PF_FUNC has a LF of that block attached to it or not.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 2 ++
drivers/
From: Sunil Goutham
NPC HW has counters which can be mapped to MCAM
entries to gather entry match statistics. This
patch adds support to allocate, free, clear and retrieve
stats of NPC MCAM counters. New mailbox messages have
been added for this. Similar to MCAM entries both
contiguous and non-co
From: Tomasz Duszynski
This works by shadowing existing UCAST MCAM entry
with a new one additionally matching either NPC_LT_LB_CTAG
or NPC_LT_LB_STAG. For this to fully work one needs to
send properly configured NIX_VTAG_CFG message afterwards i.e with
strip and capture enabled and type set to 0.
From: Tomasz Duszynski
Configure AF VFs such that they are able to talk over consecutive
loopback channels.
If 8 VFs are attached to AF then communication will work as below:
TX RX
lbk0 -> lbk1
lbk1 -> lbk0
lbk2 -> lbk3
lbk3 -> lbk2
lbk4 -> lbk5
lbk5 -> lbk4
lbk6 -> lbk7
lbk7 -> lbk6
S
From: Sunil Goutham
A new mailbox message is added to support allocating a MCAM entry
along with a counter and configuring it in one go. This reduces
the amount of mailbox communication involved in installing a new
MCAM rule.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeon
From: Sunil Goutham
Alloc memory to save MCAM 'entry to counter' mapping and since
multiple entries can map to same counter, added counter's reference
count tracking.
Do 'entry to counter' mapping when a entry is being installed
and mbox msg sender requested to configure a counter as well.
Mappi
From: Sunil Goutham
For a PF/VF with a NIXLF attached has default/reserved MCAM entries
for receiving Ucast/Bcast/Promisc traffic. Ideally traffic should be
forwarded to NIXLF only after it's contexts are initialized. This
patch keeps these default entries disabled and adds mbox messages
for a PF
From: Kiran Kumar
This patch adds reading HW limits like number of Rx/Tx stats,
number of queue IRQs supported per NIX LF from AF registers
and sync them to PF/VF.
Signed-off-by: Kiran Kumar
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h| 4
drivers
From: Sunil Goutham
Add support for a RVU PF/VF to enable, disable, configure
and shuffle MCAM entries via mbox commands. This patch adds
mailbox message formats and handling of these commands.
As of now otherthan validating MCAM entry index, info like
channel number e.t.c in MCAM config data se
From: Stanislaw Kardach
The resource locks does not need to be a spinlock as they are not
used in any interrupt handling routines (only in bottom halves).
Therefore relax them into a mutex so that later on we may use them
in routines that might sleep.
Signed-off-by: Stanislaw Kardach
Signed-off
From: Sunil Goutham
This patch adds NPC MCAM entry management and support for
allocating and freeing them via mailbox. Both contiguous and
non-contiguous allocations are supported. Incase of contiguous,
if request cannot be met then max contiguous number of available
entries are allocated.
High
From: Sunil Goutham
This patch converts all mailbox message handler API
names to lowercase.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.c | 2 +-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 73 --
drivers/net/ethernet/marvell/
From: Sunil Goutham
This patchset is a continuation to earlier submitted three patch
series to add a new driver for Marvell's OcteonTX2 SOC's
Resource virtualization unit (RVU) admin function driver.
1. octeontx2-af: Add RVU Admin Function driver
https://www.spinics.net/lists/netdev/msg528272
From: Sunil Goutham
This patch adds support for RVU PF/VFs to modify min/max
packet lengths allowed by HW. For VFs on PF0, settings will
be automatically applied on LBK link. RX link's min/maxlen
is configured to min/max of PF and it's all VFs. On the TX side
if requested all SMQs attached to the
Wed, Nov 14, 2018 at 05:45:34PM CET, vla...@mellanox.com wrote:
>
>On Wed 14 Nov 2018 at 06:44, Jiri Pirko wrote:
>> Tue, Nov 13, 2018 at 02:46:54PM CET, vla...@mellanox.com wrote:
>>>On Mon 12 Nov 2018 at 17:30, David Miller wrote:
From: Vlad Buslov
Date: Mon, 12 Nov 2018 09:55:46 +02
with CONFIG_THERMAL=m and cxgb4 as built-in build fails, and
'commit e70a57fa59bb ("cxgb4: fix thermal configuration dependencies")'
tries to fix it but when cxgb4i is made built-in build fails again,
use IS_REACHABLE instead of IS_ENABLED to fix the issue.
Fixes: e70a57fa59bb (cxgb4: fix thermal
Le 14 nov. 2018 à 21:04, David Ahern a écrit :
>
> On 11/14/18 1:31 AM, Alexis Bauvin wrote:
>> diff --git a/drivers/net/vxlan.c b/drivers/net/vxlan.c
>> index 7477b5510a04..188c0cdb8838 100644
>> --- a/drivers/net/vxlan.c
>> +++ b/drivers/net/vxlan.c
>> @@ -208,6 +208,18 @@ static inline struct
Le 14 nov. 2018 à 20:58, David Ahern a écrit :
>
> you are making this more specific than it needs to be
>
> On 11/14/18 1:31 AM, Alexis Bauvin wrote:
>> diff --git a/drivers/net/vxlan.c b/drivers/net/vxlan.c
>> index 27bd586b94b0..7477b5510a04 100644
>> --- a/drivers/net/vxlan.c
>> +++ b/d
Hi Russell,
On Mon, 12 Nov 2018 12:31:07 +
Russell King wrote:
Maybe missing a commit log ?
Otherwise,
Tested-by: Maxime Chevallier
>Signed-off-by: Russell King
--
Maxime Chevallier, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com
Hi Russell,
On Mon, 12 Nov 2018 12:31:12 +
Russell King wrote:
>Add the comphy settings for the Ethernet interfaces.
Tested-by: Maxime Chevallier
>Signed-off-by: Russell King
Hello Russell,
On Mon, 12 Nov 2018 12:29:33 +
Russell King - ARM Linux wrote:
>Hi,
>
>This series adds support for dynamically switching between 1Gbps
>and 2.5Gbps networking for the Marvell Armada 38x SoCs, tested on
>Armada 388 on the Clearfog platform.
I've performed some tests on my sid
Hi Russell,
On Mon, 12 Nov 2018 12:30:57 +
Russell King wrote:
>Add the DT description for the Armada 38x common phy.
Tested-by: Maxime Chevallier
>Signed-off-by: Russell King
--
Maxime Chevallier, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com
Hi Russell,
On Mon, 12 Nov 2018 12:30:52 +
Russell King wrote:
>Add support for the Armada 38x common phy to allow us to change the
>speed of the Ethernet serdes lane. This driver only supports
>manipulation of the speed, it does not support configuration of the
>common phy.
Tested-by: Max
This patch-set adds support of hardware assisted GRO feature to
HNS3 driver on Rev B(=0x21) platform. Current hardware only
supports TCP/IPv{4|6} flows.
Change Log:
V1->V2:
1. Remove redundant print reported by Leon Romanovsky.
Link: https://lkml.org/lkml/2018/11/13/715
Peng Li (5):
net: hns
Hello!
On 15.11.2018 12:23, Ganesh Goudar wrote:
with CONFIG_THERMAL=m and cxgb4 as built-in build fails, and
'commit e70a57fa59bb ("cxgb4: fix thermal configuration dependencies")'
tires to fix it but when cxgb4i is made built-in build fails again,
Tries? :-)
use IS_REACHABLE instead of
with CONFIG_THERMAL=m and cxgb4 as built-in build fails, and
'commit e70a57fa59bb ("cxgb4: fix thermal configuration dependencies")'
tires to fix it but when cxgb4i is made built-in build fails again,
use IS_REACHABLE instead of IS_ENABLED to fix the issue.
Fixes: e70a57fa59bb (cxgb4: fix thermal
The software counter structure is defined in both the CP ring's structure
and the NQ ring's structure on the new devices. The legacy code adds the
counter to the CP ring's structure and the counter won't get displayed
since the ethtool code is looking at the NQ ring's structure.
Since all other c
Most of the bug fixes are related to the new 57500 chips, including some
initialization and counter fixes, disabling RDMA support, and a
workaround for occasional missing interrupts. The last patch from
Vasundhara fixes the year/month parameters for firmware coredump.
Michael Chan (5):
bnxt_en:
Hardware can sometimes not generate NQ MSIX with a single pending
CP ring entry. This seems to always happen at the last entry of
the CP ring before it wraps. Add logic to check all the CP rings for
pending entries without the CP ring consumer index advancing. Calling
HWRM_DBG_RING_INFO_GET to r
Recent commit has added the reservation of RSS context. This requires
bnxt_hwrm_vnic_qcaps() to be called before allocating any RSS contexts.
The bnxt_hwrm_vnic_qcaps() call sets up proper flags that will
determine how many RSS contexts to allocate to support NTUPLE.
This causes a regression that
There is no RDMA support on 57500 chips yet, so prevent bnxt_re from
registering on these chips. There is intermittent failure if bnxt_re
is allowed to register and proceed with RDMA operations.
Fixes: 1ab968d2f1d6 ("bnxt_en: Add PCI ID for BCM57508 device.")
Signed-off-by: Michael Chan
---
dri
To keep track of the number of times the workaround code for 57500 A0
has been triggered. This is a per NQ counter.
Signed-off-by: Michael Chan
---
drivers/net/ethernet/broadcom/bnxt/bnxt.c | 1 +
drivers/net/ethernet/broadcom/bnxt/bnxt.h | 1 +
drivers/net/ethernet/broadcom/bnx
From: Vasundhara Volam
Fix the year and month offset while storing it in
bnxt_fill_coredump_record().
Fixes: 6c5657d085ae ("bnxt_en: Add support for ethtool get dump.")
Signed-off-by: Vasundhara Volam
Signed-off-by: Michael Chan
---
drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c | 4 ++--
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