> It wouldn't be trivial. The stats are queried from the driver.
So are page pool stats, with the increments happening in the page pool
code, not the driver.
Andrew
On Thu, May 09, 2024 at 09:19:52PM +, Dan Jurgens wrote:
> > From: Andrew Lunn
> > Sent: Thursday, May 9, 2024 3:47 PM
> > To: Dan Jurgens
> > Subject: Re: [PATCH net-next 1/2] netdev: Add queue stats for TX stop and
> > wake
> >
> > On Thu, May 09
nt to be
opposites of each other? If they are opposites, why would they differ
by more than 1? And if they can only differ by 1, why do we need both?
Andrew
ew feature bit) such as ctrq_wait_timeout
> to get a reasonable timeout？
The usual solution to this is include/linux/iopoll.h. If you can sleep
read_poll_timeout() otherwise read_poll_timeout_atomic().
Andrew
On Tue, Apr 20, 2021 at 10:44:16AM +0200, Linus Walleij wrote:
> On Tue, Apr 20, 2021 at 3:47 AM Andrew Lunn wrote:
>
> > > @@ -1381,25 +1382,12 @@ static struct eth_plat_info
> > > *ixp4xx_of_get_platdata(struct device *dev)
> > > /* NPE ID 0x00, 0x10,
, PHY_ID_FMT,
> - mdio_bus->id, plat->phy);
> - phydev = phy_connect(ndev, phy_id, &ixp4xx_adjust_link,
> - PHY_INTERFACE_MODE_MII);
> + if (np) {
> + phydev = of_phy_get_and_connect(ndev, np, ixp4xx_adjust_link);
> + } else {
> + snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT,
> + mdio_bus->id, plat->phy);
mdiobus_get_phy() and phy_connect_direct() might be better.
Andrew
uld not assume it is
the devices own bus. Once you have phy_np call of_phy_find_device()
which gives you the actual phy device. Please don't let the
limitations of the current platform data limit you from implementing
this correctly.
Andrew
> + mdio {
> +#address-cells = <1>;
> +#size-cells = <0>;
> +phy1: phy@1 {
> + #phy-cells = <0>;
Hi Linus
phy-cells is not part of the Ethernet PHY binding.
Andrew
le, some devices, such as the Ubiquiti EdgeRouter X, may have
> ports labeled ethX. Labeling the master GMAC with a different prefix
> than DSA ports helps with clarity.
>
> Suggested-by: René van Dorst
> Signed-off-by: Ilya Lipnitskiy
Reviewed-by: Andrew Lunn
Andrew
PROM
It looks like you used a tab, where as the rest of the table is
spaces?
Andrew
MTK_MAX_RX_LENGTH_2K -
> MTK_RX_ETH_HLEN;
>
> + if (label)
> + strscpy(eth->netdev[id]->name, label, IFNAMSIZ);
It is better to use alloc_netdev_mqs() so you get validation the name
is unique.
Andrew
t; Fix by using readl_poll_timeout as a more standard and less error-prone
> solution.
>
> Fixes: ba37b7caf1ed ("net: ethernet: mtk_eth_soc: add support for
> initializing the PPE")
> Signed-off-by: Ilya Lipnitskiy
> Cc: Felix Fietkau
Reviewed-by: Andrew Lunn
Andrew
_clk_get_optional() is probably better. If there is a real
error it will return an error. If the clock does not exist, you get a
NULL. Real errors should cause the problem to fail, but with a NULL
you can use the fallback value.
You also need to document the device tree binding.
Andrew
t of_device_id korina_match[] = {
> + {
> + .compatible = "idt,3243x-emac",
You need to document this compatible somewhere under
Documentation/devicetree/binding
Andrew
ta = &korina_dev0_data.mac,
> + }
This is a bit unusual. Normally you define a structure in
include/linux/platform/data/koriana.h, and use that.
What about the name? "korina0" How is that passed?
Andrew
On Thu, Apr 15, 2021 at 01:06:42AM +0200, Thomas Bogendoerfer wrote:
> Instead of messing with MIPS specific macros use DMA API for mapping
> descriptors and skbs.
>
> Signed-off-by: Thomas Bogendoerfer
Reviewed-by: Andrew Lunn
Andrew
On Thu, Apr 15, 2021 at 01:06:41AM +0200, Thomas Bogendoerfer wrote:
> Remove helpers, which are only used in one call site.
>
> Signed-off-by: Thomas Bogendoerfer
Reviewed-by: Andrew Lunn
Andrew
On Thu, Apr 15, 2021 at 01:06:40AM +0200, Thomas Bogendoerfer wrote:
> Descriptors are mapped uncached so there is no need to do any cache
> handling for them.
>
> Signed-off-by: Thomas Bogendoerfer
Reviewed-by: Andrew Lunn
Andrew
On Thu, Apr 15, 2021 at 01:06:39AM +0200, Thomas Bogendoerfer wrote:
> Simplify probe/remove code by using devm_ functions.
>
> Signed-off-by: Thomas Bogendoerfer
Reviewed-by: Andrew Lunn
Andrew
e error codes.
>
> - ret = (int)(readl(&lp->eth_regs->miimrdd));
> + if (readl(&lp->eth_regs->miimind) & ETH_MII_IND_NV)
> + return -1;
Please use -ESOMETHING, not -1.
Andrew
s(timeout)) {
> if (!(ppe_r32(ppe, MTK_PPE_GLO_CFG) & MTK_PPE_GLO_CFG_BUSY))
> return 0;
Maybe see is iopoll.h can be used.
Andrew
>
> --
> 2.31.1
>
>
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Thu, Apr 15, 2021 at 12:25:37PM +0300, Radu Pirea (NXP OSS) wrote:
> Add generic PMA suspend and resume callback functions for C45 PHYs.
>
> Signed-off-by: Radu Pirea (NXP OSS)
Reviewed-by: Andrew Lunn
Andrew
return -EIO;
> + }
> + return 0;
> +}
> +static struct phy_driver nxp_c45_driver[] = {
> + {
> + PHY_ID_MATCH_MODEL(PHY_ID_BASE_T1),
> + .name = "NXP C45 BASE-T1",
"NXP C45 TJA1103"
Andrew
ith
dev_err(), or netdev_err() etc.
Andrew
+ lp->mii_if.mdio_write = korina_mdio_write;
> + lp->mii_if.phy_id = 1;
> lp->mii_if.phy_id_mask = 0x1f;
> lp->mii_if.reg_num_mask = 0x1f;
You could also replace all the mii code with phylib.
Andrew
On Wed, Apr 14, 2021 at 07:05:10PM +0300, Vladimir Oltean wrote:
> On Wed, Apr 14, 2021 at 05:58:44PM +0200, Andrew Lunn wrote:
> > > Let us now add the 'is_local' bit to bridge FDB entries, and make all
> > > drivers ignore these entries by their own choice.
>
hould be another patch in the series, where a driver does not
actually ignore them, but does something?
Andrew
net property?
Andrew
On Sun, 11 Apr 2021 15:17:56 -0700 Randy Dunlap wrote:
> Fix various kernel-doc warnings in lib/ due to missing or
> erroneous function names.
> Add kernel-doc for some function parameters that was missing.
> Use kernel-doc "Return:" notation in earlycpio.c.
>
> Quietens the following warnings:
err = ops->get_temp_alarm(phydev, temp);
> break;
> default:
> - return -EOPNOTSUPP;
> + fallthrough;
> + }
Does the default clause actually service any purpose?
And it is not falling through, it is falling out :-)
Andrew
t; +#define MII_88E6393_MISC_TEST_RATE_11_9MS0x0700
> +#define MII_88E6393_MISC_TEST_RATE_MASK 0x0700
Same here.
Andrew
On Tue, Apr 13, 2021 at 09:55:37AM +0200, Marek Behún wrote:
> Amethyst internal PHYs also report empty model number in MII_PHYSID2.
>
> Fill in switch product number, as is done for Topaz and Peridot.
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
On Tue, Apr 13, 2021 at 09:55:36AM +0200, Marek Behún wrote:
> Use the &= operator instead of
> ret = ret & ...
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
uct phy_device *phydev,
> long *temp)
> if (ret < 0)
> goto error;
>
> - ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
> - ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
> + ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
> + ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
And here we have gone from 0x2 to 0x3?
Have you checked the 6390 datasheet for this?
I will test these patches later.
Andrew
> nxp-c45-tja11xx is acceptable from my point of view.
Great. Enough bike shedding, nxp-c45-tja11xx it is.
Andrew
c. It is not ideal, but it does at least
give an indication of what devices it does cover, even if there is a
big overlap with nxp-tja11xx.c, in terms of pattern matching. And if
you do decide to have a major change of registers, your can call the
device tja1201 and have a new driver nxp-c45-tja12xx.
Andrew
On Tue, Apr 13, 2021 at 08:56:30AM +0200, Christian Herber wrote:
> Hi Andrew,
>
> On 4/12/2021 6:52 PM, Andrew Lunn wrote:
> >
> > So what you are say is, you don't care if the IP is completely
> > different, it all goes in one driver. So lets put this driver int
marvell10 driver?
Also, do you know when there is an SFP cage? Do we need a standardised
DT property for this?
Andrew
hat you know you have
an SFP cage connected.
> > > +static void mv_sfp_link_down(void *upstream)
> > > +{
> > > + struct phy_device *phydev = upstream;
> > > + struct mv_data *priv;
> > > +
> > > + priv = (struct mv_data *)phydev->priv;
> >
> > This cast is redundant since the phydev->priv is (void*). You can cast
> > (void*) to (struct ... *).
> >
> > You can also just use
> > struct mv_data *priv = phydev->priv;
> >
>
> Yeah, I know, but reverse XMAS tree wouldn't line up.
Please move the assignment into the body of the function.
Andrew
ut not SOHO. Those ports which
don't go anywhere are never configured up and so the interrupt is
never used.
Andrew
On Tue, Apr 13, 2021 at 09:09:37AM +0200, Michal Vokáč wrote:
> On 12. 04. 21 16:14, Andrew Lunn wrote:
> > > [1]
> > > https://elixir.bootlin.com/linux/v5.12-rc7/source/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi#L101
> >
> > &fec {
> > p
associated with that device.
>
> Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
Andrew
; - else {}
>
> @@
> identifier a.x;
> expression e;
> @@
> - if (<+... x ...+>@e)
> - {}
> - else
> + if (!(e))
> {...}
>
> @@
> expression x, y, z;
> @@
> - x = of_get_mac_address(y, z);
> + of_get_mac_address(y, z);
> ... when != x
>
>
> All drivers, except drivers/net/ethernet/aeroflex/greth.c, were
> compile-time tested.
>
> Suggested-by: Andrew Lunn
> Signed-off-by: Michael Walle
I cannot say i looked at all the changes, but the ones i did exam
seemed O.K.
Reviewed-by: Andrew Lunn
Andrew
save a lot of device tree boilerplate
by doing it in code. And when you have 4 of these switches, it gets
very boring adding all the DT to just wire up the interrupts 28
interrupts.
> Andrew, perhaps this can be done in DSA core?
Not easily. It is not always a simple mapping like this. Two of the
switches supported by mv88exxx offset the PHYs by 0x10. You really
need the switch driver involved, with its detailed knowledge of the
hardware.
Andrew
On Tue, Apr 13, 2021 at 12:24:49AM +0200, Martin Blumenstingl wrote:
> Hi Andrew,
>
> On Mon, Apr 12, 2021 at 1:16 AM Andrew Lunn wrote:
> >
> > On Sun, Apr 11, 2021 at 10:55:11PM +0200, Martin Blumenstingl wrote:
> > > Add support for .get_regs_len and .get_re
portant that
mv_read_status() returns the line side status. Has it been able to
achieve sync? That should be independent of LOS. Or are you saying the
transceiver is reporting sync, despite no light coming in?
Andrew
On Mon, Apr 12, 2021 at 11:47:07AM -0700, Jakub Kicinski wrote:
> Add missing 't' in attrtype.
>
> Signed-off-by: Jakub Kicinski
Reviewed-by: Andrew Lunn
Andrew
ev);
> + break;
Again, for PHY_INTERFACE_MODE_RGMII you need to ensure the hardware is
not inserting a delay.
> + case PHY_INTERFACE_MODE_SGMII:
> + if (!(ret & SGMII_ABILITY)) {
> + phydev_err(phydev, "sgmii mode not supported\n");
> + return -EINVAL;
> + }
> + phy_write_mmd(phydev, MDIO_MMD_VEND1, MII_BASIC_CONFIG,
> MII_BASIC_CONFIG_SGMII);
> + break;
Interested. What gets reported over the inband signalling?
Andrew
caletechnologies/linux/issues/1
> Fixes: fee2d546414d ("net: phy: marvell: mv88e6390 temperature sensor
> reading")
> Reviewed-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
On Mon, Apr 12, 2021 at 05:49:04PM +0300, Radu Nicolae Pirea (NXP OSS) wrote:
> On Mon, 2021-04-12 at 16:23 +0200, Andrew Lunn wrote:
> > > It is purely a C45 device.
> >
> > > Even if the PHY will be based on the same IP or not, if it is a C45
> > > PHY, it
On Mon, Apr 12, 2021 at 05:52:39PM +0200, Pali Rohár wrote:
> On Monday 12 April 2021 17:32:33 Andrew Lunn wrote:
> > > Anyway, now I'm looking at phy/marvell.c driver again and it supports
> > > only 88E6341 and 88E6390 families from whole 88E63xxx range.
> > >
o idea if the 6393 has an ID, so to be safe you
should add that. Assuming it has a family of its own.
Andrew
On Mon, Apr 12, 2021 at 03:34:47PM +0200, Pali Rohár wrote:
> On Monday 12 April 2021 15:15:07 Andrew Lunn wrote:
> > > +static u16 mv88e6xxx_physid_for_family(enum mv88e6xxx_family family);
> > > +
> >
> > No forward declaration please. Move the code around. It
MV88E6XXX_PORT_SWITCH_ID_PROD_6097,
...
MV88E6XXX_PORT_SWITCH_ID_PROD_6390,
> > You cannot just replace the MARVELL_PHY_ID_88E6390. That will break
> > the 6390! You need to add the new PHY for the 88E6341.
>
> I have not replaced anything.
Yes, sorry. I read the diff wrong.
Andrew
o if in future you produce C45 multi-gige PHYs, which have nothing in
common with the T1 automative PHY, it will still be in this driver?
Andrew
d = <1000>;
full-duplex;
};
};
The fec phy-handle = <ðphy0>; is pointing to the PHY of switch port
0. This seems wrong. Does the FEC have a PHY? Do you connect the FEC
and the SWITCH at the RGMII level? Or with two back to back PHYs?
If you are doing it RGMII level, the FEC also needs a fixed-link.
Andrew
Y_ID_88E6390,
> + .phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
> .phy_id_mask = MARVELL_PHY_ID_MASK,
> - .name = "Marvell 88E6390",
> + .name = "Marvell 88E6341 Family",
You cannot just replace the MARVELL_PHY_ID_88E6390. That will break
the 6390! You need to add the new PHY for the 88E6341.
Andrew
On Mon, Apr 12, 2021 at 01:02:07PM +0300, Radu Nicolae Pirea (NXP OSS) wrote:
> On Fri, 2021-04-09 at 21:36 +0200, Andrew Lunn wrote:
> > On Fri, Apr 09, 2021 at 09:41:06PM +0300, Radu Pirea (NXP OSS) wrote:
> > > Add driver for tja1103 driver and for future NXP C45 PHYs.
>
+{
> + u32 used_space_old;
> + u32 used_space_new;
> +
> + used_space_old = wq->head - wq->tail;
> + used_space_new = wq->head - (wq->tail + num_units);
> +
> + if (used_space_new > used_space_old) {
> + WARN_ON(1);
> + return -ERANGE;
> + }
You could replace the 1 by the condition. There are a couple of these.
Andrew
missed adding the mana_ prefix here. There might be others.
> +#define CQE_POLLING_BUFFER 512
> +struct ana_eq {
> + struct gdma_queue *eq;
> + struct gdma_comp cqe_poll[CQE_POLLING_BUFFER];
> +};
> +static int ana_poll(struct napi_struct *napi, int budget)
> +{
You also have a few cases of ana_, not mana_. There might be others.
Andrew
, the "drv ver" info is passed to the PF driver in the below
> > function:
>
> Ohh, yes, the "driver version" is not the ideal name for that.
>
> I already looked on it in previous patch, came to the conclusion about
> the protocol and forgot :(.
Which suggests it needs renaming.
Andrew
o try to merge the forks back
together so we have one tool to dump any switch.
Andrew
s on the master
interfaces? Could it be we added it to the wrong master?
For this series to make progress, we need to know what has been
tested, and if all the more complex functionality works, not just
basic pings.
Andrew
On Fri, Apr 09, 2021 at 07:42:32AM +0200, Sander Vanheule wrote:
> Hi Andrew,
>
> Thank you for the feedback. You can find a (leaked) datasheet at:
> https://github.com/libc0607/Realtek_switch_hacking/blob/files/RTL8231_Datasheet_1.2.pdf
So this is not really an MFD. It has diffe
ramework which
does not see any work done to it.
Andrew
how?
> +config NXP_C45_PHY
> + tristate "NXP C45 PHYs"
This is also very vague. So in the future it will support PHYs other
than the TJA series?
Andrew
should
know packed is not liked in the kernel and will take care.
If you want to be paranoid add a BUILD_BUG_ON(size(struct foo) != 42);
Andrew
Hi Sven
> Many thanks to Heiner Kallweit for suggesting this solution.
Adding a Suggested-by: would be good. And it might sometime help
Johnathan Corbet extract some interesting statistics from the commit
messages if everybody uses the same format.
Andrew
epending on what you choose, so we
have a clean namespace.
Andrew
to think about forward/backwards compatibility. You are
defining a binding now, which you need to keep. Do you see how an MFD
could be added without breaking backwards compatibility?
Andrew
rnal PHY's IRQ can be registered in the devicetree.
> Change MT7530_NUM_PHYS to 6, and add the following to ER-X-SFP dts PHY node:
I don't know this platform. What is the PHYs interrupt pin connected
to? A SoC GPIO? There is a generic mechanism to describe PHY
interrupts in DT. That should be used, if it is a GPIO.
Andrew
e generalized, more like:
> >
> > bool "Microsoft Network Devices"
> This device is planned for Azure cloud at this time.
> We will update the wording if things change.
This section is about the Vendor. Broadcom, Marvell, natsemi, toshiba,
etc. Microsoft is the Vendor here and all Microsoft Ethernet drivers
belong here. It does not matter what platform they are for.
Andrew
f-by: Danielle Ratson
> Suggested-by: Jakub Kicinski
> Reviewed-by: Ido Schimmel
> Reviewed-by: Jiri Pirko
Seems sensible.
Did you look to see what else is shared and should move? Rather than
doing it one function at a time, can we do it all at once?
Andrew
> If dropping the modifications to gswip_phylink_mac_config is my only change:
> do you want me to keep or drop your Reviewed-by in v2?
You can keep it.
Andrew
On Wed, Apr 07, 2021 at 12:50:38PM +0800, DENG Qingfang wrote:
> Enable MT7530 interrupt controller in the MT7621 SoC.
>
> Signed-off-by: DENG Qingfang
Reviewed-by: Andrew Lunn
Andrew
On Wed, Apr 07, 2021 at 12:50:37PM +0800, DENG Qingfang wrote:
> Add device tree binding to support MT7530 interrupt controller.
>
> Signed-off-by: DENG Qingfang
Reviewed-by: Andrew Lunn
Andrew
It is better to move the functions to before mt7530_setup_mdio().
Andrew
; Signed-off-by: DENG Qingfang
Reviewed-by: Andrew Lunn
Andrew
On Wed, Apr 07, 2021 at 10:22:52PM +0200, Marek Behún wrote:
> 88E2111 is a variant of 88E2110 which does not support 5 gigabit speeds.
>
> Differentiate these variants via the match_phy_device() method, since
> they have the same PHY ID.
>
> Signed-off-by: Marek Behún
Review
gned-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
On Wed, Apr 07, 2021 at 10:22:46PM +0200, Marek Behún wrote:
> The 88E2110 does not support xaui nor rxaui modes. Check for correct
> interface mode for different chips.
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
this work is not finished yet.
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
> For my own curiosity: is there a "recommended" way where to configure
> link up/down, speed, duplex and flow control? currently I have the
> logic in both, .phylink_mac_config and .phylink_mac_link_up.
You probably want to read the documentation in
include/linux/phylink.h
Andrew
On Wed, Apr 07, 2021 at 10:15:37PM +0800, Wong Vee Khee wrote:
> From: Tan Tee Min
>
> The Synopsis MAC controller supports auxiliary snapshot feature that
> allows user to store a snapshot of the system time based on an external
> event.
>
> This patch add supports to the above mentioned featur
take care of others PHYs.
Yes, it just makes working around the broken design harder if you want
to get the most out of the hardware.
Andrew
would be to call stmmac_get_wol(), That
should set wol taking into account both pmt and phy. But i would also
say stmmac_get_wol() and stmmac_set_wol() are broken. They should
combine capabilities, not be either pmt or phy.
Andrew
a macro
gdma_ctx_to_context().
Reverse Christmas tree is not in the main Coding Style documentation,
but it is expected for netdev.
Andrew
t;dev, ... of netdev_err(ndev, ... You should always have
access to dev or ndev, so please change all pr_ calls.
> +static unsigned int num_queues = ANA_DEFAULT_NUM_QUEUE;
> +module_param(num_queues, uint, 0444);
No module parameters please.
Andrew
orks. How does
the switch decide which port to use when sending a frame towards the
CPU? Is there some sort of load balancing?
How does Linux decide which CPU port to use towards the switch?
Andrew
On Tue, Apr 06, 2021 at 05:23:59PM -0700, Jakub Kicinski wrote:
> Add missing kdoc for phy tunable callbacks.
>
> Signed-off-by: Jakub Kicinski
Reviewed-by: Andrew Lunn
Andrew
k_autoneg_inband(mode))
> + miicfg |= GSWIP_MII_CFG_RGMII_IBS;
Is there any other MAC driver doing this? Are there any boards
actually enabling it? Since it is so odd, if there is nothing using
it, i would be tempted to leave this out.
Andrew
_gswip: Let GSWIP automatically set
> the xMII clock")
> Cc: sta...@vger.kernel.org
> Acked-by: Hauke Mehrtens
> Signed-off-by: Martin Blumenstingl
Having the MAC polling the PHY is pretty much always a bad idea.
Reviewed-by: Andrew Lunn
Andrew
p))
> + mask |= BIT(p);
> +
> + return mask;
> +}
Hi Ansuel
We don't add a function unless it has a user. Please call it from somewhere.
Andrew
On Tue, Apr 06, 2021 at 03:59:31PM -0700, Jakub Kicinski wrote:
> Quotes to backticks. All commands use backticks since the names
> are constants.
>
> Signed-off-by: Jakub Kicinski
Upps. Sorry.
Reviewed-by: Andrew Lunn
Andrew
phydev, ETHTOOL_PHY_EDPD_DFLT_TX_MSECS);
> --
So it appears that mv3310_config_init() should not be used with the
mv88x2110. Did i miss somewhere where mv3310_drivers was changed so it
actually does not use it?
Andrew
On Wed, Apr 07, 2021 at 12:11:06AM +0200, Marek Behún wrote:
> This module supports not not only Alaska X, but also Alaska M.
>
> Change module description appropriately.
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
On Wed, Apr 07, 2021 at 12:11:05AM +0200, Marek Behún wrote:
> 88E2111 is a variant of 88E2110 which does not support 5 gigabit speeds.
>
> Differentiate these variants via the match_phy_device() method, since
> they have the same PHY ID.
>
> Signed-off-by: Marek Behún
Review
On Wed, Apr 07, 2021 at 12:11:04AM +0200, Marek Behún wrote:
> Add constants for 2.5G and 5G speed in PCS speed register into mdio.h.
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
On Wed, Apr 07, 2021 at 12:11:03AM +0200, Marek Behún wrote:
> The driver name "mv88x2110" should be instead "mv88e2110".
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
gned-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
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