Re: [PATCH bpf-next 1/7] mips: bpf: implement jitting of BPF_ALU | BPF_ARSH | BPF_X

Hi Jiong, On Tue, Dec 04, 2018 at 03:55:16PM -0500, Jiong Wang wrote: > Jitting of BPF_K is supported already, but not BPF_X. This patch complete > the support for the latter on both MIPS and microMIPS. > > Cc: Paul Burton > Cc: linux-m...@vger.kernel.org > Signed-

Re: [PATCH v2 bpf] mips: bpf: fix encoding bug for mm_srlv32_op

Hi Jakub, On Mon, Dec 03, 2018 at 03:55:45PM -0800, Jakub Kicinski wrote: > On Mon, 3 Dec 2018 22:42:04 +0000, Paul Burton wrote: > > Jiong Wang wrote: > > > For micro-mips, srlv inside POOL32A encoding space should use 0x50 > > > sub-opcode, NOT 0x90. > > &g

Re: [PATCH v2 bpf] mips: bpf: fix encoding bug for mm_srlv32_op

ion which is using 0x50 for srlv and 0x90 for srav. > > v1->v2: > - Keep mm_srlv32_op sorted by value. > > Fixes: f31318fdf324 ("MIPS: uasm: Add srlv uasm instruction") > Cc: Markos Chandras > Cc: Paul Burton > Cc: linux-m...@vger.kernel.org > Acked-by: Ja

Re: [PATCH bpf] mips: bpf: fix encoding bug for mm_srlv32_op

ure team. > Fixes: f31318fdf324 ("MIPS: uasm: Add srlv uasm instruction") > CC: Markos Chandras > CC: Paul Burton > Acked-by: Jakub Kicinski > Signed-off-by: Jiong Wang > --- > arch/mips/include/uapi/asm/inst.h | 2 +- > 1 file changed, 1 insertion(+), 1 dele

Re: [PATCH 3/4] net: lantiq: Add Lantiq / Intel vrx200 Ethernet driver

Hi Hauke, On Sat, Jul 21, 2018 at 09:13:57PM +0200, Hauke Mehrtens wrote: > diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c > index e0af39b33e28..c704312ef7d5 100644 > --- a/arch/mips/lantiq/xway/sysctrl.c > +++ b/arch/mips/lantiq/xway/sysctrl.c > @@ -536,7 +536,7

Re: [PATCH 1/4] MIPS: lantiq: Do not enable IRQs in dma open

> driver. > > Signed-off-by: Hauke Mehrtens > --- > arch/mips/lantiq/xway/dma.c| 1 - > drivers/net/ethernet/lantiq_etop.c | 1 + > 2 files changed, 1 insertion(+), 1 deletion(-) If you'd like this to go via the netdev tree to keep it with the rest of the series:

Re: [PATCH v7 06/11] net: pch_gbe: Only enable MAC when PHY link is active

Hi Florian, On Wed, Jun 27, 2018 at 10:54:24AM -0700, Florian Fainelli wrote: > On 06/26/2018 05:06 PM, Paul Burton wrote: > > When using a PHY connected via RGMII, as the pch_gbe driver presumes is > > the case, the RX clock is provided by the PHY to the MAC. Various PHYs, >

Re: [PATCH v7 09/11] net: pch_gbe: Convert to mdiobus and phylib

Hi Andrew, On Wed, Jun 27, 2018 at 07:51:44PM +0200, Andrew Lunn wrote: > > @@ -5,7 +5,8 @@ > > config PCH_GBE > > tristate "OKI SEMICONDUCTOR IOH(ML7223/ML7831) GbE" > > depends on PCI && (X86_32 || COMPILE_TEST) > > - select MII > > + select PHYLIB > > + imply AT803X_PHY if

Re: [PATCH v7 06/11] net: pch_gbe: Only enable MAC when PHY link is active

Hi Andrew, On Wed, Jun 27, 2018 at 07:30:14PM +0200, Andrew Lunn wrote: > On Tue, Jun 26, 2018 at 05:06:07PM -0700, Paul Burton wrote: > > When using a PHY connected via RGMII, as the pch_gbe driver presumes is > > the case, the RX clock is provided by the PHY to the MA

Re: [PATCH v7 03/11] net: pch_gbe: Probe PHY ID & initialize only once

Hi Andrew, On Wed, Jun 27, 2018 at 07:21:31PM +0200, Andrew Lunn wrote: > > [1] Please, someone patent PHY hotplugging & rigorously enforce said > > patent such that nobody can do it. At least not with an EG20T MAC. > > Hi Paul > > It is already possible, and probably patented. SFP cages

[PATCH v7 01/11] net: pch_gbe: Remove unused struct pch_gbe_adapter fields

drop that from the kerneldoc comment. Signed-off-by: Paul Burton Cc: Andrew Lunn Cc: David S. Miller Cc: netdev@vger.kernel.org --- Changes in v7: New patch drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 9 - drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 1 - 2 files cha

[PATCH v7 11/11] net: pch_gbe: Allow build on MIPS platforms

Allow the pch_gbe driver to be built on MIPS platforms, allowing its use on the MIPS Boston development board. Signed-off-by: Paul Burton Cc: Andrew Lunn Cc: David S. Miller Cc: netdev@vger.kernel.org --- Changes in v7: None drivers/net/ethernet/oki-semi/pch_gbe/Kconfig | 2 +- 1 file

[PATCH v7 04/11] net: pch_gbe: Remove irq_sem

register. Signed-off-by: Paul Burton Cc: Andrew Lunn Cc: David S. Miller Cc: netdev@vger.kernel.org --- Changes in v7: New patch drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 2 -- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 7 +-- 2 files changed, 1 insertion(+), 8 d

[PATCH v7 09/11] net: pch_gbe: Convert to mdiobus and phylib

of the series. - Drop the AR8031 PHY hibernation disable fixup.] Signed-off-by: Andrew Lunn Signed-off-by: Paul Burton Cc: Andrew Lunn Cc: David S. Miller Cc: netdev@vger.kernel.org --- Changes in v7: - Heavy rebasing atop earlier patches. Changes in v6: - New patch drivers/net/ethernet/oki

[PATCH v7 07/11] net: pch_gbe: Remove AR8031 PHY hibernation disable

We should now be able to cope with the PHY entering hibernation, ie. ceasing to provide the RX clock, whilst the ethernet link is down. Remove the code responsible for disabling the AR8031 PHY's hibernation feature, allowing the PHY to enter its low power hibernation state. Signed-off-by: Paul

[PATCH v7 10/11] ptp: pch: Allow build on MIPS platforms

Allow the ptp_pch driver to be built on MIPS platforms in preparation for use on the MIPS Boston board. Signed-off-by: Paul Burton Acked-by: Richard Cochran Cc: Andrew Lunn Cc: David S. Miller Cc: netdev@vger.kernel.org --- Changes in v7: None drivers/ptp/Kconfig | 2 +- 1 file changed, 1

[PATCH v7 03/11] net: pch_gbe: Probe PHY ID & initialize only once

oving us closer to the behavior we'll have with phylib. [1] Please, someone patent PHY hotplugging & rigorously enforce said patent such that nobody can do it. At least not with an EG20T MAC. Signed-off-by: Paul Burton Cc: Andrew Lunn Cc: David S. Miller Cc: netdev@vger.kernel.org --- C

[PATCH v7 08/11] net: pch_gbe: Clean up resets

_rx_addrs() entirely, leaving the address configuration performed by pch_gbe_set_multi() intact. With this done we know that pch_gbe_reset() will leave us with the multicast MAC addresses & filtering configured correctly, so we can remove the call to pch_gbe_set_multi() in pch_gbe_watchdog

[PATCH v7 06/11] net: pch_gbe: Only enable MAC when PHY link is active

oves us away from this model by only configuring the MAC when the PHY indicates that the ethernet link is up. When the link is up we should be able to safely expect that the RX clock is being provided, and therefore safely reset & configure the MAC. Signed-off-by: Paul Burton Cc: Andrew

[PATCH v7 02/11] net: pch_gbe: Mask spare MAC addresses all at once

Signed-off-by: Paul Burton Cc: Andrew Lunn Cc: David S. Miller Cc: netdev@vger.kernel.org --- Changes in v7: New patch drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/oki-semi

[PATCH v7 00/11] net: pch_gbe: Fixes, conversion to phylib, enable for MIPS

ins some platform-specific code for, so I haven't been able to test the end result there. Applies cleanly atop net-next as of commit 27a2628b3c24 ("selftests: forwarding: mirror_gre_vlan_bridge_1q: Unset rp_filter"). Thanks, Paul Andrew Lunn (1): net: pch_gbe: Convert to mdiobu

[PATCH v7 05/11] net: pch_gbe: Move pch_gbe_watchdog lower in pch_gbe_main.c

except for whitespace changes to satisfy checkpatch. Signed-off-by: Paul Burton Cc: Andrew Lunn Cc: David S. Miller Cc: netdev@vger.kernel.org --- Changes in v7: New patch .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 103 +- 1 file changed, 52 insertions(+), 51 deletions

[PATCH 10/14] net: pch_gbe: Remove PCH_GBE_MAC_IFOP_RGMII define

then preprocessor defines won't be the best way to select between them anyway. Signed-off-by: Paul Burton --- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 9 - drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h | 1 - 2 files changed, 10 deletions(-) diff --git a/drivers/net/ethernet

[PATCH 08/14] net: pch_gbe: Remove get_bus_info HAL abstraction

values within a struct pch_gbe_bus_info which is never used, so we simply remove the call to it in pch_gbe_probe & remove struct pch_gbe_bus_info entirely. Now that struct pch_gbe_functions is empty we remove it entirely too. Signed-off-by: Paul Burton --- .../net/ethernet/oki-semi/pch

[PATCH 11/14] net: pch_gbe: Remove dead RINGFREE code

The pch_gbe driver includes some code which appears to be an attempt to work around a problem with the pch_gbe_free_rx_resources & pch_gbe_free_tx_resources functions that no longer exists. Remove the code guarded by the never-defined RINGFREE preprocessor macro. Signed-off-by: Paul Bu

[PATCH 02/14] net: pch_gbe: Remove power_{up,down}_phy HAL abstraction

r_up & pch_phy_power_down directly. Signed-off-by: Paul Burton --- .../net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 4 .../ethernet/oki-semi/pch_gbe/pch_gbe_api.c | 22 --- .../ethernet/oki-semi/pch_gbe/pch_gbe_api.h | 2 -- .../ethernet/oki-semi/pch_gbe/pch_gbe_main

[PATCH 09/14] net: pch_gbe: Remove pch_gbe_hal_setup_init_funcs

, into the single caller pch_gbe_sw_init. With this pch_gbe_api.c & pch_gbe_api.h are essentially empty, so they are removed & inclusions of the latter replaced with pch_gbe_phy.h which was previously being included via pch_gbe_api.h. Signed-off-by: Paul Burton --- .../net/ethernet/oki-semi

[PATCH 07/14] net: pch_gbe: Remove init_hw HAL abstraction

) into its single caller (pch_gbe_reset). Signed-off-by: Paul Burton --- .../net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 2 - .../ethernet/oki-semi/pch_gbe/pch_gbe_api.c | 45 --- .../ethernet/oki-semi/pch_gbe/pch_gbe_api.h | 1 - .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c

[PATCH 03/14] net: pch_gbe: Remove read_mac_addr HAL abstraction

this is defined in the same translation unit as all of its callers, we can make it static & remove it from the pch_gbe.h header. Signed-off-by: Paul Burton --- .../net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 3 --- .../ethernet/oki-semi/pch_gbe/pch_gbe_api.c | 19 --- .../ethe

[PATCH 14/14] net: pch_gbe: Clean up pch_gbe_set_multi

set. In these cases, just as when we want to monitor more multicast addresses than we have MAC address registers, we disable multicast filtering so the MAC address registers are unused. Signed-off-by: Paul Burton --- .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 33 +-- 1 file changed

[PATCH 13/14] net: pch_gbe: Inline pch_gbe_mac_mc_addr_list_update

registers, then frees the array. This patch simplifies this somewhat by inlining pch_gbe_mac_mc_addr_list_update into pch_gbe_set_multi, and removing the requirement for the MAC addresses to stored consecutively in a single array. Signed-off-by: Paul Burton --- .../ethernet/oki-semi/pch_gbe

[PATCH 04/14] net: pch_gbe: Remove sw_reset_phy HAL abstraction

, which is already called directly within the same translation unit, can therefore be made static and removed from the pch_gbe_phy.h header. Signed-off-by: Paul Burton --- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 2 -- .../net/ethernet/oki-semi/pch_gbe/pch_gbe_api.c | 16

[PATCH 12/14] net: pch_gbe: Use module_pci_driver()

has been in mainline, despite many changes being made to it before and since. Signed-off-by: Paul Burton --- .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 19 +-- 1 file changed, 1 insertion(+), 18 deletions(-) diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c

[PATCH 05/14] net: pch_gbe: Remove reset_phy HAL abstraction

For some reason the pch_gbe driver contains a struct pch_gbe_functions with pointers used by a HAL abstraction layer, even though there is only one implementation of each function. This patch removes the reset_phy abstraction in favor of calling pch_gbe_phy_hw_reset directly. Signed-off-by: Paul

[PATCH 01/14] net: pch_gbe: Remove unused copybreak parameter

The pch_gbe driver includes a 'copybreak' parameter which appears to have been copied from the e1000e driver but is entirely unused. Remove the dead code. Signed-off-by: Paul Burton --- .../net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 15 --- 1 file changed, 15 deletions

[PATCH 00/14] net: pch_gbe: Cleanups

a little more maleable & reduce the probability of me gouging out my eyes. Applies cleanly atop net-next as of 5424ea27390f ("netns: get more entropy from net_hash_mix()"). Thanks, Paul Paul Burton (14): net: pch_gbe: Remove unused copybreak parameter net: pch_gbe: Remove

[PATCH 06/14] net: pch_gbe: Remove {read,write}_phy_reg HAL abstraction

miic & pch_gbe_phy_write_reg_miic directly. Signed-off-by: Paul Burton --- .../net/ethernet/oki-semi/pch_gbe/pch_gbe.h | 4 --- .../ethernet/oki-semi/pch_gbe/pch_gbe_api.c | 36 --- .../ethernet/oki-semi/pch_gbe/pch_gbe_api.h | 2 -- .../oki-semi/pch_gbe/pch_gbe_e

Re: [PATCH v6 1/6] net: phy: at803x: Export at803x_debug_reg_mask()

Hi Andrew, On Fri, May 11, 2018 at 09:24:46PM +0200, Andrew Lunn wrote: > > I could reorder the probe function a little to initialize the PHY before > > performing the MAC reset, drop this patch and the AR803X hibernation > > stuff from patch 2 if you like. But again, I can't actually test the >

Re: [PATCH v6 1/6] net: phy: at803x: Export at803x_debug_reg_mask()

On Fri, May 11, 2018 at 11:25:02AM -0700, Paul Burton wrote: > Hi Andrew, > > On Fri, May 11, 2018 at 02:26:19AM +0200, Andrew Lunn wrote: > > On Thu, May 10, 2018 at 04:16:52PM -0700, Paul Burton wrote: > > > From: Andrew Lunn <and...@lunn.ch> > > > >

Re: [PATCH v6 1/6] net: phy: at803x: Export at803x_debug_reg_mask()

Hi Andrew, On Fri, May 11, 2018 at 02:26:19AM +0200, Andrew Lunn wrote: > On Thu, May 10, 2018 at 04:16:52PM -0700, Paul Burton wrote: > > From: Andrew Lunn <and...@lunn.ch> > > > > On some boards, this PHY has a problem when it hibernates. Export this > > funct

[PATCH v6 6/6] MIPS: Boston: Adjust DT for pch_gbe PHY support

Tree, so the DT and kernel are always shipped together for the Boston platform. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: Andrew Lunn <and...@lunn.ch> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel.org --- Changes

[PATCH v6 5/6] net: pch_gbe: Allow build on MIPS platforms

Allow the pch_gbe driver to be built on MIPS platforms, allowing its use on the MIPS Boston development board. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: Andrew Lunn <and...@lunn.ch> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netd

[PATCH v6 4/6] ptp: pch: Allow build on MIPS platforms

Allow the ptp_pch driver to be built on MIPS platforms in preparation for use on the MIPS Boston board. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> Acked-by: Richard Cochran <richardcoch...@gmail.com> Cc: Andrew Lunn <and...@lunn.ch> Cc: David S. Miller <da...@davem

[PATCH v6 3/6] net: pch_gbe: Support DeviceTree for MDIO/PHY description

-NULL device node in order to continue functioning as-is if a system has CONFIG_OF_MDIO=y but doesn't use the devicetree. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: Andrew Lunn <and...@lunn.ch> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-m

[PATCH v6 1/6] net: phy: at803x: Export at803x_debug_reg_mask()

From: Andrew Lunn <and...@lunn.ch> On some boards, this PHY has a problem when it hibernates. Export this function to a board can register a PHY fixup to disable hibernation. Signed-off-by: Andrew Lunn <and...@lunn.ch> Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: D

[PATCH v6 2/6] net: ethernet: pch_gbe: Convert to mdiobus and phylib

define of PCH_GBE_MAC_IFOP_RGMII. - Add GPIOF_ACTIVE_LOW to the minnow PHY reset GPIO flags.] Signed-off-by: Andrew Lunn <and...@lunn.ch> Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel.org --- Ch

[PATCH v6 0/6] net: pch_gbe: MIPS support

vers-unmatched-performance-and-efficiency-for-advanced-lte5g-communications-and-networking-ic-designs/ Andrew Lunn (2): net: phy: at803x: Export at803x_debug_reg_mask() net: ethernet: pch_gbe: Convert to mdiobus and phylib Paul Burton (4): net: pch_gbe: Support DeviceTree for MDIO

Re: [PATCH net-next RFC 0/2] Convert OKI PCH GBE to mdiobus and phylib

Hi Andrew, On Tue, Feb 20, 2018 at 03:28:17AM +0100, Andrew Lunn wrote: > Hi Paul > > Here is my stab at converting the OKI PCH GBE to use the common MDIO > bus and phylib drivers. This is compile tested only, and pretty much > guaranteed to be broken. But hopefully it will help you. Feel free

Re: [PATCH v5 07/14] net: pch_gbe: Fix handling of TX padding

Hi David, On Mon, Feb 19, 2018 at 02:01:25PM +, David Laight wrote: > From: Paul Burton > > Sent: 17 February 2018 20:11 > > > > The ethernet controller found in the Intel EG20T Platform Controller > > Hub requires that we place 2 bytes of padding between the ether

Re: [PATCH v5 00/14] net: pch_gbe: Fixes & MIPS support

Hi Andrew, On Sun, Feb 18, 2018 at 06:56:07PM +0100, Andrew Lunn wrote: > On Sun, Feb 18, 2018 at 09:03:10AM -0800, Paul Burton wrote: > > Hi David, > > > > On Sun, Feb 18, 2018 at 10:31:12AM -0500, David Miller wrote: > > > Nobody is going to see and apply

Re: [PATCH v5 00/14] net: pch_gbe: Fixes & MIPS support

Hi David, On Sun, Feb 18, 2018 at 10:31:12AM -0500, David Miller wrote: > Nobody is going to see and apply these patches if you don't CC: the > Linux networking development list, netdev@vger.kernel.org You're replying to mail that was "To: netdev@vger.kernel.org" and I see the whole series in

Re: [PATCH v5 02/14] net: pch_gbe: Pull PHY GPIO handling out of Minnow code

Hi Andrew, On Sun, Feb 18, 2018 at 12:34:42AM +0100, Andrew Lunn wrote: > > Even if that is true, rewriting the driver's PHY handling would be a > > very separate change to the changes this series make which allow this > > driver to work on a platform besides the Minnowboard. The *only* thing > >

Re: [PATCH v5 02/14] net: pch_gbe: Pull PHY GPIO handling out of Minnow code

Hi Andrew, On Sat, Feb 17, 2018 at 11:29:33PM +0100, Andrew Lunn wrote: > On Sat, Feb 17, 2018 at 12:10:25PM -0800, Paul Burton wrote: > > The MIPS Boston development board uses the Intel EG20T Platform > > Controller Hub, including its gigabit ethernet controller, and requir

[PATCH v5 13/14] ptp: pch: Allow build on MIPS platforms

Allow the ptp_pch driver to be built on MIPS platforms in preparation for use on the MIPS Boston board. Signed-off-by: Paul Burton <paul.bur...@mips.com> Acked-by: Richard Cochran <richardcoch...@gmail.com> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-m

[PATCH v5 11/14] net: pch_gbe: Ensure DMA is ordered with descriptor writes

DMA is enabled only after all writes to the descriptors. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel.org --- Changes in v5: - New patch. Changes in v4: None Changes in v3: None Changes in v2

[PATCH v5 07/14] net: pch_gbe: Fix handling of TX padding

it clearer what the code is doing, and fix a typo in the comment indicating that padding is inserted. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel.org --- Changes in v5: None Changes in

[PATCH v5 05/14] net: pch_gbe: Always reset PHY along with MAC

- we need to reset the PHY at all the same times. Do that from pch_gbe_mac_reset_hw which is used to reset the MAC in all cases. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel.org --- C

[PATCH v5 03/14] dt-bindings: net: Document Intel pch_gbe binding

Introduce documentation for a device tree binding for the Intel Platform Controller Hub (PCH) GigaBit Ethernet (GBE) device. Although this is a PCIe device & thus largely auto-detectable, this binding will be used to provide the driver with the PHY reset GPIO. Signed-off-by: Paul Burton <p

[PATCH v5 08/14] net: pch_gbe: Fold pch_gbe_setup_[rt]ctl into pch_gbe_configure_[rt]x

the same way. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel.org --- Changes in v5: - New patch. Changes in v4: None Changes in v3: None Changes in v2: None .../net/ethernet/oki-semi/pc

[PATCH v5 10/14] net: pch_gbe: Disable TX DMA whilst configuring descriptors

hould ensure that the device doesn't begin reading descriptors before we have configured them. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel.org --- Changes in v5: - New patch. Changes i

[PATCH v5 04/14] net: pch_gbe: Add device tree support

vice will be probed after the ethernet MAC. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel.org --- Changes in v5: None Changes in v4: - Use ERR_CAST(), thanks kbuild test robot/Fengguang! Cha

[PATCH v5 09/14] net: pch_gbe: Use pch_gbe_disable_dma_rx() in pch_gbe_configure_rx()

pch_gbe_disable_dma_rx() rather than duplicate its functionality. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel.org --- Changes in v5: - New patch. Changes in v4: None Changes in v3: None Changes

[PATCH v5 14/14] net: pch_gbe: Allow build on MIPS platforms

Allow the pch_gbe driver to be built on MIPS platforms, allowing its use on the MIPS Boston development board. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel.org --- Changes in v5:

[PATCH v5 12/14] net: pch_gbe: Fix TX RX descriptor accesses for big endian systems

always operates in little endian mode. Rectify this by appropriately byte swapping these descriptor field values in the driver software. Signed-off-by: Hassan Naveed <hassan.nav...@mips.com> Signed-off-by: Paul Burton <paul.bur...@mips.com> Reviewed-by: Paul Burton <paul.bur...@mips.c

[PATCH v5 00/14] net: pch_gbe: Fixes & MIPS support

the PHY reset GPIO. Applies atop v4.16-rc1. Hassan Naveed (1): net: pch_gbe: Fix TX RX descriptor accesses for big endian systems Paul Burton (13): net: pch_gbe: Mark Minnow PHY reset GPIO active low net: pch_gbe: Pull PHY GPIO handling out of Minnow code dt-bindings: net: Document Intel

[PATCH v5 06/14] net: pch_gbe: Allow longer for resets

the speed of the CPU. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel.org --- Changes in v5: - Bump up the timeout based on feedback from Marcin. Changes in v4: None Changes in v3: - Swi

[PATCH v5 01/14] net: pch_gbe: Mark Minnow PHY reset GPIO active low

reflect logically whether the device is being reset or not. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel.org --- Changes in v5: None Changes in v4: None Changes in v3: None Changes i

[PATCH v5 02/14] net: pch_gbe: Pull PHY GPIO handling out of Minnow code

patches. Signed-off-by: Paul Burton <paul.bur...@mips.com> Cc: David S. Miller <da...@davemloft.net> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel.org --- Changes in v5: - Name struct pch_gbe_privdata's platform_init pdata arg, per checkpatch. Changes in v4: None Changes in v3: -

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, On Tuesday, 26 September 2017 21:53:21 PDT David Miller wrote: > From: Paul Burton <paul.bur...@imgtec.com> > Date: Tue, 26 Sep 2017 21:30:56 -0700 > > > Nobody said that you are required to do anything, I suggested that > > it would be beneficial if y

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, On Tuesday, 26 September 2017 19:52:44 PDT David Miller wrote: > From: Paul Burton <paul.bur...@imgtec.com> > Date: Tue, 26 Sep 2017 14:30:33 -0700 > > > I'd suggest that at a minimum if you're unwilling to obey the API as > > described in Documentatio

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, On Tuesday, 26 September 2017 13:33:09 PDT David Miller wrote: > From: Paul Burton <paul.bur...@imgtec.com> > Date: Tue, 26 Sep 2017 11:48:19 -0700 > > >> The device writes into only the bytes it was given access to, which > >> starts at the DMA

Re: [PATCH] net: stmmac: Meet alignment requirements for DMA

Hi David, On Tuesday, 26 September 2017 10:34:00 PDT David Miller wrote: > From: Matt Redfearn > Date: Tue, 26 Sep 2017 14:57:39 +0100 > > > Since the MIPS architecture requires software cache management, > > performing a dma_map_single(TO_DEVICE) will writeback and

[PATCH v4 6/7] net: pch_gbe: Allow longer for resets

the speed of the CPU. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> Cc: David S. Miller <da...@davemloft.net> Cc: Eric Dumazet <eduma...@google.com> Cc: Jarod Wilson <ja...@redhat.com> Cc: Tobias Klauser <tklau...@distanz.ch> Cc: linux-m...@linux-mips.org Cc: netdev

[PATCH v4 2/7] net: pch_gbe: Pull PHY GPIO handling out of Minnow code

patches. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> Cc: David S. Miller <da...@davemloft.net> Cc: Eric Dumazet <eduma...@google.com> Cc: Jarod Wilson <ja...@redhat.com> Cc: Tobias Klauser <tklau...@distanz.ch> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kerne

[PATCH v4 1/7] net: pch_gbe: Mark Minnow PHY reset GPIO active low

reflect logically whether the device is being reset or not. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> Cc: David S. Miller <da...@davemloft.net> Cc: Eric Dumazet <eduma...@google.com> Cc: Jarod Wilson <ja...@redhat.com> Cc: Tobias Klauser <tklau...@distanz.c

[PATCH v4 0/7] net: pch_gbe: Fixes & MIPS support

the PHY reset GPIO. Applies atop v4.12-rc4. Paul Burton (7): net: pch_gbe: Mark Minnow PHY reset GPIO active low net: pch_gbe: Pull PHY GPIO handling out of Minnow code dt-bindings: net: Document Intel pch_gbe binding net: pch_gbe: Add device tree support net: pch_gbe: Always reset PHY

Re: [PATCH v3 2/7] net: pch_gbe: Pull PHY GPIO handling out of Minnow code

Hi Andrew, On Saturday, 3 June 2017 10:52:00 PDT Andrew Lunn wrote: > > diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c > > b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c index > > d38198718005..cb9b904786e4 100644 > > ---

[PATCH v3 7/7] net: pch_gbe: Allow build on MIPS platforms

Allow the pch_gbe driver to be built on MIPS platforms, in preparation for its use on the MIPS Boston board. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> Cc: David S. Miller <da...@davemloft.net> Cc: Eric Dumazet <eduma...@google.com> Cc: Jarod Wilson <ja...@redhat.co

[PATCH v3 6/7] net: pch_gbe: Allow longer for resets

the speed of the CPU. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> Cc: David S. Miller <da...@davemloft.net> Cc: Eric Dumazet <eduma...@google.com> Cc: Jarod Wilson <ja...@redhat.com> Cc: Tobias Klauser <tklau...@distanz.ch> Cc: linux-m...@linux-mips.org Cc: netdev

[PATCH v3 5/7] net: pch_gbe: Always reset PHY along with MAC

- we need to reset the PHY at all the same times. Do that from pch_gbe_mac_reset_hw which is used to reset the MAC in all cases. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> Cc: David S. Miller <da...@davemloft.net> Cc: Eric Dumazet <eduma...@google.com> Cc: Jarod Wilson <

[PATCH v3 3/7] dt-bindings: net: Document Intel pch_gbe binding

Introduce documentation for a device tree binding for the Intel Platform Controller Hub (PCH) GigaBit Ethernet (GBE) device. Although this is a PCIe device & thus largely auto-detectable, this binding will be used to provide the driver with the PHY reset GPIO. Signed-off-by: Paul Burton <p

[PATCH v3 4/7] net: pch_gbe: Add device tree support

vice will be probed after the ethernet MAC. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> Cc: David S. Miller <da...@davemloft.net> Cc: Eric Dumazet <eduma...@google.com> Cc: Jarod Wilson <ja...@redhat.com> Cc: Tobias Klauser <tklau...@distanz.ch> Cc: linux-m...@linux-m

[PATCH v3 2/7] net: pch_gbe: Pull PHY GPIO handling out of Minnow code

patches. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> Cc: David S. Miller <da...@davemloft.net> Cc: Eric Dumazet <eduma...@google.com> Cc: Jarod Wilson <ja...@redhat.com> Cc: Tobias Klauser <tklau...@distanz.ch> Cc: linux-m...@linux-mips.org Cc: netdev@vger.kernel

[PATCH v3 1/7] net: pch_gbe: Mark Minnow PHY reset GPIO active low

reflect logically whether the device is being reset or not. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> Cc: David S. Miller <da...@davemloft.net> Cc: Eric Dumazet <eduma...@google.com> Cc: Jarod Wilson <ja...@redhat.com> Cc: Tobias Klauser <tklau...@distanz.c

[PATCH v3 0/7] net: pch_gbe: Fixes & MIPS support

the PHY reset GPIO. Applies atop v4.12-rc3. Paul Burton (7): net: pch_gbe: Mark Minnow PHY reset GPIO active low net: pch_gbe: Pull PHY GPIO handling out of Minnow code dt-bindings: net: Document Intel pch_gbe binding net: pch_gbe: Add device tree support net: pch_gbe: Always reset PHY

[PATCH] net: lantiq_etop: Remove unused 'i' variable

_mdio_init': drivers/net/ethernet/lantiq_etop.c:414:6: warning: unused variable 'i' [-Wunused-variable] int i; ^ Fix this by removing the declaration of the 'i' variable. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> --- drivers/net/ethernet/lantiq_etop.c | 1 - 1 file cha

[PATCH] net: ti: cpmac: Fix compiler warning due to type confusion

n is performed as unsigned integers, and for consistency change the type of the len variable to unsigned int. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> --- drivers/net/ethernet/ti/cpmac.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/ti/c

[PATCH v2 12/15] ptp: pch: Allow build on MIPS platforms

Allow the ptp_pch driver to be built on MIPS platforms in preparation for use on the MIPS Boston board. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> Acked-by: Richard Cochran <richardcoch...@gmail.com> --- Changes in v2: None drivers/ptp/Kconfig | 2 +- 1 file changed, 1 ins

[PATCH v2 1/6] net: pch_gbe: Allow build on MIPS platforms

Allow the pch_gbe driver to be built on MIPS platforms, in preparation for its use on the MIPS Boston board. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> --- Changes in v2: None drivers/net/ethernet/oki-semi/pch_gbe/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[PATCH v2 0/6] pch_gbe fixes for Imagination Technologies MIPS Boston

is somewhat standalone & should fix theoretical issues for other users of the driver, but has only been tested by myself in conjunction with the above series on a Boston board. Paul Burton (6): net: pch_gbe: Allow build on MIPS platforms net: pch_gbe: Mark Minnow PHY reset GPIO active low

[PATCH v2 2/6] net: pch_gbe: Mark Minnow PHY reset GPIO active low

reflect logically whether the device is being reset or not. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> --- Changes in v2: None drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/ok

[PATCH v2 6/6] net: pch_gbe: Allow longer for resets

Resets of the EG20T MAC on the MIPS Boston development board take longer than the 1000 loops that pch_gbe_wait_clr_bit was performing. Bump up the number of loops. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> --- Changes in v2: None drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_

[PATCH v2 4/6] net: pch_gbe: Always reset PHY along with MAC

- we need to reset the PHY at all the same times. Do that from pch_gbe_mac_reset_hw which is used to reset the MAC in all cases. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> --- Changes in v2: None drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 3 +++ 1 file changed, 3 inse

[PATCH v2 3/6] net: pch_gbe: Pull PHY GPIO handling out of Minnow code

patches. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> --- Changes in v2: None drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h| 4 ++- .../net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 33 +++--- 2 files changed, 26 insertions(+), 11 deletions(-) diff --git a/d

[PATCH v2 5/6] net: pch_gbe: Add device tree support

vice will be probed after the ethernet MAC. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> --- Changes in v2: - Tidy up handling of parsing private data, drop err_out. .../net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 30 +- 1 file changed, 29 insertions(+), 1 deletio

[PATCH 21/28] net: pch_gbe: mark Minnow PHY reset GPIO active low

reflect logically whether the device is being reset or not. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> --- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch

[PATCH 22/28] net: pch_gbe: pull PHY GPIO handling out of Minnow code

patches. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> --- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h| 4 ++- .../net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 33 +++--- 2 files changed, 26 insertions(+), 11 deletions(-) diff --git a/drivers/net/ethernet/ok

[PATCH 19/28] net: pch_gbe: allow build on MIPS platforms

Allow the pch_gbe driver to be built on MIPS platforms, in preparation for its use on the MIPS Boston board. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> --- drivers/net/ethernet/oki-semi/pch_gbe/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drive

[PATCH 23/28] net: pch_gbe: always reset PHY along with MAC

- we need to reset the PHY at all the same times. Do that from pch_gbe_mac_reset_hw which is used to reset the MAC in all cases. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> --- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 3 +++ 1 file changed, 3 insertions(+) diff

[PATCH 24/28] net: pch_gbe: add device tree support

vice will be probed after the ethernet MAC. Signed-off-by: Paul Burton <paul.bur...@imgtec.com> --- .../net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 33 +- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/d

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