[PATCH] ARM: net: bpf: fix zero right shift

The LSR instruction cannot be used to perform a zero right shift since a 0 as the immediate value (imm5) in the LSR instruction encoding means that a shift of 32 is perfomed. See DecodeIMMShift() in the ARM ARM. Make the JIT skip generation of the LSR if a zero-shift is requested. This was

Re: [PATCH] ARM: net: bpf: fix zero right shift

On Tue, Jan 05, 2016 at 06:34:04PM +0100, Rabin Vincent wrote: > The LSR instruction cannot be used to perform a zero right shift since a > 0 as the immediate value (imm5) in the LSR instruction encoding means > that a shift of 32 is perfomed. See DecodeIMMShift() in the ARM ARM. > > Make the

Re: [PATCH] ARM: net: bpf: fix zero right shift

From: Rabin Vincent Date: Tue, 5 Jan 2016 18:34:04 +0100 > The LSR instruction cannot be used to perform a zero right shift since a > 0 as the immediate value (imm5) in the LSR instruction encoding means > that a shift of 32 is perfomed. See DecodeIMMShift() in the ARM ARM. > >