Hi Andrew,
Look like these patches are not create from "net-next" branch.
Can you please share branch detail where i can apply patches and check the code
flow?
The 06/12/2019 18:05, Andrew Lunn wrote:
> External E-Mail
>
>
> This patchset adds support for executing Ethernet PHY cable tests and
Hi Andrew,
Finally, I'm able to figureout the branch details (kernel:
ff24e4980a68)and apply your patches.
Give me sometime to review your code and sent my comments.
The 06/12/2019 18:05, Andrew Lunn wrote:
> External E-Mail
>
>
> This patchset adds support for executing Ethernet PHY cable test
From: Raju Lakkaraju
Add the Cable diagnostics command to VSC85xx PHYs.
Signed-off-by: Raju Lakkaraju
---
drivers/net/phy/mscc.c | 128 +
1 file changed, 128 insertions(+)
diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c
index
Pair D: Correctly terminated pair, Loop Length: 0 m
Application git repository path:
---
https://github.com/lakkarajun/bbb_nl_app
Raju Lakkaraju (2):
net: phy: mscc: Add PHY Netlink Interface along with Cable Diagnostics
command
net: phy: mscc: Add PHY
From: Raju Lakkaraju
Add the PHY Netlink interface driver to implement the cable
diagnostics of Microsemi Ethernet PHYs.
Signed-off-by: Raju Lakkaraju
---
drivers/net/phy/Kconfig | 6 ++
drivers/net/phy/Makefile | 1 +
drivers/net/phy/phy.c | 17
drivers/net/phy
From: Raju Lakkaraju
- Turn on Broadcast writes
- UNH 1.8.1 clear bias for UNH 1000BT distortion
- UNH 1.8.7 optimize pre-emphasis for 100BasTx UNH 100W fix
- Enable Token-ring during 'Coma Mode'
Signed-off-by: Raju Lakkaraju
---
v1: Fix the tag for the incriminating commit
---
d
From: Raju Lakkaraju
Fix the VSC 8530/31/40/41 Chips Init sequence
- Turn on Broadcast writes
- UNH 1.8.1 clear bias for UNH 1000BT distortion
- UNH 1.8.7 optimize pre-emphasis for 100BasTx UNH 100W fix
- Enable Token-ring during 'Coma Mode'
Signed-off-by: Raju Lakkaraju
---
drive
From: Raju Lakkaraju
Fix the LED mode DT parameters combine to a single property
and change the vendor prefix i.e. mscc.
Signed-off-by: Raju Lakkaraju
---
Change set:
v0: Fix the LED mode DT parameters combine to a single property
v1: Fix the build test ERROR
v2: Add default LED mode
From: Raju Lakkaraju
Fix the LED mode DT parameters combine to a single property
and change the vendor prefix i.e. mscc.
Signed-off-by: Raju Lakkaraju
---
Change set:
v0: Fix the LED mode DT parameters combine to a single property
v1: Fix the build test ERROR
v2: Add default LED mode
From: Raju Lakkaraju
Fix the LED mode DT parameters combine to a single property
and change the vendor prefix i.e. mscc.
Signed-off-by: Raju Lakkaraju
---
Change set:
v0: Fix the LED mode DT parameters combine to a single property
v1: Fix the build test ERROR
.../devicetree/bindings/net/mscc
Hi Rob,
Thank you for code review comments.
On Tue, Feb 21, 2017 at 10:42:38AM -0600, Rob Herring wrote:
> EXTERNAL EMAIL
>
>
> > Do i need to change from "vsc8531, led-0-mode" to "mscc, led-0-mode"
> > Is this your suggestion?
>
> Well, there shouldn't be a space there, but yess, mscc is the
From: Raju Lakkaraju
Fix the LED mode DT parameters combine to a single property
and change the vendor prefix i.e. mscc.
Signed-off-by: Raju Lakkaraju
---
.../devicetree/bindings/net/mscc-phy-vsc8531.txt | 20 -
drivers/net/phy/mscc.c | 50
Hi Rob,
On Wed, Feb 15, 2017 at 10:45:40AM -0600, Rob Herring wrote:
> EXTERNAL EMAIL
>
>
> On Tue, Feb 07, 2017 at 07:10:26PM +0530, Raju Lakkaraju wrote:
> > From: Raju Lakkaraju
> >
> > + Default value is VSC8531_LINK_1000_ACTIVITY (1).
&
From: Raju Lakkaraju
LED Mode:
Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different
status information that can be selected by setting LED mode.
LED Mode parameter (vsc8531, led-0-mode) and (vsc8531, led-1-mode) get
from Device Tree.
Signed-off-by: Raju Lakkaraju
---
Change
Hi Florian,
Thank you for review comments.
On Wed, Feb 01, 2017 at 10:04:08AM -0800, Florian Fainelli wrote:
> EXTERNAL EMAIL
>
>
> On 02/01/2017 04:53 AM, Raju Lakkaraju wrote:
> > From: Raju Lakkaraju
> >
> > LED Mode:
> > Microsemi PHY support 2
Hi Andrew,
Thank you for given review comments.
On Wed, Feb 01, 2017 at 02:55:55PM +0100, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> On Wed, Feb 01, 2017 at 06:23:46PM +0530, Raju Lakkaraju wrote:
> > From: Raju Lakkaraju
> >
> > LED Mode:
> > +
From: Raju Lakkaraju
LED Mode:
Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different
status information that can be selected by setting LED mode.
LED Mode parameter (vsc8531, led-0-mode) and (vsc8531, led-1-mode) get
from Device Tree.
Signed-off-by: Raju Lakkaraju
From: Raju Lakkaraju
LED Mode:
Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different
status information that can be selected by setting LED mode.
LED Mode parameter (vsc8531, led-0-mode) and (vsc8531, led-1-mode) get from
Device Tree.
Tested on Beaglebone Black with VSC 8531
From: Raju Lakkaraju
LED Mode:
Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different
status information that can be selected by setting LED mode.
LED Mode parameter (vsc8531, led-0-mode) and (vsc8531, led-1-mode) get from
Device Tree.
Tested on Beaglebone Black with VSC 8531
From: Raju Lakkaraju
LED Mode:
Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different
status information that can be selected by setting LED mode.
LED Mode parameter (vsc8531, led-0-mode) and (vsc8531, led-1-mode) get
from Device Tree.
Signed-off-by: Raju Lakkaraju
Hi Andrew,
Thank you for review and valuable comments.
On Tue, Jan 31, 2017 at 02:30:09PM +0100, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> On Tue, Jan 31, 2017 at 11:16:01AM +0530, Raju Lakkaraju wrote:
> > From: Raju Lakkaraju
> >
> > LED Mode:
> > Micr
From: Raju Lakkaraju
LED Mode:
Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different
status information that can be selected by setting LED mode.
LED Mode parameter (vddmac, led-0-mode) and (vddmac, led-1-mode) get
from Device Tree.
Tested on Beaglebone Black with VSC 8531 PHY
From: Raju Lakkaraju
LED Mode:
Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different
status information that can be selected by setting LED mode.
LED Mode parameter (vddmac, led-0-mode) and (vddmac, led-1-mode) get
from Device Tree.
Signed-off-by: Raju Lakkaraju
From: Raju Lakkaraju
PHY drivers to have an eth_tp_mdix_ctrl to indicate what is the configured
MDI setting, and read eth_tp_mdi to indicate what is the current status,
Add new parameter mdix_ctrl in phy_device structure and fix driver.
Signed-off-by: Raju Lakkaraju
---
drivers/net/phy
itialize with ETH_TP_MDI_AUTO. Ethernet controller
never initialize this parameter.
- Fix the mdix changes in marvell and microchip driver.
Raju Lakkaraju (4):
net: phy: add mdix_ctrl to hold the user configuration.
net: phy: update the mdix_ctrl with correct value.
net: phy: Add mdi(x) support in M
From: Raju Lakkaraju
To connect two ports of the same configuration (MDI to MDI or
MDI-X to MDI-X) with a 10/100/1000 Mbit/s connection, an
Ethernet crossover cable is needed to cross over the transmit
and receive signals in the cable, so that they are matched at
the connector level.
When
From: Raju Lakkaraju
Update the mdix and mdix_ctrl with corresponding ethtool configuration
parameters.
Signed-off-by: Raju Lakkaraju
---
drivers/net/phy/phy.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index
From: Raju Lakkaraju
Add new parameter mdix_ctrl to hold the user configuration.
Existing mdix maintain the current status of MDI(X) crossover performed or
not.
mdix_ctrl can configure either ETH_TP_MDI or ETH_TP_MDI_X orETH_TP_MDI_AUTO.
Signed-off-by: Raju Lakkaraju
---
include/linux/phy.h
Hi Andrew,
On Tue, Oct 18, 2016 at 12:58:20PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> > > In fact, this looks a lot like netdev features (e.g: checksum
> > > offload), and there seems to be some commonality here between at
> > > least Marvell and Microsemi (for the faster link down repo
Hi Florian,
Thank you for review comments.
On Mon, Oct 17, 2016 at 05:38:46AM -0700, Florian Fainelli wrote:
> EXTERNAL EMAIL
>
>
> On October 17, 2016 12:31:54 AM PDT, Raju Lakkaraju
> wrote:
> >Hi Andrew,
> >
> >Thank you for code review and comments.
>
Hi Florian,
Thank you for review comments.
On Mon, Oct 17, 2016 at 05:51:11AM -0700, Florian Fainelli wrote:
> EXTERNAL EMAIL
>
>
> On October 17, 2016 1:13:14 AM PDT, Raju Lakkaraju
> wrote:
> >Hi Andrew,
> >
> >Thank you for code review and comments.
>
Hi Florian/Andrew,
Thank you for review comments.
On Thu, Oct 06, 2016 at 04:09:56AM -0700, Florian Fainelli wrote:
> EXTERNAL EMAIL
>
>
> On 10/05/2016 12:18 AM, Andrew Lunn wrote:
> + phydev->mdix = ETH_TP_MDI_AUTO;
> >>>
> >>> Humm, interesting. The only other driver supporting mdix
Hi Andrew,
Thank you for code review and valuable comments.
On Wed, Sep 28, 2016 at 10:24:51PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> > + reg_val = phy_read(phydev, MSCC_PHY_BYPASS_CONTROL);
> > + if ((mdix == ETH_TP_MDI) || (mdix == ETH_TP_MDI_X)) {
> > + reg_val
Hi Florian/Andrew,
Thank you for review comments.
On Thu, Oct 06, 2016 at 03:57:32AM -0700, Florian Fainelli wrote:
> EXTERNAL EMAIL
>
>
> On 09/28/2016 01:24 PM, Andrew Lunn wrote:
> >> static int vsc85xx_wol_set(struct phy_device *phydev,
> >> struct ethtool_wolinfo *
Hi Andrew,
Thank you for code review and comments.
On Fri, Oct 14, 2016 at 02:02:28PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> > On Fri, Oct 14, 2016 at 05:10:33PM +0530, Raju Lakkaraju wrote:
> > From: Raju Lakkaraju
> >
> > VSC8531 Fast Link Fai
Hi Andrew,
Thank you for code review and comments.
On Fri, Oct 14, 2016 at 02:12:32PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> On Fri, Oct 14, 2016 at 05:10:32PM +0530, Raju Lakkaraju wrote:
> > From: Raju Lakkaraju
> >
> > For operation in cabling envi
From: Raju Lakkaraju
This series adds support to the Speed downshift, Fast Link Failure 2,
set drivers for Microsemi PHYs.
Patch 1/4: Link Speed downshift:
For operation in cabling environments that are incompatible with
1000BAST-T, VSC8531 device provides an automatic link
From: Raju Lakkaraju
For operation in cabling environments that are incompatible with
1000BAST-T, VSC8531 device provides an automatic link speed
downshift operation. When enabled, the device automatically changes
its 1000BAST-T auto-negotiation to the next slower speed after
a configured number
From: Raju Lakkaraju
VSC8531 Fast Link Failure 2 feature enables the PHY to indicate the
onset of a potential link failure in < 100 usec for 100BASE-TX
operation. FLF2 is supported through the MDINT (active low) pin.
Signed-off-by: Raju Lakkaraju
Signed-off-by: Allan W. Niel
From: Raju Lakkaraju
Edge-rate:
As system and networking speeds increase, a signal's output transition,
also know as the edge rate or slew rate (V/ns), takes on greater importance
because high-speed signals come with a price. That price is an assortment of
interference problems like ringi
From: Raju Lakkaraju
Wake-on-LAN (WoL) is an Ethernet networking standard that allows
a computer/device to be turned on or awakened by a network message.
VSC8531 PHY can support this feature configure by driver set function.
WoL status get by driver get function.
Tested on Beaglebone Black
Hi Andrew,
Thank you for review comment.
On Tue, Oct 04, 2016 at 04:34:50PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> > v7:
> > - As per review comment, Removed '-'s (minus) sign in Edge rate table.
>
> Still no exact match on the table.
>
> So if i specify a voltage of 3301, 53% slowd
Hi Andrew,
Thank you for code review and valuable comments.
On Wed, Sep 28, 2016 at 10:24:51PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> > + reg_val = phy_read(phydev, MSCC_PHY_BYPASS_CONTROL);
> > + if ((mdix == ETH_TP_MDI) || (mdix == ETH_TP_MDI_X)) {
> > + reg_val
Hi Florian,
Thank you for code review and valuable comments.
On Wed, Sep 28, 2016 at 10:37:07AM -0700, Florian Fainelli wrote:
> EXTERNAL EMAIL
>
>
> On 09/28/2016 05:01 AM, Raju Lakkaraju wrote:
> > From: Raju Lakkaraju
> >
> > Wake-on-LAN (WoL) is an Eth
Hi Andrew,
Thank you for code review and valuable comments.
On Wed, Sep 28, 2016 at 06:27:05PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> > +#define MSCC_PHY_WOL_MAC_CONTROL 27
> > +#define EDGE_RATE_CNTL_POS 5
> > +#define EDGE_RATE_CNTL_MASK0x00E0
>
> This
Hi Andrew,
Thank you for review comments.
I accepted your review comment and change the code.
I resent for code review.
Thanks,
Raju.
On Tue, Oct 04, 2016 at 02:53:19PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> > Regarding remove the -'s in table, PHY data sheet descript the
> > concept
From: Raju Lakkaraju
Edge-rate:
As system and networking speeds increase, a signal's output transition,
also know as the edge rate or slew rate (V/ns), takes on greater importance
because high-speed signals come with a price. That price is an assortment of
interference problems like ringi
et.
Is any thing wrong if i keep in table with '-' (minus) values?
Thanks,
Raju.
On Tue, Oct 04, 2016 at 01:51:32PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> On Tue, Oct 04, 2016 at 05:11:12PM +0530, Raju Lakkaraju wrote:
> > From: Raju Lakkaraju
> &
From: Raju Lakkaraju
Edge-rate:
As system and networking speeds increase, a signal's output transition,
also know as the edge rate or slew rate (V/ns), takes on greater importance
because high-speed signals come with a price. That price is an assortment of
interference problems like ringi
Hi Andrew,
Thank you for comments. I will fix and send the patch.
Thanks,
Raju.
On Tue, Oct 04, 2016 at 08:54:01AM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> On Tue, Oct 04, 2016 at 12:48:59AM -0400, David Miller wrote:
> > From: Raju Lakkaraju
> > Date: Mon, 3
Hi Andrew,
On Mon, Oct 03, 2016 at 09:56:56AM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> > > > +vsc8531_0: ethernet-phy@0 {
> > > > +compatible = "ethernet-phy-id0007.0570";
> > > > +vsc8531,vddmac = /bits/ 16
> > > > ;
> > > > +
Hi Andrew,
Thank you for code review and valuable comments.
On Wed, Sep 28, 2016 at 06:16:53PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> > +Optional properties:
> > +- vsc8531,vddmac : The vddmac in mV.
> > +- vsc8531,edge-slowdown : % the edge should be slowed down relative to
From: Raju Lakkaraju
Edge-rate:
As system and networking speeds increase, a signal's output transition,
also know as the edge rate or slew rate (V/ns), takes on greater importance
because high-speed signals come with a price. That price is an assortment of
interference problems like ringi
From: Raju Lakkaraju
Wake-on-LAN (WoL) is an Ethernet networking standard that allows
a computer/device to be turned on or awakened by a network message.
VSC8531 PHY can support this feature configure by driver set function.
WoL status get by driver get function.
Tested on Beaglebone Black with
From: Raju Lakkaraju
To connect two ports of the same configuration (MDI to MDI or
MDI-X to MDI-X) with a 10/100/1000 Mbit/s connection, an
Ethernet crossover cable is needed to cross over the transmit
and receive signals in the cable, so that they are matched at
the connector level.
When
From: Raju Lakkaraju
This series adds support to the Wake-on-LAN and Auto/Mdi-x set drivers
for Microsemi PHYs.
Patch 1/2:
Wake-on-LAN (WoL) is an Ethernet networking standard that allows
a computer/device to be turned on or awakened by a network message.
VSC8531 PHY can
From: Raju Lakkaraju
Edge-rate:
As system and networking speeds increase, a signal's output transition,
also know as the edge rate or slew rate (V/ns), takes on greater importance
because high-speed signals come with a price. That price is an assortment of
interference problems like ringi
Hi Andrew,
Thank you for review and valuable comments.
I will implement below suggestion and resend for review.
Thanks,
Raju.
On Tue, Sep 27, 2016 at 11:14:36PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> I just realised the possibly correct binding was starring me in the
> face.
>
> ---
Hi Andrew,
Thank you for review and valuable comments.
Thanks,
Raju.
On Tue, Sep 27, 2016 at 04:16:33PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> > index 000..7ba3855
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt
> > @@ -0,0 +1,61 @@
> > +* Mi
From: Raju Lakkaraju
All the review comments updated and resending for review.
Edge-rate:
As system and networking speeds increase, a signal's output transition,
also know as the edge rate or slew rate (V/ns), takes on greater importance
because high-speed signals come with a price. That
.
Added probe function initialize the vsc8531 private datastructure.
Thanks,
Raju.
From: Raju Lakkaraju
---
All the review comments updated and resending for review.
Summary:
V1: Initial version of Edge-rate driver add by using IOCTL.
V2: Changed edge-rate parameter to
From: Raju Lakkaraju
All the review comments updated and resending for review.
This is MAC interface feature.
Microsemi PHY can support RGMII, RMII or GMII/MII interface between MAC and PHY.
MAC-IF function program the right value based on Device tree configuration.
Tested on Beaglebone Black
Hi Andrew,
Thank you for review the code.
I accepted all your review comments.
I will send the update patch for review again.
Thanks,
Raju.
On Fri, Sep 09, 2016 at 02:03:46PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> On Fri, Sep 09, 2016 at 11:23:52AM +0530, Raju Lakkaraju w
Hi Andrew,
Thank you for review the code.
On Fri, Sep 09, 2016 at 03:18:32PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> > > > +static int vsc85xx_edge_rate_cntl_set(struct phy_device *phydev,
> > > > + u8 edge_rate)
> > >
> > > No spaces place.
> > >
Hi Andrew,
Thank you for review the code and valuable comments.
On Thu, Sep 08, 2016 at 03:14:15PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> On Thu, Sep 08, 2016 at 02:47:21PM +0530, Raju Lakkaraju wrote:
> > From: Raju Lakkaraju
> >
> > Used Device Tree
Hi Andrew,
Thank you for review the code and valuable comments.
On Thu, Sep 08, 2016 at 03:27:27PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> On Thu, Sep 08, 2016 at 02:47:22PM +0530, Raju Lakkaraju wrote:
> > From: Raju Lakkaraju
> >
> > Used Device Tree
Hi Andrew,
Thank you for review the code and valuable comments.
On Wed, Aug 24, 2016 at 03:13:47PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> On Wed, Aug 24, 2016 at 12:27:07PM +, Raju Lakkaraju wrote:
> > From: Nagaraju Lakkaraju
> >
> > PHY Read supp
.
MAC-IF function program the right value based on Device tree configuration.
Tested on Beaglebone Black with VSC 8531 PHY.
Raju Lakkaraju (2):
net: phy: Add Edge-rate driver for Microsemi PHYs.
net: phy: Add MAC-IF driver for Microsemi PHYs.
drivers/net/phy/mscc.c
From: Raju Lakkaraju
Used Device Tree to configure the MAC Interface as per review comments and
re-sending code for review
Signed-off-by: Raju Lakkaraju
---
drivers/net/phy/mscc.c | 60 ++
1 file changed, 60 insertions(+)
diff --git a/drivers
From: Raju Lakkaraju
Used Device Tree to configure the Edge-rate as per review comments and
re-sending code for review
Signed-off-by: Raju Lakkaraju
---
drivers/net/phy/mscc.c | 76 ++
1 file changed, 76 insertions(+)
diff --git a/drivers/net
Hi Andrew,
Thank you for review the code and given valuable comments.
Other driver is not yet complete.
I accepted your review comment. I will keep all Register defined MACRO's in
mscc.c file.
Thanks,
Raju.
On Fri, Aug 26, 2016 at 03:40:28PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> >
Hi Andrew,
Thank you for review the code and valuable comments.
I accepted your review comments.
I will re-send the code.
Thanks,
Raju.
On Wed, Aug 24, 2016 at 03:06:44PM +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL
>
>
> > +static int vsc85xx_mac_if_set(struct phy_device *phydev,
> > +
24, 2016 at 12:20:03PM +, Raju Lakkaraju wrote:
> > From: Nagaraju Lakkaraju
> >
> > Edge rate control support will be added for VSC 85xx Microsemi PHYs.
>
> > diff --git a/include/linux/phy.h b/include/linux/phy.h
> > index 2d24b28..8ec4c09 100644
> >
From: Raju Lakkaraju
The existing VSC85xx PHY driver did not follow the coding style and caused
"checkpatch" to complain. This commit fixes this.
Signed-off-by: Raju Lakkaraju
---
drivers/net/phy/Kconfig | 6 +-
drivers/net/phy/msc
elli wrote:
> EXTERNAL EMAIL
>
>
> On 08/24/2016 04:58 AM, Raju Lakkaraju wrote:
> > From: Nagaraju Lakkaraju
> >
> > This is Microsemi's VSC 85xx PHY register definitions header file.
>
> Please keep these register definitions local to the code using the
From: Nagaraju Lakkaraju
PHY Read support will be added for VSC 85xx Microsemi PHYs.
Signed-off-by: Nagaraju Lakkaraju
---
drivers/net/phy/mscc.c | 25 +
include/linux/mscc.h | 8
2 files changed, 33 insertions(+)
diff --git a/drivers/net/phy/mscc.c b/drive
From: Nagaraju Lakkaraju
Edge rate control support will be added for VSC 85xx Microsemi PHYs.
Signed-off-by: Nagaraju Lakkaraju
---
drivers/net/phy/mscc.c | 109 +
include/linux/mscc.h | 34 +++
include/linux/phy.h| 2 +
3 fi
From: Nagaraju Lakkaraju
PHY write register support will be added for VSC 85xx Microsemi PHYs.
Signed-off-by: Nagaraju Lakkaraju
---
drivers/net/phy/mscc.c | 24
include/linux/mscc.h | 1 +
2 files changed, 25 insertions(+)
diff --git a/drivers/net/phy/mscc.c b/dri
From: Nagaraju Lakkaraju
MAC Interface support will be added for VSC 85xx Microsemi PHYs.
Signed-off-by: Nagaraju Lakkaraju
---
drivers/net/phy/mscc.c | 72 ++
include/linux/mscc.h | 2 ++
2 files changed, 74 insertions(+)
diff --git a/driver
From: Nagaraju Lakkaraju
This is Microsemi's VSC 85xx PHY register definitions header file.
Signed-off-by: Nagaraju Lakkaraju
---
drivers/net/phy/mscc_reg.h | 135 +
1 file changed, 135 insertions(+)
create mode 100644 drivers/net/phy/mscc_reg.h
di
Hello,
The Microsemi PHY (VSC 85xx) device includes programmable control of the
rise/fall times for the MAC interface signals.
The default setting will select the fastest rise/fall times. With the
edge_rate_cntl_set( ) function control the rise/fall time.
Edge rate control status will get by edg
Hello Andrew,
Thank you for given valuable comments.
Please see the my responses inline.
Thanks,
Raju
-Original Message-
From: Andrew Lunn [mailto:and...@lunn.ch]
Sent: Tuesday, July 26, 2016 6:14 PM
To: Raju Lakkaraju
Cc: netdev@vger.kernel.org; f.faine...@gmail.com; Allan Nielsen
ABLE(mdio, vsc85xx_tbl);
+
+MODULE_DESCRIPTION("Microsemi VSC85xx PHY driver");
+MODULE_AUTHOR("Nagaraju Lakkaraju");
+MODULE_LICENSE("Dual MIT/GPL");
--
2.7.3
Thanks and regards,
Raju
(Nagaraju Lakkaraju)
Sr. Staff Engg.
Microsemi Communications India Pvt Ltd.
Ph: +91
Hello All,
I would like to introduce myself as Nagaraju Lakkaraju (Raju), is working in
Microsemi Communications India Pvt. Ltd (Formerly known as Vitesse
Semiconductors Limited) - Hyderabad as Sr. Staff Engineer.
I do work on Microsemi PHY drivers development.
Microsemi is developing the new Ph
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