[Nouveau] [PATCH] nvc0: support for GP10B

2017-03-30 Thread Alexandre Courbot
GP10B uses the same 3D class as GP100. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_sc

[Nouveau] [PATCH 02/15] secboot: pass instance to LS firmware loaders

2017-03-29 Thread Alexandre Courbot
-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/core/msgqueue.h| 4 +++- drm/nouveau/nvkm/falcon/msgqueue.c | 7 --- drm/nouveau/nvkm/falcon/msgqueue.h | 6 -- drm/nouveau/nvkm/falcon/msgqueue_0137c63d.c | 3 ++

[Nouveau] [PATCH 06/15] secboot: add GP10B support

2017-03-29 Thread Alexandre Courbot
GP10B's secboot is largely similar to GM20B's. Only differences are MC base address and the fact that GPCCS is also securely managed. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/secboot.h | 1 + drm/nouveau/nvkm/subdev/secboot/Kbuild| 1

[Nouveau] [PATCH 08/15] fifo: add GP10B support

2017-03-29 Thread Alexandre Courbot
GP10B's FIFO is similar to GP100's, but only allows 512 channels. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/engine/fifo.h | 1 + drm/nouveau/nvkm/engine/fifo/Kbuild| 1 + drm/nouveau/nvkm/engine/fifo/gk104.h | 1 + drm/nouveau/nvkm/engin

[Nouveau] [PATCH 11/15] ibus: add GP10B support

2017-03-29 Thread Alexandre Courbot
GP10B requires a specific initialization sequence due to the absence of devinit. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/ibus.h | 1 + drm/nouveau/nvkm/subdev/ibus/Kbuild| 1 + drm/nouveau/nvkm/subdev/ibus/gp10b.c

[Nouveau] [PATCH 05/15] secboot/gm20b: specify MC base address as argument

2017-03-29 Thread Alexandre Courbot
Allow the MC base address to be specified as an argument for the WPR region reading function. GP10B uses a different address layout as GM20B, so this is necessary. Also export the function to be used by GP10B. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/

[Nouveau] [PATCH 07/15] msgqueue: support for GP10B PMU firmware

2017-03-29 Thread Alexandre Courbot
The GP10B firmware is very close to GM20B's. The only difference is that it supports booting multiple falcons. In order to avoid having too much functions and structures shared, implement its support in the same source file as GM20B firmware. Signed-off-by: Alexandre Courbot <acour...@nvidia.

[Nouveau] [PATCH 04/15] secboot: start LS firmware in post-run hook

2017-03-29 Thread Alexandre Courbot
The LS firmware post-run hook is the right place to start said LS firmware. Moving it here also allows to remove special handling in the ACR code. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 46 ..

[Nouveau] [PATCH 03/15] secboot: let LS post_run hooks return error

2017-03-29 Thread Alexandre Courbot
A LS post-run hook can meet an error meaning the failure of secure boot. Make sure this can be reported. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 6 -- drm/nouveau/nvkm/subdev/secboot/acr_r352.h | 2 +

[Nouveau] [PATCH 15/15] core: recognise GP10B chipset

2017-03-29 Thread Alexandre Courbot
Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/engine/device/base.c | 24 1 file changed, 24 insertions(+) diff --git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c index ffd7d09ed3ac..ad8f4092c5aa

[Nouveau] [PATCH 09/15] fb: add GP10B support

2017-03-29 Thread Alexandre Courbot
GP10B's FB is largely compatible with the GP100 implementation, and only requires a few additional register inits. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/fb.h | 1 + drm/nouveau/nvkm/subdev/fb/Kbuild| 1 + drm/nouveau/nvkm/sub

[Nouveau] [PATCH 00/15] Support for GP10B chipset

2017-03-29 Thread Alexandre Courbot
GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for its base engines after reworking secboot a bit to accomodate its calling convention better. This patchset has been tested rendering simple off-screen buffers using Mesa and yielded the expected result. Alexandre Courbot (15

[Nouveau] [PATCH 13/15] platform: make VDD regulator optional

2017-03-29 Thread Alexandre Courbot
GP10B's power is managed by generic PM domains, so it does not require a VDD regulator. Add this option into the chip function structure. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/core/tegra.h | 4 drm/nouveau/nouveau_platform.c

[Nouveau] [PATCH 01/15] secboot: allow to boot multiple falcons

2017-03-29 Thread Alexandre Courbot
and boot each falcons individually. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/core/msgqueue.h | 3 +-- drm/nouveau/include/nvkm/subdev/secboot.h | 2 +- drm/nouveau/nvkm/engine/gr/gf100.c | 16 +--- drm/nouveau/nvkm/falcon/msgq

[Nouveau] [PATCH 14/15] platform: support for probing GP10B

2017-03-29 Thread Alexandre Courbot
Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nouveau_platform.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drm/nouveau/nouveau_platform.c b/drm/nouveau/nouveau_platform.c index 49d9ba0e3c51..1ada186fab77 100644 --- a/drm/nouveau/nouveau_plat

[Nouveau] [PATCH 12/15] gr: support for GP10B

2017-03-29 Thread Alexandre Courbot
GR is similar to GP100, with a few unavailable registers. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/engine/gr.h | 1 + drm/nouveau/nvkm/engine/gr/Kbuild| 1 + drm/nouveau/nvkm/engine/gr/gf100.h | 4 +++ drm/nouveau/nvkm/engine/gr/gp100.c

[Nouveau] [PATCH 10/15] mc: add GP10B support

2017-03-29 Thread Alexandre Courbot
GP10B's MC is compatible with GP100's, but engines need to be explicitly put out of ELPG during init. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/mc.h | 1 + drm/nouveau/nvkm/subdev/mc/Kbuild| 1 + drm/nouveau/nvkm/subdev/mc/gp100.c

[Nouveau] [PATCH] secboot: fix inconsistent pointer checking

2017-03-14 Thread Alexandre Courbot
We were returning PTR_ERR() on a NULL pointer, which obviously won't work. nvkm_engine_ref() will return an error in case something went wrong. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> Reported-by: Dan Carpenter <dan.carpen...@oracle.com> --- drm/nouveau/nvkm/subdev/sec

Re: [Nouveau] [bug report] drm/nouveau/secboot: add gp102/gp104/gp106/gp107 support

2017-03-13 Thread Alexandre Courbot
On Sat, Mar 11, 2017 at 5:55 AM, Dan Carpenter <dan.carpen...@oracle.com> wrote: > Hello Alexandre Courbot, > > The patch 5429f82f3415: "drm/nouveau/secboot: add > gp102/gp104/gp106/gp107 support" from Jan 26, 2017, leads to the > following static checker warni

[Nouveau] [PATCH] secboot: fix NULL pointer dereference

2017-03-10 Thread Alexandre Courbot
The msgqueue pointer validity should be checked by its owner, not by the msgqueue code itself to avoid this situation. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> Reported-by: Julia Lawall <julia.law...@lip6.fr> --- drm/nouveau/nvkm/engine/sec2/base.c | 7 +++ drm/

Re: [Nouveau] [PATCH] drm/nouveau: gk20a: Turn instmem lock into mutex

2017-02-23 Thread Alexandre Courbot
rm that last point). Tested this patch and it seems to work like a charm. Reviewed-by: Alexandre Courbot <acour...@nvidia.com> Tested-by: Alexandre Courbot <acour...@nvidia.com> Thanks, Thierry diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c b/drivers/gpu

[Nouveau] [PATCH v5 14/18] secboot: set default error value in error register

2016-12-14 Thread Alexandre Courbot
Set a default error value in the mailbox 0 register so we can catch cases where the secure boot binary fails early without being able to report anything. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/gm200.c | 3 +++ 1 file changed, 3 insertions

[Nouveau] [PATCH v5 17/18] falcon: add clear_interrupt function

2016-12-14 Thread Alexandre Courbot
Allow users to clear interrupt flags. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/engine/falcon.h | 2 ++ drm/nouveau/nvkm/falcon/base.c | 6 ++ drm/nouveau/nvkm/falcon/v1.c | 17 + 3 files changed, 25 inse

[Nouveau] [PATCH v5 7/18] secboot: split reset function

2016-12-14 Thread Alexandre Courbot
Split the reset function into more meaningful and reusable ones. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/secboot.h | 5 +- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 78 +++ 2 files changed, 58 insertions(+), 25 del

[Nouveau] [PATCH v5 2/18] secboot: remove fixup_hs_desc hook

2016-12-14 Thread Alexandre Courbot
This hook can be removed if the function writing the HS descriptor is aware of WPR settings. Let's do that as it allows us to make the ACR descriptor structure private and save some code. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/gm200.

[Nouveau] [PATCH v5 15/18] secboot: fix WPR descriptor generation

2016-12-14 Thread Alexandre Courbot
Generate the WPR descriptor closer to what RM does. In particular, set the expected masks, and only set the ucode members on Tegra. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 21 - 1 file changed, 12 inse

[Nouveau] [PATCH v5 3/18] secboot: add low-secure firmware hooks

2016-12-14 Thread Alexandre Courbot
as needed. The current hooks cover the external firmware loading as well as the bootloader descriptor generation. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/gm200.c | 239 - drm/nouveau/nvkm/subdev/secboot/gm20b.c | 30 +++

[Nouveau] [PATCH v5 18/18] secboot: clear halt interrupt after ACR is run

2016-12-14 Thread Alexandre Courbot
The halt interrupt must be cleared after ACR is run, otherwise the LS PMU firmware will not be able to run. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 2 ++ 1 file changed, 2 insertions(+), 0 deletions(-) diff --git a/drm/nouvea

[Nouveau] [PATCH v5 4/18] secboot: generate HS BL descriptor in hook

2016-12-14 Thread Alexandre Courbot
consistent design. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/gm200.c | 179 - drm/nouveau/nvkm/subdev/secboot/gm20b.c | 43 ++ drm/nouveau/nvkm/subdev/secboot/priv.h | 71 -- 3 files changed, 138 inse

[Nouveau] [PATCH v5 6/18] secboot: add LS flags to LS func structure

2016-12-14 Thread Alexandre Courbot
Add a flag that can be set when declaring how a LS firmware should be loaded. This allows us to remove falcon-specific code in the loader. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 10 -- drm/nouveau/nvkm/subdev/s

[Nouveau] [PATCH v5 1/18] secboot: rename init() hook to oneinit()

2016-12-14 Thread Alexandre Courbot
The init() hook is called by the subdev's oneinit(). Rename it accordingly to avoid confusion about the lifetime of objects allocated in it. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/base.c | 4 ++-- drm/nouveau/nvkm/subdev/secboot/gm200

[Nouveau] [PATCH v5 12/18] secboot: safer zeroing of BL descriptors

2016-12-14 Thread Alexandre Courbot
Perform the zeroing of BL descriptors in the caller function instead of trusting each generator will do it. This could avoid a few pulled hairs. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 4 ++-- drm/nouveau/nvkm/subdev/s

[Nouveau] [PATCH v5 9/18] secboot: remove unneeded ls_ucode_img member

2016-12-14 Thread Alexandre Courbot
ucode_header is not used anywhere, so just get rid of it. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c| 25 +--- drm/nouveau/nvkm/subdev/secboot/ls_ucode.h| 2 +-- drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.

[Nouveau] [PATCH v5 16/18] secboot: add lazy-bootstrap flag

2016-12-14 Thread Alexandre Courbot
When the PMU firmware is present, the falcons it manages need to have the lazy-bootstrap flag of their WPR header set so the ACR does not boot them. Add support for this. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 4 drm/n

[Nouveau] [PATCH v5 13/18] secboot: add missing fields to BL structure

2016-12-14 Thread Alexandre Courbot
Since DMEM was initialized to zero, these fields went unnoticed. Add them for safety. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 4 1 file changed, 4 insertions(+), 0 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/s

[Nouveau] [PATCH v5 11/18] secboot: abstract LS firmware loading functions

2016-12-14 Thread Alexandre Courbot
The WPR and LSB headers, used to generate the LS blob, may have a different layout and sizes depending on the driver version they come from. Abstract them and confine their use to driver-specific code. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/s

[Nouveau] [PATCH v5 10/18] secboot: remove ls_ucode_mgr

2016-12-14 Thread Alexandre Courbot
This was used only locally to one function and can be replaced by ad-hoc variables. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 90 --- 1 file changed, 33 insertions(+), 57 deletions(-) diff --git a/drm/nouvea

[Nouveau] [PATCH v5 8/18] secboot: disable falcon interrupts when running blob

2016-12-14 Thread Alexandre Courbot
Make sure we are not disturbed by spurious interrupts, as we poll the halt bit anyway. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/gm200.c | 7 +++ 1 file changed, 7 insertions(+), 0 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/s

[Nouveau] [PATCH v5 0/18] Secure Boot refactoring

2016-12-14 Thread Alexandre Courbot
of the PMU subdev. This will make things more reusable and will allow us to close the loop with the current falcon engine code - please just allow me a few more days to finish this! :) In the meantime, this code should be good to go and test. Alexandre Courbot (18): secboot: rename init() hook

[Nouveau] [PATCH] fix build error with out-of-tree builds

2016-12-13 Thread Alexandre Courbot
Recently trying to build nouveau.ko out of the kernel tree results in the following error for me (in-kernel builds are fine): uapi/drm/nouveau_drm.h:30:17: fatal error: drm.h: No such file or directory This can be fixed by adding include/uapi/drm to the include path. Signed-off-by: Alexandre

[Nouveau] [PATCH v2 12/15] gr: add fini() hook

2016-12-13 Thread Alexandre Courbot
Add a fini() hook to the GR engine. This will be used by gf100+ to properly release the FECS and GPCCS falcons. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/engine/gr/base.c | 10 ++ drm/nouveau/nvkm/engine/gr/priv.h | 1 + 2 files changed, 11 inse

[Nouveau] [PATCH v2 13/15] gr/gf100: split gf100_gr_init_ctxctl()

2016-12-13 Thread Alexandre Courbot
gf100_gr_init_ctxctl() is basically two different functions (one for use of internal firmware, the other for use of external firmware), but its current layout makes it look more complex than it is. Split it to better reflect that fact. Signed-off-by: Alexandre Courbot <acour...@nvidia.

[Nouveau] [PATCH v2 15/15] secboot: remove nvkm_secboot_start()

2016-12-13 Thread Alexandre Courbot
Since GR has moved to using the falcon library to start the falcons, this function is not needed anymore. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/secboot.h | 1 +- drm/nouveau/nvkm/subdev/secboot/base.c| 15 +- drm/nouvea

[Nouveau] [PATCH v2 14/15] gr/gf100: instantiate and reserve GR falcons

2016-12-13 Thread Alexandre Courbot
Create instances for the FECS and GPCCS falcons and use the init() and fini() hooks to reserve them for as long as GR controls them. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/engine/gr/gf100.c | 110 -- drm/nouveau/nvkm/eng

[Nouveau] [PATCH v2 8/15] pmu/gk20a: use falcon library functions

2016-12-13 Thread Alexandre Courbot
Use the falcon library functions where relevant. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/pmu/gk20a.c | 33 +- 1 file changed, 24 insertions(+), 9 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/pmu/gk20a.c b/drm/n

[Nouveau] [PATCH v2 9/15] gm20b: add dummy PMU device

2016-12-13 Thread Alexandre Courbot
and pmu is coming along with the actual gm20b PMU implementation, so use this as a temporary solution. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/pmu.h | 1 +- drm/nouveau/nvkm/engine/device/base.c | 1 +- drm/nouveau/nvkm/subdev/pmu/Kbuild

[Nouveau] [PATCH v2 0/15] Falcon library

2016-12-13 Thread Alexandre Courbot
some FW will not work properly * make IMEM/DMEM writing functions more robust * move falcons instances into their owning subdev * rework gk20a's PMU implementation and add dummy gm20b PMU driver Alexandre Courbot (15): core: constify nv*_printk macros mc: add nvkm_mc_enabled() function core

[Nouveau] [PATCH v2 6/15] pmu/gk20a: use nvkm_pmu_ctor()

2016-12-13 Thread Alexandre Courbot
Use the PMU constructor so that all base members (in particular the falcon instance) are initialized properly. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/pmu/gk20a.c | 35 -- 1 file changed, 14 insertions(+), 21 del

[Nouveau] [PATCH v2 5/15] pmu: add nvkm_pmu_ctor() function

2016-12-13 Thread Alexandre Courbot
Add a PMU constructor so implementations that extend the nvkm_pmu structure can have all base members properly initialized. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/pmu/base.c | 21 +++-- drm/nouveau/nvkm/subdev/pmu/priv.h | 2

[Nouveau] [PATCH v2 4/15] pmu: instanciate the falcon in PMU device

2016-12-13 Thread Alexandre Courbot
Have an instance of nvkm_falcon in the PMU structure, ready to be used by other subdevs (i.e. secboot). Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/pmu.h | 2 ++ drm/nouveau/nvkm/subdev/pmu/base.c| 4 2 files changed, 6 insertions

[Nouveau] [PATCH v2 7/15] pmu/gk20a: simplify code a bit

2016-12-13 Thread Alexandre Courbot
Some functions always succeed - change their return type to void and remove the error-handling code in their caller. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/pmu/gk20a.c | 30 -- 1 file changed, 8 insertions(+), 22 del

[Nouveau] [PATCH v2 11/15] secboot: use falcon library

2016-12-13 Thread Alexandre Courbot
Use the falcon library functions in secure boot. This removes a lot of code and makes the secure boot flow easier to understand as no register is directly accessed. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/secboot.h | 4 +- drm/nouvea

[Nouveau] [PATCH v2 3/15] core: add falcon library functions

2016-12-13 Thread Alexandre Courbot
done by engine/falcon.c need to be reimplemented. However this first step allows to keep things simple and to discuss basic design. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/core/device.h | 1 +- drm/nouveau/include/nvkm/engine/falcon.h

[Nouveau] [PATCH v2 10/15] secboot: fix functions definitions

2016-12-13 Thread Alexandre Courbot
These functions should use the nvkm_secboot_falcon enum. Fix this. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/secboot.h | 6 +++--- drm/nouveau/nvkm/subdev/secboot/base.c| 4 ++-- drm/nouveau/nvkm/subdev/secboot/priv.h| 4 ++-- 3

[Nouveau] [PATCH v2 1/15] core: constify nv*_printk macros

2016-12-13 Thread Alexandre Courbot
Constify the local variables declared in these macros so we can pass const pointers to them. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/core/client.h | 4 ++-- drm/nouveau/include/nvkm/core/device.h | 2 +- drm/nouveau/include/nvkm/core/subdev.h | 2

[Nouveau] [PATCH v2 2/15] mc: add nvkm_mc_enabled() function

2016-12-13 Thread Alexandre Courbot
Add a function that allows us to query whether a given subdev is currently enabled or not. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/mc.h | 1 + drm/nouveau/nvkm/subdev/mc/base.c| 10 ++ 2 files changed, 11 insertions(+), 0 del

Re: [Nouveau] 4.9-rc7 nouveau fails on arm64 64k page kernel but works with 4k

2016-12-07 Thread Alexandre Courbot
On Wed, Dec 7, 2016 at 6:53 PM, Michel Dänzer <mic...@daenzer.net> wrote: > On 07/12/16 06:39 PM, Alexandre Courbot wrote: >> On Fri, Dec 2, 2016 at 12:23 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: >>> That's right -- nouveau currently requires 4k page sizes t

Re: [Nouveau] 4.9-rc7 nouveau fails on arm64 64k page kernel but works with 4k

2016-12-07 Thread Alexandre Courbot
On Fri, Dec 2, 2016 at 12:23 PM, Ilia Mirkin wrote: > That's right -- nouveau currently requires 4k page sizes to work. This is a > software limitation, not a hardware one though. Looking at the trace I wonder - is the limitation in Nouveau or in TTM? > > > On Dec 1, 2016

Re: [Nouveau] [PATCH 3/8] core: add falcon library functions

2016-12-05 Thread Alexandre Courbot
Oops, realized I made a last minute mistake - the following should be squashed into this patch for proper behavior when secure boot is used. Sorry for the inconvenience. diff --git a/drm/nouveau/nvkm/falcon/base.c b/drm/nouveau/nvkm/falcon/base.c index efef9fc63407..75663bd1f650 100644 ---

[Nouveau] [PATCH 3/8] core: add falcon library functions

2016-12-05 Thread Alexandre Courbot
done by engine/falcon.c need to be reimplemented. However this first step allows to keep things simple and to discuss basic design. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/core/device.h | 3 +- drm/nouveau/include/nvkm/engine/falcon.h

[Nouveau] [PATCH 7/8] gr/gf100: use falcon library

2016-12-05 Thread Alexandre Courbot
-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/engine/gr/gf100.c | 72 +-- drm/nouveau/nvkm/engine/gr/gf100.h | 2 +- 2 files changed, 25 insertions(+), 49 deletions(-) diff --git a/drm/nouveau/nvkm/engine/gr/gf100.c b/drm/nouveau/nvkm/eng

[Nouveau] [PATCH 2/8] mc: add nvkm_mc_enabled() function

2016-12-05 Thread Alexandre Courbot
Add a function that allows us to query whether a given subdev is currently enabled or not. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/mc.h | 1 + drm/nouveau/nvkm/subdev/mc/base.c| 10 ++ 2 files changed, 11 insertions(+), 0 del

[Nouveau] [PATCH 6/8] gr/gf100: split gf100_gr_init_ctxctl()

2016-12-05 Thread Alexandre Courbot
gf100_gr_init_ctxctl() is basically two different functions (one for use of internal firmware, the other for use of external firmware), but its current layout makes it look more complex than it is. Split it to better reflect that fact. Signed-off-by: Alexandre Courbot <acour...@nvidia.

[Nouveau] [PATCH 4/8] secboot: use falcon library definitions

2016-12-05 Thread Alexandre Courbot
Use the definitions provided by the falcon library instead of re-defining our own. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/secboot.h | 12 +- drm/nouveau/nvkm/engine/gr/gf100.c| 16 drm/nouveau/nvkm/engine/gr/g

[Nouveau] [PATCH 5/8] secboot: use falcon library

2016-12-05 Thread Alexandre Courbot
Use the falcon library functions in secure boot. This removes a lot of code and makes the secure boot flow easier to understand as no register is directly accessed. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/secboot.h | 3 +- drm/nouvea

[Nouveau] [PATCH 8/8] secboot: remove nvkm_secboot_start()

2016-12-05 Thread Alexandre Courbot
Since GR has moved to using the falcon library to start the falcons, this function is not needed anymore. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/secboot.h | 1 +- drm/nouveau/nvkm/subdev/secboot/base.c| 15 +-- drm/nouvea

[Nouveau] [PATCH 0/8] Falcon library

2016-12-05 Thread Alexandre Courbot
as an example. Converting other engines is trivial and should make our use of falcons generally safer. Alexandre Courbot (8): core: constify nv*_printk macros mc: add nvkm_mc_enabled() function core: add falcon library functions secboot: use falcon library definitions secboot: use falcon

[Nouveau] [PATCH 1/8] core: constify nv*_printk macros

2016-12-05 Thread Alexandre Courbot
Constify the local variables declared in these macros so we can pass const pointers to them. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/core/client.h | 4 ++-- drm/nouveau/include/nvkm/core/device.h | 2 +- drm/nouveau/include/nvkm/core/subdev.h | 2

[Nouveau] [PATCH v4 10/33] secboot: split reset function

2016-11-21 Thread Alexandre Courbot
Split the reset function into more meaningful and reusable ones. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/secboot.h | 3 +- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 78 +++ 2 files changed, 56 insertions(+), 25 del

[Nouveau] [PATCH v4 25/33] pmu: support for GM20X

2016-11-21 Thread Alexandre Courbot
ommand line for it, and a new interface function to boot a given falcon using the PMU's ACR unit. Signed-off-by: Deepak Goyal <dgo...@nvidia.com> [acour...@nvidia.com: reorganize code] Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/pmu.h |

[Nouveau] [PATCH v4 1/33] core: constify nv*_printk macros

2016-11-21 Thread Alexandre Courbot
Constify the local variables declared in these macros so we can pass const pointers to them. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/core/client.h | 4 ++-- drm/nouveau/include/nvkm/core/device.h | 2 +- drm/nouveau/include/nvkm/core/subdev.h | 2

[Nouveau] [PATCH v4 30/33] secboot: write PMU firmware version into register

2016-11-21 Thread Alexandre Courbot
The PMU firmware expects its version into this register. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/subdev/pmu.h | 1 + drm/nouveau/nvkm/subdev/pmu/base.c | 1 + drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 3 +++ 3 files chan

[Nouveau] [PATCH v4 21/33] secboot: clear halt interrupt after ACR is run

2016-11-21 Thread Alexandre Courbot
The halt interrupt must be cleared after ACR is run, otherwise the LS PMU firmware will not be able to run. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 3 ++- drm/nouveau/nvkm/subdev/secboot/base.c | 31 +++---

[Nouveau] [PATCH v4 27/33] secboot: add LS firmware post-run hooks

2016-11-21 Thread Alexandre Courbot
Add the ability for LS firmwares to declare a post-run hook that is invoked right after the HS firmware is executed. This allows them to e.g. write some initialization data into the falcon's DMEM. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/ac

[Nouveau] [PATCH v4 29/33] secboot: base support for PMU falcon

2016-11-21 Thread Alexandre Courbot
. As we must preserve the old behavior to avoid breaking user-space, add a few conditionals to the way falcons are reset. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 97 +++ 1 file changed, 82 insertions(

[Nouveau] [PATCH v4 11/33] secboot: disable falcon interrupts before running

2016-11-21 Thread Alexandre Courbot
Make sure we are not disturbed by spurious interrupts, as we poll the halt bit anyway. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/gm200.c | 4 1 file changed, 4 insertions(+), 0 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/secboot

[Nouveau] [PATCH v4 24/33] pmu: make sure the reset hook exists before running it

2016-11-21 Thread Alexandre Courbot
Some PMU implementations (in particular the ones managed by secure boot) may not have a reset() hook. Make sure we don't crash in that case. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/pmu/base.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)

[Nouveau] [PATCH v4 31/33] secboot: enable PMU in r352 ACR

2016-11-21 Thread Alexandre Courbot
Add the PMU bootloader generator and PMU LS ops that will enable proper PMU operation if the PMU falcon is designated as managed. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 80 +++- 1 file changed, 80 inse

[Nouveau] [PATCH v4 22/33] core: add falcon DMEM read function

2016-11-21 Thread Alexandre Courbot
Add nvkm_falcon_read_dmem() to read part of a falcon's DMEM into a CPU-accessible buffer. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/core/falcon.h | 1 + drm/nouveau/nvkm/core/falcon.c | 10 ++ 2 files changed, 11 insertions

[Nouveau] [PATCH v4 32/33] secboot: support optional falcons

2016-11-21 Thread Alexandre Courbot
boot bootstrap logic to be able to fall back to legacy behavior if it turns out the boot falcon's LS firmware cannot be loaded. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr.h | 2 +- drm/nouveau/nvkm/subdev/secboot/acr_r352.

[Nouveau] [PATCH v4 20/33] secboot: store falcon's DMEM size in secboot structure

2016-11-21 Thread Alexandre Courbot
Store the falcon's DMEM size in the secboot structure so it can be retrieved later. This is needed to load the PMU LS firmware's argument at the end of DMEM, where the LS firmware expects it to be. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot

[Nouveau] [PATCH v4 19/33] secboot: add lazy-bootstrap flag

2016-11-21 Thread Alexandre Courbot
When the PMU firmware is present, the falcons it manages need to have the lazy-bootstrap flag of their WPR header set so the ACR does not boot them. Add support for this. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 4 drm/n

[Nouveau] [PATCH v4 17/33] secboot: set default error value in error register

2016-11-21 Thread Alexandre Courbot
Set a default error value in the mailbox 0 register so we can catch cases where the secure boot binary fails early without being able to report anything. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/gm200.c | 2 ++ 1 file changed, 2 insertions

[Nouveau] [PATCH v4 28/33] secboot: support for loading LS PMU firmware

2016-11-21 Thread Alexandre Courbot
Allow secboot to load a LS PMU firmware. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/Kbuild | 1 +- drm/nouveau/nvkm/subdev/secboot/ls_ucode.h | 4 +- drm/nouveau/nvkm/subdev/secboot/ls_ucode_pmu.c | 89 +++- 3

[Nouveau] [PATCH v4 33/33] gm20b: enable PMU

2016-11-21 Thread Alexandre Courbot
Enable the PMU in GM20B, managed by secure boot. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/engine/device/base.c | 1 + drm/nouveau/nvkm/subdev/secboot/gm20b.c | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drm/nouveau/nvkm/

[Nouveau] [PATCH v4 23/33] pmu: add nvkm_pmu_ctor function

2016-11-21 Thread Alexandre Courbot
Add a constructor function that can be called by our gm200 implementation. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/pmu/base.c | 14 ++ drm/nouveau/nvkm/subdev/pmu/priv.h | 2 ++ 2 files changed, 12 insertions(+), 4 deletions(-) diff

[Nouveau] [PATCH v4 26/33] pmu: support for GM20B signed firmware

2016-11-21 Thread Alexandre Courbot
From: Deepak Goyal <dgo...@nvidia.com> Add support for the message format used by the GM20B signed PMU firmware. Signed-off-by: Deepak Goyal <dgo...@nvidia.com> [acour...@nvidia.com: reorganize code] Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm

[Nouveau] [PATCH v4 18/33] secboot: fix WPR descriptor generation

2016-11-21 Thread Alexandre Courbot
Generate the WPR descriptor closer to what RM does. In particular, set the expected masks, and only set the ucode members on Tegra. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 21 - 1 file changed, 12 inse

[Nouveau] [PATCH v4 12/33] secboot: remove unneeded ls_ucode_img member

2016-11-21 Thread Alexandre Courbot
ucode_header is not used anywhere, so just get rid of it. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c| 25 +--- drm/nouveau/nvkm/subdev/secboot/ls_ucode.h| 2 +-- drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.

[Nouveau] [PATCH v4 16/33] secboot: add missing fields to BL structure

2016-11-21 Thread Alexandre Courbot
Since DMEM was initialized to zero, these fields went unnoticed. Add them for safety. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 4 1 file changed, 4 insertions(+), 0 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/s

[Nouveau] [PATCH v4 15/33] secboot: safer zeroing of BL descriptors

2016-11-21 Thread Alexandre Courbot
Perform the zeroing of BL descriptors in the caller function instead of trusting each generator will do it. This could avoid a few pulled hairs. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 4 ++-- drm/nouveau/nvkm/subdev/s

[Nouveau] [PATCH v4 14/33] secboot: abstract LS firmware loading functions

2016-11-21 Thread Alexandre Courbot
The WPR and LSB headers, used to generate the LS blob, may have a different layout and sizes depending on the driver version they come from. Abstract them and confine their use to driver-specific code. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/s

[Nouveau] [PATCH v4 13/33] secboot: remove ls_ucode_mgr

2016-11-21 Thread Alexandre Courbot
This was used only locally to one function and can be replaced by ad-hoc variables. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 90 --- 1 file changed, 33 insertions(+), 57 deletions(-) diff --git a/drm/nouvea

[Nouveau] [PATCH v4 9/33] secboot: add LS flags to LS func structure

2016-11-21 Thread Alexandre Courbot
Add a flag that can be set when declaring how a LS firmware should be loaded. This allows us to remove falcon-specific code in the loader. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 10 -- drm/nouveau/nvkm/subdev/s

[Nouveau] [PATCH v4 4/33] secboot: rename init() hook to oneinit()

2016-11-21 Thread Alexandre Courbot
The init() hook is called by the subdev's oneinit(). Rename it accordingly to avoid confusion about the lifetime of objects allocated in it. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/base.c | 4 ++-- drm/nouveau/nvkm/subdev/secboot/gm200

[Nouveau] [PATCH v4 7/33] secboot: generate HS BL descriptor in hook

2016-11-21 Thread Alexandre Courbot
consistent design. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/gm200.c | 177 - drm/nouveau/nvkm/subdev/secboot/gm20b.c | 43 ++ drm/nouveau/nvkm/subdev/secboot/priv.h | 71 -- 3 files changed, 137 inse

[Nouveau] [PATCH v4 5/33] secboot: remove fixup_hs_desc hook

2016-11-21 Thread Alexandre Courbot
This hook can be removed if the function writing the HS descriptor is aware of WPR settings. Let's do that as it allows us to make the ACR descriptor structure private and save some code. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/gm200.

[Nouveau] [PATCH v4 3/33] secboot: use falcon library's IMEM/DMEM loading functions

2016-11-21 Thread Alexandre Courbot
Replace the falcon loading functions with calls to the equivalent functions of the falcon library. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/gm200.c | 31 +++--- 1 file changed, 9 insertions(+), 22 deletions(-) diff

[Nouveau] [PATCH v4 2/33] core: add falcon library

2016-11-21 Thread Alexandre Courbot
code, plus IMEM and DMEM loading functions. In addition to the library itself, this patch updates users of the previously secure-boot only definitions to use the new global ones. Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/include/nvkm/core/falcon.h

[Nouveau] [PATCH v4 0/33] Secure Boot refactoring / signed PMU firmware support for GM20B

2016-11-21 Thread Alexandre Courbot
since v2: - Fix naming of new structures/functions Changes since v3: - Add PMU support code for GM20B. Alexandre Courbot (31): core: constify nv*_printk macros core: add falcon library secboot: use falcon library's IMEM/DMEM loading functions secboot: rename init() hook to oneinit() secboot

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