This is an automated email from Gerrit.
Christopher Head ([email protected]) just uploaded a new patch set to Gerrit,
which you can find at http://openocd.zylin.com/4678
-- gerrit
commit 800948c5dab0c20c763c18eceb401aa5ff8cc360
Author: Christopher Head
Date: Wed Sep 19 16:20:26 2018 -0700
I’m not aware of any commercial support. For now, the best branch is the
one Tommy pointed at. I’m slowly working on getting all that code
upstreamed. It definitely works with SiFive and spike multicore. I haven’t
had a chance to test on any other systems. The goal is to provide debug
support on an
That's odd.
In my experience debugging with the -rtos riscv hack in the OpenOCD debug
script allows OpenOCD (and gdb) to deal with all harts (and gdb treats then as
if they were threads) ok.
Maybe you can describe your configuration a bit more?
And what version of OpenOCD are you using/building?
Hello Tommy,
thanks for your hints. We already use the OpenOCD from the RISC-V Github
site.
We have done some instrumentation for JTAG and we see that OpenCD
ignores second hart (it can enumerate it correctly but it does not
initialize debug interface for it). On the first hart, single stepp
This fork supports RISC-V including multi-hart (via the -rtos riscv hack).
Some of the mods have been upstreamed but for now I reckon you'll have more
success with this version.
https://github.com/riscv/riscv-openocd
For building it Liviu Ionescu's GNU MCU Eclipse docker based build scripts are
Hello,
I would like to use OpenOCD on a custom RISC-V multi-hart SoC via an
Olimex ARM-USB-TINY-H debugger. Is there some commercial support
available for OpenOCD to do this work?
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189
