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commit 7cdd566109499fedd5442cf1c586ac813213d688
Author: Bernhard Rosenkränzer
Date: Tue May 6 01:07:06 2025 +
This is an automated email from Gerrit.
"Daniel Anselmi " just uploaded a new patch set to Gerrit,
which you can find at https://review.openocd.org/c/openocd/+/8873
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commit beffce0455777e9060e3bfebb4be0287a9624efc
Author: Daniel Anselmi
Date: Sat Dec 28 02:22:51 2024 +0100
ipdb
Hi,
I get a flash_init() failed trying to program an LPC55S69. Any Ideas?
Best,
Rolf
I: Launching gdb-server: openocd -c "gdb_port 5" -c "tcl_port 50002" -c
"telnet_port 50004" -s /usr/local/share/openocd/scripts -c "set
FLASH_API_ADDRESS 0x030010f0" -f
/Users/rolf/.vscode/extensions/one
Thanks Antonio,
So my assumptions were wrong about how openocd accesses the memory and this
gives me a better comprehension of what you already explained.
The patch you pointed is interesting, I tried to solve my issue with a custom
command as well.
But my approach was very simple, it was simpl
Thinking over your use case ...
what I already wrote is not fully relevant.
When a previous FW has enabled the cache, to load and execute a new FW you
need either:
- or sync I-Cache and D-Cache after any write, but this slows down
everything;
- or disable caching before loading the 2nd FW. But thi
Hi Adrian,
OpenOCD creates a link between the CPU and GDB.
Nor GDB nor OpenOCD have the knowledge required to access the RAM directly
(apart for the cortex-m case where the RAM is mapped in the same address
space of the debug registers). By the way, not relevant here, there are
cases where having
Hi Antonio,
Sorry the word "sideloading" may not be appropriate in my case.
What I meant it that, to my understanding, OpenOCD is loading the ELF file
through the DAP of the SoC.
The DAP is linked to the interconnect and has access to the embedded RAM to
write the binary.
The loading of the se
This is an automated email from Gerrit.
"Antonio Borneo " just uploaded a new patch set to
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commit cded632a5a34f582eb9ce9ee3b5732c22bf9e0d9
Author: Antonio Borneo
Date: Mon May 5 10:00:10 2025 +0200
LICEN
