[OpenOCD-devel] reproduce jenkins build failure

I made a patch which fails one of the Jenkins builds: http://build.openocd.org/job/openocd-gerrit-build/TARGET=zy1000/9213/console How can I reproduce this build failure locally? I don't see the configure command that was used by the build anywhere in the log. I tried some combinations of

[OpenOCD-devel] [PATCH]: 6c21b53 Let gdb know when accessing a register fails.

This is an automated email from Gerrit. Tim Newsome (t...@sifive.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4452 -- gerrit commit 6c21b53b48aa9e3f9747e0682feeaf7cb3b014a8 Author: Tim Newsome Date: Tue Mar 6 14:10:04 2018

[OpenOCD-devel] [PATCH]: 8eafeec Add complete JTAG debug logging.

This is an automated email from Gerrit. Tim Newsome (t...@sifive.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4451 -- gerrit commit 8eafeec62f78c76fbffec55b3bdc2ca68c44b766 Author: Tim Newsome Date: Tue Mar 6 13:13:35 2018

Re: [OpenOCD-devel] stm32f1x: reset command not working after locking flash

On Mon, Mar 5, 2018 at 6:40 PM, Szczepan Zalega | Nitrokey < szcze...@nitrokey.com> wrote: > After issuing 'stm32f1x lock 0', the 'reset run' command is not working > (it seems that device is not resuming its work - it is not enumerated on > USB) and I need to reinsert my device to USB slot to

[OpenOCD-devel] FPGA OpenOCD Integration

I have a snickerdoodle board and I'm interested in integrating OpenOCD with custom IP that I can create in the FPGA. The question that I have is what are the requirements for implementing the VHDL...what does OpenOCD expect the hardware side to implement? I'm aware that the