from:"José Vázquez Fernández"

[OpenWrt-Devel] bcm5357 wireless support

2015-11-30 Thread José Vázquez Fernández

I have a Linksys E1000 with a BCM5357 SoC but the wifi is not supported in b43 
nor brcmsmac, and 
bcmdhd is not an option. Will it be supported in a future?

Regards:

José Vázquez 
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[OpenWrt-Devel] [PATCH] [LANTIQ] ARV7519RW22 dts fix

2015-09-02 Thread José Vázquez Fernández

>From a9d8a4d04c5564abb0440a3b67dd21e8645e2c43 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jos=C3=A9=20V=C3=A1zquez=20Fern=C3=A1ndez?=
 
Date: Tue, 1 Sep 2015 19:30:26 +0200
Subject: [OpenWrt-Devel] [PATCH] [LANTIQ] ARV7519RW22 dts fix

The ARV7519RW22 has only one flash chip.
This patch fixes a detection issue of the mtd partitions that cause the
kernel not to be able to find rootfs.

Signed off by: 
---
 target/linux/lantiq/dts/ARV7519RW22.dts |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/lantiq/dts/ARV7519RW22.dts
b/target/linux/lantiq/dts/ARV7519RW22.dts
index 6823753..10ce8c9 100644
--- a/target/linux/lantiq/dts/ARV7519RW22.dts
+++ b/target/linux/lantiq/dts/ARV7519RW22.dts
@@ -18,7 +18,7 @@
nor-boot@0 {
compatible = "lantiq,nor";
bank-width = <2>;
-   reg = <0 0x0 0x200>, <1 0x200 
0x200>;
+   reg = <0 0x0 0x200>;
#address-cells = <1>;
#size-cells = <1>;
 
-- 
1.7.10.4
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[OpenWrt-Devel] [PATCH] [LANTIQ] [CC] ARV7519RW22 dts fix

2015-09-02 Thread José Vázquez Fernández

>From d9de074b635e8d9442409922f867d1ed8dd36887 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jos=C3=A9=20V=C3=A1zquez=20Fern=C3=A1ndez?=
 
Date: Wed, 2 Sep 2015 13:40:28 +0200
Subject: [OpenWrt-Devel] [PATCH] [LANTIQ] ARV7519RW22 dts fix

The ARV7519RW22 has only one flash chip.
This patch fixes a detection issue of the mtd partitions that cause the
kernel not to be able to find rootfs.

Signed off by: 
---
 target/linux/lantiq/dts/ARV7519RW22.dts |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/lantiq/dts/ARV7519RW22.dts
b/target/linux/lantiq/dts/ARV7519RW22.dts
index 6823753..10ce8c9 100644
--- a/target/linux/lantiq/dts/ARV7519RW22.dts
+++ b/target/linux/lantiq/dts/ARV7519RW22.dts
@@ -18,7 +18,7 @@
nor-boot@0 {
compatible = "lantiq,nor";
bank-width = <2>;
-   reg = <0 0x0 0x200>, <1 0x200 
0x200>;
+   reg = <0 0x0 0x200>;
#address-cells = <1>;
#size-cells = <1>;
 
-- 
1.7.10.4
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[OpenWrt-Devel] [PATCH][modules] Add support for Realtek r8712 and RTL8192SU.

2014-12-15 Thread José Vázquez Fernández

Add support for Realtek r8712 and RTL8192SU family.

This patch adds support for Realtek r8712 and
RTL8188SU/RTL8191SU/RTL8192SU family of fullmac usb wireless cards.
The r8712u staging driver only supports WEXT but works with no problems
in OpenWRT.

Signed off by: José Vázquez Fernández ppvazquez...@gmail.com

Index: package/kernel/linux/modules/wireless.mk
===
--- package/kernel/linux/modules/wireless.mk(revisión: 43720)
+++ package/kernel/linux/modules/wireless.mk(copia de trabajo)
@@ -126,3 +126,35 @@
 
 $(eval $(call KernelPackage,net-rtl8188eu))
 
+define KernelPackage/net-rtl8192su
+  SUBMENU:=$(WIRELESS_MENU)
+  TITLE:=RTL8192SU support (staging)
+  DEPENDS:=@USB_SUPPORT +@DRIVER_WEXT_SUPPORT +kmod-usb-core
+  KCONFIG:=\
+   CONFIG_STAGING=y \
+   CONFIG_R8712U
+  FILES:=$(LINUX_DIR)/drivers/staging/rtl8712/r8712u.ko
+  AUTOLOAD:=$(call AutoProbe,r8712u)
+endef
+
+define KernelPackage/net-rtl8192su/description
+ Kernel modules for RealTek RTL8712 and RTL81XXSU fullmac support.
+ 
+endef
+# R8712 FullMAC firmware
+R8712_FW:=rtl8712u.bin
+
+define Download/net-rtl8192su
+  FILE:=$(R8712_FW)
+
URL:=http://mirrors.arizona.edu/raspbmc/downloads/bin/lib/wifi/rtlwifi/
+#  MD5SUM:=8bd4310971772a486b9784c77f8a6df9
+endef
+
+define KernelPackage/net-rtl8192su/install
+   $(INSTALL_DIR) $(1)/lib/firmware/rtlwifi
+   $(INSTALL_DATA) $(DL_DIR)/$(R8712_FW) $(1)/lib/firmware/rtlwifi/
+endef
+
+$(eval $(call Download,net-rtl8192su))
+$(eval $(call KernelPackage,net-rtl8192su))
+
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[OpenWrt-Devel] [Fwd: [PATCH][modules][V2] Add support for Realtek r8712 and RTL8192SU.]

2014-12-15 Thread José Vázquez Fernández

Add support for Realtek r8712 and RTL8192SU family.

This patch adds support for Realtek r8712 and
RTL8188SU/RTL8191SU/RTL8192SU family of fullmac usb wireless cards.
The r8712u staging driver only supports WEXT but works with no problems
in OpenWRT.
V2: added md5sum and fixed the patch.
Signed off by: José Vázquez Fernández ppvazquez...@gmail.com

Index: package/kernel/linux/modules/wireless.mk
===
--- package/kernel/linux/modules/wireless.mk(revisión: 43720)
+++ package/kernel/linux/modules/wireless.mk(copia de trabajo)
@@ -126,3 +126,35 @@
 
 $(eval $(call KernelPackage,net-rtl8188eu))
 
+define KernelPackage/net-rtl8192su
+  SUBMENU:=$(WIRELESS_MENU)
+  TITLE:=RTL8192SU support (staging)
+  DEPENDS:=@USB_SUPPORT +@DRIVER_WEXT_SUPPORT +kmod-usb-core
+  KCONFIG:=\
+   CONFIG_STAGING=y \
+   CONFIG_R8712U
+  FILES:=$(LINUX_DIR)/drivers/staging/rtl8712/r8712u.ko
+  AUTOLOAD:=$(call AutoProbe,r8712u)
+endef
+
+define KernelPackage/net-rtl8192su/description
+ Kernel modules for RealTek RTL8712 and RTL81XXSU fullmac support.
+ 
+endef
+# R8712 FullMAC firmware
+R8712_FW:=rtl8712u.bin
+
+define Download/net-rtl8192su
+  FILE:=$(R8712_FW)
+
+  URL:=http://mirrors.arizona.edu/raspbmc/downloads/bin/lib/wifi/rtlwifi/
+  MD5SUM:=8e6396b5844a3e279ae8679555dec3f0
+endef
+
+define KernelPackage/net-rtl8192su/install
+   $(INSTALL_DIR) $(1)/lib/firmware/rtlwifi
+   $(INSTALL_DATA) $(DL_DIR)/$(R8712_FW) $(1)/lib/firmware/rtlwifi/
+endef
+
+$(eval $(call Download,net-rtl8192su))
+$(eval $(call KernelPackage,net-rtl8192su))
+
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[OpenWrt-Devel] [PATCH][Kernel] unset NF_REJECT_IPV6 and PHY_SAMSUNG_USB2

2014-12-03 Thread José Vázquez Fernández

oldconfig kept asking for that config symbol...
PHY_SAMSUNG_USB2 depends on DWC2


diff --git a/target/linux/generic/config-3.18
b/target/linux/generic/config-3.18
index e0e2a0b..d014334 100644
--- a/target/linux/generic/config-3.18
+++ b/target/linux/generic/config-3.18
@@ -2560,6 +2560,7 @@ CONFIG_NF_NAT_IPV4=m
 # CONFIG_NF_NAT_SNMP_BASIC is not set
 # CONFIG_NF_NAT_TFTP is not set
 CONFIG_NF_REJECT_IPV4=m
+# CONFIG_NF_REJECT_IPV6 is not set
 # CONFIG_NF_TABLES is not set
 # CONFIG_NI52 is not set
 # CONFIG_NI65 is not set
@@ -2802,6 +2803,7 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 # CONFIG_PHY_EXYNOS_DP_VIDEO is not set
 # CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set
+# CONFIG_PHY_SAMSUNG_USB2 is not set
 # CONFIG_PID_IN_CONTEXTIDR is not set
 # CONFIG_PID_NS is not set
 CONFIG_PINCONF=y
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[OpenWrt-Devel] [PATCH] [LANTIQ][V2] Add XWAY cpu-feature-overrides.h

2014-07-03 Thread José Vázquez Fernández

Add XWAY cpu-feature-overrides.h file.

This patch adds cpu-feature-overrides.h file for the XWAY family, based
in the one in FALCON.
Because Amazon SE was deprecated, cpu_has_dsp and cpu_has_mips16 have
been set, while cpu_has_mipsmt has been undefined due to the lack of mt
ASE in the Danube.
With this file the kernel size is reduced about 30KB in the XWAY
subtarget.
Tested only in a Danube based router with no problems and with a little
improvement in the USB port when using mass storage devices and wireless
dongles.
Changes in V2: disabled cpu_has_veic because XWAY family lacks this
feature as pointed by Thomas Langer.

Signed off by: José Vázquez Fernández ppvazquez...@gmail.com


diff --git
a/target/linux/lantiq/patches-3.10/0036-MIPS-lantiq-xway-add-cpu-feature-override.patch
 
b/target/linux/lantiq/patches-3.10/0036-MIPS-lantiq-xway-add-cpu-feature-override.patch
new file mode 100644
index 000..5e9a9d2
--- a/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h
1970-01-01 01:00:00.0 +0100
+++ b/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h
2014-07-01 12:37:07.790313378 +0200
@@ -0,0 +1,58 @@
+/*
+ *  Lantiq XWAY specific CPU feature overrides
+ *
+ *  Copyright (C) 2014 José Vázquez Fernández
+ *
+ *  This file was derived from: include/asm-mips/cpu-features.h
+ * Copyright (C) 2003, 2004 Ralf Baechle
+ * Copyright (C) 2004 Maciej W. Rozycki
+ *
+ *  This program is free software; you can redistribute it and/or
modify it
+ *  under the terms of the GNU General Public License version 2 as
published
+ *  by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_tlb1
+#define cpu_has_4kex   1
+#define cpu_has_3k_cache   0
+#define cpu_has_4k_cache   1
+#define cpu_has_tx39_cache 0
+#define cpu_has_sb1_cache  0
+#define cpu_has_fpu0
+#define cpu_has_32fpr  0
+#define cpu_has_counter1
+#define cpu_has_watch  1
+#define cpu_has_divec  1
+
+#define cpu_has_prefetch   1
+#define cpu_has_ejtag  1
+#define cpu_has_llsc   1
+
+#define cpu_has_dsp1
+#define cpu_has_mips16 1
+#define cpu_has_dsp2   0
+#define cpu_has_mdmx   0
+#define cpu_has_mips3d 0
+#define cpu_has_smartmips  0
+#define cpu_has_vz 0
+
+#define cpu_has_mips32r1   1
+#define cpu_has_mips32r2   1
+#define cpu_has_mips64r1   0
+#define cpu_has_mips64r2   0
+
+#define cpu_has_vint   1 /* MIPSR2 vectored interrupts */
+#define cpu_has_veic   0
+
+#define cpu_has_64bits 0
+#define cpu_has_64bit_zero_reg 0
+#define cpu_has_64bit_gp_regs  0
+#define cpu_has_64bit_addresses0
+
+#define cpu_dcache_line_size() 32
+#define cpu_icache_line_size() 32
+
+#endif /* __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H */
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[OpenWrt-Devel] [PATCH] [LANTIQ][V2][resend] Add XWAY cpu-feature-overrides.h

2014-07-03 Thread José Vázquez Fernández

Add XWAY cpu-feature-overrides.h file.

This patch adds cpu-feature-overrides.h file for the XWAY family, based in the 
one in FALCON.
Because Amazon SE was deprecated, cpu_has_dsp and cpu_has_mips16 have been set, 
while cpu_has_mipsmt has been undefined due to the lack of mt ASE in the Danube.
With this file the kernel size is reduced about 30KB in the XWAY subtarget.
Tested only in a Danube based router with no problems and with a little 
improvement in the USB port when using mass storage devices and wireless 
dongles.

Changes in V2: disabled cpu_has_veic because XWAY family lacks this feature as 
pointed by Thomas Langer.

Resent because the mail client changed its behaviour since an update. 

Signed off by: José Vázquez Fernández ppvazquez...@gmail.com

--- a/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h
1970-01-01 01:00:00.0 +0100
+++ b/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h
2014-07-01 12:37:07.790313378 +0200
@@ -0,0 +1,58 @@
+/*
+ *  Lantiq XWAY specific CPU feature overrides
+ *
+ *  Copyright (C) 2014 José Vázquez Fernández
+ *
+ *  This file was derived from: include/asm-mips/cpu-features.h
+ * Copyright (C) 2003, 2004 Ralf Baechle
+ * Copyright (C) 2004 Maciej W. Rozycki
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_tlb1
+#define cpu_has_4kex   1
+#define cpu_has_3k_cache   0
+#define cpu_has_4k_cache   1
+#define cpu_has_tx39_cache 0
+#define cpu_has_sb1_cache  0
+#define cpu_has_fpu0
+#define cpu_has_32fpr  0
+#define cpu_has_counter1
+#define cpu_has_watch  1
+#define cpu_has_divec  1
+
+#define cpu_has_prefetch   1
+#define cpu_has_ejtag  1
+#define cpu_has_llsc   1
+
+#define cpu_has_dsp1
+#define cpu_has_mips16 1
+#define cpu_has_dsp2   0
+#define cpu_has_mdmx   0
+#define cpu_has_mips3d 0
+#define cpu_has_smartmips  0
+#define cpu_has_vz 0
+
+#define cpu_has_mips32r1   1
+#define cpu_has_mips32r2   1
+#define cpu_has_mips64r1   0
+#define cpu_has_mips64r2   0
+
+#define cpu_has_vint   1 /* MIPSR2 vectored interrupts */
+#define cpu_has_veic   0
+
+#define cpu_has_64bits 0
+#define cpu_has_64bit_zero_reg 0
+#define cpu_has_64bit_gp_regs  0
+#define cpu_has_64bit_addresses0
+
+#define cpu_dcache_line_size() 32
+#define cpu_icache_line_size() 32
+
+#endif /* __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H */
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[OpenWrt-Devel] [PATCH] [LANTIQ] Add XWAY cpu-feature-overrides.h

2014-07-02 Thread José Vázquez Fernández


Add XWAY cpu-feature-overrides.h file.

This patch adds cpu-feature-overrides.h file for the XWAY family, based 
in the one in FALCON.
Because Amazon SE was deprecated, cpu_has_dsp and cpu_has_mips16 have 
been set, while cpu_has_mt has been undefined due to the lack of mt ASE 
in the Danube.

With this file the kernel size is reduced about 30KB in the XWAY subtarget.
Tested in a Danube based router with no problems and with a little 
improvement in the USB port when using mass storage devices and wireless 
dongles.


Signed off by: José Vázquez Fernández ppvazquez...@gmail.com


--- a/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h 
1970-01-01 01:00:00.0 +0100
+++ b/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h 
2014-07-01 12:37:07.790313378 +0200

@@ -0,0 +1,58 @@
+/*
+ *  Lantiq XWAY specific CPU feature overrides
+ *
+ *  Copyright (C) 2014 José Vázquez Fernández
+ *
+ *  This file was derived from: include/asm-mips/cpu-features.h
+ * Copyright (C) 2003, 2004 Ralf Baechle
+ * Copyright (C) 2004 Maciej W. Rozycki
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as 
published

+ *  by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_tlb1
+#define cpu_has_4kex   1
+#define cpu_has_3k_cache   0
+#define cpu_has_4k_cache   1
+#define cpu_has_tx39_cache 0
+#define cpu_has_sb1_cache  0
+#define cpu_has_fpu0
+#define cpu_has_32fpr  0
+#define cpu_has_counter1
+#define cpu_has_watch  1
+#define cpu_has_divec  1
+
+#define cpu_has_prefetch   1
+#define cpu_has_ejtag  1
+#define cpu_has_llsc   1
+
+#define cpu_has_dsp1
+#define cpu_has_mips16 1
+#define cpu_has_dsp2   0
+#define cpu_has_mdmx   0
+#define cpu_has_mips3d 0
+#define cpu_has_smartmips  0
+#define cpu_has_vz 0
+
+#define cpu_has_mips32r1   1
+#define cpu_has_mips32r2   1
+#define cpu_has_mips64r1   0
+#define cpu_has_mips64r2   0
+
+#define cpu_has_vint   1 /* MIPSR2 vectored interrupts */
+#define cpu_has_veic   1 /* MIPSR2 external interrupt controller mode 
*/
+
+#define cpu_has_64bits 0
+#define cpu_has_64bit_zero_reg 0
+#define cpu_has_64bit_gp_regs  0
+#define cpu_has_64bit_addresses0
+
+#define cpu_dcache_line_size() 32
+#define cpu_icache_line_size() 32
+
+#endif /* __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H */
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Re: [OpenWrt-Devel] [PATCH] [LANTIQ] Add XWAY cpu-feature-overrides.h

2014-07-02 Thread José Vázquez Fernández




On 02/07/14 21:49, José Vázquez Fernández wrote:

Add XWAY cpu-feature-overrides.h file.

This patch adds cpu-feature-overrides.h file for the XWAY family, based
in the one in FALCON.
Because Amazon SE was deprecated, cpu_has_dsp and cpu_has_mips16 have
been set, while cpu_has_mt has been undefined due to the lack of mt ASE
in the Danube.
With this file the kernel size is reduced about 30KB in the XWAY subtarget.
Tested in a Danube based router with no problems and with a little
improvement in the USB port when using mass storage devices and wireless
dongles.

Signed off by: José Vázquez Fernández ppvazquez...@gmail.com

I haven't AR9 nor VR9 based boards so a tests in those SoCs are strongly 
recommended.


diff --git 
a/target/linux/lantiq/patches-3.10/0036-MIPS-lantiq-xway-add-cpu-feature-override.patch 
b/target/linux/lantiq/patches-3.10/0036-MIPS-lantiq-xway-add-cpu-feature-override.patch

new file mode 100644
index 000..5e9a9d2

--- a/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h
1970-01-01 01:00:00.0 +0100
+++ b/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h
2014-07-01 12:37:07.790313378 +0200
@@ -0,0 +1,58 @@
+/*
+ *  Lantiq XWAY specific CPU feature overrides
+ *
+ *  Copyright (C) 2014 José Vázquez Fernández
+ *
+ *  This file was derived from: include/asm-mips/cpu-features.h
+ *Copyright (C) 2003, 2004 Ralf Baechle
+ *Copyright (C) 2004 Maciej W. Rozycki
+ *
+ *  This program is free software; you can redistribute it and/or
modify it
+ *  under the terms of the GNU General Public License version 2 as
published
+ *  by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_tlb1
+#define cpu_has_4kex1
+#define cpu_has_3k_cache0
+#define cpu_has_4k_cache1
+#define cpu_has_tx39_cache0
+#define cpu_has_sb1_cache0
+#define cpu_has_fpu0
+#define cpu_has_32fpr0
+#define cpu_has_counter1
+#define cpu_has_watch1
+#define cpu_has_divec1
+
+#define cpu_has_prefetch1
+#define cpu_has_ejtag1
+#define cpu_has_llsc1
+
+#define cpu_has_dsp1
+#define cpu_has_mips161
+#define cpu_has_dsp20
+#define cpu_has_mdmx0
+#define cpu_has_mips3d0
+#define cpu_has_smartmips0
+#define cpu_has_vz0
+
+#define cpu_has_mips32r11
+#define cpu_has_mips32r21
+#define cpu_has_mips64r10
+#define cpu_has_mips64r20
+
+#define cpu_has_vint1 /* MIPSR2 vectored interrupts */
+#define cpu_has_veic1 /* MIPSR2 external interrupt controller
mode */
+
+#define cpu_has_64bits0
+#define cpu_has_64bit_zero_reg0
+#define cpu_has_64bit_gp_regs0
+#define cpu_has_64bit_addresses0
+
+#define cpu_dcache_line_size()32
+#define cpu_icache_line_size()32
+
+#endif /* __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H */

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[OpenWrt-Devel] [PATCH] [LANTIQ] [resend] Add XWAY cpu-feature-overrides

2014-07-02 Thread José Vázquez Fernández


Add XWAY cpu-feature-overrides.h file.

This patch adds cpu-feature-overrides.h file for the XWAY family, based 
in the one in FALCON.
Because Amazon SE was deprecated, cpu_has_dsp and cpu_has_mips16 have 
been set, while cpu_has_mt has been undefined due to the lack of mt ASE 
in the Danube.

With this file the kernel size is reduced about 30KB in the XWAY subtarget.
Tested in a Danube based router with no problems and with a little 
improvement in the USB port when using mass storage devices and wireless 
dongles.


Signed off by: José Vázquez Fernández ppvazquez...@gmail.com

diff --git 
a/target/linux/lantiq/patches-3.10/0036-MIPS-lantiq-xway-add-cpu-feature-override.patch 
b/target/linux/lantiq/patches-3.10/0036-MIPS-lantiq-xway-add-cpu-feature-override.patch

new file mode 100644
index 000..5e9a9d2
diff -urN a/arch/mips/include/asm/mach-lantiq/xway/cpu-feature- 
overrides.h b/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h
--- a/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h 
1970-01-01 01:00:00.0 +0100
+++ b/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h 
2014-07-01 12:37:07.790313378 +0200

@@ -0,0 +1,58 @@
+/*
+ *  Lantiq XWAY specific CPU feature overrides
+ *
+ *  Copyright (C) 2014 José Vázquez Fernández
+ *
+ *  This file was derived from: include/asm-mips/cpu-features.h
+ * Copyright (C) 2003, 2004 Ralf Baechle
+ * Copyright (C) 2004 Maciej W. Rozycki
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as 
published

+ *  by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_tlb1
+#define cpu_has_4kex   1
+#define cpu_has_3k_cache   0
+#define cpu_has_4k_cache   1
+#define cpu_has_tx39_cache 0
+#define cpu_has_sb1_cache  0
+#define cpu_has_fpu0
+#define cpu_has_32fpr  0
+#define cpu_has_counter1
+#define cpu_has_watch  1
+#define cpu_has_divec  1
+
+#define cpu_has_prefetch   1
+#define cpu_has_ejtag  1
+#define cpu_has_llsc   1
+
+#define cpu_has_dsp1
+#define cpu_has_mips16 1
+#define cpu_has_dsp2   0
+#define cpu_has_mdmx   0
+#define cpu_has_mips3d 0
+#define cpu_has_smartmips  0
+#define cpu_has_vz 0
+
+#define cpu_has_mips32r1   1
+#define cpu_has_mips32r2   1
+#define cpu_has_mips64r1   0
+#define cpu_has_mips64r2   0
+
+#define cpu_has_vint   1 /* MIPSR2 vectored interrupts */
+#define cpu_has_veic   1 /* MIPSR2 external interrupt controller mode 
*/
+
+#define cpu_has_64bits 0
+#define cpu_has_64bit_zero_reg 0
+#define cpu_has_64bit_gp_regs  0
+#define cpu_has_64bit_addresses0
+
+#define cpu_dcache_line_size() 32
+#define cpu_icache_line_size() 32
+
+#endif /* __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H */
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[OpenWrt-Devel] [PATCH] [LANTIQ] Enable LANTIQ_PHY and LANTIQ_XRX200 only in XRX200 subtarget.

2014-06-30 Thread José Vázquez Fernández


Enable LANTIQ_PHY and LANTIQ_XRX200 only in XRX200 subtarget.

These drivers are not needed for ASE, Danube and AR9.
As side effect PHY11G and PHY22F firmwares are not included in the 
kernel image, which saves 64 KB.


Signed off by: José Vázquez Fernández ppvazquez...@gmail.com

Index: target/linux/lantiq/config-default
===
--- target/linux/lantiq/config-default  (revisión: 41429)
+++ target/linux/lantiq/config-default  (copia de trabajo)
@@ -83,9 +83,7 @@
 CONFIG_IRQ_FORCED_THREADING=y
 CONFIG_LANTIQ=y
 CONFIG_LANTIQ_ETOP=y
-CONFIG_LANTIQ_PHY=y
 CONFIG_LANTIQ_WDT=y
-CONFIG_LANTIQ_XRX200=y
 CONFIG_LEDS_GPIO=y
 CONFIG_MDIO_BOARDINFO=y
 CONFIG_MIPS=y
Index: target/linux/lantiq/xrx200/config-default
===
--- target/linux/lantiq/xrx200/config-default   (revisión: 41429)
+++ target/linux/lantiq/xrx200/config-default   (copia de trabajo)
@@ -15,6 +15,8 @@
 CONFIG_IRQCHIP=y
 CONFIG_IRQ_WORK=y
 # CONFIG_ISDN is not set
+CONFIG_LANTIQ_PHY=y
+CONFIG_LANTIQ_XRX200=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_LZO_COMPRESS=y
 CONFIG_LZO_DECOMPRESS=y
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[OpenWrt-Devel] [Lantiq][RFC] Add cpu-feature-overrides.h and disable PCIe and multithreading in Danube

2014-06-30 Thread José Vázquez Fernández


This draft adds cpu-feature-overrides.h using the FALCON one as base.
Due to the different cores used in ASE and Danube the Kconfig was 
modified to disable some options that are present in the AR9 and VR9 
SoCs, like multithreading, mt ASE and some others.
According with UGW all the Lantiq SoCs supported in OpenWRT have 
CPU_MIPSR2_IRQ_VI but it was not tested nor added.
FALCON sets cpu_has_vint and cpu_has_veic to 1, but here were left 
undefined because i have no idea if the XWAY family have and/or support 
they.
Due to only dcdc driver only has effect with the VR9 the Makefile was 
modified to include it only when SOC_XWAY is selected.


As a side effect the kernel size is 30KB smaller.

This patch, as is, works fine with a Danube based router, but, as i have 
said, is only a draft that, if it has interest, must be improved.


José Vázquez



diff -urN 
a/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h 
b/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h
--- a/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h 
1970-01-01 01:00:00.0 +0100
+++ b/arch/mips/include/asm/mach-lantiq/xway/cpu-feature-overrides.h 
2014-07-01 01:34:41.980432797 +0200

@@ -0,0 +1,67 @@
+/*
+ *  Lantiq XWAY specific CPU feature overrides
+ *
+ *  This file was derived from: include/asm-mips/cpu-features.h
+ * Copyright (C) 2003, 2004 Ralf Baechle
+ * Copyright (C) 2004 Maciej W. Rozycki
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as 
published

+ *  by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_tlb1
+#define cpu_has_4kex   1
+#define cpu_has_3k_cache   0
+#define cpu_has_4k_cache   1
+#define cpu_has_tx39_cache 0
+#define cpu_has_sb1_cache  0
+#define cpu_has_fpu0
+#define cpu_has_32fpr  0
+#define cpu_has_counter1
+#define cpu_has_watch  1
+#define cpu_has_divec  1
+
+#define cpu_has_prefetch   1
+#define cpu_has_ejtag  1
+#define cpu_has_llsc   1
+
+#if defined(CONFIG_SOC_AMAZON_SE)
+#define cpu_has_mips16 0
+#endif
+
+#define cpu_has_mdmx   0
+#define cpu_has_mips3d 0
+#define cpu_has_smartmips  0
+#define cpu_has_vz 0
+
+#define cpu_has_mips32r1   1
+#define cpu_has_mips32r2   1
+#define cpu_has_mips64r1   0
+#define cpu_has_mips64r2   0
+
+#if defined(CONFIG_SOC_AMAZON_SE)
+#define cpu_has_dsp0
+#endif
+
+#define cpu_has_dsp2   0
+
+#if defined(CONFIG_SOC_AMAZON_SE) || defined(CONFIG_SOC_DANUBE)
+#define cpu_has_mipsmt 0
+#endif
+
+//#define cpu_has_vint ? /* MIPSR2 vectored interrupts */
+//#define cpu_has_veic ? /* MIPSR2 external interrupt controller mode 
*/
+
+#define cpu_has_64bits 0
+#define cpu_has_64bit_zero_reg 0
+#define cpu_has_64bit_gp_regs  0
+#define cpu_has_64bit_addresses0
+
+#define cpu_dcache_line_size() 32
+#define cpu_icache_line_size() 32
+
+#endif /* __ASM_MACH_XWAY_CPU_FEATURE_OVERRIDES_H */
diff -urN a/arch/mips/Kconfig b/arch/mips/Kconfig
--- a/arch/mips/Kconfig 2014-07-01 01:11:21.0 +0200
+++ b/arch/mips/Kconfig 2014-06-30 23:59:30.0 +0200
@@ -241,7 +241,6 @@
select SYS_HAS_CPU_MIPS32_R2
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_32BIT_KERNEL
-   select SYS_SUPPORTS_MULTITHREADING
select SYS_HAS_EARLY_PRINTK
select ARCH_REQUIRE_GPIOLIB
select SWAP_IO_SPACE
diff -urN a/arch/mips/lantiq/Kconfig b/arch/mips/lantiq/Kconfig
--- a/arch/mips/lantiq/Kconfig  2014-07-01 01:11:23.0 +0200
+++ b/arch/mips/lantiq/Kconfig  2014-07-01 01:17:23.592775282 +0200
@@ -11,14 +11,21 @@
default SOC_XWAY

 config SOC_AMAZON_SE
-   bool Amazon SE
+   bool XWAY Amazon SE
select SOC_TYPE_XWAY

+config SOC_DANUBE
+   bool XWAY Danube
+   select SOC_TYPE_XWAY
+   select HW_HAS_PCI
+   select ARCH_SUPPORTS_MSI
+
 config SOC_XWAY
-   bool XWAY
+   bool XWAY Danube, AR9 and VR9
select SOC_TYPE_XWAY
select HW_HAS_PCI
select ARCH_SUPPORTS_MSI
+   select SYS_SUPPORTS_MULTITHREADING

 config SOC_FALCON
bool FALCON
@@ -31,12 +38,12 @@

 config DT_EASY50712
bool Easy50712
-   depends on SOC_XWAY
+   depends on SOC_XWAY || SOC_DANUBE
 endchoice

 config PCI_LANTIQ
bool PCI Support
-   depends on SOC_XWAY  PCI
+   depends on (SOC_XWAY || SOC_DANUBE)  PCI

 config PCIE_LANTIQ
bool PCIE Support
diff -urN a/arch/mips/lantiq/xway/Makefile b/arch/mips/lantiq/xway/Makefile
--- a/arch/mips/lantiq/xway/Makefile2014-07-01 01:11:23.0 +0200
+++ b/arch/mips/lantiq/xway/Makefile2014-07-01 02:02:33.946247244 +0200
@@ -1,8 +1,9 @@
-obj-y :=

Re: [OpenWrt-Devel] [PATCH 0/2] [telephony] Asterisk: Multiplevulnerabilities

2014-06-26 Thread José Vázquez Fernández

Do these vulnerabilities affect the versions included in Attitude Adjustment?

Pepe



Hello Daniel,

I have applied your patches.

Commits:
93ef5a1a85c9dc55b91778a806f6463b11d68026
eee55b8fd0ce811e0b1cc7400f012e19e1f99b30

Thank you so much!
Jiri

Dne 26/06/2014 05:18, Daniel Golle napsal(a):
 Vulnerabilities in various versions of Asterisk have been discovered
 recently.
 See
 http://sources.gentoo.org/cgi-bin/viewvc.cgi/gentoo/xml/htdocs/security/en/glsa/glsa-201406-25.xml
 
 http://web.nvd.nist.gov/view/vuln/detail?vulnId=CVE-2014-4046
 http://web.nvd.nist.gov/view/vuln/detail?vulnId=CVE-2014-4047
 
 Both, asterisk-1.8.x and asterisk-11.x should thus be updated to
 the most recent releases.
 
 Daniel Golle (2):
   asterisk-1.8.x: bump version
   asterisk-11.x: bump version
 
  net/asterisk-1.8.x/Makefile   | 4 
 ++--
  net/asterisk-11.x/Makefile| 4 
 ++--
  .../patches/010-asterisk-configure-undef-res-ninit.patch  | 2 +-
  3 files changed, 5 insertions(+), 5 deletions(-)
 
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[OpenWrt-Devel] [Patch][BCM63XX][V2][RFC] Select HW_RANDOM_BCM63XX only in the SoCs that support it.

2014-06-18 Thread José Vázquez Fernández


Select HW_RANDOM_BCM63XX only in the SoCs that support it.

Only BCM6368, BCM6362 and BCM63268 have a hardware random numbers
generator, so, if none of these are selected, don't compile it.

Tested with BCM6358 and BCM6328 successfully with both 3.10 and 3.14 
kernels.


Signed off by: José Vázquez Fernández ppvazquez...@gmail.com

diff -urN a/arch/mips/bcm63xx/Kconfig b/arch/mips/bcm63xx/Kconfig
--- a/arch/mips/bcm63xx/Kconfig 2014-06-02 16:00:48.0 +0200
+++ b/arch/mips/bcm63xx/Kconfig 2014-06-18 17:06:30.119106246 +0200
@@ -60,6 +60,7 @@
select HW_HAS_PCI
select BCM63XX_OHCI
select BCM63XX_EHCI
+   select BCM_RNG

 config BCM63XX_CPU_6368
bool support 6368 CPU
@@ -67,6 +68,7 @@
select HW_HAS_PCI
select BCM63XX_OHCI
select BCM63XX_EHCI
+   select BCM_RNG

 config BCM63XX_CPU_63268
bool support 63268 CPU
@@ -74,6 +76,10 @@
select HW_HAS_PCI
select BCM63XX_OHCI
select BCM63XX_EHCI
+   select BCM_RNG
 endmenu

+config BCM_RNG
+   bool
+
 source arch/mips/bcm63xx/boards/Kconfig
diff -urN a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
--- a/drivers/char/hw_random/Kconfig2014-05-31 21:34:37.0 +0200
+++ b/drivers/char/hw_random/Kconfig2014-06-18 17:03:53.127017691 +0200
@@ -75,7 +75,7 @@

 config HW_RANDOM_BCM63XX
tristate Broadcom BCM63xx Random Number Generator support
-   depends on HW_RANDOM  BCM63XX
+   depends on HW_RANDOM  (BCM_RNG || COMPILE_TEST)
default HW_RANDOM
---help---
  This driver provides kernel-side support for the Random Number
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[OpenWrt-Devel] [Patch][BCM63XX] Select HW_RANDOM_BCM63XX only in the SoCs that support it.

2014-06-06 Thread José Vázquez Fernández


Select HW_RANDOM_BCM63XX only in the SoCs that support it.

Only BCM6368, BCM6362 and BCM63268 have a hardware random numbers 
generator, so, if none of these are selected, don't compile a driver 
that has no effect.


Tested with BCM6358 and BCM6328 successfully.

Signed off by: José Vázquez Fernández ppvazquez...@gmail.com

diff -urN a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
--- a/drivers/char/hw_random/Kconfig	2014-06-06 12:21:38.677781666 +0200
+++ b/drivers/char/hw_random/Kconfig	2014-06-05 20:58:11.0 +0200
@@ -75,7 +75,7 @@
 
 config HW_RANDOM_BCM63XX
 	tristate Broadcom BCM63xx Random Number Generator support
-	depends on HW_RANDOM  BCM63XX
+	depends on HW_RANDOM  (BCM63XX_CPU_6362 || BCM63XX_CPU_6368 || BCM63XX_CPU_63268)
 	default HW_RANDOM
 	---help---
 	  This driver provides kernel-side support for the Random Number
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[OpenWrt-Devel] [PATCH] [LANTIQ]ath5k fix in wifi and ethernet eeprom handling patch.

2014-06-03 Thread José Vázquez Fernández


ath5k fix in wifi and ethernet eeprom handling patch.

Without the line that adds the patch of_ath5k_eeprom_probe cause a 
kernel panic, at least with the ARV4518PW.

Tested only in the modem-router mentioned above.

This patch is based in Bruno's hack present in patch #5454.

Signed off by: Bruno Rodríguez bruno.rodriguez.1...@gmail.com
Signed off by: José Vázquez Fernández ppvazquez...@gmail.com

diff --git a/target/linux/lantiq/patches-3.10/0010-MIPS-lantiq-wifi-and-ethernet-eeprom-handling.patch b/target/linux/lantiq/patches-3.10/0010-MIPS-lantiq-wifi-and-ethernet-eeprom-handling.patch
index 403ee97..93a58f7 100644
--- a/target/linux/lantiq/patches-3.10/0010-MIPS-lantiq-wifi-and-ethernet-eeprom-handling.patch
+++ b/target/linux/lantiq/patches-3.10/0010-MIPS-lantiq-wifi-and-ethernet-eeprom-handling.patch
@@ -246,6 +247,8 @@ Subject: [PATCH 18/22] owrt: lantiq: wifi and ethernet eeprom handling
 +		}
 +
 +		eep = ioremap(eep_res-start, resource_size(eep_res));
++		ath5k_pdata.eeprom_data = kmalloc(ATH5K_PLAT_EEP_MAX_WORDS1,
++GFP_KERNEL);
 +		memcpy_fromio(ath5k_pdata.eeprom_data, eep,
 +ATH5K_PLAT_EEP_MAX_WORDS  1);
 +	}
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[OpenWrt-Devel] [PATCH][bcm63xx]: Support for Comtrend VR-3025u and VR-3025un.

2014-05-23 Thread José Vázquez Fernández


Support for Comtrend VR-3025u and VR-3025un.

This patch adds support for both VR-3025u and VR-3025un.
Due to these routers are very close in terms of board definitions 
because the only differences are a led name and the board_id, the patch 
covers both boards.


Signed off by: José Vázquez Fernández ppvazquez...@gmail.com
Signed off by: Álvaro Fernández nolt...@gmail.com

Index: target/linux/brcm63xx/image/Makefile
===
--- target/linux/brcm63xx/image/Makefile(revisión: 40826)
+++ target/linux/brcm63xx/image/Makefile(copia de trabajo)
@@ -190,6 +190,10 @@
$(call Image/Build/CFE,$(1),96368MVNgr,6368,96368MVNgr-generic)
$(call Image/Build/CFE,$(1),96368MVWG,6368,96368MVWG-generic)

+   # Comtrend VR-3025xx
+   $(call Image/Build/CFE,$(1),96368M-1541N,6368,VR-3025u,,--pad 16)
+   $(call Image/Build/CFE,$(1),96368M-1341N,6368,VR-3025un,,--pad 4)
+
# Asmax AR 1004g
$(call Image/Build/CFEFIXUP,$(1),96348GW-10,AR1004G,6348,AR1004G)
# BT Voyager V210_BTR
Index: target/linux/brcm63xx/patches-3.10/561-VR_3025.patch
===
--- target/linux/brcm63xx/patches-3.10/561-VR_3025.patch(revisión: 0)
+++ target/linux/brcm63xx/patches-3.10/561-VR_3025.patch(revisión: 0)
@@ -0,0 +1,202 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
 b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -4334,6 +4334,190 @@ static struct board_info __initdata boar
+  * known 6368 boards
+  */
+ #ifdef CONFIG_BCM63XX_CPU_6368
++static struct board_info __initdata board_VR3025u = {
++  .name   = 96368M-1541N,
++  .expected_cpu_id= 0x6368,
++
++  .has_uart0  = 1,
++  .has_pci= 1,
++  .has_ohci0  = 1,
++  .has_ehci0  = 1,
++
++  .has_enetsw = 1,
++  .enetsw = {
++  .used_ports = {
++  [0] = {
++  .used   = 1,
++  .phy_id = 1,
++  .name   = port1,
++  },
++  [1] = {
++  .used   = 1,
++  .phy_id = 2,
++  .name   = port2,
++  },
++  [2] = {
++  .used   = 1,
++  .phy_id = 3,
++  .name   = port3,
++  },
++  [3] = {
++  .used   = 1,
++  .phy_id = 4,
++  .name   = port4,
++  },
++  },
++  },
++
++  .leds = {
++  {
++  .name   = VR-3025u:green:dsl,
++  .gpio   = 2,
++  .active_low = 1,
++  },
++  {
++  .name   = VR-3025u:green:inet,
++  .gpio   = 5,
++  },
++  {
++  .name   = VR-3025u:green:lan1,
++  .gpio   = 6,
++  .active_low = 1,
++  },
++  {
++  .name   = VR-3025u:green:lan2,
++  .gpio   = 7,
++  .active_low = 1,
++  },
++  {
++  .name   = VR-3025u:green:lan3,
++  .gpio   = 8,
++  .active_low = 1,
++  },
++  {
++  .name   = VR-3025u:green:lan4,
++  .gpio   = 9,
++  .active_low = 1,
++  },
++  {
++  .name   = VR-3025u:green:power,
++  .gpio   = 22,
++  .default_trigger = default-on,
++  },
++  {
++  .name   = VR-3025u:red:power,
++  .gpio   = 24,
++  },
++  {
++  .name   = VR-3025u:red:inet,
++  .gpio   = 31,
++  },
++  },
++
++  .buttons = {
++  {
++  .desc   = reset,
++  .gpio   = 34,
++  .type   = EV_KEY,
++  .code   = KEY_RESTART,
++  .debounce_interval

[OpenWrt-Devel] [PATCH] [Lantiq] ltq-hcd: disable mips16 support

2014-05-17 Thread José Vázquez Fernández

ltq-hcd: disable mips16 support.

This patch disables mips16 support in the ltq-hcd driver because some
people reported slow speed and problems with usb storage devices, 3G
dongles and wireless usb adapters.

Signed off by: José Vázquez Fernández ppvazquez...@gmail.com


Index: package/kernel/lantiq/ltq-hcd/Makefile
===
--- package/kernel/lantiq/ltq-hcd/Makefile  (revisión: 40772)
+++ package/kernel/lantiq/ltq-hcd/Makefile  (copia de trabajo)
@@ -10,6 +10,8 @@
 PKG_RELEASE:=1
 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/ltq-hcd-$(BUILD_VARIANT)
 
+PKG_USE_MIPS16:=0
+
 PKG_MAINTAINER:=John Crispin blo...@openwrt.org
 
 include $(INCLUDE_DIR)/package.mk
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[OpenWrt-Devel] [PATCH] [lantiq] [1/2] V2: EEPROM fix for Atheros wireless based boards.

2014-05-17 Thread José Vázquez Fernández

EEPROM fix for Atheros wireless based boards.

V2: previous patch was mangled and the subject was corrected.

This patch fixes a problem in some Astoria/Arcadyan routers with Atheros
based wireless. In these boards the flash partition that contains the
MAC and calibration data is not read properly, causing the driver to not
initialize the wireless.

[   13.772000] PCI: Enabling device :00:0e.0 ( - 0002)
[   13.776000] ath5k :00:0e.0: registered as 'phy0'
[   15.024000] ath5k: phy0: unable to init EEPROM
[   15.024000] ath5k: probe of :00:0e.0 failed with error -5

This patch covers both ath5k and ath9k drivers.

Signed off by: David Fernández papijunkm...@yahoo.com
Signed off by: Bruno Rodríguez bruno.rodriguez.1...@gmail.com
Signed off by: Álvaro Fernández nolt...@gmail.com
Tested by: José Vázquez Fernández ppvazquez...@gmail.com


Index: target/linux/lantiq/patches-3.10/0203-arv-athx-workaround.patch
===
--- target/linux/lantiq/patches-3.10/0203-arv-athx-workaround.patch
(revisión: 0)
+++ target/linux/lantiq/patches-3.10/0203-arv-athx-workaround.patch
(revisión: 0)
@@ -0,0 +1,447 @@
+--- a/arch/mips/lantiq/xway/ath_eep.c
 b/arch/mips/lantiq/xway/ath_eep.c
+@@ -41,94 +41,182 @@ int __init of_ath9k_eeprom_probe(struct
+ {
+   struct device_node *np = pdev-dev.of_node, *mtd_np;
+   int mac_offset, led_pin;
++  struct resource *eep_res, *mac_res;
++  void __iomem *eep, *mac;
++  int mac_offset;
+   u32 mac_inc = 0, pci_slot = 0;
+   int i;
++  u16 *eepdata, sum, el;
+   struct mtd_info *the_mtd;
+   size_t flash_readlen;
+   const __be32 *list;
+   const char *part;
+   phandle phandle;
+ 
+-  list = of_get_property(np, ath,eep-flash, i);
+-  if (!list || (i !=  (2 * sizeof(*list {
+-  dev_err(pdev-dev, failed to find ath,eep-flash\n);
+-  return -ENODEV;
+-  }
++  if (!of_find_property(np,ath,arv-ath9k-fix,NULL))
++  {
++  list = of_get_property(np, ath,eep-flash, i);
++  if (!list || (i !=  (2 * sizeof(*list {
++  dev_err(pdev-dev, failed to find ath,eep-flash\n);
++  return -ENODEV;
++  }
+ 
+-  phandle = be32_to_cpup(list++);
+-  if (!phandle) {
+-  dev_err(pdev-dev, failed to find phandle\n);
+-  return -ENODEV;
+-  }
++  phandle = be32_to_cpup(list++);
++  if (!phandle) {
++  dev_err(pdev-dev, failed to find phandle\n);
++  return -ENODEV;
++  }
+ 
+-  mtd_np = of_find_node_by_phandle(phandle);
+-  if (!mtd_np) {
+-  dev_err(pdev-dev, failed to find mtd node\n);
+-  return -ENODEV;
+-  }
++  mtd_np = of_find_node_by_phandle(phandle);
++  if (!mtd_np) {
++  dev_err(pdev-dev, failed to find mtd node\n);
++  return -ENODEV;
++  }
+ 
+-  part = of_get_property(mtd_np, label, NULL);
+-  if (!part)
+-  part = mtd_np-name;
+-
+-  the_mtd = get_mtd_device_nm(part);
+-  if (the_mtd == ERR_PTR(-ENODEV)) {
+-  dev_err(pdev-dev, failed to find mtd device\n);
+-  return -ENODEV;
+-  }
++  part = of_get_property(mtd_np, label, NULL);
++  if (!part)
++  part = mtd_np-name;
++
++  the_mtd = get_mtd_device_nm(part);
++  if (the_mtd == ERR_PTR(-ENODEV)){
++  dev_err(pdev-dev, failed to find mtd device\n);
++  return -ENODEV;
++  }
+ 
+-  i = mtd_read(the_mtd, be32_to_cpup(list),
++  i = mtd_read(the_mtd, be32_to_cpup(list),
+   ATH9K_PLAT_EEP_MAX_WORDS  1, flash_readlen,
+   (void *) ath9k_pdata.eeprom_data);
+-  put_mtd_device(the_mtd);
+-  if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
+-  dev_err(pdev-dev, failed to load eeprom from mtd\n);
+-  return -ENODEV;
+-  }
++  put_mtd_device(the_mtd);
++  if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
++  dev_err(pdev-dev, failed to load eeprom from mtd\n);
++  return -ENODEV;
++  }
+ 
+-  if (of_find_property(np, ath,eep-swap, NULL))
+-  for (i = 0; i  ATH9K_PLAT_EEP_MAX_WORDS; i++)
+-  ath9k_pdata.eeprom_data[i] = 
swab16(ath9k_pdata.eeprom_data[i]);
++  if (of_find_property(np, ath,eep-swap, NULL))
++  for (i = 0; i  ATH9K_PLAT_EEP_MAX_WORDS; i++)
++  ath9k_pdata.eeprom_data[i] = 
swab16(ath9k_pdata.eeprom_data[i]);
++
++  if (of_find_property(np, ath,eep-endian, NULL

[OpenWrt-Devel] [PATCH] [lantiq] [2/2] DTS updates for the ARV4518PW and ARV7518PW.

2014-05-16 Thread José Vázquez Fernández

DTS updates for the ARV4518PW and ARV7518PW.

These additions make the previous patch work in these boards, and adds
switch reset gpio and removes vmmc relay gpio in the ARV4518PW because
it is not present.
Also changes phy-mode to mii, which is the right configuration.

Signed off by: David Fernández papijunkm...@yahoo.com
Signed off by: Bruno Rodríguez bruno.rodriguez.1...@gmail.com
Signed off by: José Vázquez Fernández ppvazquez...@gmail.com


Index: target/linux/lantiq/dts/ARV4518PWR01.dts
===
--- target/linux/lantiq/dts/ARV4518PWR01.dts(revisión: 40772)
+++ target/linux/lantiq/dts/ARV4518PWR01.dts(copia de trabajo)
@@ -75,6 +75,7 @@
0 0x3f0016 0x6;
ath,mac-increment = 1;
ath,eep-swap;
+   ath,arv-ath5k-fix;
};
};
 
@@ -100,11 +101,31 @@
lantiq,pull = 0;
lantiq,output = 1;
};
+   pci_rst {
+   lantiq,pins = io21;
+   lantiq,pull = 2;
+   lantiq,output = 1;
+   };
+   leds {
+   lantiq,pins = io3, io4, io5, 
io6, io7, io8, io19;
+   lantiq,output = 1;
+   };
+   keys {
+   lantiq,pins = io28, io30;
+   lantiq,output = 0;
+   lantiq,pull = 2;
+   lantiq,open-drain = 1;
+   };
+   switch_rst {
+   lantiq,pins = io13;
+   lantiq,pull = 2;
+   lantiq,output = 1;
+   };
};
};
 
etop@E18 {
-   phy-mode = rmii;
+   phy-mode = mii;
};
 
ifxhcd@E101000 {
@@ -121,9 +142,6 @@
 
};
 
-/*
-#define ARV4518PW_SWITCH_RESET  13
-*/
gpio-keys-polled {
compatible = gpio-keys-polled;
#address-cells = 1;
@@ -146,7 +164,7 @@
compatible = gpio-leds;
power {
label = power;
-   gpios = gpio 3 0;
+   gpios = gpio 3 1;
};
dsl {
label = dsl;
@@ -189,4 +207,15 @@
gpios = gpiomm 3 1;
};
};
+
+   gpio_export {
+   compatible = gpio-export;
+   #size-cells = 0;
+
+   switch {
+   gpio-export,name = switch;
+   gpio-export,output = 1;
+   gpios = gpio 13 0;
+   };
+   };
 };
Index: target/linux/lantiq/dts/ARV4518PWR01A.dts
===
--- target/linux/lantiq/dts/ARV4518PWR01A.dts   (revisión: 40772)
+++ target/linux/lantiq/dts/ARV4518PWR01A.dts   (copia de trabajo)
@@ -75,6 +75,7 @@
0 0x3f0016 0x6;
ath,mac-increment = 1;
ath,eep-swap;
+   ath,arv-ath5k-fix;
};
};
 
@@ -100,11 +101,31 @@
lantiq,pull = 0;
lantiq,output = 1;
};
+   pci_rst {
+   lantiq,pins = io21;
+   lantiq,pull = 2;
+   lantiq,output = 1;
+   };
+   leds {
+   lantiq,pins = io3, io4, io5, 
io6, io7, io8, io19;
+   lantiq,output = 1;
+   };
+   keys {
+   lantiq,pins = io28, io30;
+   lantiq,output = 0;
+   lantiq,pull = 2;
+   lantiq,open-drain = 1;
+   };
+   switch_rst {
+   lantiq,pins = io13;
+   lantiq,pull = 2;
+   lantiq

[OpenWrt-Devel] [PATCH] [lantiq] [1/2] EEPROM fix for Astoria/Arcadyan boards.

2014-05-16 Thread José Vázquez Fernández

EEPROM fix for Astoria/Arcadyan boards.

This patch fixes a problem in some Astoria/Arcadyan routers with Atheros
based wireless. In these boards the flash partition that contains the
MAC and calibration data is not read properly, causing the driver to not
initialize the wireless.

[   13.772000] PCI: Enabling device :00:0e.0 ( - 0002)
[   13.776000] ath5k :00:0e.0: registered as 'phy0'
[   15.024000] ath5k: phy0: unable to init EEPROM
[   15.024000] ath5k: probe of :00:0e.0 failed with error -5

This patch covers both ath5k and ath9k drivers.

Signed off by: David Fernández papijunkm...@yahoo.com
Signed off by: Bruno Rodríguez bruno.rodriguez.1...@gmail.com
Signed off by: Álvaro Fernández nolt...@gmail.com
Tested by: José Vázquez Fernández ppvazquez...@gmail.com


--- a/arch/mips/lantiq/xway/ath_eep.c
+++ b/arch/mips/lantiq/xway/ath_eep.c
@@ -41,94 +41,182 @@ int __init of_ath9k_eeprom_probe(struct
 {
struct device_node *np = pdev-dev.of_node, *mtd_np;
int mac_offset, led_pin;
+   struct resource *eep_res, *mac_res;
+   void __iomem *eep, *mac;
+   int mac_offset;
u32 mac_inc = 0, pci_slot = 0;
int i;
+   u16 *eepdata, sum, el;
struct mtd_info *the_mtd;
size_t flash_readlen;
const __be32 *list;
const char *part;
phandle phandle;
 
-   list = of_get_property(np, ath,eep-flash, i);
-   if (!list || (i !=  (2 * sizeof(*list {
-   dev_err(pdev-dev, failed to find ath,eep-flash\n);
-   return -ENODEV;
-   }
+   if (!of_find_property(np,ath,arv-ath9k-fix,NULL))
+   {
+   list = of_get_property(np, ath,eep-flash, i);
+   if (!list || (i !=  (2 * sizeof(*list {
+   dev_err(pdev-dev, failed to find ath,eep-flash\n);
+   return -ENODEV;
+   }
 
-   phandle = be32_to_cpup(list++);
-   if (!phandle) {
-   dev_err(pdev-dev, failed to find phandle\n);
-   return -ENODEV;
-   }
+   phandle = be32_to_cpup(list++);
+   if (!phandle) {
+   dev_err(pdev-dev, failed to find phandle\n);
+   return -ENODEV;
+   }
 
-   mtd_np = of_find_node_by_phandle(phandle);
-   if (!mtd_np) {
-   dev_err(pdev-dev, failed to find mtd node\n);
-   return -ENODEV;
-   }
+   mtd_np = of_find_node_by_phandle(phandle);
+   if (!mtd_np) {
+   dev_err(pdev-dev, failed to find mtd node\n);
+   return -ENODEV;
+   }
 
-   part = of_get_property(mtd_np, label, NULL);
-   if (!part)
-   part = mtd_np-name;
-
-   the_mtd = get_mtd_device_nm(part);
-   if (the_mtd == ERR_PTR(-ENODEV)) {
-   dev_err(pdev-dev, failed to find mtd device\n);
-   return -ENODEV;
-   }
+   part = of_get_property(mtd_np, label, NULL);
+   if (!part)
+   part = mtd_np-name;
+
+   the_mtd = get_mtd_device_nm(part);
+   if (the_mtd == ERR_PTR(-ENODEV)){
+   dev_err(pdev-dev, failed to find mtd device\n);
+   return -ENODEV;
+   }
 
-   i = mtd_read(the_mtd, be32_to_cpup(list),
+   i = mtd_read(the_mtd, be32_to_cpup(list),
ATH9K_PLAT_EEP_MAX_WORDS  1, flash_readlen,
(void *) ath9k_pdata.eeprom_data);
-   put_mtd_device(the_mtd);
-   if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
-   dev_err(pdev-dev, failed to load eeprom from mtd\n);
-   return -ENODEV;
-   }
+   put_mtd_device(the_mtd);
+   if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
+   dev_err(pdev-dev, failed to load eeprom from mtd\n);
+   return -ENODEV;
+   }
 
-   if (of_find_property(np, ath,eep-swap, NULL))
-   for (i = 0; i  ATH9K_PLAT_EEP_MAX_WORDS; i++)
-   ath9k_pdata.eeprom_data[i] = 
swab16(ath9k_pdata.eeprom_data[i]);
+   if (of_find_property(np, ath,eep-swap, NULL))
+   for (i = 0; i  ATH9K_PLAT_EEP_MAX_WORDS; i++)
+   ath9k_pdata.eeprom_data[i] = 
swab16(ath9k_pdata.eeprom_data[i]);
+
+   if (of_find_property(np, ath,eep-endian, NULL)) {
+   ath9k_pdata.endian_check = true;
+   dev_info(pdev-dev, endian check enabled.\n);
+   }
 
-   if (of_find_property(np, ath,eep-endian, NULL)) {
-   ath9k_pdata.endian_check = true;
+   if (!of_property_read_u32(np, ath,mac-offset, mac_offset)) {
+   memcpy_fromio(athxk_eeprom_mac, (void*) 
ath9k_pdata.eeprom_data +
mac_offset, 6

[OpenWrt-Devel] [PATCH] [lantiq] [1/2] EEPROM fix for Astoria/Arcadyan boards.

2014-05-16 Thread José Vázquez Fernández

- Mensaje reenviado 
De: José Vázquez Fernández ppvazquez...@gmail.com
Para: openwrt-devel openwrt-devel@lists.openwrt.org
Asunto: [OpenWrt-Devel] [PATCH] [lantiq] [1/2] EEPROM fix for
Astoria/Arcadyan boards.
Fecha: Fri, 16 May 2014 19:47:03 +0200

EEPROM fix for Astoria/Arcadyan boards.

This patch fixes a problem in some Astoria/Arcadyan routers with Atheros
based wireless. In these boards the flash partition that contains the
MAC and calibration data is not read properly, causing the driver to not
initialize the wireless.

[   13.772000] PCI: Enabling device :00:0e.0 ( - 0002)
[   13.776000] ath5k :00:0e.0: registered as 'phy0'
[   15.024000] ath5k: phy0: unable to init EEPROM
[   15.024000] ath5k: probe of :00:0e.0 failed with error -5

This patch covers both ath5k and ath9k drivers.

Signed off by: David Fernández papijunkm...@yahoo.com
Signed off by: Bruno Rodríguez bruno.rodriguez.1...@gmail.com
Signed off by: Álvaro Fernández nolt...@gmail.com
Tested by: José Vázquez Fernández ppvazquez...@gmail.com


Index: target/linux/lantiq/patches-3.10/0203-arv-athx-workaround.patch
===
--- target/linux/lantiq/patches-3.10/0203-arv-athx-workaround.patch
(revisión: 0)
+++ target/linux/lantiq/patches-3.10/0203-arv-athx-workaround.patch
(revisión: 0)
@@ -0,0 +1,447 @@
+--- a/arch/mips/lantiq/xway/ath_eep.c
 b/arch/mips/lantiq/xway/ath_eep.c
+@@ -41,94 +41,182 @@ int __init of_ath9k_eeprom_probe(struct
+ {
+   struct device_node *np = pdev-dev.of_node, *mtd_np;
+   int mac_offset, led_pin;
++  struct resource *eep_res, *mac_res;
++  void __iomem *eep, *mac;
++  int mac_offset;
+   u32 mac_inc = 0, pci_slot = 0;
+   int i;
++  u16 *eepdata, sum, el;
+   struct mtd_info *the_mtd;
+   size_t flash_readlen;
+   const __be32 *list;
+   const char *part;
+   phandle phandle;
+ 
+-  list = of_get_property(np, ath,eep-flash, i);
+-  if (!list || (i !=  (2 * sizeof(*list {
+-  dev_err(pdev-dev, failed to find ath,eep-flash\n);
+-  return -ENODEV;
+-  }
++  if (!of_find_property(np,ath,arv-ath9k-fix,NULL))
++  {
++  list = of_get_property(np, ath,eep-flash, i);
++  if (!list || (i !=  (2 * sizeof(*list {
++  dev_err(pdev-dev, failed to find ath,eep-flash\n);
++  return -ENODEV;
++  }
+ 
+-  phandle = be32_to_cpup(list++);
+-  if (!phandle) {
+-  dev_err(pdev-dev, failed to find phandle\n);
+-  return -ENODEV;
+-  }
++  phandle = be32_to_cpup(list++);
++  if (!phandle) {
++  dev_err(pdev-dev, failed to find phandle\n);
++  return -ENODEV;
++  }
+ 
+-  mtd_np = of_find_node_by_phandle(phandle);
+-  if (!mtd_np) {
+-  dev_err(pdev-dev, failed to find mtd node\n);
+-  return -ENODEV;
+-  }
++  mtd_np = of_find_node_by_phandle(phandle);
++  if (!mtd_np) {
++  dev_err(pdev-dev, failed to find mtd node\n);
++  return -ENODEV;
++  }
+ 
+-  part = of_get_property(mtd_np, label, NULL);
+-  if (!part)
+-  part = mtd_np-name;
+-
+-  the_mtd = get_mtd_device_nm(part);
+-  if (the_mtd == ERR_PTR(-ENODEV)) {
+-  dev_err(pdev-dev, failed to find mtd device\n);
+-  return -ENODEV;
+-  }
++  part = of_get_property(mtd_np, label, NULL);
++  if (!part)
++  part = mtd_np-name;
++
++  the_mtd = get_mtd_device_nm(part);
++  if (the_mtd == ERR_PTR(-ENODEV)){
++  dev_err(pdev-dev, failed to find mtd device\n);
++  return -ENODEV;
++  }
+ 
+-  i = mtd_read(the_mtd, be32_to_cpup(list),
++  i = mtd_read(the_mtd, be32_to_cpup(list),
+   ATH9K_PLAT_EEP_MAX_WORDS  1, flash_readlen,
+   (void *) ath9k_pdata.eeprom_data);
+-  put_mtd_device(the_mtd);
+-  if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
+-  dev_err(pdev-dev, failed to load eeprom from mtd\n);
+-  return -ENODEV;
+-  }
++  put_mtd_device(the_mtd);
++  if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
++  dev_err(pdev-dev, failed to load eeprom from mtd\n);
++  return -ENODEV;
++  }
+ 
+-  if (of_find_property(np, ath,eep-swap, NULL))
+-  for (i = 0; i  ATH9K_PLAT_EEP_MAX_WORDS; i++)
+-  ath9k_pdata.eeprom_data[i] = 
swab16(ath9k_pdata.eeprom_data[i]);
++  if (of_find_property(np, ath,eep-swap, NULL))
++  for (i = 0; i  ATH9K_PLAT_EEP_MAX_WORDS; i

[OpenWrt-Devel] [PATCH] [lantiq] [1/2] [V2] EEPROM fix for Astoria/Arcadyan boards.

2014-05-16 Thread José Vázquez Fernández

EEPROM fix for Astoria/Arcadyan boards.

This patch fixes a problem in some Astoria/Arcadyan routers with Atheros
based wireless. In these boards the flash partition that contains the
MAC and calibration data is not read properly, causing the driver to not
initialize the wireless.

[   13.772000] PCI: Enabling device :00:0e.0 ( - 0002)
[   13.776000] ath5k :00:0e.0: registered as 'phy0'
[   15.024000] ath5k: phy0: unable to init EEPROM
[   15.024000] ath5k: probe of :00:0e.0 failed with error -5

This patch covers both ath5k and ath9k drivers.

Signed off by: David Fernández papijunkm...@yahoo.com
Signed off by: Bruno Rodríguez bruno.rodriguez.1...@gmail.com
Signed off by: Álvaro Fernández nolt...@gmail.com
Tested by: José Vázquez Fernández ppvazquez...@gmail.com


Index: target/linux/lantiq/patches-3.10/0203-arv-athx-workaround.patch
===
--- target/linux/lantiq/patches-3.10/0203-arv-athx-workaround.patch
(revisión: 0)
+++ target/linux/lantiq/patches-3.10/0203-arv-athx-workaround.patch
(revisión: 0)
@@ -0,0 +1,447 @@
+--- a/arch/mips/lantiq/xway/ath_eep.c
 b/arch/mips/lantiq/xway/ath_eep.c
+@@ -41,94 +41,182 @@ int __init of_ath9k_eeprom_probe(struct
+ {
+   struct device_node *np = pdev-dev.of_node, *mtd_np;
+   int mac_offset, led_pin;
++  struct resource *eep_res, *mac_res;
++  void __iomem *eep, *mac;
++  int mac_offset;
+   u32 mac_inc = 0, pci_slot = 0;
+   int i;
++  u16 *eepdata, sum, el;
+   struct mtd_info *the_mtd;
+   size_t flash_readlen;
+   const __be32 *list;
+   const char *part;
+   phandle phandle;
+ 
+-  list = of_get_property(np, ath,eep-flash, i);
+-  if (!list || (i !=  (2 * sizeof(*list {
+-  dev_err(pdev-dev, failed to find ath,eep-flash\n);
+-  return -ENODEV;
+-  }
++  if (!of_find_property(np,ath,arv-ath9k-fix,NULL))
++  {
++  list = of_get_property(np, ath,eep-flash, i);
++  if (!list || (i !=  (2 * sizeof(*list {
++  dev_err(pdev-dev, failed to find ath,eep-flash\n);
++  return -ENODEV;
++  }
+ 
+-  phandle = be32_to_cpup(list++);
+-  if (!phandle) {
+-  dev_err(pdev-dev, failed to find phandle\n);
+-  return -ENODEV;
+-  }
++  phandle = be32_to_cpup(list++);
++  if (!phandle) {
++  dev_err(pdev-dev, failed to find phandle\n);
++  return -ENODEV;
++  }
+ 
+-  mtd_np = of_find_node_by_phandle(phandle);
+-  if (!mtd_np) {
+-  dev_err(pdev-dev, failed to find mtd node\n);
+-  return -ENODEV;
+-  }
++  mtd_np = of_find_node_by_phandle(phandle);
++  if (!mtd_np) {
++  dev_err(pdev-dev, failed to find mtd node\n);
++  return -ENODEV;
++  }
+ 
+-  part = of_get_property(mtd_np, label, NULL);
+-  if (!part)
+-  part = mtd_np-name;
+-
+-  the_mtd = get_mtd_device_nm(part);
+-  if (the_mtd == ERR_PTR(-ENODEV)) {
+-  dev_err(pdev-dev, failed to find mtd device\n);
+-  return -ENODEV;
+-  }
++  part = of_get_property(mtd_np, label, NULL);
++  if (!part)
++  part = mtd_np-name;
++
++  the_mtd = get_mtd_device_nm(part);
++  if (the_mtd == ERR_PTR(-ENODEV)){
++  dev_err(pdev-dev, failed to find mtd device\n);
++  return -ENODEV;
++  }
+ 
+-  i = mtd_read(the_mtd, be32_to_cpup(list),
++  i = mtd_read(the_mtd, be32_to_cpup(list),
+   ATH9K_PLAT_EEP_MAX_WORDS  1, flash_readlen,
+   (void *) ath9k_pdata.eeprom_data);
+-  put_mtd_device(the_mtd);
+-  if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
+-  dev_err(pdev-dev, failed to load eeprom from mtd\n);
+-  return -ENODEV;
+-  }
++  put_mtd_device(the_mtd);
++  if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
++  dev_err(pdev-dev, failed to load eeprom from mtd\n);
++  return -ENODEV;
++  }
+ 
+-  if (of_find_property(np, ath,eep-swap, NULL))
+-  for (i = 0; i  ATH9K_PLAT_EEP_MAX_WORDS; i++)
+-  ath9k_pdata.eeprom_data[i] = 
swab16(ath9k_pdata.eeprom_data[i]);
++  if (of_find_property(np, ath,eep-swap, NULL))
++  for (i = 0; i  ATH9K_PLAT_EEP_MAX_WORDS; i++)
++  ath9k_pdata.eeprom_data[i] = 
swab16(ath9k_pdata.eeprom_data[i]);
++
++  if (of_find_property(np, ath,eep-endian, NULL)) {
++  ath9k_pdata.endian_check = true;
++  dev_info(pdev-dev, endian check

[OpenWrt-Devel] [PATCH] [lantiq] [1/2] [V3] EEPROM fix for Astoria/Arcadyan boards.

2014-05-16 Thread José Vázquez Fernández

EEPROM fix for Astoria/Arcadyan boards.

This patch fixes a problem in some Astoria/Arcadyan routers with Atheros
based wireless. In these boards the flash partition that contains the
MAC and calibration data is not read properly, causing the driver to not
initialize the wireless.

[   13.772000] PCI: Enabling device :00:0e.0 ( - 0002)
[   13.776000] ath5k :00:0e.0: registered as 'phy0'
[   15.024000] ath5k: phy0: unable to init EEPROM
[   15.024000] ath5k: probe of :00:0e.0 failed with error -5

This patch covers both ath5k and ath9k drivers.

Signed off by: David Fernández papijunkm...@yahoo.com
Signed off by: Bruno Rodríguez bruno.rodriguez.1...@gmail.com
Signed off by: Álvaro Fernández nolt...@gmail.com
Tested by: José Vázquez Fernández ppvazquez...@gmail.com


Index: target/linux/lantiq/patches-3.10/0203-arv-athx-workaround.patch
===
--- target/linux/lantiq/patches-3.10/0203-arv-athx-workaround.patch
(revisión: 0)
+++ target/linux/lantiq/patches-3.10/0203-arv-athx-workaround.patch
(revisión: 0)
@@ -0,0 +1,447 @@
+--- a/arch/mips/lantiq/xway/ath_eep.c
 b/arch/mips/lantiq/xway/ath_eep.c
+@@ -41,94 +41,182 @@ int __init of_ath9k_eeprom_probe(struct
+ {
+   struct device_node *np = pdev-dev.of_node, *mtd_np;
+   int mac_offset, led_pin;
++  struct resource *eep_res, *mac_res;
++  void __iomem *eep, *mac;
++  int mac_offset;
+   u32 mac_inc = 0, pci_slot = 0;
+   int i;
++  u16 *eepdata, sum, el;
+   struct mtd_info *the_mtd;
+   size_t flash_readlen;
+   const __be32 *list;
+   const char *part;
+   phandle phandle;
+ 
+-  list = of_get_property(np, ath,eep-flash, i);
+-  if (!list || (i !=  (2 * sizeof(*list {
+-  dev_err(pdev-dev, failed to find ath,eep-flash\n);
+-  return -ENODEV;
+-  }
++  if (!of_find_property(np,ath,arv-ath9k-fix,NULL))
++  {
++  list = of_get_property(np, ath,eep-flash, i);
++  if (!list || (i !=  (2 * sizeof(*list {
++  dev_err(pdev-dev, failed to find ath,eep-flash\n);
++  return -ENODEV;
++  }
+ 
+-  phandle = be32_to_cpup(list++);
+-  if (!phandle) {
+-  dev_err(pdev-dev, failed to find phandle\n);
+-  return -ENODEV;
+-  }
++  phandle = be32_to_cpup(list++);
++  if (!phandle) {
++  dev_err(pdev-dev, failed to find phandle\n);
++  return -ENODEV;
++  }
+ 
+-  mtd_np = of_find_node_by_phandle(phandle);
+-  if (!mtd_np) {
+-  dev_err(pdev-dev, failed to find mtd node\n);
+-  return -ENODEV;
+-  }
++  mtd_np = of_find_node_by_phandle(phandle);
++  if (!mtd_np) {
++  dev_err(pdev-dev, failed to find mtd node\n);
++  return -ENODEV;
++  }
+ 
+-  part = of_get_property(mtd_np, label, NULL);
+-  if (!part)
+-  part = mtd_np-name;
+-
+-  the_mtd = get_mtd_device_nm(part);
+-  if (the_mtd == ERR_PTR(-ENODEV)) {
+-  dev_err(pdev-dev, failed to find mtd device\n);
+-  return -ENODEV;
+-  }
++  part = of_get_property(mtd_np, label, NULL);
++  if (!part)
++  part = mtd_np-name;
++
++  the_mtd = get_mtd_device_nm(part);
++  if (the_mtd == ERR_PTR(-ENODEV)){
++  dev_err(pdev-dev, failed to find mtd device\n);
++  return -ENODEV;
++  }
+ 
+-  i = mtd_read(the_mtd, be32_to_cpup(list),
++  i = mtd_read(the_mtd, be32_to_cpup(list),
+   ATH9K_PLAT_EEP_MAX_WORDS  1, flash_readlen,
+   (void *) ath9k_pdata.eeprom_data);
+-  put_mtd_device(the_mtd);
+-  if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
+-  dev_err(pdev-dev, failed to load eeprom from mtd\n);
+-  return -ENODEV;
+-  }
++  put_mtd_device(the_mtd);
++  if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
++  dev_err(pdev-dev, failed to load eeprom from mtd\n);
++  return -ENODEV;
++  }
+ 
+-  if (of_find_property(np, ath,eep-swap, NULL))
+-  for (i = 0; i  ATH9K_PLAT_EEP_MAX_WORDS; i++)
+-  ath9k_pdata.eeprom_data[i] = 
swab16(ath9k_pdata.eeprom_data[i]);
++  if (of_find_property(np, ath,eep-swap, NULL))
++  for (i = 0; i  ATH9K_PLAT_EEP_MAX_WORDS; i++)
++  ath9k_pdata.eeprom_data[i] = 
swab16(ath9k_pdata.eeprom_data[i]);
++
++  if (of_find_property(np, ath,eep-endian, NULL)) {
++  ath9k_pdata.endian_check = true;
++  dev_info(pdev-dev, endian check

[OpenWrt-Devel] Wireless eeprom fix for ARV4518PW, ARV7518PW and some others.

2014-04-01 Thread José Vázquez Fernández

Tki2000, in the openwrt subforum of seguridadwireless, published a
modified ath_eep.c file because, since the Lantiq target moved to kernel
3.10 some routers cannot read calibration data nor mac.
The code also applies a patch made by Noltari that disables regdomain
limitations, but still don't read the mac rightly.
Here is the code that can be used as a draft to make the wifi work in
those routers.

/*
 *  Copyright (C) 2011 Luca Olivetti l...@ventoso.org
 *  Copyright (C) 2011 John Crispin blo...@openwrt.org
 *  Copyright (C) 2011 Andrej Vlašić andrej.vlas...@gmail.com
 *  Copyright (C) 2013 Álvaro Fernández Rojas nolt...@gmail.com
 *  Copyright (C) 2013 Daniel Gimpelevich
dan...@gimpelevich.san-francisco.ca.us
 *
 *  This program is free software; you can redistribute it and/or modify
it
 *  under the terms of the GNU General Public License version 2 as
published
 *  by the Free Software Foundation.
 */

#include linux/init.h
#include linux/module.h
#include linux/platform_device.h
#include linux/etherdevice.h
#include linux/ath5k_platform.h
#include linux/ath9k_platform.h
#include linux/pci.h
#include linux/err.h
#include linux/mtd/mtd.h
#include pci-ath-fixup.h
#include lantiq_soc.h
#include linux/of_net.h

extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
struct ath5k_platform_data ath5k_pdata;
struct ath9k_platform_data ath9k_pdata = {
.led_pin = -1,
};
static u8 athxk_eeprom_mac[6];

static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
{
dev-dev.platform_data = ath9k_pdata;
return 0;
}

int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
{
struct device_node *np = pdev-dev.of_node, *mtd_np;
struct resource *eep_res, *mac_res;
void __iomem *eep, *mac;
int mac_offset;
u32 mac_inc = 0, pci_slot = 0;
int i;
u16 *eepdata, sum, el;
struct mtd_info *the_mtd;
size_t flash_readlen;
const __be32 *list;
const char *part;
phandle phandle;
//struct property *pp;
//struct device_node *dn;

if (!of_find_property(np,ath,arv-ath9k-fix,NULL))
{
list = of_get_property(np, ath,eep-flash, i);
if (!list || (i !=  (2 * sizeof(*list 
{
dev_err(pdev-dev, failed to find ath,eep-flash\n);
return -ENODEV;
}

phandle = be32_to_cpup(list++);
if (!phandle) 
{
dev_err(pdev-dev, failed to find phandle\n);
return -ENODEV;
}

mtd_np = of_find_node_by_phandle(phandle);
if (!mtd_np) 
{
dev_err(pdev-dev, failed to find mtd node\n);
return -ENODEV;
}

part = of_get_property(mtd_np, label, NULL);
if (!part)
part = mtd_np-name;

the_mtd = get_mtd_device_nm(part);
if (the_mtd == ERR_PTR(-ENODEV)) 
{
dev_err(pdev-dev, failed to find mtd device\n);
return -ENODEV;
}

i = mtd_read(the_mtd, be32_to_cpup(list),
ATH9K_PLAT_EEP_MAX_WORDS  1, flash_readlen,
(void *) ath9k_pdata.eeprom_data);
put_mtd_device(the_mtd);
if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) 
{
dev_err(pdev-dev, failed to load eeprom from mtd\n);
return -ENODEV;
}

if (of_find_property(np, ath,eep-swap, NULL))
for (i = 0; i  ATH9K_PLAT_EEP_MAX_WORDS; i++)
ath9k_pdata.eeprom_data[i] = 
swab16(ath9k_pdata.eeprom_data[i]);

if (of_find_property(np, ath,eep-endian, NULL)) 
{
ath9k_pdata.endian_check = true;
dev_info(pdev-dev, endian check enabled.\n);
}

if (!of_property_read_u32(np, ath,mac-offset, mac_offset)) 
{
memcpy_fromio(athxk_eeprom_mac, (void*) 
ath9k_pdata.eeprom_data +
mac_offset, 6);
} 
else 
{
random_ether_addr(athxk_eeprom_mac);
if (of_get_mac_address_mtd(np, athxk_eeprom_mac))
dev_warn(pdev-dev, using random mac\n);
}

if (!of_property_read_u32(np, ath,mac-increment, mac_inc))
athxk_eeprom_mac[5] += mac_inc;

ath9k_pdata.macaddr = athxk_eeprom_mac;
ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;

if (!of_property_read_u32(np, ath,pci-slot,

Re: [OpenWrt-Devel] compiler optimization flags on the brcm2708platform?

2014-03-25 Thread José Vázquez Fernández

The GCC arm options are explained here: 
http://gcc.gnu.org/onlinedocs/gcc-4.8.2/gcc/ARM-Options.html#ARM-Options
The BCM2708 has the following features: swp half thumb fastmult vfp edsp java 
tls
To add option to the toolchain go to make menuconfig-Advanced options 
-- Target options
Once there write the flags you want.

Regards:

Pepe

- Original Message - 
From: Derek  Vicky thewerth...@gmail.com
To: openwrt-devel openwrt-devel@lists.openwrt.org
Sent: Tuesday, March 25, 2014 7:33 PM
Subject: Re: [OpenWrt-Devel] compiler optimization flags on the 
brcm2708platform?


VIPS is obviously the wrong package to be talking about with respect to
compiler optimization flags...:-)

I read this article on compiler optimization flags
https://forum.openwrt.org/viewtopic.php?id=35323 and don't see the same
options available on the current Makefiles.
/trunk/target/linux/brcm2708/Makefile

Where is the place to set the compiler optimization flags?
Cheers

On 03/25/2014 08:27 AM, Derek Werthmuller wrote:
 In 2012 a patch was added for the brcm2708 build platform to use
 hardware floating point.
 Looks like the patch was committed too.
 https://lists.openwrt.org/pipermail/openwrt-devel/2012-July/016028.html
 -mfpu=vfp-   enables use of hardware floating point
 instructions. (in patch already)
 -mfloat-abi=hard   -   makes calling hardware floating point more efficient.

 Can this patch be added back in? I would like to be able to take advantage of 
 the floating point 
 hardware. I wonder if the patch was not included in the 12.09 tree?

 Quick search didn't reveal any reasons why it might have been removed.
 Thanks
   Derek
___
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https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel 
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https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel

[OpenWrt-Devel] [PATCH] [lantiq] V2: add support for Astoria ARV7519RW.

2014-03-12 Thread José Vázquez Fernández

Add support for Astoria ARV7519RW.

These patches add support for the Astoria ARV7519RW aka Livebox 2.1
The PCI and PCIe interfaces have been disabled. Also, because there are
two revisions of this board with different GPHY firmwares, two targets
were defined.
V2: rewrote partitions to work with an u-boot specifically made for
these boards.

Signed off by: Esteban Benito esteban...@gmail.com
Signed off by: Carles Gadea carles...@gmail.com
Tested by: José Vázquez Fernández ppvazquez...@gmail.com

diff --git a/target/linux/lantiq/base-files/etc/uci-defaults/02_network
b/target/linux/lantiq/base-files/etc/uci-defaults/02_network
index 6e17d4d..a1f7b6a 100644
--- a/target/linux/lantiq/base-files/etc/uci-defaults/02_network
+++ b/target/linux/lantiq/base-files/etc/uci-defaults/02_network
@@ -114,6 +114,11 @@ TDW8970)
lan_mac=$(mtd_get_mac_binary boardconfig 61696)
wan_mac=$(macaddr_add $lan_mac 1)
;;
+
+ARV7519*)
+   lan_mac=$(mtd_get_mac_binary boardconfig 22)
+   wan_mac=$(macaddr_add $lan_mac 1)
+   ;;
 esac
 
 [ -z $(ls /lib/modules/`uname -r`/ltq_atm*) ] || set_atm_wan $vpi
$vci $encaps $payload
diff --git a/target/linux/lantiq/dts/ARV7519RW.dtsi
b/target/linux/lantiq/dts/ARV7519RW.dtsi
new file mode 100644
index 000..7790470
--- /dev/null
+++ b/target/linux/lantiq/dts/ARV7519RW.dtsi
@@ -0,0 +1,186 @@
+/include/ vr9.dtsi
+
+/ {
+
+   model = ARV7519 - Astoria Networks ARV7519RW22-A-LT;
+   
+   chosen {
+   bootargs = console=ttyLTQ0,115200 init=/etc/preinit;
+   };
+   
+   memory@0 {
+   reg = 0x0 0x800;
+   };
+   
+   fpi@1000 {
+   
+   gpio: pinmux@E100B10 {
+   pinctrl-names = default;
+   pinctrl-0 = state_default;
+   
+   state_default: pinmux {
+   mdio {
+   lantiq,groups = mdio;
+   lantiq,function = mdio;
+   };
+   gphy-leds {
+   lantiq,groups = gphy0 led1, gphy1 
led1;
+   lantiq,function = gphy;
+   lantiq,pull = 2;
+   lantiq,open-drain = 0;
+   lantiq,output = 1;
+   };
+   phy-rst {
+   lantiq,pins = io42;
+   lantiq,pull = 0;
+   lantiq,open-drain = 0;
+   lantiq,output = 1;
+   };
+   pcie-rst {
+   lantiq,pins = io21;
+   lantiq,pull = 0;
+   lantiq,output = 1;
+   };
+   };
+   };
+
+   eth@E108000 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = lantiq,xrx200-net;
+   reg =  0xE108000 0x3000 /* switch */
+   0xE10B100 0x70 /* mdio */
+   0xE10B1D8 0x30 /* mii */
+   0xE10B308 0x30 /* pmac */
+   ;
+   interrupt-parent = icu0;
+   interrupts = 73 72;
+
+   lan: interface@0 {
+   compatible = lantiq,xrx200-pdi;
+   #address-cells = 1;
+   #size-cells = 0;
+   reg = 0;
+   mac-address = [ 00 11 22 33 44 55 ];
+
+   ethernet@2 {
+   compatible = lantiq,xrx200-pdi-port;
+   reg = 2;
+   phy-mode = gmii;
+   phy-handle = phy11;
+   };
+   ethernet@3 {
+   compatible = lantiq,xrx200-pdi-port;
+   reg = 4;
+   phy-mode = gmii;
+   phy-handle = phy13;
+   };
+   };
+   
+   wan: interface@1 {
+   compatible = lantiq,xrx200-pdi;
+   #address-cells = 1;
+   #size-cells = 0;
+   reg = 1;
+   mac-address = [ 00 11 22 33 44 56

[OpenWrt-Devel] [PATCH] [lantiq] Add support for Astoria ARV7519RW.

2014-03-10 Thread José Vázquez Fernández

Add support for Astoria ARV7519RW.

These patches add support for the Astoria ARV7519RW aka Livebox 2.1
The PCI and PCIe interfaces have been disabled. Also, because there are
two revisions of this board with differen GPHY firmwares, two targets
were defined.

Signed off by: Esteban Benito esteban...@gmail.com
Signed off by: Carles Gadea carles...@gmail.com
Tested by: José Vázquez Fernández ppvazquez...@gmail.com

diff --git a/target/linux/lantiq/base-files/etc/uci-defaults/02_network
b/target/linux/lantiq/base-files/etc/uci-defaults/02_network
index 6e17d4d..a1f7b6a 100644
--- a/target/linux/lantiq/base-files/etc/uci-defaults/02_network
+++ b/target/linux/lantiq/base-files/etc/uci-defaults/02_network
@@ -114,6 +114,11 @@ TDW8970)
lan_mac=$(mtd_get_mac_binary boardconfig 61696)
wan_mac=$(macaddr_add $lan_mac 1)
;;
+
+ARV7519*)
+   lan_mac=$(mtd_get_mac_binary boardconfig 22)
+   wan_mac=$(macaddr_add $lan_mac 1)
+   ;;
 esac
 
 [ -z $(ls /lib/modules/`uname -r`/ltq_atm*) ] || set_atm_wan $vpi
$vci $encaps $payload
diff --git a/target/linux/lantiq/dts/ARV7519RW.dtsi
b/target/linux/lantiq/dts/ARV7519RW.dtsi
new file mode 100644
index 000..7790470
--- /dev/null
+++ b/target/linux/lantiq/dts/ARV7519RW.dtsi
@@ -0,0 +1,186 @@
+/include/ vr9.dtsi
+
+/ {
+
+   model = ARV7519 - Astoria Networks ARV7519RW22-A-LT;
+   
+   chosen {
+   bootargs = console=ttyLTQ0,115200 init=/etc/preinit;
+   };
+   
+   memory@0 {
+   reg = 0x0 0x800;
+   };
+   
+   fpi@1000 {
+   
+   gpio: pinmux@E100B10 {
+   pinctrl-names = default;
+   pinctrl-0 = state_default;
+   
+   state_default: pinmux {
+   mdio {
+   lantiq,groups = mdio;
+   lantiq,function = mdio;
+   };
+   gphy-leds {
+   lantiq,groups = gphy0 led1, gphy1 
led1;
+   lantiq,function = gphy;
+   lantiq,pull = 2;
+   lantiq,open-drain = 0;
+   lantiq,output = 1;
+   };
+   phy-rst {
+   lantiq,pins = io42;
+   lantiq,pull = 0;
+   lantiq,open-drain = 0;
+   lantiq,output = 1;
+   };
+   pcie-rst {
+   lantiq,pins = io21;
+   lantiq,pull = 0;
+   lantiq,output = 1;
+   };
+   };
+   };
+
+   eth@E108000 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = lantiq,xrx200-net;
+   reg =  0xE108000 0x3000 /* switch */
+   0xE10B100 0x70 /* mdio */
+   0xE10B1D8 0x30 /* mii */
+   0xE10B308 0x30 /* pmac */
+   ;
+   interrupt-parent = icu0;
+   interrupts = 73 72;
+
+   lan: interface@0 {
+   compatible = lantiq,xrx200-pdi;
+   #address-cells = 1;
+   #size-cells = 0;
+   reg = 0;
+   mac-address = [ 00 11 22 33 44 55 ];
+
+   ethernet@2 {
+   compatible = lantiq,xrx200-pdi-port;
+   reg = 2;
+   phy-mode = gmii;
+   phy-handle = phy11;
+   };
+   ethernet@3 {
+   compatible = lantiq,xrx200-pdi-port;
+   reg = 4;
+   phy-mode = gmii;
+   phy-handle = phy13;
+   };
+   };
+   
+   wan: interface@1 {
+   compatible = lantiq,xrx200-pdi;
+   #address-cells = 1;
+   #size-cells = 0;
+   reg = 1;
+   mac-address = [ 00 11 22 33 44 56 ];
+   lantiq,wan;
+   ethernet@4

[OpenWrt-Devel] [RFC] Broadcom code found.

2014-01-10 Thread José Vázquez Fernández

While Daniel González and me were fighting with jffs2 tested some code
extracted from Netgear. Here are what we found.
We only tested brcm_wait, broadcom checksum code and the modification in
tlbex.c and nothing strange happened when we flashed it.
Hope this could help for the Broadcom SoCs and maybe others.


diff -urN b/include/asm-mips/checksum.h a/include/asm-mips/checksum.h
--- b/include/asm-mips/checksum.h   2007-06-12 16:13:11.0 +0200
+++ a/include/asm-mips/checksum.h   2010-05-31 03:43:32.0 +0200
@@ -98,6 +98,64 @@
  * By Jorge Cwik jo...@laser.satlink.net, adapted for linux by
  * Arnt Gulbrandsen.
  */
+
+#if defined(CONFIG_MIPS_BRCM)
+
+/* Brcm version can handle unaligned data. Merged from brcm 2.6.8
kernel.*/
+static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
+{
+   if (((__u32)iph0x3) == 0) {
+   unsigned int *word = (unsigned int *) iph;
+   unsigned int *stop = word + ihl;
+   unsigned int csum;
+   int carry;
+
+   csum = word[0];
+   csum += word[1];
+   carry = (csum  word[1]);
+   csum += carry;
+
+   csum += word[2];
+   carry = (csum  word[2]);
+   csum += carry;
+
+   csum += word[3];
+   carry = (csum  word[3]);
+   csum += carry;
+
+   word += 4;
+   do {
+   csum += *word;
+   carry = (csum  *word);
+   csum += carry;
+   word++;
+   } while (word != stop);
+
+   return csum_fold(csum);
+   } else {
+   __u16 * buff = (__u16 *) iph;
+   __u32 sum=0;
+   __u16 i;
+
+   // make 16 bit words out of every two adjacent 8 bit words in
the packet
+   // and add them up
+   for (i=0;iihl*2;i++){
+   sum = sum + (__u32) buff[i];
+   }
+
+   // take only 16 bits out of the 32 bit sum and add up the
carries
+   while (sum16)
+ sum = (sum  0x)+(sum  16);
+
+   // one's complement the result
+   sum = ~sum;
+
+   return ((__sum16) sum);
+   }
+}
+
+#else
+
 static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
 {
const unsigned int *word = iph;
@@ -129,6 +187,8 @@
return csum_fold(csum);
 }
 
+#endif
+
 static inline __wsum csum_tcpudp_nofold(__be32 saddr,
__be32 daddr, unsigned short len, unsigned short proto,
__wsum sum)

--

diff -urN b/drivers/mtd/mtd_blkdevs.c a/drivers/mtd/mtd_blkdevs.c
--- b/drivers/mtd/mtd_blkdevs.c 2007-06-12 16:13:11.0 +0200
+++ a/drivers/mtd/mtd_blkdevs.c 2010-05-31 03:52:56.0 +0200
@@ -21,6 +21,9 @@
 #include linux/init.h
 #include linux/mutex.h
 #include asm/uaccess.h
+#if defined(CONFIG_MIPS_BRCM)
+#include linux/syscalls.h
+#endif
 
 static LIST_HEAD(blktrans_majors);
 
@@ -80,13 +83,23 @@
struct mtd_blktrans_ops *tr = arg;
struct request_queue *rq = tr-blkcore_priv-rq;
 
+#if defined(CONFIG_MIPS_BRCM)
+#if defined (CONFIG_PREEMPT_SOFTIRQS)
+   /* mtdblockd needs to run at the same priority as ksoftirqd threads so
loading of applications from flash won't get blocked by network traffic.
+   One bad thing about blocking application loading is that voice
applications can be blocked by network traffic, despite that they have
higher
+   priority than network tasks. This would be a priority inversion
scenario if happens. */
+   struct sched_param param = { .sched_priority =
CONFIG_BRCM_SOFTIRQ_BASE_RT_PRIO };
+   sched_setscheduler(current, SCHED_RR, param);
+#endif
+#endif
+
/* we might get involved when memory gets low, so use PF_MEMALLOC */
current-flags |= PF_MEMALLOC | PF_NOFREEZE;
 
daemonize(%sd, tr-name);
 
/* daemonize() doesn't do this for us since some kernel threads
-  actually want to deal with signals. We can't just call
+  actually want to deal with signals. We can't just call 
   exit_sighand() since that'll cause an oops when we finally
   do exit. */
spin_lock_irq(current-sighand-siglock);

-

diff -urN b/include/linux/mmzone.h a/include/linux/mmzone.h
--- b/include/linux/mmzone.h2007-06-12 16:13:11.0 +0200
+++ a/include/linux/mmzone.h2010-05-31 03:45:11.0 +0200
@@ -306,7 +306,17 @@
  * go. A value of 12 for DEF_PRIORITY implies that we will scan
1/4096th of the
  * queues (queue_length  12) during an aging round.
  */
+
+#if defined(CONFIG_MIPS_BRCM)
+/* We normally have only 8M~32M of RAM while desktop systems

[OpenWrt-Devel] [RFC] Rngd in busybox.

2013-12-12 Thread José Vázquez Fernández

A couple of days ago found an old patch that adds rngd in busybox:
http://lists.busybox.net/pipermail/busybox/2008-August/066784.html
Because it is 5 years old will need some rework, but could be a good
alternative to rng-tools.
Also made a patch that has the option to select between /dev/hwrng
or /dev/urandom in the mentioned package.
The question is: which is the best option?

Regards:

Pepe


rng-tools.patch.tar.bz2
Description: application/bzip-compressed-tar
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[OpenWrt-Devel] [PATCH] [Packages] Rng-tools: add selection between hwrng or urandom

2013-12-12 Thread José Vázquez Fernández

This patch allow to select between /dev/hwrng and /dev/urandom.

Also updates rng-tools to the last version.

Signed off by: José Vázquez Fernández ppvazquez...@gmail.com

diff --git a/utils/rng-tools/Config.in b/utils/rng-tools/Config.in
new file mode 100644
index 000..4f7b4d3
--- /dev/null
+++ b/utils/rng-tools/Config.in
@@ -0,0 +1,19 @@
+menu Configuration
+   depends on PACKAGE_rng-tools
+
+config RNGD_URANDOM
+   bool
+   default y
+   prompt Collect entropy from pseudorandom number generator
+   help
+ This is the default option for the most of the boards.
+
+config RNGD_HWRNG
+   bool
+   default n
+   prompt Collect entropy from hardware random number generator
+   help
+ Use this option only if your board has an enabled
+ hardware random number generator, otherwise use the 
+ pseudorandom number generator.
+endmenu
diff --git a/utils/rng-tools/Makefile b/utils/rng-tools/Makefile
index 474589c..f9f2add 100644
--- a/utils/rng-tools/Makefile
+++ b/utils/rng-tools/Makefile
@@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=rng-tools
-PKG_VERSION:=3
+PKG_VERSION:=4
 PKG_RELEASE:=2
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=http://downloads.sourceforge.net/project/gkernel/rng-tools/3/
-PKG_MD5SUM:=fa305916ec101c85c0065aeceb81a38d
+PKG_SOURCE_URL:=http://downloads.sourceforge.net/project/gkernel/rng-tools/4/
+PKG_MD5SUM:=ae89dbfcf08bdfbea19066cfbf599127
 
 PKG_FIXUP:=autoreconf
 
@@ -23,8 +23,13 @@ define Package/rng-tools
   SECTION:=utils
   CATEGORY:=Utilities
   DEPENDS:=+USE_UCLIBC:argp-standalone
-  TITLE:=Daemon for adding entropy to kernel entropy pool
+  TITLE:=Daemon for adding entropy to kernel entropy pool.
   URL:=http://sourceforge.net/projects/gkernel/
+  MENU:=1
+endef
+
+define Package/rng-tools/config
+   source $(SOURCE)/Config.in
 endef
 
 ifdef CONFIG_USE_UCLIBC
@@ -32,6 +37,7 @@ CONFIGURE_VARS += \
 LIBS=-largp
 endif
 
+ifdef CONFIG_RNGD_URANDOM
 define Package/rng-tools/install
$(INSTALL_DIR) $(1)/etc/init.d
$(INSTALL_BIN) ./files/rngd.init $(1)/etc/init.d/rngd
@@ -40,5 +46,17 @@ define Package/rng-tools/install
$(INSTALL_DIR) $(1)/sbin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/rngd $(1)/sbin/
 endef
+endif
+
+ifdef CONFIG_RNGD_HWRNG
+define Package/rng-tools/install
+   $(INSTALL_DIR) $(1)/etc/init.d
+   $(INSTALL_BIN) ./files/hwrngd.init $(1)/etc/init.d/rngd
+   $(INSTALL_DIR) $(1)/usr/bin
+   $(INSTALL_BIN) $(PKG_BUILD_DIR)/rngtest $(1)/usr/bin/
+   $(INSTALL_DIR) $(1)/sbin
+   $(INSTALL_BIN) $(PKG_BUILD_DIR)/rngd $(1)/sbin/
+endef
+endif
 
 $(eval $(call BuildPackage,rng-tools))
diff --git a/utils/rng-tools/files/hwrngd.init
b/utils/rng-tools/files/hwrngd.init
new file mode 100644
index 000..40ed6fd
--- /dev/null
+++ b/utils/rng-tools/files/hwrngd.init
@@ -0,0 +1,16 @@
+#!/bin/sh /etc/rc.common
+# Copyright (C) 2011 OpenWrt.org
+
+START=98
+
+RNGD_INTERVAL=30
+RNGD_AMOUNT=4000
+RNGD_DEVICE=/dev/hwrng
+
+start() {
+   service_start /sbin/rngd -r $RNGD_DEVICE -W $RNGD_AMOUNT -t
$RNGD_INTERVAL
+}
+
+stop() {
+   service_stop /sbin/rngd
+} 
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Re: [OpenWrt-Devel] Creating Atheros calibration data without ART(Atheros Radio Tool) ?

2013-11-18 Thread José Vázquez Fernández

A possible solution or workaround could be make a backup of the cal data of 
each unit and restore it 
in case of disaster.

- Original Message - 
From: valent.turko...@gmail.com
To: OpenWrt Development List openwrt-devel@lists.openwrt.org
Sent: Monday, November 18, 2013 9:13 PM
Subject: [OpenWrt-Devel] Creating Atheros calibration data without ART(Atheros 
Radio Tool) ?

Hi,
out wifi community has quite a few Nanostation routers that had their
flash erased by EMP pulse from thunderstorm :(

If we could recreate ART calibration data then we could repair them.
Does anybody here have any experience with creating calibration data
for Atheros devices? Is it possible to do without ART software?

There is some mention on forums [1] of using cheap SDR and ART
software to create calibration data, but AFAIK there is no way to get
hold of ART software.

If there is any other way please write here or feel free to contact me
direcly, and help is much appreciated.

Cheers!

[1] https://forum.openwrt.org/viewtopic.php?pid=186920#p186920
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Re: [OpenWrt-Devel] Quick hack for kernel entropy problem on MIPS

2013-10-18 Thread José Vázquez Fernández

Take a look at this ticket: https://dev.openwrt.org/ticket/9631
  - Original Message - 
  From: Weedy 
  To: OpenWrt Development List 
  Sent: Friday, October 18, 2013 1:02 AM
  Subject: Re: [OpenWrt-Devel] Quick hack for kernel entropy problem on MIPS

  On 17 Oct 2013 13:07, chrono chr...@open-resource.org wrote:

   root@OpenWrt:/# cat /proc/sys/kernel/random/entropy_avail
   0

   Uhh ok?
   root@OpenWrt:~# cat /proc/sys/kernel/random/entropy_avail
   1189

   What's your uptime? Entropy is added to the pool e.g. based on network
   activity. The issue is that the pool is empty right after boot up.

   Well it's not anymore (with the patch).
   That may be due to the fact that network is the only source of entropy
   left on MIPS, that is something I personally wouldn't accept as enough
   anymore.

   As I reckon there has been a lengthy discussion about it already and
   many people raised their concerns.

ecurity/meldung/Linux-auf-MIPS-jetzt-wieder-mit-mehr-Zufall-1963604.html

   (sorry for german link)

   That patch wouldn't work with 3.3.8 due to include dependencies I
   wasn't willing to follow up.

   The attached patch will re-enable CPU interrupts as entropy source,
   at least for AR71xx/mips32r3 and will do so right away, which might
   also solve issues with hostapd/nginx that require some during init.

  A, I can see how that might cause issues. I have made some sysctl tweaks 
and my network always has something going on.
  So I never noticed.
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[OpenWrt-Devel] [PATCH] [1/5] AA: ARV4518PWR01. Update machtypes.h

2013-09-25 Thread José Vázquez Fernández


Update machtypes.h to support ARV4518PWR01
diff -urN a/arch/mips/lantiq/machtypes.h b/arch/mips/lantiq/machtypes.h
--- a/arch/mips/lantiq/machtypes.h	2013-09-25 13:14:59.0 +0200
+++ b/arch/mips/lantiq/machtypes.h	2013-09-25 13:34:39.665808763 +0200
@@ -34,6 +34,7 @@
 	/* Arcadyan */
 	LANTIQ_MACH_ARV3527P,		/* Arcor easybox a401 */
 	LANTIQ_MACH_ARV4510PW,		/* Wippies Homebox */
+	LANTIQ_MACH_ARV4518PWR01,	/* SMC-7908A-ISP */
 	LANTIQ_MACH_ARV4518PW,		/* Airties WAV-221, SMC-7908A-ISP */
 	LANTIQ_MACH_ARV4519PW,		/* Vodafone, Pirelli */
 	LANTIQ_MACH_ARV4520PW,		/* Airties WAV-281, Arcor EasyboxA800 */
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[OpenWrt-Devel] [PATCH] [1/5] AA: ARV4518PWR01. Update machtypes.h

2013-09-25 Thread José Vázquez Fernández


Update machtypes.h to support ARV4518PWR01

Signed off by: José Vázquez Fernández ppvazquez...@gmail.com
Tested by: Carles Gadea Roig carles...@gmail.com


diff -urN a/arch/mips/lantiq/machtypes.h b/arch/mips/lantiq/machtypes.h
--- a/arch/mips/lantiq/machtypes.h	2013-09-25 13:14:59.0 +0200
+++ b/arch/mips/lantiq/machtypes.h	2013-09-25 13:34:39.665808763 +0200
@@ -34,6 +34,7 @@
 	/* Arcadyan */
 	LANTIQ_MACH_ARV3527P,		/* Arcor easybox a401 */
 	LANTIQ_MACH_ARV4510PW,		/* Wippies Homebox */
+	LANTIQ_MACH_ARV4518PWR01,	/* SMC-7908A-ISP */
 	LANTIQ_MACH_ARV4518PW,		/* Airties WAV-221, SMC-7908A-ISP */
 	LANTIQ_MACH_ARV4519PW,		/* Vodafone, Pirelli */
 	LANTIQ_MACH_ARV4520PW,		/* Airties WAV-281, Arcor EasyboxA800 */

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[OpenWrt-Devel] [PATCH] [1/5] AA: ARV4518PWR01. Board definition.

2013-09-25 Thread José Vázquez Fernández


Board definition for the ARV4518PWR01.
In the board definition, leds and buttons of the ARV4518PW were used.

Signed off by: José Vázquez Fernández ppvazquez...@gmail.com
Tested by: Carles Gadea Roig carles...@gmail.com
diff -urN a/arch/mips/lantiq/xway/mach-arv.c b/arch/mips/lantiq/xway/mach-arv.c
--- a/arch/mips/lantiq/xway/mach-arv.c	2013-09-17 21:07:00.0 +0200
+++ b/arch/mips/lantiq/xway/mach-arv.c	2013-09-25 13:32:14.013421918 +0200
@@ -516,6 +516,38 @@
 			arv4510pw_init);
 
 static void __init
+arv4518pwr01_init(void)
+{
+#define ARV4518PWR01_EBU		0
+#define ARV4518PWR01_USB		14
+#define ARV4518PWR01_SWITCH_RESET	13
+#define ARV4518PWR01_ATH_ADDR		0x3f0400
+#define ARV4518PWR01_MAC_ADDR		0x3f0016
+
+	ltq_register_gpio_ebu(ARV4518PWR01_EBU);
+	ltq_add_device_gpio_leds(-1, ARRAY_SIZE(arv4518pw_gpio_leds), arv4518pw_gpio_leds);
+	ltq_register_gpio_keys_polled(-1, LTQ_KEYS_POLL_INTERVAL,
+ARRAY_SIZE(arv4518pw_gpio_keys), arv4518pw_gpio_keys);
+	arv_load_nor(0x40);
+	ltq_pci_data.clock = PCI_CLOCK_INT;
+	ltq_register_pci(ltq_pci_data);
+	xway_register_dwc(ARV4518PWR01_USB);
+	arv_register_ethernet(ARV4518PWR01_MAC_ADDR);
+	arv_register_ath5k(ARV4518PWR01_ATH_ADDR, ARV4518PWR01_MAC_ADDR);
+	ltq_register_ath5k(arv_ath5k_eeprom_data, arv_athxk_eeprom_mac);
+	ltq_register_tapi();
+
+	gpio_request(ARV4518PWR01_SWITCH_RESET, switch);
+	gpio_direction_output(ARV4518PW_SWITCH_RESET, 1);
+	gpio_export(ARV4518PWR01_SWITCH_RESET, 0);
+}
+
+MIPS_MACHINE(LANTIQ_MACH_ARV4518PWR01,
+			ARV4518PWR01,
+			Arcadyan ARV4518PWR01,
+			arv4518pwr01_init);
+
+static void __init
 arv4518pw_init(void)
 {
 #define ARV4518PW_EBU			0
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[OpenWrt-Devel] [PATCH] [3/5] AA: ARV4518PWR01. Change leds behavior.

2013-09-25 Thread José Vázquez Fernández


This change the led behavior at init.
With this patch only the power led remains powered on when the board is 
flashed with openwrt.


Signed off by: José Vázquez Fernández ppvazquez...@gmail.com
Tested by: Carles Gadea Roig carles...@gmail.com
diff -urN a/arch/mips/lantiq/xway/mach-arv.c b/arch/mips/lantiq/xway/mach-arv.c
--- a/arch/mips/lantiq/xway/mach-arv.c	2013-09-17 21:07:00.0 +0200
+++ b/arch/mips/lantiq/xway/mach-arv.c	2013-09-25 13:43:06.083366539 +0200
@@ -153,16 +153,16 @@
 static struct gpio_led
 arv4518pw_gpio_leds[] __initdata = {
 	{ .name = soc:green:power, .gpio = 3, .active_low = 1, .default_trigger = default-on },
-	{ .name = soc:green:adsl, .gpio = 4, .active_low = 1, .default_trigger = default-on },
-	{ .name = soc:green:internet, .gpio = 5, .active_low = 1, .default_trigger = default-on },
-	{ .name = soc:green:wifi, .gpio = 6, .active_low = 1, .default_trigger = default-on },
-	{ .name = soc:yellow:wps, .gpio = 7, .active_low = 1, .default_trigger = default-on },
-	{ .name = soc:red:fail, .gpio = 8, .active_low = 1, .default_trigger = default-on },
-	{ .name = soc:green:usb, .gpio = 19, .active_low = 1, .default_trigger = default-on },
-	{ .name = soc:green:voip, .gpio = 100, .active_low = 1, .default_trigger = default-on },
-	{ .name = soc:green:fxs1, .gpio = 101, .active_low = 1, .default_trigger = default-on },
-	{ .name = soc:green:fxs2, .gpio = 102, .active_low = 1, .default_trigger = default-on },
-	{ .name = soc:green:fxo, .gpio = 103, .active_low = 1, .default_trigger = default-on },
+	{ .name = soc:green:adsl, .gpio = 4, .active_low = 1, },
+	{ .name = soc:green:internet, .gpio = 5, .active_low = 1, },
+	{ .name = soc:green:wifi, .gpio = 6, .active_low = 1, },
+	{ .name = soc:yellow:wps, .gpio = 7, .active_low = 1, },
+	{ .name = soc:red:fail, .gpio = 8, .active_low = 1, },
+	{ .name = soc:green:usb, .gpio = 19, .active_low = 1, },
+	{ .name = soc:green:voip, .gpio = 100, .active_low = 1, },
+	{ .name = soc:green:fxs1, .gpio = 101, .active_low = 1, },
+	{ .name = soc:green:fxs2, .gpio = 102, .active_low = 1, },
+	{ .name = soc:green:fxo, .gpio = 103, .active_low = 1, },
 };
 
 static struct gpio_keys_button
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[OpenWrt-Devel] [PATCH] [2/5] AA: ARV4518PWR01. Board definition.

2013-09-25 Thread José Vázquez Fernández


Board definition for the ARV4518PWR01.
In the board definition, leds and buttons of the ARV4518PW were used.

Signed off by: José Vázquez Fernández ppvazquez...@gmail.com
Tested by: Carles Gadea Roig carles...@gmail.com

diff -urN a/arch/mips/lantiq/xway/mach-arv.c b/arch/mips/lantiq/xway/mach-arv.c
--- a/arch/mips/lantiq/xway/mach-arv.c	2013-09-17 21:07:00.0 +0200
+++ b/arch/mips/lantiq/xway/mach-arv.c	2013-09-25 13:32:14.013421918 +0200
@@ -516,6 +516,38 @@
 			arv4510pw_init);
 
 static void __init
+arv4518pwr01_init(void)
+{
+#define ARV4518PWR01_EBU		0
+#define ARV4518PWR01_USB		14
+#define ARV4518PWR01_SWITCH_RESET	13
+#define ARV4518PWR01_ATH_ADDR		0x3f0400
+#define ARV4518PWR01_MAC_ADDR		0x3f0016
+
+	ltq_register_gpio_ebu(ARV4518PWR01_EBU);
+	ltq_add_device_gpio_leds(-1, ARRAY_SIZE(arv4518pw_gpio_leds), arv4518pw_gpio_leds);
+	ltq_register_gpio_keys_polled(-1, LTQ_KEYS_POLL_INTERVAL,
+ARRAY_SIZE(arv4518pw_gpio_keys), arv4518pw_gpio_keys);
+	arv_load_nor(0x40);
+	ltq_pci_data.clock = PCI_CLOCK_INT;
+	ltq_register_pci(ltq_pci_data);
+	xway_register_dwc(ARV4518PWR01_USB);
+	arv_register_ethernet(ARV4518PWR01_MAC_ADDR);
+	arv_register_ath5k(ARV4518PWR01_ATH_ADDR, ARV4518PWR01_MAC_ADDR);
+	ltq_register_ath5k(arv_ath5k_eeprom_data, arv_athxk_eeprom_mac);
+	ltq_register_tapi();
+
+	gpio_request(ARV4518PWR01_SWITCH_RESET, switch);
+	gpio_direction_output(ARV4518PW_SWITCH_RESET, 1);
+	gpio_export(ARV4518PWR01_SWITCH_RESET, 0);
+}
+
+MIPS_MACHINE(LANTIQ_MACH_ARV4518PWR01,
+			ARV4518PWR01,
+			Arcadyan ARV4518PWR01,
+			arv4518pwr01_init);
+
+static void __init
 arv4518pw_init(void)
 {
 #define ARV4518PW_EBU			0
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[OpenWrt-Devel] [PATCH] [4/5] AA: ARV4518PWR01. Image and config generation.

2013-09-25 Thread José Vázquez Fernández


Generates the ARV4518PWR01 image and defines the board in target.mk

Signed off by: José Vázquez Fernández ppvazquez...@gmail.com
Tested by: Carles Gadea Roig carles...@gmail.com
diff -urN a/target/linux/lantiq/danube/profiles/002-arcadyan.mk b/target/linux/lantiq/danube/profiles/002-arcadyan.mk
--- a/target/linux/lantiq/danube/profiles/002-arcadyan.mk	2013-09-17 20:14:40.0 +0200
+++ b/target/linux/lantiq/danube/profiles/002-arcadyan.mk	2013-09-25 13:57:11.786318465 +0200
@@ -35,6 +35,19 @@
 
 $(eval $(call Profile,ARV4518PW))
 
+define Profile/ARV4518PWR01
+  NAME:=ARV4518PWR01 - SMC7908A-ISP
+  PACKAGES:= kmod-usb-core kmod-usb-dwc-otg kmod-ledtrig-usbdev \
+	kmod-ath5k wpad-mini \
+	kmod-ltq-dsl-firmware-a-danube
+endef
+
+define Profile/ARV4518PWR01/Description
+	Package set optimized for the ARV4518PWR01
+endef
+
+$(eval $(call Profile,ARV4518PWR01))
+
 define Profile/ARV4519PW
   NAME:=ARV4519PW - Vodafone, Pirelli
   PACKAGES:= kmod-usb-core kmod-usb-dwc-otg kmod-ledtrig-usbdev \
diff -urN a/target/linux/lantiq/image/Makefile b/target/linux/lantiq/image/Makefile
--- a/target/linux/lantiq/image/Makefile	2013-09-17 20:14:43.0 +0200
+++ b/target/linux/lantiq/image/Makefile	2013-09-25 14:31:13.396636757 +0200
@@ -109,6 +109,7 @@
 Image/BuildKernel/Profile/ARV3527P=$(call Image/BuildKernel/Template,ARV3527P,$(xway_cmdline))
 Image/BuildKernel/Profile/ARV4510PW=$(call Image/BuildKernel/Template,ARV4510PW,$(xway_cmdline))
 Image/BuildKernel/Profile/ARV4518PW=$(call Image/BuildKernel/Template,ARV4518PW,$(xway_cmdline))
+Image/BuildKernel/Profile/ARV4518PWR01=$(call Image/BuildKernel/Template,ARV4518PWR01,$(xway_cmdline))
 Image/BuildKernel/Profile/ARV4519PW=$(call Image/BuildKernel/Template,ARV4519PW,$(xway_cmdline))
 Image/BuildKernel/Profile/ARV4520PW=$(call Image/BuildKernel/Template,ARV4520PW,$(xway_cmdline))
 Image/BuildKernel/Profile/ARV4525PW=$(call Image/BuildKernel/Template,ARV4525PW,$(xway_cmdline))
@@ -125,6 +126,7 @@
 Image/Build/Profile/ARV3527P=$(call Image/Build/$(1),$(1),ARV3527P)
 Image/Build/Profile/ARV4510PW=$(call Image/Build/$(1),$(1),ARV4510PW)
 Image/Build/Profile/ARV4518PW=$(call Image/Build/$(1),$(1),ARV4518PW)
+Image/Build/Profile/ARV4518PWR01=$(call Image/Build/$(1),$(1),ARV4518PWR01)
 Image/Build/Profile/ARV4519PW=$(call Image/Build/$(1),$(1),ARV4519PW,BRNDA4519,0x12345678,memsize=32)
 Image/Build/Profile/ARV4520PW=$(call Image/Build/$(1),$(1),ARV4520PW,BRNDANUBE,0x12345678,memsize=32)
 Image/Build/Profile/ARV4525PW=$(call Image/Build/$(1),$(1),ARV4525PW,BRNDTW502,0x12345678,memsize=32)
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[OpenWrt-Devel] [PATCH] [5/5] AA: ARV4518PWR01. Led definitions for onboard devices.

2013-09-25 Thread José Vázquez Fernández


Led definitions for onboard devices.
Defines some leds when the related devices are activated/deactivated.

Signed off by: José Vázquez Fernández ppvazquez...@gmail.com
Tested by: Carles Gadea Roig carles...@gmail.com
diff -urN a/target/linux/lantiq/base-files/etc/uci-defaults/leds b/target/linux/lantiq/base-files/etc/uci-defaults/leds
--- a/target/linux/lantiq/base-files/etc/uci-defaults/leds	2013-09-17 20:14:43.0 +0200
+++ b/target/linux/lantiq/base-files/etc/uci-defaults/leds	2013-09-25 13:54:06.665649834 +0200
@@ -10,6 +10,18 @@
 board=$(lantiq_board_name)
 
 case $board in
+ARV4518PW)
+	ucidef_set_led_wlan wifi wifi soc:green:wifi phy0radio
+	ucidef_set_led_netdev internet internet soc:green:internet pppoe-wan
+	ucidef_set_led_usbdev usb USB soc:green:usb 1-1
+	;;
+
+ARV4518PWR01)
+	ucidef_set_led_wlan wifi wifi soc:green:wifi phy0radio
+	ucidef_set_led_netdev internet internet soc:green:internet pppoe-wan
+	ucidef_set_led_usbdev usb USB soc:green:usb 1-1
+	;;
+
 ARV4520PW|ARV452CPW)
 	ucidef_set_led_netdev wifi wifi soc:blue:wifi wlan0
 	ucidef_set_led_usbdev usb USB soc:blue:usb 1-1
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[OpenWrt-Devel] [RFC] usbreset package

2013-07-20 Thread José Vázquez Fernández

Some days ago found that usbreset don't work due to the lack of usbfs.
I think that the choices are:
- Delete it.
- Enable usbfs.
- Look for an usbreset utility that doesn't depend on usbfs. Found this: 
http://www.roman10.net/how-to-reset-usb-device-in-linuxusing-libusb/

Regards:

José Vázquez 
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Re: [OpenWrt-Devel] [Porting help] Support for NETGEAR DGN2200V3

2013-07-14 Thread José Vázquez Fernández

More info is needed:
- Wich SoC it has (bcm6358, 6328, ...)
- Board ID (can be obtained with the serial bootlog).
- The other components: switch, ram, ...
The most important is the board ID. In example, in the DGN2200 v2 is 963281TAN.

Regards:

Pepe

- Original Message - 
From: mrkiko rs mrkiko...@gmail.com
To: openwrt-devel@lists.openwrt.org
Sent: Sunday, July 14, 2013 5:43 PM
Subject: Re: [OpenWrt-Devel] [Porting help] Support for NETGEAR DGN2200V3


Forgot to mention thath flash is 32 MB  ! Florian, do you think it's possibile ?

Inviato da iPhone

Il giorno 14/lug/2013, alle ore 16:02, Enrico Mioso
mrkiko...@gmail.com ha scritto:

 Hi guys!
 I would like to see this device supported: NETGEAR DGN2200V3.
 So I started investigating it a little.
 It seems very similar to the already supported Netgear CVG834G.
 I'm trying to analyse the original NetGear firmware. Most parts related to 
 DSL are proprietary, so 
 I don't expect to handle the chip.
 The classic mega firmware archive, called DGN2200v3_V1.1.00.10_src.zip is 
 downloadable directly 
 from the NETGEAR site at:
 http://www.downloads.netgear.com/files/GPL/DGN2200v3_V1.1.00.10_src.zip
 But the interesting stuff is a relatively small set of .h files.

   INFOS i COLLECTED

 The device is bcm963xx-based: the enet driver and the wl wlan drivers from 
 broadcom are being 
 used inside it.
 The DSL firmware is distributed in binary form only - so for now, no way.
 It seems there are two parts of the DSL driver:
 - one dedicated to hardware management
 - another dedicated to data processing, which is of course GPLed
 - a firmware blob

   INTERESTING STUFF

 Once you decompress the ZIP file you can find the build system and the gcc 
 toolchain, which we 
 will conveniently ignore, for now at least.

 From inside the ZIP file, you can extract the 
 DGN2200v3_V1.1.00.10_src.tar.bz2 file only, leaving 
 alone uclibc-crosstools-gcc-4.4.2-1-full.tar.bz2   OK.
 then I would go directly to the
 DGN2200v3_V1.1.00.10_src/Kernel/bcm963xx/bcmdrivers/opensource/include/bcm963xx

 folder, where you can find all GPIOs definitions and other device 
 specifications. None of them 
 seemed custom to me.

 Any suggestion? Can someone help? Or point me out the right direction?
 Thank you!!

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[OpenWrt-Devel] Entropy problem?

2013-06-25 Thread José Vázquez Fernández

Checked the entropy in an ARV4518pw (Lantiq Danube) running Attitude Adjustment 
and the available 
entropy was, more or less, between 300-400.
Found this link (http://vafer.org/blog/20071219173915/), so plugged a pendrive 
and thanks to the 
dwg-otg generated interrupts the entropy_avail increased a lot.

Pendrive plugged:
root@OpenWrt:~# echo  Entropy: $(cat 
/proc/sys/kernel/random/entropy_avail)/$(cat 
/proc/sys/kernel/random/poolsize)
Entropy: 3971/4096
root@OpenWrt:~# echo  Entropy: $(cat 
/proc/sys/kernel/random/entropy_avail)/$(cat 
/proc/sys/kernel/random/poolsize)
Entropy: 3970/4096
root@OpenWrt:~# echo  Entropy: $(cat 
/proc/sys/kernel/random/entropy_avail)/$(cat 
/proc/sys/kernel/random/poolsize)
Entropy: 3970/4096

Unplugging the pendrive:
root@OpenWrt:~# echo  Entropy: $(cat 
/proc/sys/kernel/random/entropy_avail)/$(cat 
/proc/sys/kernel/random/poolsize)
Entropy: 189/4096
root@OpenWrt:~# echo  Entropy: $(cat 
/proc/sys/kernel/random/entropy_avail)/$(cat 
/proc/sys/kernel/random/poolsize)
Entropy: 130/4096
root@OpenWrt:~# echo  Entropy: $(cat 
/proc/sys/kernel/random/entropy_avail)/$(cat 
/proc/sys/kernel/random/poolsize)
Entropy: 133/4096
root@OpenWrt:~# echo  Entropy: $(cat 
/proc/sys/kernel/random/entropy_avail)/$(cat 
/proc/sys/kernel/random/poolsize)
Entropy: 137/4096
root@OpenWrt:~# echo  Entropy: $(cat 
/proc/sys/kernel/random/entropy_avail)/$(cat 
/proc/sys/kernel/random/poolsize)
Entropy: 143/4096
root@OpenWrt:~# echo  Entropy: $(cat 
/proc/sys/kernel/random/entropy_avail)/$(cat 
/proc/sys/kernel/random/poolsize)
Entropy: 147/4096
root@OpenWrt:~# echo  Entropy: $(cat 
/proc/sys/kernel/random/entropy_avail)/$(cat 
/proc/sys/kernel/random/poolsize)
Entropy: 150/4096
root@OpenWrt:~# echo  Entropy: $(cat 
/proc/sys/kernel/random/entropy_avail)/$(cat 
/proc/sys/kernel/random/poolsize)
Entropy: 155/4096

Interrupt sources:
root@OpenWrt:~# cat /proc/interrupts
   CPU0
2:  0  MIPS  cascade
3:  0  MIPS  cascade
4:  0  MIPS  cascade
5:  0  MIPS  cascade
6:  0  MIPS  cascade
7:   19860002   MIPS  timer
30:9485340   icu  ath
62: 1265320007icu  dwc_otg, dwc_otg_hcd:usb1
73: 614766icu  eth_tx
78: 989711icu  eth_rx
112:133 icu  asc_tx
113:  0   icu  asc_rx
114:  0   icu  asc_err
126:  0   icu  gptu
127:  0   icu  gptu
128:  0   icu  gptu
129:  0   icu  gptu
130:  0   icu  gptu
131:  0   icu  gptu
ERR: 0

For some purposes maybe this is a serious problem.

Hope this information could be helpful. 

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[OpenWrt-Devel] [PATCH] [lantiq] set mips16 support.

2013-06-11 Thread José Vázquez Fernández

Set mips16 support in XWAY subtarget.

This patch is based in changeset #36600

Signed-off-by: José Vázquez Fernández ppvazquez...@gmail.com
Signed-off-by: Felix Fietkau n...@openwrt.org

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[OpenWrt-Devel] [PATCH] [lantiq] set mips16 support.

2013-06-11 Thread José Vázquez Fernández

- Mensaje reenviado 
De: José Vázquez Fernández ppvazquez...@gmail.com
Para: openwrt-devel@lists.openwrt.org openwrt-devel@lists.openwrt.org
Cc: openwrt-devel@lists.openwrt.org openwrt-devel@lists.openwrt.org
Asunto: [OpenWrt-Devel] [PATCH] [lantiq] set mips16 support.
Fecha: Tue, 11 Jun 2013 13:42:24 +0200

Set mips16 support in XWAY subtarget.

This patch is based in changeset #36600

Signed-off-by: José Vázquez Fernández ppvazquez...@gmail.com
Signed-off-by: Felix Fietkau n...@openwrt.org

Index: target/linux/lantiq/xway/target.mk
===
--- target/linux/lantiq/xway/target.mk  (revisión: 36913)
+++ target/linux/lantiq/xway/target.mk  (copia de trabajo)
@@ -1,7 +1,7 @@
 ARCH:=mips
 SUBTARGET:=xway
 BOARDNAME:=XWAY
-FEATURES:=squashfs atm
+FEATURES:=squashfs atm mips16
 
 DEFAULT_PACKAGES+=kmod-leds-gpio kmod-gpio-button-hotplug
 


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[OpenWrt-Devel] [PATCH] [lantiq] Tune the XWAY subtarget cflags.

2013-06-11 Thread José Vázquez Fernández

Tune the XWAY subtarget cflags.

This patch sets the cflags -mtune=34kc -mdsp only in XWAY subtarget, while the 
others remain with mtune=mips32r2.
Although the Danube has a Mips 24KEc core performs well with the above cflags.

Signed-off-by: José Vázquez Fernández ppvazquez...@gmail.com


Index: target/linux/lantiq/svip_be/target.mk
===
--- target/linux/lantiq/svip_be/target.mk   (revisión: 36913)
+++ target/linux/lantiq/svip_be/target.mk   (copia de trabajo)
@@ -3,6 +3,7 @@
 BOARDNAME:=SVIP Big Endian
 FEATURES:=squashfs
 DEVICE_TYPE:=other
+CFLAGS+= -mtune=mips32r2
 
 DEFAULT_PACKAGES+= uboot-svip hostapd-mini
 
Index: target/linux/lantiq/xway/target.mk
===
--- target/linux/lantiq/xway/target.mk  (revisión: 36913)
+++ target/linux/lantiq/xway/target.mk  (copia de trabajo)
@@ -2,6 +2,7 @@
 SUBTARGET:=xway
 BOARDNAME:=XWAY
 FEATURES:=squashfs atm
+CFLAGS+= -mtune=34kc -mdsp
 
 DEFAULT_PACKAGES+=kmod-leds-gpio kmod-gpio-button-hotplug
 
Index: target/linux/lantiq/svip_le/target.mk
===
--- target/linux/lantiq/svip_le/target.mk   (revisión: 36913)
+++ target/linux/lantiq/svip_le/target.mk   (copia de trabajo)
@@ -3,6 +3,7 @@
 BOARDNAME:=SVIP Little Endian
 FEATURES:=squashfs
 DEVICE_TYPE:=other
+CFLAGS+= -mtune=mips32r2
 
 DEFAULT_PACKAGES+= uboot-svip hostapd-mini
 
Index: target/linux/lantiq/falcon/target.mk
===
--- target/linux/lantiq/falcon/target.mk(revisión: 36913)
+++ target/linux/lantiq/falcon/target.mk(copia de trabajo)
@@ -3,6 +3,7 @@
 BOARDNAME:=Falcon
 FEATURES:=squashfs
 DEVICE_TYPE:=other
+CFLAGS+= -mtune=mips32r2
 
 DEFAULT_PACKAGES+= kmod-ifxos gpon-base-files kmod-leds-gpio 
kmod-ledtrig-heartbeat \
kmod-gpon-optic-drv gpon-optic-drv kmod-gpon-onu-drv gpon-onu-drv \
Index: target/linux/lantiq/ase/target.mk
===
--- target/linux/lantiq/ase/target.mk   (revisión: 36913)
+++ target/linux/lantiq/ase/target.mk   (copia de trabajo)
@@ -2,6 +2,7 @@
 SUBTARGET:=ase
 BOARDNAME:=Amazon-SE
 FEATURES:=squashfs atm
+CFLAGS+= -mtune=mips32r2
 
 DEFAULT_PACKAGES+=kmod-pppoa ppp-mod-pppoa linux-atm atm-tools br2684ctl 
kmod-ltq-dsl-ase ltq-dsl-app
 
Index: target/linux/lantiq/Makefile
===
--- target/linux/lantiq/Makefile(revisión: 36913)
+++ target/linux/lantiq/Makefile(copia de trabajo)
@@ -13,7 +13,7 @@
 
 LINUX_VERSION:=3.8.13
 
-CFLAGS=-Os -pipe -mips32r2 -mtune=mips32r2 -fno-caller-saves -mno-branch-likely
+CFLAGS=-Os -pipe -mips32r2 -fno-caller-saves -mno-branch-likely
 
 define Target/Description
Build firmware images for Lantiq SoC


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[OpenWrt-Devel] [RFC] Lantiq subtargets based in SoC.

2013-05-03 Thread José Vázquez Fernández

As have been done preciously in the ramips target the Lantiq target
could be divided in subtargets based in the SoC (ase, danube, svip, ar9,
vr9, ...) or the mips core (4k, 24k, 34k, ...), but the second option
might be very confusing.
The benefits will be the same as in ramips: better organization based in
SoC instead of board, and the specific optimizations for each mips core
might be easily managed, like dsp extensions, multithreading and some
others.
The idea is split the subtargets in this way:
- XWAY Danube.
- XWAY AR9.
- XWAY VR9.
- ASE or XWAY ASE.
- Falcon.
- SVIP-le.
- SVIP-be.

For more information:
- http://www.mips.com/media/files/white-papers/24ke.pdf
- http://www.mips.com/media/files/MIPS32_34K_US.PDF
- http://electronicsandbooks.com/eab1/manual/Electronic%20Component%
20Databook%20Datasheet/Brand/MIPS/MD00445-2B-24KEC-DTS-01.02%
20c20051220%20%5B61%5D.pdf
- http://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html

Regards:

José Vázquez

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[OpenWrt-Devel] [RFC] Driver for RTL8192SU wifi family chips.

2013-04-18 Thread José Vázquez Fernández

A month ago found a cfg80211 driver for the RTL8192SU family. There are
some information about the r92su driver in linuxwireless
(http://linuxwireless.org/en/users/Drivers/rtl819x) and the more in the
developer's repository: https://github.com/chunkeey/rtl8192su
The developer added support for big endian cpus and i've tested hardly
in an ar5381u with success, so, at least in bcm63xx target, the
stability seems to be very good for a WIP driver.
In this moment the supported modes are managed, monitor (without frame
injection) and IBSS (with some issues); the TCP checksum offload
firmware feature is not safe, but can be enabled if someone want to test
it.
In the forum there are information about some tests i've done:
https://forum.openwrt.org/viewtopic.php?pid=197935
Of course the new features and improvements that are being added to
openwrt, and the switch to dts in some platforms implies that nobody can
maintain a some kind of experimental driver in openwrt, so, i could be
added as the r92su driver maintainer.
Forgot to mention that, if this driver is added in trunk, must be marked
as broken.

Regards:

José Vázquez Fernández

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[OpenWrt-Devel] [PATCH v3][lantiq] AA/12.09-rc2. Fix ARV4518PW wifi issue.

2013-04-13 Thread José Vázquez Fernández


This patch corrects an issue with the wifi for the ARV4518PW in
Attitude Adjustment that involves the PCI bus configuration in this
board.
Comenting this line forces the board definition to be configured with the
default PCI_GNT1 | PCI_REQ1 defined in line 138.
The wifi and the usb have been deeply tested and they worked without
problems. Maybe would be a good idea to make stress tests.
Once applied this ticket should be closed:
https://dev.openwrt.org/ticket/11704

Signed-off-by: José Vázquez Fernández ppvazquez...@gmail.com
Signed-off-by: Daniel González dgcb...@gmail.com

Index: target/linux/lantiq/files/arch/mips/lantiq/xway/mach-arv.c
===
--- target/linux/lantiq/files/arch/mips/lantiq/xway/mach-arv.c (revisión: 
36330)
+++ target/linux/lantiq/files/arch/mips/lantiq/xway/mach-arv.c (copia de 
trabajo)

@@ -529,7 +529,7 @@
 ltq_register_gpio_keys_polled(-1, LTQ_KEYS_POLL_INTERVAL,
ARRAY_SIZE(arv4518pw_gpio_keys), arv4518pw_gpio_keys);
 arv_load_nor(0x40);
- ltq_pci_data.gpio = PCI_GNT2 | PCI_REQ2;
+ // ltq_pci_data.gpio = PCI_GNT2 | PCI_REQ2;
 ltq_register_pci(ltq_pci_data);
 xway_register_dwc(ARV4518PW_USB);
 arv_register_ethernet(ARV4518PW_MAC_ADDR);

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[OpenWrt-Devel] [PATCH] [lantiq] Fix ARV4518PW wifi issue. AA/12.09-rc2.

2013-04-13 Thread José Vázquez Fernández

This patch corrects an issue with the wifi for the ARV4518PW in Attitude 
Adjustment that involves the PCI bus configuration in this board. The 
bootlog shows: ath5k: phy0: failed to warm reset the MAC Chip.
Comenting this line forces the board definition to be configured with the 
default PCI_GNT1 | PCI_REQ1 defined in line 138.
The wifi and the usb have been deeply tested and they worked without 
problems. Maybe would be a good idea to make stress tests.

Once applied this ticket should be closed:
https://dev.openwrt.org/ticket/11704

Signed-off-by: José Vázquez Fernández ppvazquez...@gmail.com
Signed-off-by: Daniel González dgcb...@gmail.com

Index: target/linux/lantiq/files/arch/mips/lantiq/xway/mach-arv.c
===
--- target/linux/lantiq/files/arch/mips/lantiq/xway/mach-arv.c (revisión: 
36330)
+++ target/linux/lantiq/files/arch/mips/lantiq/xway/mach-arv.c (copia de 
trabajo)

@@ -529,7 +529,7 @@
ltq_register_gpio_keys_polled(-1, LTQ_KEYS_POLL_INTERVAL,
ARRAY_SIZE(arv4518pw_gpio_keys), arv4518pw_gpio_keys);
arv_load_nor(0x40);
- ltq_pci_data.gpio = PCI_GNT2 | PCI_REQ2;
+ // ltq_pci_data.gpio = PCI_GNT2 | PCI_REQ2;
ltq_register_pci(ltq_pci_data);
xway_register_dwc(ARV4518PW_USB);
arv_register_ethernet(ARV4518PW_MAC_ADDR);

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[OpenWrt-Devel] [PATCH] [lantiq] Fix ARV4518PW wifi issue. AA/12.09-rc2.

2013-04-13 Thread José Vázquez Fernández

This patch corrects an issue with the wifi for the ARV4518PW in Attitude 
Adjustment that involves the PCI bus configuration in this board. The bootlog 
shows: ath5k: phy0: failed to warm reset the MAC Chip.
Commenting this line forces the board definition to be configured with the 
default PCI_GNT1 | PCI_REQ1 defined in line 138.
The wifi and the usb have been deeply tested and they worked without problems. 
Maybe would be a good idea to make stress tests.
Once applied this ticket should be closed:
https://dev.openwrt.org/ticket/11704

Signed-off-by: José Vázquez Fernández ppvazquez...@gmail.com
Signed-off-by: Daniel González dgcb...@gmail.com
Index: target/linux/lantiq/files/arch/mips/lantiq/xway/mach-arv.c
===
--- target/linux/lantiq/files/arch/mips/lantiq/xway/mach-arv.c  (revisión: 
36330)
+++ target/linux/lantiq/files/arch/mips/lantiq/xway/mach-arv.c  (copia de 
trabajo)
@@ -529,7 +529,7 @@
ltq_register_gpio_keys_polled(-1, LTQ_KEYS_POLL_INTERVAL,
ARRAY_SIZE(arv4518pw_gpio_keys), 
arv4518pw_gpio_keys);
arv_load_nor(0x40);
-   ltq_pci_data.gpio = PCI_GNT2 | PCI_REQ2;
+   // ltq_pci_data.gpio = PCI_GNT2 | PCI_REQ2;
ltq_register_pci(ltq_pci_data);
xway_register_dwc(ARV4518PW_USB);
arv_register_ethernet(ARV4518PW_MAC_ADDR);


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