Re: [osg-users] BUG REPORT: LineSegmentIntersector

2010-03-26 Thread Robert Osfield
Hi Sean, On Thu, Mar 25, 2010 at 7:34 PM, Sean Spicer sean.spi...@aqumin.com wrote: I came across a nasty little bug today: (a) Create an osg::Geometry and assign a vertex array that is an osg::Vec4Array (b) Try to pick with a LineSegmentIntersector (c) CRASH Ouch. Digging a little bit,

[osg-users] BUG REPORT: LineSegmentIntersector

2010-03-25 Thread Sean Spicer
I came across a nasty little bug today: (a) Create an osg::Geometry and assign a vertex array that is an osg::Vec4Array (b) Try to pick with a LineSegmentIntersector (c) CRASH Digging a little bit, it looks like LineSegmentIntersector assumes that vertex arrays are always of type osg::Vec3Array.

Re: [osg-users] BUG REPORT: LineSegmentIntersector

2010-03-25 Thread Jason Daly
Sean Spicer wrote: I came across a nasty little bug today: (a) Create an osg::Geometry and assign a vertex array that is an osg::Vec4Array (b) Try to pick with a LineSegmentIntersector (c) CRASH Digging a little bit, it looks like LineSegmentIntersector assumes that vertex arrays are always of

Re: [osg-users] BUG REPORT: LineSegmentIntersector

2010-03-25 Thread Sean Spicer
Without giving away too much IP, one of the reasons why one might want to think about using Vec4Arrays is to take advantage of host-side SIMD operations - which commonly use 128bit registers (4 floats). I agree, this is a can of worms. sean

Re: [osg-users] BUG REPORT: LineSegmentIntersector

2010-03-25 Thread Sean Spicer
Looking at osg::State::setVertexPointer(const Array *array), I see that the stride parameter is always 0. If we relaxed this constraint, and allowed an Array to have a stride, I might be able to overcome the problem I am working on. Any comments on what impact this might have ? Also, in order

Re: [osg-users] BUG REPORT: LineSegmentIntersector

2010-03-25 Thread Jason Daly
Sean Spicer wrote: Without giving away too much IP, one of the reasons why one might want to think about using Vec4Arrays is to take advantage of host-side SIMD operations - which commonly use 128bit registers (4 floats). I agree, this is a can of worms. Mmmm, yes, I suppose that would be