On Fri, Oct 2, 2009 at 2:33 AM, Qingyuan Deng wrote:
> Hi all,
>
> I am not sure if this topic is related to Perfmon2, but I think there should
> be some more experienced people familiar with this...
>
> I am trying to manually program on uncore MSRs to count some events, by
> adding some system c
Thank you! Yes, you are right, when I swap the addresses it seems works
well. But in Intel's manual 3B(Table B-5), it is that the 0x3B0 is for
MSR_UNCORE_PERFEVTSEL0 and the 0x3C0 is for MSR_UNCORE_PMC0. It's so
confusing and nearly made me bald after pulling hair for a whole day...
Thank you so mu
On Fri, Oct 2, 2009 at 4:28 PM, Qingyuan Deng wrote:
> Thank you! Yes, you are right, when I swap the addresses it seems works
> well. But in Intel's manual 3B(Table B-5), it is that the 0x3B0 is for
> MSR_UNCORE_PERFEVTSEL0 and the 0x3C0 is for MSR_UNCORE_PMC0. It's so
> confusing and nearly made
Thank you! Hopefully there is no other bug in the manual.
On Fri, Oct 2, 2009 at 10:40 AM, stephane eranian wrote:
> On Fri, Oct 2, 2009 at 4:28 PM, Qingyuan Deng wrote:
> > Thank you! Yes, you are right, when I swap the addresses it seems works
> > well. But in Intel's manual 3B(Table B-5), it
Hello,
I am happy to announce that the source code for the brand new version
of libpfm, libpfm4, is now available.
Libpfm4 is a helper library which can be used by tools programming
PMU other performance events on Linux and other operating systems.
The core service translates an event name into
